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| author | Tanya Lattner <tonic@nondot.org> | 2008-05-22 05:20:31 +0000 |
|---|---|---|
| committer | Tanya Lattner <tonic@nondot.org> | 2008-05-22 05:20:31 +0000 |
| commit | 0f56a06a84286b88d5b0b9b9b7d5fc7fea0d483f (patch) | |
| tree | 8ccbc3a9c98b9a8f521d83c03af6b8c9b2bbdf49 | |
| parent | 4f4be876a938ef6dc53f589731e5f95c0dd5505b (diff) | |
| download | llvm-0f56a06a84286b88d5b0b9b9b7d5fc7fea0d483f.tar.gz | |
Merge from mainline.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_23@51416 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/X86/X86InstrSSE.td | 14 |
1 files changed, 10 insertions, 4 deletions
diff --git a/lib/Target/X86/X86InstrSSE.td b/lib/Target/X86/X86InstrSSE.td index 720e8c10062d..e19b97e1ab6b 100644 --- a/lib/Target/X86/X86InstrSSE.td +++ b/lib/Target/X86/X86InstrSSE.td @@ -1015,7 +1015,7 @@ def MOVZSS2PSrm : SSI<0x10, MRMSrcMem, (outs VR128:$dst), (ins f32mem:$src), [(set VR128:$dst, (v4f32 (X86vzmovl (v4f32 (scalar_to_vector (loadf32 addr:$src))))))]>; -def : Pat<(v4f32 (X86vzmovl (memopv4f32 addr:$src))), +def : Pat<(v4f32 (X86vzmovl (loadv4f32 addr:$src))), (MOVZSS2PSrm addr:$src)>; //===----------------------------------------------------------------------===// @@ -2273,7 +2273,9 @@ def MOVZSD2PDrm : SDI<0x10, MRMSrcMem, (outs VR128:$dst), (ins f64mem:$src), (v2f64 (X86vzmovl (v2f64 (scalar_to_vector (loadf64 addr:$src))))))]>; -def : Pat<(v2f64 (X86vzmovl (memopv2f64 addr:$src))), +def : Pat<(v2f64 (X86vzmovl (loadv2f64 addr:$src))), + (MOVZSD2PDrm addr:$src)>; +def : Pat<(v2f64 (X86vzmovl (bc_v2f64 (loadv4f32 addr:$src)))), (MOVZSD2PDrm addr:$src)>; def : Pat<(v2f64 (X86vzload addr:$src)), (MOVZSD2PDrm addr:$src)>; } @@ -2315,13 +2317,17 @@ def MOVZPQILo2PQIrr : I<0x7E, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src), [(set VR128:$dst, (v2i64 (X86vzmovl (v2i64 VR128:$src))))]>, XS, Requires<[HasSSE2]>; -let AddedComplexity = 20 in +let AddedComplexity = 20 in { def MOVZPQILo2PQIrm : I<0x7E, MRMSrcMem, (outs VR128:$dst), (ins i128mem:$src), "movq\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (v2i64 (X86vzmovl - (memopv2i64 addr:$src))))]>, + (loadv2i64 addr:$src))))]>, XS, Requires<[HasSSE2]>; +def : Pat<(v2i64 (X86vzmovl (bc_v2i64 (loadv4i32 addr:$src)))), + (MOVZPQILo2PQIrm addr:$src)>; +} + //===----------------------------------------------------------------------===// // SSE3 Instructions //===----------------------------------------------------------------------===// |