diff options
author | Jim Lin <jim@andestech.com> | 2022-01-04 14:40:31 +0800 |
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committer | Jim Lin <jim@andestech.com> | 2022-01-04 15:05:51 +0800 |
commit | c64ffa22d143fc58858bdb1105a22a5fc73ad26e (patch) | |
tree | 809cc062cdf5be8a8c7d03952bb7a2b6c024a279 | |
parent | c8e988fa78c6533d59dd2c065ca0393eb244e675 (diff) | |
download | llvm-c64ffa22d143fc58858bdb1105a22a5fc73ad26e.tar.gz |
[M68k][NFC] Fix unused argument warnings in M68kInstrArithmetic.td
-rw-r--r-- | llvm/lib/Target/M68k/M68kInstrArithmetic.td | 49 |
1 files changed, 23 insertions, 26 deletions
diff --git a/llvm/lib/Target/M68k/M68kInstrArithmetic.td b/llvm/lib/Target/M68k/M68kInstrArithmetic.td index b2c05365d30b..ef50de576641 100644 --- a/llvm/lib/Target/M68k/M68kInstrArithmetic.td +++ b/llvm/lib/Target/M68k/M68kInstrArithmetic.td @@ -150,8 +150,7 @@ let mayLoad = 1, mayStore = 1 in { // FIXME MxBiArOp_FMR/FMI cannot consume CCR from MxAdd/MxSub which leads for // MxAdd to survive the match and subsequent mismatch. -class MxBiArOp_FMR<string MN, SDNode NODE, MxType TYPE, - MxOperand MEMOpd, ComplexPattern MEMPat, +class MxBiArOp_FMR<string MN, MxType TYPE, MxOperand MEMOpd, bits<4> CMD, MxEncEA EA, MxEncExt EXT> : MxInst<(outs), (ins MEMOpd:$dst, TYPE.ROp:$opd), MN#"."#TYPE.Prefix#"\t$opd, $dst", @@ -160,8 +159,7 @@ class MxBiArOp_FMR<string MN, SDNode NODE, MxType TYPE, !cast<MxEncOpMode>("MxOpMode"#TYPE.Size#"EA"#TYPE.RLet), MxBeadDReg<1>, EA, EXT>>; -class MxBiArOp_FMI<string MN, SDNode NODE, MxType TYPE, - MxOperand MEMOpd, ComplexPattern MEMPat, +class MxBiArOp_FMI<string MN, MxType TYPE, MxOperand MEMOpd, bits<4> CMD, MxEncEA MEMEA, MxEncExt MEMExt> : MxInst<(outs), (ins MEMOpd:$dst, TYPE.IOp:$opd), MN#"."#TYPE.Prefix#"\t$opd, $dst", @@ -218,47 +216,47 @@ multiclass MxBiArOp_DF<string MN, SDNode NODE, bit isComm, def NAME#"32di" : MxBiArOp_RFRI_xEA<MN, NODE, MxType32d, CMD>; // op $reg, $mem - def NAME#"8pd" : MxBiArOp_FMR<MN, NODE, MxType8d, MxType8.POp, MxType8.PPat, + def NAME#"8pd" : MxBiArOp_FMR<MN, MxType8d, MxType8.POp, CMD, MxEncEAp_0, MxExtI16_0>; - def NAME#"16pd" : MxBiArOp_FMR<MN, NODE, MxType16d, MxType16.POp, MxType16.PPat, + def NAME#"16pd" : MxBiArOp_FMR<MN, MxType16d, MxType16.POp, CMD, MxEncEAp_0, MxExtI16_0>; - def NAME#"32pd" : MxBiArOp_FMR<MN, NODE, MxType32d, MxType32.POp, MxType32.PPat, + def NAME#"32pd" : MxBiArOp_FMR<MN, MxType32d, MxType32.POp, CMD, MxEncEAp_0, MxExtI16_0>; - def NAME#"8fd" : MxBiArOp_FMR<MN, NODE, MxType8d, MxType8.FOp, MxType8.FPat, + def NAME#"8fd" : MxBiArOp_FMR<MN, MxType8d, MxType8.FOp, CMD, MxEncEAf_0, MxExtBrief_0>; - def NAME#"16fd" : MxBiArOp_FMR<MN, NODE, MxType16d, MxType16.FOp, MxType16.FPat, + def NAME#"16fd" : MxBiArOp_FMR<MN, MxType16d, MxType16.FOp, CMD, MxEncEAf_0, MxExtBrief_0>; - def NAME#"32fd" : MxBiArOp_FMR<MN, NODE, MxType32d, MxType32.FOp, MxType32.FPat, + def NAME#"32fd" : MxBiArOp_FMR<MN, MxType32d, MxType32.FOp, CMD, MxEncEAf_0, MxExtBrief_0>; - def NAME#"8jd" : MxBiArOp_FMR<MN, NODE, MxType8d, MxType8.JOp, MxType8.JPat, + def NAME#"8jd" : MxBiArOp_FMR<MN, MxType8d, MxType8.JOp, CMD, MxEncEAj_0, MxExtEmpty>; - def NAME#"16jd" : MxBiArOp_FMR<MN, NODE, MxType16d, MxType16.JOp, MxType16.JPat, + def NAME#"16jd" : MxBiArOp_FMR<MN, MxType16d, MxType16.JOp, CMD, MxEncEAj_0, MxExtEmpty>; - def NAME#"32jd" : MxBiArOp_FMR<MN, NODE, MxType32d, MxType32.JOp, MxType32.JPat, + def NAME#"32jd" : MxBiArOp_FMR<MN, MxType32d, MxType32.JOp, CMD, MxEncEAj_0, MxExtEmpty>; // op $imm, $mem - def NAME#"8pi" : MxBiArOp_FMI<MN, NODE, MxType8, MxType8.POp, MxType8.PPat, + def NAME#"8pi" : MxBiArOp_FMI<MN, MxType8, MxType8.POp, CMDI, MxEncEAp_0, MxExtI16_0>; - def NAME#"16pi" : MxBiArOp_FMI<MN, NODE, MxType16, MxType16.POp, MxType16.PPat, + def NAME#"16pi" : MxBiArOp_FMI<MN, MxType16, MxType16.POp, CMDI, MxEncEAp_0, MxExtI16_0>; - def NAME#"32pi" : MxBiArOp_FMI<MN, NODE, MxType32, MxType32.POp, MxType32.PPat, + def NAME#"32pi" : MxBiArOp_FMI<MN, MxType32, MxType32.POp, CMDI, MxEncEAp_0, MxExtI16_0>; - def NAME#"8fi" : MxBiArOp_FMI<MN, NODE, MxType8, MxType8.FOp, MxType8.FPat, + def NAME#"8fi" : MxBiArOp_FMI<MN, MxType8, MxType8.FOp, CMDI, MxEncEAf_0, MxExtBrief_0>; - def NAME#"16fi" : MxBiArOp_FMI<MN, NODE, MxType16, MxType16.FOp, MxType16.FPat, + def NAME#"16fi" : MxBiArOp_FMI<MN, MxType16, MxType16.FOp, CMDI, MxEncEAf_0, MxExtBrief_0>; - def NAME#"32fi" : MxBiArOp_FMI<MN, NODE, MxType32, MxType32.FOp, MxType32.FPat, + def NAME#"32fi" : MxBiArOp_FMI<MN, MxType32, MxType32.FOp, CMDI, MxEncEAf_0, MxExtBrief_0>; - def NAME#"8ji" : MxBiArOp_FMI<MN, NODE, MxType8, MxType8.JOp, MxType8.JPat, + def NAME#"8ji" : MxBiArOp_FMI<MN, MxType8, MxType8.JOp, CMDI, MxEncEAj_0, MxExtEmpty>; - def NAME#"16ji" : MxBiArOp_FMI<MN, NODE, MxType16, MxType16.JOp, MxType16.JPat, + def NAME#"16ji" : MxBiArOp_FMI<MN, MxType16, MxType16.JOp, CMDI, MxEncEAj_0, MxExtEmpty>; - def NAME#"32ji" : MxBiArOp_FMI<MN, NODE, MxType32, MxType32.JOp, MxType32.JPat, + def NAME#"32ji" : MxBiArOp_FMI<MN, MxType32, MxType32.JOp, CMDI, MxEncEAj_0, MxExtEmpty>; def NAME#"16dr" : MxBiArOp_RFRR_xEA<MN, NODE, MxType16d, MxType16r, @@ -284,8 +282,7 @@ multiclass MxBiArOp_DF<string MN, SDNode NODE, bit isComm, // operations do not produce CCR we should not match them against Mx nodes that // produce it. let Pattern = [(null_frag)] in -multiclass MxBiArOp_AF<string MN, SDNode NODE, bit isComm, - bits<4> CMD, bits<4> CMDI> { +multiclass MxBiArOp_AF<string MN, SDNode NODE, bits<4> CMD> { def NAME#"32ak" : MxBiArOp_RFRM<MN, NODE, MxType32a, MxType32.KOp, MxType32.KPat, CMD, MxEncEAk, MxExtBrief_2>; @@ -307,9 +304,9 @@ multiclass MxBiArOp_AF<string MN, SDNode NODE, bit isComm, // NOTE These naturally produce CCR defm ADD : MxBiArOp_DF<"add", MxAdd, 1, 0xD, 0x6>; -defm ADD : MxBiArOp_AF<"adda", MxAdd, 1, 0xD, 0x6>; +defm ADD : MxBiArOp_AF<"adda", MxAdd, 0xD>; defm SUB : MxBiArOp_DF<"sub", MxSub, 0, 0x9, 0x4>; -defm SUB : MxBiArOp_AF<"suba", MxSub, 0, 0x9, 0x4>; +defm SUB : MxBiArOp_AF<"suba", MxSub, 0x9>; let Uses = [CCR], Defs = [CCR] in { |