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| author | Daniel Sanders <daniel.sanders@imgtec.com> | 2016-07-26 14:46:11 +0000 |
|---|---|---|
| committer | Daniel Sanders <daniel.sanders@imgtec.com> | 2016-07-26 14:46:11 +0000 |
| commit | 4768f3dd31d252e01ca2e47140c2a224d590897a (patch) | |
| tree | a19c267111cb06a1573bf263811c26b10eecb64f /lib/Target/Mips/Mips16FrameLowering.cpp | |
| parent | c4320ab2d84139cb7401037ca351983771b39def (diff) | |
| download | llvm-4768f3dd31d252e01ca2e47140c2a224d590897a.tar.gz | |
[mips] Fix typos in spelling of lowerRETURNADDR.
The first letter was mistakenly capitalized.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276753 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/Mips16FrameLowering.cpp')
| -rw-r--r-- | lib/Target/Mips/Mips16FrameLowering.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/Mips/Mips16FrameLowering.cpp b/lib/Target/Mips/Mips16FrameLowering.cpp index e937ffa7a7ab..55a762c83992 100644 --- a/lib/Target/Mips/Mips16FrameLowering.cpp +++ b/lib/Target/Mips/Mips16FrameLowering.cpp @@ -120,7 +120,7 @@ spillCalleeSavedRegisters(MachineBasicBlock &MBB, for (unsigned i = 0, e = CSI.size(); i != e; ++i) { // Add the callee-saved register as live-in. Do not add if the register is // RA and return address is taken, because it has already been added in - // method MipsTargetLowering::LowerRETURNADDR. + // method MipsTargetLowering::lowerRETURNADDR. // It's killed at the spill, unless the register is RA and return address // is taken. unsigned Reg = CSI[i].getReg(); |