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authorDaniel Sanders <daniel.sanders@imgtec.com>2016-07-26 14:46:11 +0000
committerDaniel Sanders <daniel.sanders@imgtec.com>2016-07-26 14:46:11 +0000
commit4768f3dd31d252e01ca2e47140c2a224d590897a (patch)
treea19c267111cb06a1573bf263811c26b10eecb64f /lib/Target
parentc4320ab2d84139cb7401037ca351983771b39def (diff)
downloadllvm-4768f3dd31d252e01ca2e47140c2a224d590897a.tar.gz
[mips] Fix typos in spelling of lowerRETURNADDR.
The first letter was mistakenly capitalized. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276753 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target')
-rw-r--r--lib/Target/Mips/Mips16FrameLowering.cpp2
-rw-r--r--lib/Target/Mips/Mips16InstrInfo.cpp2
-rw-r--r--lib/Target/Mips/MipsSEFrameLowering.cpp2
3 files changed, 3 insertions, 3 deletions
diff --git a/lib/Target/Mips/Mips16FrameLowering.cpp b/lib/Target/Mips/Mips16FrameLowering.cpp
index e937ffa7a7ab..55a762c83992 100644
--- a/lib/Target/Mips/Mips16FrameLowering.cpp
+++ b/lib/Target/Mips/Mips16FrameLowering.cpp
@@ -120,7 +120,7 @@ spillCalleeSavedRegisters(MachineBasicBlock &MBB,
for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
// Add the callee-saved register as live-in. Do not add if the register is
// RA and return address is taken, because it has already been added in
- // method MipsTargetLowering::LowerRETURNADDR.
+ // method MipsTargetLowering::lowerRETURNADDR.
// It's killed at the spill, unless the register is RA and return address
// is taken.
unsigned Reg = CSI[i].getReg();
diff --git a/lib/Target/Mips/Mips16InstrInfo.cpp b/lib/Target/Mips/Mips16InstrInfo.cpp
index daa1355ffefd..98541ba35d04 100644
--- a/lib/Target/Mips/Mips16InstrInfo.cpp
+++ b/lib/Target/Mips/Mips16InstrInfo.cpp
@@ -172,7 +172,7 @@ static void addSaveRestoreRegs(MachineInstrBuilder &MIB,
for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
// Add the callee-saved register as live-in. Do not add if the register is
// RA and return address is taken, because it has already been added in
- // method MipsTargetLowering::LowerRETURNADDR.
+ // method MipsTargetLowering::lowerRETURNADDR.
// It's killed at the spill, unless the register is RA and return address
// is taken.
unsigned Reg = CSI[e-i-1].getReg();
diff --git a/lib/Target/Mips/MipsSEFrameLowering.cpp b/lib/Target/Mips/MipsSEFrameLowering.cpp
index a7ddd7752736..9dd5150f64f8 100644
--- a/lib/Target/Mips/MipsSEFrameLowering.cpp
+++ b/lib/Target/Mips/MipsSEFrameLowering.cpp
@@ -778,7 +778,7 @@ spillCalleeSavedRegisters(MachineBasicBlock &MBB,
for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
// Add the callee-saved register as live-in. Do not add if the register is
// RA and return address is taken, because it has already been added in
- // method MipsTargetLowering::LowerRETURNADDR.
+ // method MipsTargetLowering::lowerRETURNADDR.
// It's killed at the spill, unless the register is RA and return address
// is taken.
unsigned Reg = CSI[i].getReg();