diff options
author | Akira Hatanaka <ahatanaka@mips.com> | 2012-08-03 22:57:02 +0000 |
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committer | Akira Hatanaka <ahatanaka@mips.com> | 2012-08-03 22:57:02 +0000 |
commit | 24e79e55daa5d2812d2a5ea0a282ebe48ef465e6 (patch) | |
tree | be3518122bdf9eb86282e31e2e212da07cc2754b /test/CodeGen | |
parent | dcc4436cddc9b5d155040ed3ed38e9070ec4e3b8 (diff) | |
download | llvm-24e79e55daa5d2812d2a5ea0a282ebe48ef465e6.tar.gz |
1. Redo mips16 instructions to avoid multiple opcodes for same instruction.
Change these to patterns.
2. Add another 16 instructions.
Patch by Reed Kotler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161272 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen')
-rw-r--r-- | test/CodeGen/Mips/and1.ll | 17 | ||||
-rw-r--r-- | test/CodeGen/Mips/lb1.ll | 18 | ||||
-rw-r--r-- | test/CodeGen/Mips/lbu1.ll | 19 | ||||
-rw-r--r-- | test/CodeGen/Mips/lh1.ll | 18 | ||||
-rw-r--r-- | test/CodeGen/Mips/lhu1.ll | 19 | ||||
-rw-r--r-- | test/CodeGen/Mips/neg1.ll | 15 | ||||
-rw-r--r-- | test/CodeGen/Mips/not1.ll | 16 | ||||
-rw-r--r-- | test/CodeGen/Mips/or1.ll | 17 | ||||
-rw-r--r-- | test/CodeGen/Mips/sb1.ll | 20 | ||||
-rw-r--r-- | test/CodeGen/Mips/sh1.ll | 20 | ||||
-rw-r--r-- | test/CodeGen/Mips/sll1.ll | 19 | ||||
-rw-r--r-- | test/CodeGen/Mips/sll2.ll | 19 | ||||
-rw-r--r-- | test/CodeGen/Mips/sra1.ll | 15 | ||||
-rw-r--r-- | test/CodeGen/Mips/sra2.ll | 17 | ||||
-rw-r--r-- | test/CodeGen/Mips/srl1.ll | 18 | ||||
-rw-r--r-- | test/CodeGen/Mips/srl2.ll | 20 | ||||
-rw-r--r-- | test/CodeGen/Mips/sub1.ll | 15 | ||||
-rw-r--r-- | test/CodeGen/Mips/sub2.ll | 17 | ||||
-rw-r--r-- | test/CodeGen/Mips/xor1.ll | 17 |
19 files changed, 336 insertions, 0 deletions
diff --git a/test/CodeGen/Mips/and1.ll b/test/CodeGen/Mips/and1.ll new file mode 100644 index 000000000000..4ff1204fe7ae --- /dev/null +++ b/test/CodeGen/Mips/and1.ll @@ -0,0 +1,17 @@ +; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16 + +@x = global i32 65504, align 4 +@y = global i32 60929, align 4 +@.str = private unnamed_addr constant [7 x i8] c"%08x \0A\00", align 1 + +define i32 @main() nounwind { +entry: + %0 = load i32* @x, align 4 + %1 = load i32* @y, align 4 + %and = and i32 %0, %1 +; 16: and ${{[0-9]+}}, ${{[0-9]+}} + %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([7 x i8]* @.str, i32 0, i32 0), i32 %and) + ret i32 0 +} + +declare i32 @printf(i8*, ...) diff --git a/test/CodeGen/Mips/lb1.ll b/test/CodeGen/Mips/lb1.ll new file mode 100644 index 000000000000..aac2767a4e40 --- /dev/null +++ b/test/CodeGen/Mips/lb1.ll @@ -0,0 +1,18 @@ +; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16 + +@c = global i8 -1, align 1 +@.str = private unnamed_addr constant [5 x i8] c"%i \0A\00", align 1 + +define i32 @main() nounwind { +entry: + %i = alloca i32, align 4 + %0 = load i8* @c, align 1 +; 16: lb ${{[0-9]+}}, 0(${{[0-9]+}}) + %conv = sext i8 %0 to i32 + store i32 %conv, i32* %i, align 4 + %1 = load i32* %i, align 4 + %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([5 x i8]* @.str, i32 0, i32 0), i32 %1) + ret i32 0 +} + +declare i32 @printf(i8*, ...) diff --git a/test/CodeGen/Mips/lbu1.ll b/test/CodeGen/Mips/lbu1.ll new file mode 100644 index 000000000000..63e0cca1684d --- /dev/null +++ b/test/CodeGen/Mips/lbu1.ll @@ -0,0 +1,19 @@ +; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16 + +@c = global i8 97, align 1 +@.str = private unnamed_addr constant [5 x i8] c"%c \0A\00", align 1 + +define i32 @main() nounwind { +entry: + %i = alloca i32, align 4 + %0 = load i8* @c, align 1 + %conv = zext i8 %0 to i32 +; 16: lbu ${{[0-9]+}}, 0(${{[0-9]+}}) + store i32 %conv, i32* %i, align 4 + %1 = load i8* @c, align 1 + %conv1 = zext i8 %1 to i32 + %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([5 x i8]* @.str, i32 0, i32 0), i32 %conv1) + ret i32 0 +} + +declare i32 @printf(i8*, ...) diff --git a/test/CodeGen/Mips/lh1.ll b/test/CodeGen/Mips/lh1.ll new file mode 100644 index 000000000000..1f95b0903466 --- /dev/null +++ b/test/CodeGen/Mips/lh1.ll @@ -0,0 +1,18 @@ +; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16 + +@s = global i16 -1, align 2 +@.str = private unnamed_addr constant [5 x i8] c"%i \0A\00", align 1 + +define i32 @main() nounwind { +entry: + %i = alloca i32, align 4 + %0 = load i16* @s, align 2 + %conv = sext i16 %0 to i32 +; 16: lh ${{[0-9]+}}, 0(${{[0-9]+}}) + store i32 %conv, i32* %i, align 4 + %1 = load i32* %i, align 4 + %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([5 x i8]* @.str, i32 0, i32 0), i32 %1) + ret i32 0 +} + +declare i32 @printf(i8*, ...) diff --git a/test/CodeGen/Mips/lhu1.ll b/test/CodeGen/Mips/lhu1.ll new file mode 100644 index 000000000000..0cfcede669e0 --- /dev/null +++ b/test/CodeGen/Mips/lhu1.ll @@ -0,0 +1,19 @@ +; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16 + + +@s = global i16 255, align 2 +@.str = private unnamed_addr constant [5 x i8] c"%i \0A\00", align 1 + +define i32 @main() nounwind { +entry: + %i = alloca i32, align 4 + %0 = load i16* @s, align 2 + %conv = zext i16 %0 to i32 +; 16: lhu ${{[0-9]+}}, 0(${{[0-9]+}}) + store i32 %conv, i32* %i, align 4 + %1 = load i32* %i, align 4 + %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([5 x i8]* @.str, i32 0, i32 0), i32 %1) + ret i32 0 +} + +declare i32 @printf(i8*, ...) diff --git a/test/CodeGen/Mips/neg1.ll b/test/CodeGen/Mips/neg1.ll new file mode 100644 index 000000000000..281e62621565 --- /dev/null +++ b/test/CodeGen/Mips/neg1.ll @@ -0,0 +1,15 @@ +; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16 + +@i = global i32 10, align 4 +@.str = private unnamed_addr constant [5 x i8] c"%i \0A\00", align 1 + +define i32 @main() nounwind { +entry: + %0 = load i32* @i, align 4 + %sub = sub nsw i32 0, %0 +; 16: neg ${{[0-9]+}}, ${{[0-9]+}} + %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([5 x i8]* @.str, i32 0, i32 0), i32 %sub) + ret i32 0 +} + +declare i32 @printf(i8*, ...) diff --git a/test/CodeGen/Mips/not1.ll b/test/CodeGen/Mips/not1.ll new file mode 100644 index 000000000000..2163b236c56f --- /dev/null +++ b/test/CodeGen/Mips/not1.ll @@ -0,0 +1,16 @@ +; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16 + +@x = global i32 65504, align 4 +@y = global i32 60929, align 4 +@.str = private unnamed_addr constant [7 x i8] c"%08x \0A\00", align 1 + +define i32 @main() nounwind { +entry: + %0 = load i32* @x, align 4 + %neg = xor i32 %0, -1 +; 16: not ${{[0-9]+}}, ${{[0-9]+}} + %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([7 x i8]* @.str, i32 0, i32 0), i32 %neg) + ret i32 0 +} + +declare i32 @printf(i8*, ...) diff --git a/test/CodeGen/Mips/or1.ll b/test/CodeGen/Mips/or1.ll new file mode 100644 index 000000000000..b1c36961f92b --- /dev/null +++ b/test/CodeGen/Mips/or1.ll @@ -0,0 +1,17 @@ +; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16 + +@x = global i32 65504, align 4 +@y = global i32 60929, align 4 +@.str = private unnamed_addr constant [7 x i8] c"%08x \0A\00", align 1 + +define i32 @main() nounwind { +entry: + %0 = load i32* @x, align 4 + %1 = load i32* @y, align 4 + %or = or i32 %0, %1 +; 16: or ${{[0-9]+}}, ${{[0-9]+}} + %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([7 x i8]* @.str, i32 0, i32 0), i32 %or) + ret i32 0 +} + +declare i32 @printf(i8*, ...) diff --git a/test/CodeGen/Mips/sb1.ll b/test/CodeGen/Mips/sb1.ll new file mode 100644 index 000000000000..e1a28d459548 --- /dev/null +++ b/test/CodeGen/Mips/sb1.ll @@ -0,0 +1,20 @@ +; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16 + +@i = global i32 97, align 4 +@c = common global i8 0, align 1 +@.str = private unnamed_addr constant [8 x i8] c"%i %c \0A\00", align 1 + +define i32 @main() nounwind { +entry: + %0 = load i32* @i, align 4 + %conv = trunc i32 %0 to i8 + store i8 %conv, i8* @c, align 1 + %1 = load i32* @i, align 4 + %2 = load i8* @c, align 1 + %conv1 = sext i8 %2 to i32 +; 16: sb ${{[0-9]+}}, 0(${{[0-9]+}}) + %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([8 x i8]* @.str, i32 0, i32 0), i32 %1, i32 %conv1) + ret i32 0 +} + +declare i32 @printf(i8*, ...) diff --git a/test/CodeGen/Mips/sh1.ll b/test/CodeGen/Mips/sh1.ll new file mode 100644 index 000000000000..1746ae284f2a --- /dev/null +++ b/test/CodeGen/Mips/sh1.ll @@ -0,0 +1,20 @@ +; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16 + +@i = global i32 97, align 4 +@s = common global i16 0, align 2 +@.str = private unnamed_addr constant [9 x i8] c"%i %hi \0A\00", align 1 + +define i32 @main() nounwind { +entry: + %0 = load i32* @i, align 4 + %conv = trunc i32 %0 to i16 + store i16 %conv, i16* @s, align 2 + %1 = load i32* @i, align 4 + %2 = load i16* @s, align 2 + %conv1 = sext i16 %2 to i32 +; 16: sh ${{[0-9]+}}, 0(${{[0-9]+}}) + %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([9 x i8]* @.str, i32 0, i32 0), i32 %1, i32 %conv1) + ret i32 0 +} + +declare i32 @printf(i8*, ...) diff --git a/test/CodeGen/Mips/sll1.ll b/test/CodeGen/Mips/sll1.ll new file mode 100644 index 000000000000..fdcd38c84b3a --- /dev/null +++ b/test/CodeGen/Mips/sll1.ll @@ -0,0 +1,19 @@ +; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16 + +@i = global i32 10, align 4 +@j = global i32 0, align 4 +@.str = private unnamed_addr constant [5 x i8] c"%i \0A\00", align 1 + +define i32 @main() nounwind { +entry: +; 16: sll ${{[0-9]+}}, ${{[0-9]+}}, {{[0-9]+}} + %0 = load i32* @i, align 4 + %shl = shl i32 %0, 4 +; 16: sll ${{[0-9]+}}, ${{[0-9]+}}, {{[0-9]+}} + store i32 %shl, i32* @j, align 4 + %1 = load i32* @j, align 4 + %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([5 x i8]* @.str, i32 0, i32 0), i32 %1) + ret i32 0 +} + +declare i32 @printf(i8*, ...) diff --git a/test/CodeGen/Mips/sll2.ll b/test/CodeGen/Mips/sll2.ll new file mode 100644 index 000000000000..c2af454cc853 --- /dev/null +++ b/test/CodeGen/Mips/sll2.ll @@ -0,0 +1,19 @@ +; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16 + +@i = global i32 10, align 4 +@j = global i32 4, align 4 +@.str = private unnamed_addr constant [5 x i8] c"%i \0A\00", align 1 + +define i32 @main() nounwind { +entry: + %0 = load i32* @i, align 4 + %1 = load i32* @j, align 4 + %shl = shl i32 %0, %1 +; 16: sllv ${{[0-9]+}}, ${{[0-9]+}} + store i32 %shl, i32* @i, align 4 + %2 = load i32* @j, align 4 + %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([5 x i8]* @.str, i32 0, i32 0), i32 %2) + ret i32 0 +} + +declare i32 @printf(i8*, ...) diff --git a/test/CodeGen/Mips/sra1.ll b/test/CodeGen/Mips/sra1.ll new file mode 100644 index 000000000000..15bf8d644ea3 --- /dev/null +++ b/test/CodeGen/Mips/sra1.ll @@ -0,0 +1,15 @@ +; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16 + +@i = global i32 -354, align 4 +@.str = private unnamed_addr constant [5 x i8] c"%i \0A\00", align 1 + +define i32 @main() nounwind { +entry: + %0 = load i32* @i, align 4 + %shr = ashr i32 %0, 3 +; 16: sra ${{[0-9]+}}, ${{[0-9]+}}, {{[0-9]+}} + %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([5 x i8]* @.str, i32 0, i32 0), i32 %shr) + ret i32 0 +} + +declare i32 @printf(i8*, ...) diff --git a/test/CodeGen/Mips/sra2.ll b/test/CodeGen/Mips/sra2.ll new file mode 100644 index 000000000000..26bf19d44020 --- /dev/null +++ b/test/CodeGen/Mips/sra2.ll @@ -0,0 +1,17 @@ +; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16 + +@i = global i32 -354, align 4 +@j = global i32 3, align 4 +@.str = private unnamed_addr constant [5 x i8] c"%i \0A\00", align 1 + +define i32 @main() nounwind { +entry: + %0 = load i32* @i, align 4 + %1 = load i32* @j, align 4 + %shr = ashr i32 %0, %1 +; 16: srav ${{[0-9]+}}, ${{[0-9]+}} + %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([5 x i8]* @.str, i32 0, i32 0), i32 %shr) + ret i32 0 +} + +declare i32 @printf(i8*, ...) diff --git a/test/CodeGen/Mips/srl1.ll b/test/CodeGen/Mips/srl1.ll new file mode 100644 index 000000000000..3474283faef9 --- /dev/null +++ b/test/CodeGen/Mips/srl1.ll @@ -0,0 +1,18 @@ +; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16 + +@i = global i32 10654, align 4 +@j = global i32 0, align 4 +@.str = private unnamed_addr constant [5 x i8] c"%i \0A\00", align 1 + +define i32 @main() nounwind { +entry: + %0 = load i32* @i, align 4 + %shr = lshr i32 %0, 4 +; 16: srl ${{[0-9]+}}, ${{[0-9]+}}, {{[0-9]+}} + store i32 %shr, i32* @j, align 4 + %1 = load i32* @j, align 4 + %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([5 x i8]* @.str, i32 0, i32 0), i32 %1) + ret i32 0 +} + +declare i32 @printf(i8*, ...) diff --git a/test/CodeGen/Mips/srl2.ll b/test/CodeGen/Mips/srl2.ll new file mode 100644 index 000000000000..26ec0927a559 --- /dev/null +++ b/test/CodeGen/Mips/srl2.ll @@ -0,0 +1,20 @@ +; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16 + +@i = global i32 10654, align 4 +@j = global i32 0, align 4 +@k = global i32 4, align 4 +@.str = private unnamed_addr constant [5 x i8] c"%i \0A\00", align 1 + +define i32 @main() nounwind { +entry: + %0 = load i32* @i, align 4 + %1 = load i32* @k, align 4 + %shr = lshr i32 %0, %1 +; 16: srlv ${{[0-9]+}}, ${{[0-9]+}} + store i32 %shr, i32* @j, align 4 + %2 = load i32* @j, align 4 + %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([5 x i8]* @.str, i32 0, i32 0), i32 %2) + ret i32 0 +} + +declare i32 @printf(i8*, ...) diff --git a/test/CodeGen/Mips/sub1.ll b/test/CodeGen/Mips/sub1.ll new file mode 100644 index 000000000000..195750b805d6 --- /dev/null +++ b/test/CodeGen/Mips/sub1.ll @@ -0,0 +1,15 @@ +; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16 + +@i = global i32 10, align 4 +@.str = private unnamed_addr constant [4 x i8] c"%i\0A\00", align 1 + +define i32 @main() nounwind { +entry: + %0 = load i32* @i, align 4 + %sub = sub nsw i32 %0, 5 +; 16: addiu ${{[0-9]+}}, -{{[0-9]+}} + %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([4 x i8]* @.str, i32 0, i32 0), i32 %sub) + ret i32 0 +} + +declare i32 @printf(i8*, ...) diff --git a/test/CodeGen/Mips/sub2.ll b/test/CodeGen/Mips/sub2.ll new file mode 100644 index 000000000000..4f6bfccec401 --- /dev/null +++ b/test/CodeGen/Mips/sub2.ll @@ -0,0 +1,17 @@ +; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16 + +@i = global i32 10, align 4 +@j = global i32 20, align 4 +@.str = private unnamed_addr constant [4 x i8] c"%i\0A\00", align 1 + +define i32 @main() nounwind { +entry: + %0 = load i32* @j, align 4 + %1 = load i32* @i, align 4 + %sub = sub nsw i32 %0, %1 +; 16: subu ${{[0-9]+}}, ${{[0-9]+}}, ${{[0-9]+}} + %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([4 x i8]* @.str, i32 0, i32 0), i32 %sub) + ret i32 0 +} + +declare i32 @printf(i8*, ...) diff --git a/test/CodeGen/Mips/xor1.ll b/test/CodeGen/Mips/xor1.ll new file mode 100644 index 000000000000..f2c13169cf7a --- /dev/null +++ b/test/CodeGen/Mips/xor1.ll @@ -0,0 +1,17 @@ +; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16 + +@x = global i32 65504, align 4 +@y = global i32 60929, align 4 +@.str = private unnamed_addr constant [7 x i8] c"%08x \0A\00", align 1 + +define i32 @main() nounwind { +entry: + %0 = load i32* @x, align 4 + %1 = load i32* @y, align 4 + %xor = xor i32 %0, %1 +; 16: xor ${{[0-9]+}}, ${{[0-9]+}} + %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([7 x i8]* @.str, i32 0, i32 0), i32 %xor) + ret i32 0 +} + +declare i32 @printf(i8*, ...) |