diff options
| -rw-r--r-- | llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp b/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp index bbf6720985b2..3dec980a819a 100644 --- a/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp +++ b/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp @@ -312,9 +312,8 @@ static void applySplitStoreZero128(MachineInstr &MI, MachineRegisterInfo &MRI, GISelChangeObserver &Observer) { B.setInstrAndDebugLoc(MI); GStore &Store = cast<GStore>(MI); - LLT ValTy = MRI.getType(Store.getValueReg()); - assert(ValTy.isVector() && "Expected a vector store value"); - (void)ValTy; + assert(MRI.getType(Store.getValueReg()).isVector() && + "Expected a vector store value"); LLT NewTy = LLT::scalar(64); Register PtrReg = Store.getPointerReg(); auto Zero = B.buildConstant(NewTy, 0); |