diff options
Diffstat (limited to 'llvm/test/CodeGen/AArch64/cmp-select-sign.ll')
| -rw-r--r-- | llvm/test/CodeGen/AArch64/cmp-select-sign.ll | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/llvm/test/CodeGen/AArch64/cmp-select-sign.ll b/llvm/test/CodeGen/AArch64/cmp-select-sign.ll index dce218349c57..44d0eed3d723 100644 --- a/llvm/test/CodeGen/AArch64/cmp-select-sign.ll +++ b/llvm/test/CodeGen/AArch64/cmp-select-sign.ll @@ -115,7 +115,7 @@ define <7 x i8> @sign_7xi8(<7 x i8> %a) { ; CHECK-LABEL: sign_7xi8: ; CHECK: // %bb.0: ; CHECK-NEXT: movi v1.8b, #1 -; CHECK-NEXT: sshr v0.8b, v0.8b, #7 +; CHECK-NEXT: cmlt v0.8b, v0.8b, #0 ; CHECK-NEXT: orr v0.8b, v0.8b, v1.8b ; CHECK-NEXT: ret %c = icmp sgt <7 x i8> %a, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> @@ -127,7 +127,7 @@ define <8 x i8> @sign_8xi8(<8 x i8> %a) { ; CHECK-LABEL: sign_8xi8: ; CHECK: // %bb.0: ; CHECK-NEXT: movi v1.8b, #1 -; CHECK-NEXT: sshr v0.8b, v0.8b, #7 +; CHECK-NEXT: cmlt v0.8b, v0.8b, #0 ; CHECK-NEXT: orr v0.8b, v0.8b, v1.8b ; CHECK-NEXT: ret %c = icmp sgt <8 x i8> %a, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> @@ -139,7 +139,7 @@ define <16 x i8> @sign_16xi8(<16 x i8> %a) { ; CHECK-LABEL: sign_16xi8: ; CHECK: // %bb.0: ; CHECK-NEXT: movi v1.16b, #1 -; CHECK-NEXT: sshr v0.16b, v0.16b, #7 +; CHECK-NEXT: cmlt v0.16b, v0.16b, #0 ; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b ; CHECK-NEXT: ret %c = icmp sgt <16 x i8> %a, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> @@ -150,7 +150,7 @@ define <16 x i8> @sign_16xi8(<16 x i8> %a) { define <3 x i32> @sign_3xi32(<3 x i32> %a) { ; CHECK-LABEL: sign_3xi32: ; CHECK: // %bb.0: -; CHECK-NEXT: sshr v0.4s, v0.4s, #31 +; CHECK-NEXT: cmlt v0.4s, v0.4s, #0 ; CHECK-NEXT: orr v0.4s, #1 ; CHECK-NEXT: ret %c = icmp sgt <3 x i32> %a, <i32 -1, i32 -1, i32 -1> @@ -161,7 +161,7 @@ define <3 x i32> @sign_3xi32(<3 x i32> %a) { define <4 x i32> @sign_4xi32(<4 x i32> %a) { ; CHECK-LABEL: sign_4xi32: ; CHECK: // %bb.0: -; CHECK-NEXT: sshr v0.4s, v0.4s, #31 +; CHECK-NEXT: cmlt v0.4s, v0.4s, #0 ; CHECK-NEXT: orr v0.4s, #1 ; CHECK-NEXT: ret %c = icmp sgt <4 x i32> %a, <i32 -1, i32 -1, i32 -1, i32 -1> @@ -177,7 +177,7 @@ define <4 x i32> @sign_4xi32_multi_use(<4 x i32> %a) { ; CHECK-NEXT: .cfi_def_cfa_offset 32 ; CHECK-NEXT: .cfi_offset w30, -16 ; CHECK-NEXT: movi v1.2d, #0xffffffffffffffff -; CHECK-NEXT: sshr v2.4s, v0.4s, #31 +; CHECK-NEXT: cmlt v2.4s, v0.4s, #0 ; CHECK-NEXT: cmgt v0.4s, v0.4s, v1.4s ; CHECK-NEXT: orr v2.4s, #1 ; CHECK-NEXT: xtn v0.4h, v0.4s @@ -214,7 +214,7 @@ define <4 x i32> @not_sign_4xi32_2(<4 x i32> %a) { ; CHECK-LABEL: not_sign_4xi32_2: ; CHECK: // %bb.0: ; CHECK-NEXT: adrp x8, .LCPI17_0 -; CHECK-NEXT: sshr v0.4s, v0.4s, #31 +; CHECK-NEXT: cmlt v0.4s, v0.4s, #0 ; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI17_0] ; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b ; CHECK-NEXT: ret |