summaryrefslogtreecommitdiff
Commit message (Collapse)AuthorAgeFilesLines
* [doc][GlobalISel]Improving generic opcodes for memory operationsarcpatch-D108319pooja22992021-10-201-2/+18
| | | | | | | | Adding examples for each of the generic opcodes involved in memory operations. Yet to add examples for some of the opcodes. Reviewed By: gandhi21299 Differential Revision: https://reviews.llvm.org/D108319
* [docs][GlobalISel]Adding info for G_JUMP_TABLE generic opcodepooja22992021-08-171-2/+12
| | | | | | Added description of jump table and G_JUMP_TABLE opcode. Differential Revision: https://reviews.llvm.org/D107630
* [AArch64][GlobalISel] Mark v16s8 <- v8s8, v8s8 G_CONCAT_VECTOR as legalJessica Paquette2021-08-053-2/+74
| | | | | | | | | G_CONCAT_VECTORS shows up from time to time when legalizing other instructions. We actually import patterns for the v16s8 <- v8s8, v8s8 case so marking it as legal gives us selection for free. Differential Revision: https://reviews.llvm.org/D107512
* Add llvm-stress binary to Bazel build configuration.Daniele Vettorel2021-08-051-0/+14
| | | | | | | | The `llvm-stress` binary is currently missing from the Bazel `BUILD` file for llvm. This patch adds it. Reviewed By: GMNGeoffrey Differential Revision: https://reviews.llvm.org/D107571
* [SLP] Add additional memory version tests.Florian Hahn2021-08-051-0/+100
|
* Fix signal during the call to checkOpenMPLoop.Jennifer Yu2021-08-052-3/+14
| | | | | | | | | | | | The root problem is a null pointer is accessed during the call to checkOpenMPLoop, because loop up bound expr is an error expression due to error diagnostic was emit early. To fix this, in setLCDeclAndLB, setUB and setStep instead return false, return true when LB, UB or Step contains Error, so that the checking is stopped in checkOpenMPLoop. Differential Revision: https://reviews.llvm.org/D107385
* [Transforms] Drop unnecessary const from return types (NFC)Kazu Hirata2021-08-053-5/+5
| | | | Identified with readability-const-return-type.
* [SLP]Do not emit extra shuffle for insertelements vectorization.Alexey Bataev2021-08-0511-51/+35
| | | | | | | | | If the vectorized insertelements instructions form indentity subvector (the subvector at the beginning of the long vector), it is just enough to extend the vector itself, no need to generate inserting subvector shuffle. Differential Revision: https://reviews.llvm.org/D107494
* [DAGCombiner][RISCV][AMDGPU] Call SimplifyDemandedBits at the end of ↵Craig Topper2021-08-055-142/+115
| | | | | | | | | | | | | | visitMULHU to enable known bits contant folding. We don't have real demanded bits support for MULHU, but we can still use the known bits based constant folding support at the end of SimplifyDemandedBits to simplify a MULHU. This helps with cases where we know the LHS and RHS have enough leading zeros so that the high multiply result is always 0. Reviewed By: RKSimon Differential Revision: https://reviews.llvm.org/D106471
* Fix build issues caused by 95800da914938129083df2fa0165c1901909c273David Sherwood2021-08-051-0/+2
|
* [LV] Consider ExtractValue as uniform.Sander de Smalen2021-08-053-28/+80
| | | | | | | | | Since all operands to ExtractValue must be loop-invariant when we deem the loop vectorizable, we can consider ExtractValue to be uniform. Reviewed By: david-arm Differential Revision: https://reviews.llvm.org/D107286
* [PowerPC][AIX] attribute aligned cannot decrease align of a vector var.Sean Fertile2021-08-054-3/+63
| | | | | | | On AIX an aligned attribute cannot decrease the alignment of a variable when placed on a variable declaration of vector type. Differential Revision: https://reviews.llvm.org/D107522
* [NFC][LoopIdiom] rename boolean variable NegStride to IsNegStrideeopXD2021-08-051-13/+13
| | | | | | | | Rename variable for better code readability. Reviewed By: lebedev.ri Differential Revision: https://reviews.llvm.org/D107570
* [AMDGPU][SDag] Better lowering for 32-bit ctlz/cttzJay Foad2021-08-056-369/+273
| | | | Differential Revision: https://reviews.llvm.org/D107566
* [AMDGPU][SDag] Better lowering for 64-bit ctlz/cttzJay Foad2021-08-059-1515/+1243
| | | | Differential Revision: https://reviews.llvm.org/D107546
* tsan: pass thr/pc to MemoryResetRangeDmitry Vyukov2021-08-051-1/+1
| | | | | | | | | | | | Pass thr/pc args to MemoryResetRange as we do everywhere. Currently they are unused by MemoryResetRange, but there is no reason to be inconsistent. Depends on D107562. Reviewed By: melver Differential Revision: https://reviews.llvm.org/D107563
* tsan: qualify autosDmitry Vyukov2021-08-052-4/+4
| | | | | | | | | | | | | | clang-tidy warning requires qualifying auto pointers: clang-tidy: warning: 'auto ctx' can be declared as 'auto *ctx' [llvm-qualified-auto] Fix remaing cases we have in tsan. Depends on D107561. Reviewed By: melver Differential Revision: https://reviews.llvm.org/D107562
* tsan: don't include tsan_interceptors.h for GoDmitry Vyukov2021-08-051-1/+4
| | | | | | | | | | | | None of the interceptors machinery is used/enabled for Go, so don't include the header, it's not needed (must not be). The problem is that we have fields in ThreadState that are not present in the Go build, so changes in thread_interceptors.h can cause Go build breakages due to missing fields. Reviewed By: melver Differential Revision: https://reviews.llvm.org/D107561
* [SimpifyCFG] Speculate a store preceded by a local non-escaping loadMomchil Velikov2021-08-052-0/+157
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In SimplifyCFG we may simplify the CFG by speculatively executing certain stores, when they are preceded by a store to the same location. This patch allows such speculation also when the stores are similarly preceded by a load. In order for this transformation to be correct we need to ensure that the memory location is writable and the store in the new location does not introduce a data race. Local objects (created by an `alloca` instruction) are always writable, so once we are past a read from a location it is valid to also write to that same location. Seeing just a load does not guarantee absence of a data race (unlike if we see a store) - the load may still be part of a race, just not causing undefined behaviour (cf. https://llvm.org/docs/Atomics.html#optimization-outside-atomic). In the original program, a data race might have been prevented by the condition, but once we move the store outside the condition, we must be sure a data race wasn't possible anyway, no matter what the condition evaluates to. One way to be sure that a local object is never concurrently read/written is check that its address never escapes the function. Hence this transformation is restricted to local, non-escaping objects. Reviewed By: nikic, lebedev.ri Differential Revision: https://reviews.llvm.org/D107281
* tsan: handle bugs in symbolizer more gracefullyDmitry Vyukov2021-08-051-0/+9
| | | | | | | | | | | | | For symbolizer we only process SIGSEGV signals synchronously (which means bug in symbolizer or in tsan). But we still want to reset in_symbolizer to fail gracefully. Symbolizer and user code use different memory allocators, so if we don't reset in_symbolizer we can get memory allocated with one being feed with another, which can cause more crashes. Reviewed By: melver Differential Revision: https://reviews.llvm.org/D107564
* tsan: modernize MaybeReportThreadLeakDmitry Vyukov2021-08-051-6/+5
| | | | | | | | | Use C++ casts and auto. Rename to CollectThreadLeaks b/c it's only collecting, not reporting. Reviewed By: melver Differential Revision: https://reviews.llvm.org/D107568
* [clang] [clang-repl] Fix linking against LLVMLineEditorMichał Górny2021-08-051-1/+1
| | | | | | | | | LLVMLineEditor library is part of the LLVM dylib. Move it into LLVM_LINK_COMPONENTS to avoid duplicate linking when dylib is being used. This fixes building standalone clang against installed LLVM without static libraries. Differential Revision: https://reviews.llvm.org/D107558
* [DAG] DAGCombiner::visitVECTOR_SHUFFLE - recognise INSERT_SUBVECTOR patternsSimon Pilgrim2021-08-059-36/+147
| | | | | | | | | | | | IR typically creates INSERT_SUBVECTOR patterns as a widening of the subvector with undefs to pad to the destination size, followed by a shuffle for the actual insertion - SelectionDAGBuilder has to do something similar for shuffles when source/destination vectors are different sizes. This combine attempts to recognize these patterns by looking for a shuffle of a subvector (from a CONCAT_VECTORS) that starts at a modulo of its size into an otherwise identity shuffle of the base vector. This uncovered a couple of target-specific issues as we haven't often created INSERT_SUBVECTOR nodes in generic code - aarch64 could only handle insertions into the bottom of undefs (i.e. a vector widening), and x86-avx512 vXi1 insertion wasn't keeping track of undef elements in the base vector. Fixes PR50053 Differential Revision: https://reviews.llvm.org/D107068
* [VectorCombine] Limit scalarization known non-poison indices.Florian Hahn2021-08-052-4/+9
| | | | | | | | | | | We can only trust the range of the index if it is guaranteed non-poison. Fixes PR50949. Reviewed By: lebedev.ri Differential Revision: https://reviews.llvm.org/D107364
* [BuildLibCalls][NFC] Remove redundant attribute list from emitCallocDawid Jurczak2021-08-053-10/+9
| | | | | | Additionally with this patch aligned DSE which is the only user of emitCalloc. Differential Revision: https://reviews.llvm.org/D103523
* [LoopVectorize] Add support for replication of more intrinsics with scalable ↵David Sherwood2021-08-055-4/+363
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | vectors This patch adds more instructions to the Uniforms list, for example certain intrinsics that are uniform by definition or whose operands are loop invariant. This list includes: 1. The intrinsics 'experimental.noalias.scope.decl' and 'sideeffect', which are always uniform by definition. 2. If intrinsics 'lifetime.start', 'lifetime.end' and 'assume' have loop invariant input operands then these are also uniform too. Also, in VPRecipeBuilder::handleReplication we check if an instruction is uniform based purely on whether or not the instruction lives in the Uniforms list. However, there are certain cases where calls to some intrinsics can be effectively treated as uniform too. Therefore, we now also treat the following cases as uniform for scalable vectors: 1. If the 'assume' intrinsic's operand is not loop invariant, then we are free to treat this as uniform anyway since it's only a performance hint. We will get the benefit for the first lane. 2. When the input pointers for 'lifetime.start' and 'lifetime.end' are loop variant then for scalable vectors we assume these still ultimately come from the broadcast of an alloca. We do not support scalable vectorisation of loops containing alloca instructions, hence the alloca itself would be invariant. If the pointer does not come from an alloca then the intrinsic itself has no effect. I have updated the assume test for fixed width, since we now treat it as uniform: Transforms/LoopVectorize/assume.ll I've also added new scalable vectorisation tests for other intriniscs: Transforms/LoopVectorize/scalable-assume.ll Transforms/LoopVectorize/scalable-lifetime.ll Transforms/LoopVectorize/scalable-noalias-scope-decl.ll Differential Revision: https://reviews.llvm.org/D107284
* Revert "[SystemZ][z/OS] Update target specific __attribute__((aligned)) ↵Fanbo Meng2021-08-051-1/+1
| | | | | | | | | | value for test" This reverts commit d91234b21c1a1a34d98157089a8769d8f9a32f06. Reviewed By: abhina.sreeskantharajan Differential Revision: https://reviews.llvm.org/D107565
* [SimplifyLibCalls][NFC] Clean up LibCallSimplifier from 'memset + malloc ↵Dawid Jurczak2021-08-053-56/+8
| | | | | | | | | into calloc' transformation FoldMallocMemset can be safely removed because since https://reviews.llvm.org/D103009 such transformation is already performed in DSE. Differential Revision: https://reviews.llvm.org/D103451
* Delay initialization of OptBisectKrzysztof Parzyszek2021-08-052-18/+26
| | | | | | | | | | | | | When LLVM is used in other projects, it may happen that global cons- tructors will execute before the call to ParseCommandLineOptions. Since OptBisect is initialized via a constructor, and has no ability to be updated at a later time, passing "-opt-bisect-limit" to the parse function may have no effect. To avoid this problem use a cl::cb (callback) to set the bisection limit when the option is actually processed. Differential Revision: https://reviews.llvm.org/D104551
* [NFC] Clean up tests in test/Transforms/LoopVectorize/assume.llDavid Sherwood2021-08-051-209/+18
| | | | | | | | The tests previously had lots of unnecessary CHECK lines, where all we really need to check is the presence (or absence) of the assume intrinsic and the correct input operands. Differential Revision: https://reviews.llvm.org/D107157
* [PowerPC][AIX] Limit attribute aligned to 4096.Sean Fertile2021-08-052-0/+7
| | | | | | | Limit the maximum alignment for attribute aligned to 4096 to match the limit of the .align pseudo op in the system assembler. Differential Revision: https://reviews.llvm.org/D107497
* [DA] control compile-time spent by MIV testsBardia Mahjour2021-08-052-0/+104
| | | | | | | | | | | | | Function exploreDirections() in DependenceAnalysis implements a recursive algorithm for refining direction vectors. This algorithm has worst-case complexity of O(3^(n+1)) where n is the number of common loop levels. In this patch I'm adding a threshold to control the amount of time we spend in doing MIV tests (which most of the time end up resulting in over pessimistic direction vectors anyway). Reviewed By: Meinersbur Differential Revision: https://reviews.llvm.org/D107159
* [LV] Remove a change that was added in D106164.Sander de Smalen2021-08-052-53/+97
| | | | | | | | | | | This change wasn't strictly necessary for D106164 and could be removed. This patch addresses the post-commit comments from @fhahn on D106164, and also changes sve-widen-gep.ll to use the same IR test as shown in pointer-induction.ll. Reviewed By: fhahn Differential Revision: https://reviews.llvm.org/D106878
* [NFC] Remove redundant test in Transforms/LoopVectorize/lifetime.llDavid Sherwood2021-08-051-28/+0
| | | | | | | | | The two tests (@testloopvariant and @testbitcast) are actually identical as in both loops the bitcast gets widened, forcing the lifetime marker to be replicated using each lane of the input vector. Differential Revision: https://reviews.llvm.org/D107150
* Add a DIExpression const-folder to prevent silly expressions.Paul Robinson2021-08-059-12/+230
| | | | | | | | | | | | | | | | | | | | | | | | | | | | It's entirely possible (because it actually happened) for a bool variable to end up with a 256-bit DW_AT_const_value. This came about when a local bool variable was initialized from a bitfield in a 32-byte struct of bitfields, and after inlining and constant propagation, the variable did have a constant value. The sequence of optimizations had it carrying "i256" values around, but once the constant made it into the llvm.dbg.value, no further IR changes could affect it. Technically the llvm.dbg.value did have a DIExpression to reduce it back down to 8 bits, but the compiler is in no way ready to emit an oversized constant *and* a DWARF expression to manipulate it. Depending on the circumstances, we had either just the very fat bool value, or an expression with no starting value. The sequence of optimizations that led to this state did seem pretty reasonable, so the solution I came up with was to invent a DWARF constant expression folder. Currently it only does convert ops, but there's no reason it couldn't do other ops if that became useful. This broke three tests that depended on having convert ops survive into the DWARF, so I added an operator that would abort the folder to each of those tests. Differential Revision: https://reviews.llvm.org/D106915
* [VectorCombine] Add additional tests with freeze combinations.Florian Hahn2021-08-051-0/+107
| | | | Suggested in D107364.
* GlobalISel: Fix matchEqualDefs for instructions with multiple defsPetar Avramovic2021-08-052-5/+63
| | | | | | | | | Instructions that produceSameValue produce same values for operands with same index. matchEqualDefs used to return true for any two values from different instructions that produce same values. Fix this by checking if values are defined by operands with the same index. Differential Revision: https://reviews.llvm.org/D107362
* [flang][driver] Delete `f18` (i.e. the old Flang driver)Andrzej Warzynski2021-08-0517-991/+78
| | | | | | | | | | | | | | | | | | | | | This patch removes `f18`, a.k.a. the old driver. It is being replaced with the new driver, `flang-new`, which has reached feature parity with `f18` a while ago. This was discussed in [1] and also in [2]. With this change, `FLANG_BUILD_NEW_DRIVER` is no longer needed and is also deleted. This means that we are making the dependency on Clang permanent (i.e. it cannot be disabled with a CMake flag). LIT set-up is updated accordingly. All references to `f18` or `f18.cpp` are either updated or removed. The `F18_FC` variable from the `flang` bash script is replaced with `FLANG_FC`. The former is still supported for backwards compatibility. [1] https://lists.llvm.org/pipermail/flang-dev/2021-June/000742.html [2] https://reviews.llvm.org/D103177 Differential Revision: https://reviews.llvm.org/D105811
* [AMDGPU] Add globalisel checks for ctlz_zero_undef/cttz_zero_undefJay Foad2021-08-052-0/+596
|
* [X86] Rename Subtarget Tuning Feature Flag Prefix. NFC.Simon Pilgrim2021-08-054-259/+261
| | | | | | As suggested on D107370, this patch renames the tuning feature flags to start with 'Tuning' instead of 'Feature'. Differential Revision: https://reviews.llvm.org/D107459
* [GlobalISel] Combine shr(shl x, c1), c2 to G_SBFX/G_UBFXDominik Montada2021-08-056-7/+242
| | | | | | Reviewed By: foad Differential Revision: https://reviews.llvm.org/D107330
* tsan: introduce RawShadow typeDmitry Vyukov2021-08-0510-58/+62
| | | | | | | | | | | | | | | | | Currently we hardcode u64 type for shadow everywhere and do lots of uptr<->u64* casts. It makes it hard to change u64 to another type (e.g. u32) and makes it easy to introduce bugs. Introduce RawShadow type and use it in MemToShadow, ShadowToMem, IsShadowMem and throughout the code base as u64 replacement. This makes it possible to change u64 to something else in future and generally improves static typing. Depends on D107481. Reviewed By: vitalybuka Differential Revision: https://reviews.llvm.org/D107482
* tsan: make IsMetaMem accept u32*Dmitry Vyukov2021-08-053-7/+6
| | | | | | | | | | MemToMeta returns u32*, so it's reasonable for IsMetaMem to accept u32* as well. Changing the argument type just removes few type casts. Reviewed By: vitalybuka Differential Revision: https://reviews.llvm.org/D107481
* Correct a lot of diagnostic wordings for the driverAaron Ballman2021-08-0530-125/+148
| | | | | | | | Clang diagnostics should not start with a capital letter or use trailing punctuation (https://clang.llvm.org/docs/InternalsManual.html#the-format-string), but quite a few driver diagnostics were not following this advice. This corrects the grammar and punctuation to improve consistency, but does not change the circumstances under which the diagnostics are produced.
* [flang][driver] Refactor boolean optionsAndrzej Warzynski2021-08-054-60/+81
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For boolean options, e.g. `-fxor-operator`/`-fno-xor-operator`, we ought to be using TableGen multi-classes. This way, we only have to write one definition to have both forms auto-generated. This patch refactors all of Flang's boolean options to use two new multi-classes: `OptInFC1FFOption` and `OptOutFC1FFOption`. These multi-classes are based on `OptInFFOption`/`OptOutFFOption`, respectively. I've also simplified the processing of the updated options in CompilerInvocation.cpp. With the new approach, "empty" help text (i.e. no `HelpText`) is now replaced with an empty string (i.e. HelpText<"">). When running flang-new --help, that's considered as non-empty help messages, which is then printed (that's controlled by `printHelp` from llvm/lib/Option/OptTable.cpp). This means that with this patch, flang-new --help will start printing e.g. -fno-backslash, even though there is no actual help text to print for this option (apart from the empty string ""). Tests are updated accordingly. Note that with this patch, both `-fxor-operator` and `-fno-xor-operator` (and other boolean options refactored here) remain available in `flang-new` and `flang-new -fc1`. In this respect, nothing changes. In a forthcoming patch, I will refine this so that `flang-new -fc1` only accepts `-ffoo` (`OptInFC1FFOption`) or `-fno-foo` (`OptOutCC1FFOption`). For clarity, `OptInFFOption`/`OptOutFFOption` are renamed as `OptInCC1FFOption`/`OptOutCC1FFOption`, respectively. Otherwise, this is an NFC from Clang's perspective. Differential Revision: https://reviews.llvm.org/D105881
* [OpenCL] Reduce duplicate defs by using multiclasses; NFCSven van Haastregt2021-08-051-135/+57
| | | | | | | | | | | Builtin definitions with pointer arguments were duplicated to provide overloads differing in the pointer argument's address space. Reduce this duplication by capturing the definitions in multiclasses. This still results in the same number of builtins in the generated tables, but the description is more concise now. Differential Revision: https://reviews.llvm.org/D107151
* Revert "D106035: Remove conditional compilation for WCHAR support in libedit"Neal Sidhwaney2021-08-053-99/+224
| | | | This reverts commit 7529f0e3e1427fea93a6a66a2aed5394710e5fb5.
* [AMDGPU] Generate checks for ctlz_zero_undef/cttz_zero_undefJay Foad2021-08-052-231/+2165
|
* Mark tests as requiring AMDGPU targetOliver Stannard2021-08-052-0/+4
|
* [SelectionDAG] Correctly determine the VECREDUCE_SEQ_FMUL actionFraser Cormack2021-08-051-0/+1
| | | | | | | | | | | | | The LegalizeAction for this node should follow the logic for `VECREDUCE_SEQ_FADD` and be determined using the vector operand's type. here isn't an in-tree target that makes use of this, but I think it's safe to say this is how it should behave, should a target want to customize the action for this node. Reviewed By: dmgreen Differential Revision: https://reviews.llvm.org/D107478
View Lorry Controller Status