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* [clangd] Add Random Forest runtime for code completion.cmake-integrationUtkarsh Saxena2020-09-1812-0/+699
| | | | | | | | | | | | | | | | | | | | | Summary: [WIP] - Proposes a json format for representing Random Forest model. - Proposes a way to test the generated runtime using a test model. TODO: - Add generated source code snippet for easier review. - Fix unused label warning. - Figure out required using declarations for CATEGORICAL columns from Features.json. - Necessary Google3 internal modifications for blaze before landing. - Add documentation for format of the model. - Document more. Subscribers: mgorny, ilya-biryukov, MaskRay, jkorous, arphaman, kadircet, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D83814
* Extending Baremetal toolchain's support for the rtlib option.Jon Roelofs2020-09-182-2/+15
| | | | | | Differential Revision: https://reviews.llvm.org/D87164 Patch by Manuel Carrasco!
* [MLIR][ODS] Add constBuilderCall for TypeArrayAttrAndy Ly2020-09-182-1/+4
| | | | | | | | constBuilderCall was not defined for TypeArrayAttr, resulting in tblgen not emitting the correct code when TypeArrayAttr is used with a default valued attribute. Reviewed By: antiagainst Differential Revision: https://reviews.llvm.org/D87907
* [X86][AVX] lowerBuildVectorAsBroadcast - improve i64 BROADCASTM lowering on ↵Simon Pilgrim2020-09-184-101/+42
| | | | | | 32-bit targets We already handle the the cases where we have a 'zero extended splat' build vector (a, 0, 0, 0, a, 0, 0, 0, ...) but were missing the case where the 'a' scalar was zero-extended as well - such as i64 -> vXi64 splat cases on 32-bit targets.
* [DFSan] Add strpbrk wrapper.Matt Morehouse2020-09-183-0/+54
| | | | | | Reviewed By: vitalybuka Differential Revision: https://reviews.llvm.org/D87849
* [MLIR][SPIRV] Create new ctx for deserialization in roundtrips.ergawy2020-09-181-2/+5
| | | | | | | | | | | | Roundtripping SPIR-V modules used the same MLIRContext object for both ways of the trip. This resulted in deserialization using a context object already containing Types constructed during serialization. This commit rectifies that by creating a new MLIRContext during deserialization. Reviewed By: mravishankar, antiagainst Differential Revision: https://reviews.llvm.org/D87692
* [mlir][openacc] Add missing operands for acc.data operationValentin Clement2020-09-183-33/+140
| | | | | | | | | Add missing operands to represent copyin with readonly modifier, copyout with zero modifier and create with zero modifier. Reviewed By: ftynse Differential Revision: https://reviews.llvm.org/D87874
* [mlir][openacc] Support Index and AnyInteger in loop opValentin Clement2020-09-183-51/+111
| | | | | | | | | Following patch D87712, this patch switch AnyInteger for operands gangNum, gangStatic, workerNum, vectoreLength and tileOperands to Index and AnyInteger. Reviewed By: ftynse Differential Revision: https://reviews.llvm.org/D87848
* [X86][AVX] Add missing i686 broadcastm test coverageSimon Pilgrim2020-09-181-62/+85
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* [DAG] BuildVectorSDNode::getSplatValue - pull out repeated getNumOperands() ↵Simon Pilgrim2020-09-181-4/+4
| | | | calls. NFCI.
* [AIX] Enable large code model when building with clangDavid Tenty2020-09-181-1/+1
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* [clangd] Add option for disabling AddUsing tweak on some namespaces.Adam Czachorowski2020-09-186-0/+75
| | | | | | | | For style guides forbid "using" declarations for namespaces like "std". With this new config option, AddUsing can be selectively disabled on those. Differential Revision: https://reviews.llvm.org/D87775
* [mlir][StandardToSPIRV] Handle vector of i1 case for lowering zexti to SPIR-V.Hanhan Wang2020-09-182-5/+23
| | | | | | Reviewed By: mravishankar Differential Revision: https://reviews.llvm.org/D87887
* [InstSimplify] fix fmin/fmax miscompile for partial undef vectors (PR47567)Sanjay Patel2020-09-182-7/+23
| | | | | It would also be correct to return the variable operand in these cases, but eliminating a variable use is probably better for optimization.
* IR: Move denormal mode parsing from MachineFunction to FunctionMatt Arsenault2020-09-183-14/+20
| | | | | This was just inspecting the IR to begin with, and is useful to check in some places in the IR.
* emacs: Add nofree and willreturn to list of attributesMatt Arsenault2020-09-181-2/+2
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* Revert "[amdgpu] Lower SGPR-to-VGPR copy in the final phase of ISel."Matt Arsenault2020-09-187-104/+9
| | | | | | | | This reverts commit c3492a1aa1b98c8d81b0969d52cea7681f0624c2. I think this is the wrong strategy and wrong place to do this transform anyway. Also reverts follow up commit 7d593d0d6905b55ca1124fca5e4d1ebb17203138.
* [SLP] Allow reordering of vectorization trees with reused instructions.Alexey Bataev2020-09-184-82/+155
| | | | | | | | | | | | | | | | | | | | If some leaves have the same instructions to be vectorized, we may incorrectly evaluate the best order for the root node (it is built for the vector of instructions without repeated instructions and, thus, has less elements than the root node). In this case we just can not try to reorder the tree + we may calculate the wrong number of nodes that requre the same reordering. For example, if the root node is \<a+b, a+c, a+d, f+e\>, then the leaves are \<a, a, a, f\> and \<b, c, d, e\>. When we try to vectorize the first leaf, it will be shrink to \<a, b\>. If instructions in this leaf should be reordered, the best order will be \<1, 0\>. We need to extend this order for the root node. For the root node this order should look like \<3, 0, 1, 2\>. This patch allows extension of the orders of the nodes with the reused instructions. Reviewed By: RKSimon Differential Revision: https://reviews.llvm.org/D45263
* [AMDGPU] Set DS alignment requirements to be more strictMirko Brkusanin2020-09-1815-99/+788
| | | | | | | | | | Alignment requirements for ds_read/write_b96/b128 for gfx9 and onward are now the same as for other GCN subtargets. This way we can avoid any unintentional use of these instructions on systems that do not support dword alignment and instead require natural alignment. This also makes 'SH_MEM_CONFIG.alignment_mode == STRICT' the default. Differential Revision: https://reviews.llvm.org/D87821
* [InstSimplify] add another test for NaN propagation; NFCSanjay Patel2020-09-181-5/+5
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* [libunwind] Support for leaf function unwinding.Daniel Kiss2020-09-185-2/+110
| | | | | | | | | | | | | | | Unwinding leaf function is useful in cases when the backtrace finds a leaf function for example when it caused a signal. This patch also add the support for the DW_CFA_undefined because it marks the end of the frames. Ryan Prichard provided code for the tests. Reviewed By: #libunwind, mstorsjo Differential Revision: https://reviews.llvm.org/D83573 Reland with limit the test to the x86_64-linux target.
* [DWARFYAML] Make the include_directories, file_names and opcodes fields of ↵Xing GUO2020-09-1811-29/+42
| | | | | | | | | | | the line table optional. This patch makes the include_directories, file_names and opcodes fields of the line table optional. This helps us simplify some tests. Reviewed By: jhenderson Differential Revision: https://reviews.llvm.org/D87878
* [DWARFYAML][test] Use 'CHECK-NEXT:' to make checkers stricter. NFC.Xing GUO2020-09-182-60/+60
| | | | | | | | | This patch makes checkers stricter so that we are able to avoid some potential problems earlier. Reviewed By: jhenderson, MaskRay Differential Revision: https://reviews.llvm.org/D87876
* [UpdateCCTestChecks] Include generated functions if askedDavid Greene2020-09-1865-117/+5400
| | | | | | | | | | | | | Add the --include-generated-funcs option to update_cc_test_checks.py so that any functions created by the compiler that don't exist in the source will also be checked. We need to maintain the output order of generated function checks so that CHECK-LABEL works properly. To do so, maintain a list of functions output for each prefix in the order they are output. Use this list to output checks for generated functions in the proper order. Differential Revision: https://reviews.llvm.org/D83004
* [Test] Missing range check removal opportunityMax Kazantsev2020-09-181-0/+89
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* [Polly] Update map passed to SCEVParameterReweriter.Florian Hahn2020-09-181-1/+3
| | | | | | | The type of the map the SCEVParameterRewriter takes has been changed in 4635f6050b10. Update the single use in polly to use SCEV* as type of the values.
* [mlir][Linalg] Evolve named ops to use assembly form and support linalg on ↵Nicolas Vasilache2020-09-1845-483/+1077
| | | | | | | | | | | | | | | | | | | | | | | tensors. This revision allows representing a reduction at the level of linalg on tensors for named ops. When a structured op has a reduction and returns tensor(s), new conventions are added and documented. As an illustration, the syntax for a `linalg.matmul` writing into a buffer is: ``` linalg.matmul ins(%a, %b : memref<?x?xf32>, tensor<?x?xf32>) outs(%c : memref<?x?xf32>) ``` , whereas the syntax for a `linalg.matmul` returning a new tensor is: ``` %d = linalg.matmul ins(%a, %b : tensor<?x?xf32>, memref<?x?xf32>) init(%c : memref<?x?xf32>) -> tensor<?x?xf32> ``` Other parts of linalg will be extended accordingly to allow mixed buffer/tensor semantics in the presence of reductions.
* Recommit "[DSE] Switch to MemorySSA-backed DSE by default."Florian Hahn2020-09-1877-110/+119
| | | | | | | | | This switches to using DSE + MemorySSA by default again, after fixing the issues reported after the first commit. Notable fixes fc8200633122, a0017c2bc258. This reverts commit 3a59628f3cc26eb085acfc9cbdc97243ef71a6c5.
* Revert "[libunwind] Support for leaf function unwinding."Daniel Kiss2020-09-185-108/+2
| | | | This reverts commit 23bef7ee9923b1262326981960397e8cd95d6923.
* [SCEV] Generalize SCEVParameterRewriter to accept SCEV expression as target.Florian Hahn2020-09-183-23/+61
| | | | | | | | | | This patch extends SCEVParameterRewriter to support rewriting unknown epxressions to arbitrary SCEV expressions. It will be used by further patches. Reviewed By: reames Differential Revision: https://reviews.llvm.org/D67176
* [TableGen][GlobalISel] Fix handling of zero_regGabriel Hjort Åkerlund2020-09-185-15/+69
| | | | | | | | | | | | When generating matching tables for GlobalISel, TableGen would output "::zero_reg" whenever encountering the zero_reg, which in turn would result in compilation error. This patch fixes that by instead outputting NoRegister (== 0), which is the same result that TableGen produces when generating matching tables for ISelDAG. Reviewed By: arsenm Differential Revision: https://reviews.llvm.org/D86215
* AArch64: make sure jump table entries can reach entire imageTim Northover2020-09-189-73/+316
| | | | | | | | | | | | This turns all jump table entries into deltas within the target function because in the small memory model all code & static data must be in a 4GB block somewhere in memory. When the entries were a delta between the table location and a basic block, the 32-bit signed entries are not enough to guarantee reachability. https://reviews.llvm.org/D87286
* [NFC][gotsan] Fix 'format' errorVitaly Buka2020-09-181-1/+1
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* [NFC][sanitizer] Disable a test on WindowsVitaly Buka2020-09-181-1/+7
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* [sanitizer] Add facility to print the full StackDepotTeresa Johnson2020-09-185-3/+49
| | | | | | | | | Split out of D87120 (memory profiler). Added unit testing of the new printing facility. Reviewed By: vitalybuka Differential Revision: https://reviews.llvm.org/D87792
* Revert "[InstCombine] Canonicalize SPF_ABS to abs intrinc"Nikita Popov2020-09-1812-324/+600
| | | | | | | | This reverts commit 05d4c4ebc2fb006b8a2bd05b24c6aba10dd2eef8. mstorsjo reports a miscompile after this change in https://reviews.llvm.org/D87188#2281093. Reverting until I can investigate this.
* [NFC][fuzzer] Simplify StrcmpTest.cppVitaly Buka2020-09-181-3/+1
| | | | | | | | | | The test started to consistently fail after unrelated 2ffaa9a1732c6f2af514603d25f0e8c238b3dd06. Even before the patch it was possible to fail the test, e.g. -seed=1660180256 on my workstation. Also this checks do not look related to strcmp.
* [AArch64] Add tests for zext pattern match with AssertZext/AssertSext ↵Andrew Wei2020-09-181-0/+48
| | | | operand, NFC
* [FPEnv] Use typed accessors in FPOptionsSerge Pavlov2020-09-184-13/+30
| | | | | | | | | Previously methods `FPOptions::get*` returned unsigned value even if the corresponding property was represented by specific enumeration type. With this change such methods return actual type of the property. It also allows printing value of a property as text rather than integer code. Differential Revision: https://reviews.llvm.org/D87812
* Revert "This is a test commit"Artur Bialas2020-09-181-1/+0
| | | | This reverts commit 9d54b166c2e59f29e476a6566951b6809fc8808e.
* This is a test commitArtur Bialas2020-09-181-0/+1
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* [X86] Add some demanded bits test cases for PDEP with constant maskCraig Topper2020-09-172-0/+31
| | | | | | | The number of ones in the mask for the PDEP determines how many bits of the other operand are used. If the mask is constant we can use this to build a mask for SimplifyDemandedBits. This can be used to replace the extends in the test with anyextend.
* [AArch64] Emit zext move when the source of the zext is AssertZext or AssertSextAndrew Wei2020-09-182-5/+7
| | | | | | | | | When the source of the zext is AssertZext or AssertSext, it is hard to know any information about the upper 32 bits, so we should insert a zext move before emitting SUBREG_TO_REG to define the lower 32 bits. Reviewed By: efriedma Differential Revision: https://reviews.llvm.org/D87771
* Revert "[sanitizer] Add facility to print the full StackDepot"Teresa Johnson2020-09-174-40/+1
| | | | | | | | | | | | | | This reverts commit 2ffaa9a1732c6f2af514603d25f0e8c238b3dd06. There were 2 reported bot failures that need more investigation: http://lab.llvm.org:8011/builders/sanitizer-windows/builds/69871/steps/stage%201%20check/logs/stdio This one is in my new test. http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fuzzer/builds/39187/steps/check-fuzzer/logs/stdio This one seems completely unrelated.
* [libc] Add implementation for hypotfTue Ly2020-09-179-0/+335
| | | | | | | Truncating the sum of squares, and then use shift-and-add algorithm to compute its square root. Required MPFR testing infra is updated in https://reviews.llvm.org/D87514 Differential Revision: https://reviews.llvm.org/D87516
* [sanitizer] Add facility to print the full StackDepotTeresa Johnson2020-09-174-1/+40
| | | | | | | Split out of D87120 (memory profiler). Added unit testing of the new printing facility. Differential Revision: https://reviews.llvm.org/D87792
* [NFC] clang-format one lineVitaly Buka2020-09-171-1/+1
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* [NFC][Lsan] Fix zero-sized array compilation errorVitaly Buka2020-09-172-3/+4
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* [scudo/standalone] Don't define test main function for FuchsiaRoland McGrath2020-09-171-4/+4
| | | | | | | | Fuchsia's unit test library provides the main function by default. Reviewed By: cryptoad Differential Revision: https://reviews.llvm.org/D87809
* [MLIR] Fix build failure due to https://reviews.llvm.org/D87059.Rahul Joshi2020-09-171-2/+2
| | | | | | | - Remove spurious ; - Make comparison object invokable as const. Differential Revision: https://reviews.llvm.org/D87872
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