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* Merging r214336:release_35Tom Stellard2015-03-172-4/+4
| | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r214336 | rafael.espindola | 2014-07-30 17:04:00 -0400 (Wed, 30 Jul 2014) | 9 lines SimplifyCFG: Avoid miscompilations due to removed lifetime intrinsics. The lifetime intrinsics need some work in order to make it clear which optimizations are or are not valid. For now dropping this optimization avoids a miscompilation. Patch by Björn Steinbrink. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@232544 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r229352:Tom Stellard2015-03-173-4/+44
| | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r229352 | david.majnemer | 2015-02-15 23:02:09 -0500 (Sun, 15 Feb 2015) | 9 lines IR: Properly return nullptr when getAggregateElement is out-of-bounds We didn't properly handle the out-of-bounds case for ConstantAggregateZero and UndefValue. This would manifest as a crash when the constant folder was asked to fold a load of a constant global whose struct type has no operands. This fixes PR22595. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@232512 91177308-0d34-0410-b5e6-96231b3b80d8
* Added MIPS changes to release notes for 3.5.2.Daniel Sanders2015-03-161-0/+22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@232369 91177308-0d34-0410-b5e6-96231b3b80d8
* Try to make AsmPrinter vtable compatible with previous shared library.Daniel Sanders2015-03-132-6/+6
| | | | | | | | | | | r232083 added AsmPrinter::emitInlineAsmStart() before AsmPrinter::emitInlineAsmEnd(), changing the vtable in an incompatible way. This patch swaps the declaration order so that the new vtable entry is at the end of the vtable. git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@232162 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r225521:Daniel Sanders2015-03-121-0/+6
| | | | | | | | | | | ------------------------------------------------------------------------ r225521 | tomatabacu | 2015-01-09 15:00:30 +0000 (Fri, 09 Jan 2015) | 1 line [mips] Add comment which explains why we need to change the assembler options before and after inline asm blocks. NFC. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@232084 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r224425:Daniel Sanders2015-03-129-31/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r224425 | tomatabacu | 2014-12-17 10:56:16 +0000 (Wed, 17 Dec 2014) | 17 lines [mips] Set GCC-compatible MIPS asssembler options before inline asm blocks. Summary: When generating MIPS assembly, LLVM always overrides the default assembler options by emitting the '.set noreorder', '.set nomacro' and '.set noat' directives, while GCC uses the default options if an assembly-level function contains inline assembly code. This becomes a problem when the code generated by LLVM is interleaved with inline assembly which assumes GCC-like assembler options (from Linux, for example). This patch fixes these conflicts by setting the appropriate assembler options at the beginning of an inline asm block and popping them at the end. Reviewers: dsanders Reviewed By: dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D6637 ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@232083 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r217432:Daniel Sanders2015-03-125-17/+155
| | | | | | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r217432 | tomatabacu | 2014-09-09 11:15:38 +0100 (Tue, 09 Sep 2014) | 12 lines [mips] Add assembler support for .set push/pop directive. Summary: These directives are used to save the current assembler options (in the case of ".set push") and restore the previously saved options (in the case of ".set pop"). Contains work done by Matheus Almeida. Reviewers: dsanders Reviewed By: dsanders Differential Revision: http://reviews.llvm.org/D4821 ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@232082 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r217254:Daniel Sanders2015-03-121-14/+14
| | | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r217254 | tomatabacu | 2014-09-05 16:43:21 +0100 (Fri, 05 Sep 2014) | 9 lines [mips] Rename data members and member functions in MipsAssemblerOptions. Summary: Use the naming convention from the LLVM Coding Standards. Reviewers: dsanders Reviewed By: dsanders Differential Revision: http://reviews.llvm.org/D4972 ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@232054 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r230235:Daniel Sanders2015-03-063-5/+151
| | | | | | | | | | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r230235 | dsanders | 2015-02-23 17:22:16 +0000 (Mon, 23 Feb 2015) | 16 lines [mips] Honour -mno-odd-spreg for vector insert/extract when MSA is enabled. Summary: -mno-odd-spreg prohibits the use of odd-numbered single-precision floating point registers. However, vector insert/extract was still using them when manipulating the subregisters of an MSA register. Fixed this by ensuring that insertion/extraction is only performed on even-numbered vector registers when -mno-odd-spreg is given. Reviewers: vmedic, sstankovic Reviewed By: sstankovic Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D7672 ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@231472 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r227089:Daniel Sanders2015-03-0617-42/+446
| | | | | | | | | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r227089 | vkalintiris | 2015-01-26 12:33:22 +0000 (Mon, 26 Jan 2015) | 15 lines [mips] Enable arithmetic and binary operations for the i128 data type. Summary: This patch adds support for some operations that were missing from 128-bit integer types (add/sub/mul/sdiv/udiv... etc.). With these changes we can support the __int128_t and __uint128_t data types from C/C++. Depends on D7125 Reviewers: dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D7143 ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@231471 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r227087:Daniel Sanders2015-03-0612-0/+1154
| | | | | | | | | | | | | | | | | | | Except for the MIPS-II and MIPS-III cases since these targets were not supported in 3.5.1. ------------------------------------------------------------------------ r227087 | vkalintiris | 2015-01-26 12:04:40 +0000 (Mon, 26 Jan 2015) | 7 lines [mips] Add tests for bitwise binary and integer arithmetic operators. Reviewers: dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D7125 ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@231469 91177308-0d34-0410-b5e6-96231b3b80d8
* Partially merging r221686:Daniel Sanders2015-03-061-0/+131
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Only the testcase minus the MIPS-II and MIPS-IV cases have been merged. They are required to cleanly apply a subsequent patch. ------------------------------------------------------------------------ r221686 | vkalintiris | 2014-11-11 11:43:55 +0000 (Tue, 11 Nov 2014) | 16 lines [mips] Add preliminary support for the MIPS II target. Summary: This patch enables code generation for the MIPS II target. Pre-Mips32 targets don't have the MUL instruction, so we add the correspondent pattern that uses the MULT/MFLO combination in order to retrieve the product. This is WIP as we don't support code generation for select nodes due to the lack of conditional-move instructions. Reviewers: dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D6150 ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@231468 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r226171:Daniel Sanders2015-03-062-2/+92
| | | | | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r226171 | dsanders | 2015-01-15 15:41:03 +0000 (Thu, 15 Jan 2015) | 11 lines [mips] Fix a typo in the compare patterns for MIPS32r6/MIPS64r6. Summary: The patterns intended for the SETLE node were actually matching the SETLT node. Reviewers: atanasyan, sstankovic, vmedic Reviewed By: vmedic Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D6997 ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@231467 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r225529:Daniel Sanders2015-03-065-0/+76
| | | | | | | | | | | | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r225529 | dsanders | 2015-01-09 17:21:30 +0000 (Fri, 09 Jan 2015) | 18 lines [mips] Add support for accessing $gp as a named register. Summary: Mips Linux uses $gp to hold a pointer to thread info structure and accesses it with a named register. This makes this work for LLVM. The N32 ABI doesn't quite work yet since the frontend generates incorrect IR for this case. It neglects to truncate the 64-bit GPR to a 32-bit value before converting to a pointer. Given correct IR (as in the testcase in this patch), it works correctly. Reviewers: sstankovic, vmedic, atanasyan Reviewed By: atanasyan Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D6893 ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@231466 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r231463 and r231462.Daniel Sanders2015-03-069-70/+31
| | | | | | | The build fails after merging them due to two missing functions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@231464 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r225521:Daniel Sanders2015-03-061-0/+6
| | | | | | | | | | | ------------------------------------------------------------------------ r225521 | tomatabacu | 2015-01-09 15:00:30 +0000 (Fri, 09 Jan 2015) | 1 line [mips] Add comment which explains why we need to change the assembler options before and after inline asm blocks. NFC. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@231463 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r224425:Daniel Sanders2015-03-069-31/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r224425 | tomatabacu | 2014-12-17 10:56:16 +0000 (Wed, 17 Dec 2014) | 17 lines [mips] Set GCC-compatible MIPS asssembler options before inline asm blocks. Summary: When generating MIPS assembly, LLVM always overrides the default assembler options by emitting the '.set noreorder', '.set nomacro' and '.set noat' directives, while GCC uses the default options if an assembly-level function contains inline assembly code. This becomes a problem when the code generated by LLVM is interleaved with inline assembly which assumes GCC-like assembler options (from Linux, for example). This patch fixes these conflicts by setting the appropriate assembler options at the beginning of an inline asm block and popping them at the end. Reviewers: dsanders Reviewed By: dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D6637 ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@231462 91177308-0d34-0410-b5e6-96231b3b80d8
* Bump version to 3.5.2Tom Stellard2015-01-143-13/+13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@225916 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r222856:David Majnemer2015-01-062-133/+1
| | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r222856 | majnemer | 2014-11-26 15:00:38 -0800 (Wed, 26 Nov 2014) | 8 lines Revert "Added inst combine transforms for single bit tests from Chris's note" This reverts commit r210006, it miscompiled libapr which is used in who knows how many projects. A test has been added to ensure that we don't regress again. I'll work on a rewrite of what the optimization was trying to do later. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@225255 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r224333:Daniel Sanders2014-12-181-8/+8
| | | | | | | | | | | | | ------------------------------------------------------------------------ r224333 | dsanders | 2014-12-16 11:21:58 +0000 (Tue, 16 Dec 2014) | 3 lines [mips] Fix arguments-struct.ll for Windows and OSX hosts. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@224510 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixup backport of r223318Hal Finkel2014-12-091-1/+1
| | | | | | | TM.getSubtargetImpl()->getRegisterInfo() needs to be TM.getRegisterInfo() in 3.5. git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@223749 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r223708:Hal Finkel2014-12-094-9/+349
| | | | | | | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r223708 | hfinkel | 2014-12-08 22:54:22 +0000 (Mon, 08 Dec 2014) | 13 lines [PowerPC] Don't use a non-allocatable register to implement the 'cc' alias GCC accepts 'cc' as an alias for 'cr0', and we need to do the same when processing inline asm constraints. This had previously been implemented using a non-allocatable register, named 'cc', that was listed as an alias of 'cr0', but the infrastructure does not seem to support this properly (neither the register allocator nor the scheduler properly accounts for the alias). Instead, we can just process this as a naming alias inside of the inline asm constraint-processing code, so we'll do that instead. There are two regression tests, one where the post-RA scheduler did the wrong thing with the non-allocatable alias, and one where the register allocator did the wrong thing. Fixes PR21742. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@223748 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r223328:Hal Finkel2014-12-092-5/+3
| | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r223328 | hfinkel | 2014-12-04 00:46:20 +0000 (Thu, 04 Dec 2014) | 8 lines [PowerPC] 'cc' should be an alias only to 'cr0' We had mistakenly believed that GCC's 'cc' referred to the entire condition-code register (cr0 through cr7) -- and implemented this in r205630 to fix PR19326, but 'cc' is actually an alias only to 'cr0'. This is causing LLVM to clobber too much with legacy code with inline asm using the 'cc' clobber. Fixes PR21451. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@223747 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r223318:Hal Finkel2014-12-092-2/+106
| | | | | | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r223318 | hfinkel | 2014-12-03 23:40:13 +0000 (Wed, 03 Dec 2014) | 12 lines [PowerPC] Fix inline asm memory operands not to use r0 On PowerPC, inline asm memory operands might be expanded as 0($r), where $r is a register containing the address. As a result, this register cannot be r0, and we need to enforce this register subclass constraint to prevent miscompiling the code (we'd get this constraint for free with the usual instruction definitions, but that scheme has no knowledge of how we end up printing inline asm memory operands, and so here we need to do it 'by hand'). We can accomplish this within the current address-mode selection framework by introducing an explicit COPY_TO_REGCLASS node. Fixes PR21443. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@223746 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r223220:Hal Finkel2014-12-092-13/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r223220 | hfinkel | 2014-12-03 09:37:50 +0000 (Wed, 03 Dec 2014) | 23 lines [PowerPC] Print all inline-asm consts as signed numbers Almost all immediates in PowerPC assembly (both 32-bit and 64-bit) are signed numbers, and it is important that we print them as such. To make sure that happens, we change PPCTargetLowering::LowerAsmOperandForConstraint so that it does all intermediate checks on a signed-extended int64_t value, and then creates the resulting target constant using MVT::i64. This will ensure that all negative values are printed as negative values (mirroring what is done in other backends to achieve the same sign-extension effect). This came up in the context of inline assembly like this: "add%I2 %0,%0,%2", ..., "Ir"(-1ll) where we used to print: addi 3,3,4294967295 and gcc would print: addi 3,3,-1 and gas accepts both forms, but our builtin assembler (correctly) does not. Now we print -1 like gcc does. While here, I replaced a bunch of custom integer checks with isInt<16> and friends from MathExtras.h. Thanks to Paul Hargrove for the bug report. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@223745 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r222996:Hal Finkel2014-12-092-12/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r222996 | foad | 2014-12-01 09:42:32 +0000 (Mon, 01 Dec 2014) | 19 lines [PowerPC] Fix unwind info with dynamic stack realignment Summary: PowerPC DWARF unwind info defined CFA as SP + offset even in a function where the stack had been dynamically realigned. This clearly doesn't work because the offset from SP to CFA is not a constant. Fix it by defining CFA as BP instead. This was causing the AddressSanitizer null_deref test to fail 50% of the time, depending on whether SP happened to be 32-byte aligned on entry to a particular function or not. Reviewers: willschm, uweigand, hfinkel Reviewed By: hfinkel Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D6410 ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@223744 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r222672:Hal Finkel2014-12-092-0/+36
| | | | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r222672 | uweigand | 2014-11-24 18:09:47 +0000 (Mon, 24 Nov 2014) | 10 lines [PowerPC] Fix PR 21652 - copy st_other bits on symbol assignment When processing an assignment in the integrated assembler that sets a symbol to the value of another symbol, we need to copy the st_other bits that encode the local entry point offset. Modeled after MipsTargetELFStreamer::emitAssignment handling of the ELF::STO_MIPS_MICROMIPS flag. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@223743 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r221703:Hal Finkel2014-12-098-125/+115
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r221703 | wschmidt | 2014-11-11 20:44:09 +0000 (Tue, 11 Nov 2014) | 48 lines [PowerPC] Replace foul hackery with real calls to __tls_get_addr My original support for the general dynamic and local dynamic TLS models contained some fairly obtuse hacks to generate calls to __tls_get_addr when lowering a TargetGlobalAddress. Rather than generating real calls, special GET_TLS_ADDR nodes were used to wrap the calls and only reveal them at assembly time. I attempted to provide correct parameter and return values by chaining CopyToReg and CopyFromReg nodes onto the GET_TLS_ADDR nodes, but this was also not fully correct. Problems were seen with two back-to-back stores to TLS variables, where the call sequences ended up overlapping with unhappy results. Additionally, since these weren't real calls, the proper register side effects of a call were not recorded, so clobbered values were kept live across the calls. The proper thing to do is to lower these into calls in the first place. This is relatively straightforward; see the changes to PPCTargetLowering::LowerGlobalTLSAddress() in PPCISelLowering.cpp. The changes here are standard call lowering, except that we need to track the fact that these calls will require a relocation. This is done by adding a machine operand flag of MO_TLSLD or MO_TLSGD to the TargetGlobalAddress operand that appears earlier in the sequence. The calls to LowerCallTo() eventually find their way to LowerCall_64SVR4() or LowerCall_32SVR4(), which call FinishCall(), which calls PrepareCall(). In PrepareCall(), we detect the calls to __tls_get_addr and immediately snag the TargetGlobalTLSAddress with the annotated relocation information. This becomes an extra operand on the call following the callee, which is expected for nodes of type tlscall. We change the call opcode to CALL_TLS for this case. Back in FinishCall(), we change it again to CALL_NOP_TLS for 64-bit only, since we require a TOC-restore nop following the call for the 64-bit ABIs. During selection, patterns in PPCInstrInfo.td and PPCInstr64Bit.td convert the CALL_TLS nodes into BL_TLS nodes, and convert the CALL_NOP_TLS nodes into BL8_NOP_TLS nodes. This replaces the code removed from PPCAsmPrinter.cpp, as the BL_TLS or BL8_NOP_TLS nodes can now be emitted normally using their patterns and the associated printTLSCall print method. Finally, as a result of these changes, all references to get-tls-addr in its various guises are no longer used, so they have been removed. There are existing TLS tests to verify the changes haven't messed anything up). I've added one new test that verifies that the problem with the original code has been fixed. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@223742 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging rr220959:Hal Finkel2014-12-095-10/+63
| | | | | | | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r220959 | uweigand | 2014-10-31 10:33:14 +0000 (Fri, 31 Oct 2014) | 13 lines [PowerPC] Load BlockAddress values from the TOC in 64-bit SVR4 code Since block address values can be larger than 2GB in 64-bit code, they cannot be loaded simply using an @l / @ha pair, but instead must be loaded from the TOC, just like GlobalAddress, ConstantPool, and JumpTable values are. The commit also fixes a bug in PPCLinuxAsmPrinter::doFinalization where temporary labels could not be used as TOC values, since code would attempt (and fail) to use GetOrCreateSymbol to create a symbol of the same name as the temporary label. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@223741 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r219441:Hal Finkel2014-12-092-4/+125
| | | | | | | | | | | | | ------------------------------------------------------------------------ r219441 | sfantao | 2014-10-09 20:42:56 +0000 (Thu, 09 Oct 2014) | 3 lines Fix bug in GPR to FPR moves in PPC64LE. The current implementation of GPR->FPR register moves uses a stack slot. This mechanism writes a double word and reads a word. In big-endian the load address must be displaced by 4-bytes in order to get the right value. In little endian this is no longer required. This patch fixes the issue and adds LE regression tests to fast-isel-conversion which currently expose this problem. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@223740 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r217993:Hal Finkel2014-12-092-24/+67
| | | | | | | | | | | | | | | ------------------------------------------------------------------------ r217993 | sfantao | 2014-09-17 23:25:06 +0000 (Wed, 17 Sep 2014) | 5 lines Fix FastISel bug in boolean returns for PowerPC. For PPC targets, FastISel does not take the sign extension information into account when selecting return instructions whose operands are constants. A consequence of this is that the return of boolean values is not correct. This patch fixes the problem by evaluating the sign extension information also for constants, forwarding this information to PPCMaterializeInt which takes this information to drive the sign extension during the materialization. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@223739 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r216917:Hal Finkel2014-12-091-1/+1
| | | | | | | | | | | | | | ------------------------------------------------------------------------ r216917 | samsonov | 2014-09-02 17:38:34 +0000 (Tue, 02 Sep 2014) | 4 lines Fix signed integer overflow in PPCInstPrinter. This bug was reported by UBSan. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@223738 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r214517:Hal Finkel2014-12-091-1/+1
| | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r214517 | uweigand | 2014-08-01 14:35:58 +0000 (Fri, 01 Aug 2014) | 8 lines [PowerPC] PR20280 - Slots for byval parameters are not immutable Found by inspection while looking at PR20280: code would mark slots in the parameter save area where a byval parameter is passed as "immutable". This is not correct since code is allowed to modify byval parameters in place in the parameter save area. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@223736 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r215793:Hal Finkel2014-12-091-1/+1
| | | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r215793 | hfinkel | 2014-08-16 00:16:29 +0000 (Sat, 16 Aug 2014) | 9 lines [PowerPC] Darwin byval arguments are not immutable On PPC/Darwin, byval arguments occur at fixed stack offsets in the callee's frame, but are not immutable -- the pointer value is directly available to the higher-level code as the address of the argument, and the value of the byval argument can be modified at the IR level. This is necessary, but not sufficient, to fix PR20280. When PR20280 is fixed in a follow-up commit, its test case will cover this change. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@223735 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r213960:Hal Finkel2014-12-098-63/+226
| | | | | | | | | | | | | ------------------------------------------------------------------------ r213960 | hfinkel | 2014-07-25 17:47:22 +0000 (Fri, 25 Jul 2014) | 3 lines [PowerPC] Support TLS on PPC32/ELF Patch by Justin Hibbits! ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@223734 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r223500 (this time for real):Duncan P. N. Exon Smith2014-12-082-5/+57
| | | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r223500 | dexonsmith | 2014-12-05 11:13:42 -0800 (Fri, 05 Dec 2014) | 9 lines BFI: Saturate when combining edges to a successor When a loop gets bundled up, its outgoing edges are quite large, and can just barely overflow 64-bits. If one successor has multiple incoming edges -- and that successor is getting all the incoming mass -- combining just its edges can overflow. Handle that by saturating rather than asserting. This fixes PR21622. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@223716 91177308-0d34-0410-b5e6-96231b3b80d8
* Reverting r223712; apparently I don't understand SVNDuncan P. N. Exon Smith2014-12-080-0/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@223713 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r223500:Duncan P. N. Exon Smith2014-12-080-0/+0
| | | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r223500 | dexonsmith | 2014-12-05 11:13:42 -0800 (Fri, 05 Dec 2014) | 9 lines BFI: Saturate when combining edges to a successor When a loop gets bundled up, its outgoing edges are quite large, and can just barely overflow 64-bits. If one successor has multiple incoming edges -- and that successor is getting all the incoming mass -- combining just its edges can overflow. Handle that by saturating rather than asserting. This fixes PR21622. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@223712 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r221318:David Majnemer2014-12-082-21/+27
| | | | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r221318 | majnemer | 2014-11-04 15:49:08 -0800 (Tue, 04 Nov 2014) | 10 lines Analysis: Make isSafeToSpeculativelyExecute fire less for divides Divides and remainder operations do not behave like other operations when they are given poison: they turn into undefined behavior. It's really hard to know if the operands going into a div are or are not poison. Because of this, we should only choose to speculate if there are constant operands which we can easily reason about. This fixes PR21412. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@223647 91177308-0d34-0410-b5e6-96231b3b80d8
* I did not intend to merge these in.David Majnemer2014-12-084-44/+4
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* Merging r215818:David Majnemer2014-12-083-1/+26
| | | | | | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r215818 | majnemer | 2014-08-16 02:23:42 -0700 (Sat, 16 Aug 2014) | 12 lines InstCombine: Fix a potential bug in 0 - (X sdiv C) -> (X sdiv -C) While *most* (X sdiv 1) operations will get caught by InstSimplify, it is still possible for a sdiv to appear in the worklist which hasn't been simplified yet. This means that it is possible for 0 - (X sdiv 1) to get transformed into (X sdiv -1); dividing by -1 can make the transform produce undef values instead of the proper result. Sorry for the lack of testcase, it's a bit problematic because it relies on the exact order of operations in the worklist. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@223645 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r214385:David Majnemer2014-12-082-3/+18
| | | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r214385 | majnemer | 2014-07-30 21:49:29 -0700 (Wed, 30 Jul 2014) | 9 lines InstCombine: Correctly propagate NSW/NUW for x-(-A) -> x+A We can only propagate the nsw bits if both subtraction instructions are marked with the appropriate bit. N.B. We only propagate the nsw bit in InstCombine because the nuw case is already handled in InstSimplify. This fixes PR20189. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@223644 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix merge conflict & minor test output differencesDavid Majnemer2014-12-081-67/+2
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* Merging r222500:David Majnemer2014-12-080-0/+0
| | | | | | | | | | | ------------------------------------------------------------------------ r222500 | majnemer | 2014-11-20 18:37:38 -0800 (Thu, 20 Nov 2014) | 1 line This Reassociate change unintentionally slipped in r222499 ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@223640 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r216891:David Majnemer2014-12-082-1/+103
| | | | | | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r216891 | majnemer | 2014-09-01 14:20:14 -0700 (Mon, 01 Sep 2014) | 12 lines SROA: Don't insert instructions before a PHI SROA may decide that it needs to insert a bitcast and would set it's insertion point before a PHI. This will create an invalid module right quick. Instead, choose the first insertion point in the basic block that holds our PHI. This fixes PR20822. Differential Revision: http://reviews.llvm.org/D5141 ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@223639 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r217115:David Majnemer2014-12-081-4/+7
| | | | | | | | | | | | | ------------------------------------------------------------------------ r217115 | majnemer | 2014-09-03 17:23:13 -0700 (Wed, 03 Sep 2014) | 3 lines IndVarSimplify: Address review comments for r217102 No functional change intended, just some cleanups and comments added. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@223638 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging rr217102:David Majnemer2014-12-086-19/+258
| | | | | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r217102 | majnemer | 2014-09-03 16:03:18 -0700 (Wed, 03 Sep 2014) | 11 lines IndVarSimplify: Don't let LFTR compare against a poison value LinearFunctionTestReplace tries to use the *next* indvar to compare against when possible. However, it may be the case that the calculation for the next indvar has NUW/NSW flags and that it may only be safely used inside the loop. Using it in a comparison to calculate the exit condition could result in observing poison. This fixes PR20680. Differential Revision: http://reviews.llvm.org/D5174 ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@223637 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging rr221501:David Majnemer2014-12-082-1/+31
| | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r221501 | majnemer | 2014-11-06 16:31:14 -0800 (Thu, 06 Nov 2014) | 7 lines LoopVectorize: Don't assume pointees are sized A pointer's pointee might not be sized: the pointee could be a function. Report this as IK_NoInduction when calculating isInductionVariable. This fixes PR21508. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@223636 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging rr222376:David Majnemer2014-12-081-4/+3
| | | | | | | | | | | | | ------------------------------------------------------------------------ r222376 | majnemer | 2014-11-19 11:36:18 -0800 (Wed, 19 Nov 2014) | 3 lines AliasSet: Simplify mergeSetIn No functional change intended. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@223635 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r222338:David Majnemer2014-12-083-16/+70
| | | | | | | | | | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r222338 | majnemer | 2014-11-19 01:41:05 -0800 (Wed, 19 Nov 2014) | 16 lines AliasSetTracker: UnknownInsts should contribute to the refcount AliasSetTracker::addUnknown may create an AliasSet devoid of pointers just to contain an instruction if no suitable AliasSet already exists. It will then AliasSet::addUnknownInst and we will be done. However, it's possible for addUnknown to choose an existing AliasSet to addUnknownInst. If this were to occur, we are in a bit of a pickle: removing pointers from the AliasSet can cause the entire AliasSet to become destroyed, taking our unknown instructions out with them. Instead, keep track whether or not our AliasSet has any unknown instructions. This fixes PR21582. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@223627 91177308-0d34-0410-b5e6-96231b3b80d8
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