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* Rename a DebugLoc variable to DbgLoc and a DataLayout to DL.Rafael Espindola2014-02-186-360/+389
| | | | | | This is quiet a bit less confusing now that TargetData was renamed DataLayout. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201606 91177308-0d34-0410-b5e6-96231b3b80d8
* Consistently check 'IsCode' when allocating sections in RuntimeDyld (viaLang Hames2014-02-182-2/+6
| | | | | | | | | | | | | | | | findOrEmitSection). Vaidas Gasiunas's patch, r201259, fixed one instance where we were always allocating sections as text. This patch fixes the remaining buggy call sites. No test case: This isn't breaking anything that I know of, it's just inconsistent. <rdar://problem/15943542> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201605 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64] Expanded sin, cos, pow with FP vector types inputsAna Pazos2014-02-182-0/+106
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201601 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Add support for ELF64-mips and the R_MIPS_32/R_MIPS_64 relocs for it.Daniel Sanders2014-02-182-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | Summary: This fixes several test failures when building LLVM on a MIPS host. The failures were: LLVM :: DebugInfo/enum.ll LLVM :: DebugInfo/inlined-arguments.ll LLVM :: DebugInfo/member-order.ll LLVM :: DebugInfo/namespace.ll LLVM :: DebugInfo/template-recursive-void.ll LLVM :: DebugInfo/tu-composite.ll LLVM :: DebugInfo/two-cus-from-same-file.ll LLVM :: Linker/type-unique-simple-a.ll LLVM :: Linker/type-unique-simple2.ll Reviewers: jacksprat, matheusalmeida Reviewed By: matheusalmeida Differential Revision: http://llvm-reviews.chandlerc.com/D2721 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201582 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename some member variables from TD to DL.Rafael Espindola2014-02-1829-145/+145
| | | | | | TargetData was renamed DataLayout back in r165242. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201581 91177308-0d34-0410-b5e6-96231b3b80d8
* Add myself as owner for libc++Marshall Clow2014-02-181-0/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201573 91177308-0d34-0410-b5e6-96231b3b80d8
* XCore target: Handle common linkageRobert Lytton2014-02-183-7/+22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201563 91177308-0d34-0410-b5e6-96231b3b80d8
* XCore target: addMemOperand as necessaryRobert Lytton2014-02-183-49/+109
| | | | | | | | | BuildMI instructions were not including MachineMemOperand information. This was discovered by 'SingleSource/Benchmarks/Stanford/Oscar' failing due to a FrameIndex load incorrectly being hoisted by postra-machine-licm. No other tests have been found to fail. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201562 91177308-0d34-0410-b5e6-96231b3b80d8
* XCore target: Fix llvm.eh.return and EH info register handlingRobert Lytton2014-02-185-120/+330
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201561 91177308-0d34-0410-b5e6-96231b3b80d8
* Darwin builds: handle different possible form for SDKROOT.Tim Northover2014-02-181-4/+6
| | | | | | | | | Modifying build_llvm to handle SDKROOT being the name of an SDK rather than a path. This will still work if SDKROOT is a path. rdar://problem/15162322 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201560 91177308-0d34-0410-b5e6-96231b3b80d8
* GlobalMerge: move "-global-merge" option to the pass itself.Tim Northover2014-02-182-6/+9
| | | | | | | It's rather odd to have the flag enabling and disabling this pass only affect a single target. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201559 91177308-0d34-0410-b5e6-96231b3b80d8
* X86: use vpsllvd (& friends) for 16-bit shifts on HaswellTim Northover2014-02-182-0/+47
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201558 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-cov: Support gcov's extermely lenient treatment of -oJustin Bogner2014-02-182-4/+24
| | | | | | | | | | | | In gcov, the -o flag can accept either a directory or a file name. When given a directory, the gcda and gcno files are expected to be in that directory. When given a file, the gcda and gcno files are expected to be named based on the stem of that file. Non-existent paths are treated as files. This implements compatible behaviour. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201555 91177308-0d34-0410-b5e6-96231b3b80d8
* Add PS prefix to some classes I missed in r201538.Craig Topper2014-02-181-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201551 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a bunch of OpSize32 tags to 64-bit mode only instructions to match their ↵Craig Topper2014-02-184-28/+31
| | | | | | 32-bit mode counterparts for cases where there is also a OpSize16 instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201550 91177308-0d34-0410-b5e6-96231b3b80d8
* AVX-512: Fixed size of mask registersElena Demikhovsky2014-02-181-4/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201546 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a typo about lowering AArch64 va_copy.Jiangning Liu2014-02-182-15/+10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201541 91177308-0d34-0410-b5e6-96231b3b80d8
* Add an x86 prefix encoding for instructions that would decode to a different ↵Craig Topper2014-02-189-185/+213
| | | | | | instruction with 0xf2/f3/66 were in front of them, but don't themselves have a prefix. For now this doesn't change any bbehavior, but plan to use it to fix some bugs in the disassembler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201538 91177308-0d34-0410-b5e6-96231b3b80d8
* PGO: llvm-profdata: tool for merging profilesDuncan P. N. Exon Smith2014-02-1726-2/+353
| | | | | | | | | | | | | | | | | | | Introducing llvm-profdata, a tool for merging profile data generated by PGO instrumentation in clang. - The name indicates a file extension of <name>.profdata. Eventually profile data output by clang should be changed to that extension. - llvm-profdata merges two profiles. However, the name is more general, since it will likely pick up more tasks (such as summarizing a single profile). - llvm-profdata parses the current text-based format, but will be updated once we settle on a binary format. <rdar://problem/15949645> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201535 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix the arm assembler so that this malformed instruction:Kevin Enderby2014-02-172-1/+7
| | | | | | | | | | | | | | | | | | | ldrd r6, r7 [r2, #15] simply gives an error and does not triggers an assertion. As Jim points out, the diagnostic is really strange here, but fixing that would be more complicated. The missing comma results in the parser expecting a construct like r2[2], which is the vector index thing the error message is talking about. That's not what the user intended, though, and there's nothing else in the instruction that looks at all like a vector. Yet more fallout from not having a real parser here and trying to do context-free generic matching for addressing modes. rdar://15097243 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201531 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for assigning to . in AsmParser.Anders Waldenborg2014-02-176-12/+81
| | | | | | | | | | | This is implemented by handling assignments to the '.' pseudo symbol as ".org" directives. Differential Revision: http://llvm-reviews.chandlerc.com/D2625 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201530 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix diassembler handling of rex.b when mod=00/01/10 and bbb=101. Mod=00 ↵Craig Topper2014-02-172-4/+27
| | | | | | should ignore the base register entirely. Mod=01/10 should treat this as R13 plus displacment. Fixes PR18860. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201507 91177308-0d34-0410-b5e6-96231b3b80d8
* AVX-512: implemented zext fron i1 to i16Elena Demikhovsky2014-02-172-1/+39
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201502 91177308-0d34-0410-b5e6-96231b3b80d8
* fix for null VectorizedValue assertion in the SLP Vectorizer (in function ↵Gerolf Hoflehner2014-02-172-2/+69
| | | | | | vectorizeTree()). radar://16064178 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201501 91177308-0d34-0410-b5e6-96231b3b80d8
* MCAsmParser: add some mixed argument testsSaleem Abdulrasool2014-02-171-0/+30
| | | | | | | Add some tests to explicitly validate handling of comma and non-comma separated arguments. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201500 91177308-0d34-0410-b5e6-96231b3b80d8
* MCAsmParser: better handling for named argumentsSaleem Abdulrasool2014-02-174-16/+132
| | | | | | | | | | | | | | | | | | | Until this point only macro definition with named parameters were parsed but the names were ignored. This adds support for using that information for named parameter instantiation. In order to support the full semantics of the keyword arguments, the arguments are no longer lazily initialised since the keyword arguments can be specified out of order and partially if they are defaulted. Prepopulate the arguments with the default value for any defaulted parameters, and then parse the specified arguments. This simplies some of the handling of the arguments in the inner loop since empty arguments simply increment the parameter index and move on. Note that keyword and positional arguments cannot be mixed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201499 91177308-0d34-0410-b5e6-96231b3b80d8
* Use 16 byte stack alignment for NaCl on ARMMark Seaborn2014-02-164-6/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | NaCl's ARM ABI uses 16 byte stack alignment, so set that in ARMSubtarget.cpp. Using 16 byte alignment exposes an issue in code generation in which a varargs function leaves a 4 byte gap between the values of r1-r3 saved to the stack and the following arguments that were passed on the stack. (Previously, this code only needed to support 4 byte and 8 byte alignment.) With this issue, llc generated: varargs_func: sub sp, sp, #16 push {lr} sub sp, sp, #12 add r0, sp, #16 // Should be 20 stm r0, {r1, r2, r3} ldr r0, .LCPI0_0 // Address of va_list add r1, sp, #16 str r1, [r0] bl external_func Fix the bug by checking for "Align > 4". Also simplify the code by using OffsetToAlignment(), and update comments. Differential Revision: http://llvm-reviews.chandlerc.com/D2677 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201497 91177308-0d34-0410-b5e6-96231b3b80d8
* SCEVExpander: Try hard not to create derived induction variables in other loopsArnold Schwaighofer2014-02-163-26/+189
| | | | | | | | | | | | | | | | | | | During LSR of one loop we can run into a situation where we have to expand the start of a recurrence of a loop induction variable in this loop. This start value is a value derived of the induction variable of a preceeding loop. SCEV has cannonicalized this value to a different recurrence than the recurrence of the preceeding loop's induction variable (the type and/or step direction) has changed). When we come to instantiate this SCEV we created a second induction variable in this preceeding loop. This patch tries to base such derived induction variables of the preceeding loop's induction variable. This helps twolf on arm and seems to help scimark2 on x86. Reapply with a fix for the case of a value derived from a pointer. radar://15970709 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201496 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove dead code, we already require cmake 2.8.8.Rafael Espindola2014-02-162-10/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201495 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove unnecessary typename.Rafael Espindola2014-02-161-6/+6
| | | | | | Thanks to Elena Demikhovsky for noticing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201494 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix more broken CHECK linesNico Rieck2014-02-163-75/+75
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201493 91177308-0d34-0410-b5e6-96231b3b80d8
* Add extra CHECK prefix to tests with explicit prefixNico Rieck2014-02-166-22/+22
| | | | | | | These tests mistakenly assume that CHECK is still available even if an explicit prefix is specified. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201492 91177308-0d34-0410-b5e6-96231b3b80d8
* Actually call FileCheck in testsNico Rieck2014-02-163-3/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201491 91177308-0d34-0410-b5e6-96231b3b80d8
* llvmbuild: Exclude disabled targets from LLVMExports.cmake.NAKAMURA Takumi2014-02-161-0/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201490 91177308-0d34-0410-b5e6-96231b3b80d8
* LLVMExports.cmake: Add System libs $(LIBS) to LLVMSupport, corresponding to ↵NAKAMURA Takumi2014-02-161-0/+2
| | | | | | r201077. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201489 91177308-0d34-0410-b5e6-96231b3b80d8
* LLVMExports.cmake: Exclude gtest since they are not installed.NAKAMURA Takumi2014-02-161-1/+1
| | | | | | FIXME: gtest might be included if external project could refer to the build tree. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201488 91177308-0d34-0410-b5e6-96231b3b80d8
* AVX-512: simpyfied BUILD_VECTOR for masks; fixed cmp/test sequenceElena Demikhovsky2014-02-164-92/+43
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201487 91177308-0d34-0410-b5e6-96231b3b80d8
* fixed typo in comment as my test commitGerolf Hoflehner2014-02-161-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201486 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a DIELoc class to cover the DW_FORM_exprloc set of expressionsEric Christopher2014-02-168-77/+184
| | | | | | | | | | | | | alongside DIEBlock and replace uses accordingly. Use DW_FORM_exprloc in DWARF4 and later code. Update testcases. Adding a DIELoc instead of using extra forms inside DIEBlock so that we can keep location expressions separate from other uses. No direct use at the moment, however, it's not a lot of code and using a separately named class keeps it somewhat more obvious what's going on in various locations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201481 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix broken CHECK linesNico Rieck2014-02-1612-25/+25
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201479 91177308-0d34-0410-b5e6-96231b3b80d8
* MCAsmParser: relax declaration parsingSaleem Abdulrasool2014-02-162-1/+14
| | | | | | | | The Linux kernel defines empty macros for compatibility with ARM UAL syntax. The comma after the name is optional, and if present can be safely lexed. This improves compatibility with the GNU assembler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201474 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM IAS: (partially) support .arch_extension directiveSaleem Abdulrasool2014-02-168-0/+988
| | | | | | | | | | | | This adds a partial implementation of the .arch_extension directive to the integrated ARM assembler. There are a number of limitations to this implementation arising from the target backend support rather than the implementation itself. Namely, iWMMXT (v1 and v2), Maverick, and XScale support is not present in the ARM backend. Currently, there is no check for A-class only (needed for virt), and no ARMv6k detection (needed for os and sec). The remainder of the extensions are fully supported. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201471 91177308-0d34-0410-b5e6-96231b3b80d8
* DebugInfo: Deduplicate entries in the fission address tableDavid Blaikie2014-02-154-22/+22
| | | | | | | | | | | | This broke in r185459 while TLS support was being generalized to handle non-symbol TLS representations. I thought about/tried having an enum rather than a bool to track the TLS-ness of the address table entry, but namespaces and naming seemed more hassle than it was worth for only one caller that needed to specify this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201469 91177308-0d34-0410-b5e6-96231b3b80d8
* DwarfDebug: Remove dead code.David Blaikie2014-02-151-7/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201467 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "SCEVExpander: Try hard not to create derived induction variables in ↵Arnold Schwaighofer2014-02-153-180/+26
| | | | | | | | other loops" This reverts commit r201465. It broke an arm bot. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201466 91177308-0d34-0410-b5e6-96231b3b80d8
* SCEVExpander: Try hard not to create derived induction variables in other loopsArnold Schwaighofer2014-02-153-26/+180
| | | | | | | | | | | | | | | | | During LSR of one loop we can run into a situation where we have to expand the start of a recurrence of a loop induction variable in this loop. This start value is a value derived of the induction variable of a preceeding loop. SCEV has cannonicalized this value to a different recurrence than the recurrence of the preceeding loop's induction variable (the type and/or step direction) has changed). When we come to instantiate this SCEV we created a second induction variable in this preceeding loop. This patch tries to base such derived induction variables of the preceeding loop's induction variable. This helps twolf on arm and seems to help scimark2 on x86. radar://15970709 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201465 91177308-0d34-0410-b5e6-96231b3b80d8
* Cleanup docs about lit substitutionsNico Rieck2014-02-151-48/+69
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201464 91177308-0d34-0410-b5e6-96231b3b80d8
* Add opcode extension forms of MOV8ri/MOV16ri/MOV32ri.Craig Topper2014-02-152-0/+19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201463 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix typoNico Rieck2014-02-151-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201461 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove tautological test line (unsigneds are always >=0).Lang Hames2014-02-151-1/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201451 91177308-0d34-0410-b5e6-96231b3b80d8
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