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* Move the personality function from LandingPadInst to FunctionDavid Majnemer2015-06-17131-505/+495
* [CodeGenPrepare] Generalize inserted set from truncs to any inst.Ahmed Bougacha2015-06-171-0/+16
* [Hexagon] Adding a number of other tests for min/max instructions and loading...Colin LeMahieu2015-06-1719-2/+327
* [Hexagon] Adding some compare tests, fixing existing XFAILed tests, and remov...Colin LeMahieu2015-06-179-8/+331
* AVX-512: cvtusi2ss/d intrinsics.Igor Breger2015-06-171-7/+97
* Revert "AArch64: Use CMP;CCMP sequences for and/or/setcc trees."Matthias Braun2015-06-171-40/+0
* [Hexagon] Adding MC ELF streamer and updating addend relocation test which sh...Colin LeMahieu2015-06-171-1/+1
* Add some tests based on PR21711Sanjay Patel2015-06-161-0/+61
* [X86][SSE] Vectorize v2i32 to v2f64 conversionsSimon Pilgrim2015-06-162-69/+10
* Reapply 239795 - [InstCombine] Propagate non-null facts to call parametersPhilip Reames2015-06-161-1/+1
* [Statepoints] Test only change. Check that statepoint lowering didn't generat...Igor Laevsky2015-06-161-0/+2
* MIR Parser: Report an error when a machine function doesn't have a correspond...Alex Lorenz2015-06-161-0/+19
* Properly handle the mftb instruction.Kit Barton2015-06-161-0/+72
* Revert "Revert "Fix merges of non-zero vector stores""Matt Arsenault2015-06-162-2/+100
* [AVX512] add integer min/max intrinsics support.Asaf Badouh2015-06-164-26/+644
* Disable llvm/test/CodeGen/MIR/machine-function.mir on x86 msc18 for now. Inve...NAKAMURA Takumi2015-06-161-0/+1
* X86: optimized i64 vector multiply with constantElena Demikhovsky2015-06-161-4/+33
* Revert 239795Philip Reames2015-06-161-1/+1
* [AArch64] Generalize extract-high DUP extension to MOVI/MVNI.Ahmed Bougacha2015-06-161-0/+210
* [AArch64] Robustize neon-2velem-high test. NFC.Ahmed Bougacha2015-06-161-111/+136
* [InstCombine] Propagate non-null facts to call parametersPhilip Reames2015-06-161-1/+1
* MIR Serialization: Print and parse simple machine function attributes.Alex Lorenz2015-06-161-0/+34
* MIR Serialization: Create dummy functions when the MIR file doesn't have LLVM...Alex Lorenz2015-06-151-1/+3
* MIR Serialization: Report an error when machine functions have the same name.Alex Lorenz2015-06-151-0/+10
* [Hexagon] Using readobj rather than objdump.Colin LeMahieu2015-06-151-1/+1
* [Hexagon] PC-relative offsets are relative to packet start rather than the of...Colin LeMahieu2015-06-151-0/+10
* [X86][SSE] Added tests for vector i8/i16 to f32/f64 conversionsSimon Pilgrim2015-06-151-55/+562
* MIR Serialization: Connect the machine function analysis pass to the MIR parser.Alex Lorenz2015-06-154-2/+18
* Add "REQUIRES: asserts" to test case that uses -debug-onlySanjoy Das2015-06-151-0/+1
* [CodeGen] Add a pass to fold null checks into nearby memory operations.Sanjoy Das2015-06-152-0/+170
* On behalf of Alexandros Lamprineas:Evgeny Astigeevich2015-06-151-0/+1
* [AArch64] Delete two empty files, which should be removed by r239713.Hao Liu2015-06-151-0/+0
* [AArch64] Revert r239711 again. We need to discuss how to share code between ...Hao Liu2015-06-151-197/+0
* [AArch64] Match interleaved memory accesses into ldN/stN instructions.Hao Liu2015-06-151-0/+197
* AVX-512: Implemented DAG lowering for shuff62x2/shufi62x2 instuctions ( Shuff...Igor Breger2015-06-142-4/+60
* AVX-512: Implemented cvtsi2ss/d cvtusi2ss/d instructions with round control f...Igor Breger2015-06-141-0/+40
* [Hexagon] Adding some codegen tests and updating some to match spec.Colin LeMahieu2015-06-1312-21/+350
* [DAGCombiner] Added BSWAP(BSWAP(x)) -> x combine pattern.Simon Pilgrim2015-06-131-0/+74
* [DAGCombiner] Added BSWAP vector constant folding support.Simon Pilgrim2015-06-131-3/+100
* R600 -> AMDGPU renameTom Stellard2015-06-13401-2/+2
* AArch64: map bare-metal arm64-macho triple to MachO MC layer.Tim Northover2015-06-121-0/+12
* R600/SI: Add assembler support for FLAT instructionsTom Stellard2015-06-121-1/+1
* [Hexagon] Making intrinsic tests agnostic to register allocation. Narrowing ...Colin LeMahieu2015-06-1211-749/+777
* Don't depend on the interleaving of stdout and stderr.Rafael Espindola2015-06-121-9/+26
* [ARM] Disabling vfp4 should disable fp16John Brawn2015-06-121-3/+3
* [WinEH] Put finally pointers in the handler scope table fieldReid Kleckner2015-06-113-23/+57
* [WinEH] Create an llvm.x86.seh.exceptioninfo intrinsicReid Kleckner2015-06-113-42/+101
* Object: Prepend __imp_ when mangling a dllimport symbol in IRObjectFile.Peter Collingbourne2015-06-111-0/+4
* This reverts commit r239529 and r239514.Rafael Espindola2015-06-111-197/+0
* Revert "Fix merges of non-zero vector stores"Reid Kleckner2015-06-112-11/+2
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