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| author | Mike Pall <mike> | 2017-02-20 02:35:24 +0100 |
|---|---|---|
| committer | Mike Pall <mike> | 2017-02-20 02:35:24 +0100 |
| commit | 892d370edd36ef748f3b6095a80f77798fac9bee (patch) | |
| tree | 7484e3498dc31bc03b2fa39b1f5087dca54d0645 | |
| parent | ee33a1f9b33577e23e5ec0aedd5ebe1baeef7f7c (diff) | |
| download | luajit2-892d370edd36ef748f3b6095a80f77798fac9bee.tar.gz | |
MIPS: Don't use RID_GP as a scratch register.
| -rw-r--r-- | src/lj_target_mips.h | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/src/lj_target_mips.h b/src/lj_target_mips.h index 8b108304..bed174b8 100644 --- a/src/lj_target_mips.h +++ b/src/lj_target_mips.h @@ -28,6 +28,7 @@ enum { RID_MAX, RID_ZERO = RID_R0, RID_TMP = RID_RA, + RID_GP = RID_R28, /* Calling conventions. */ RID_RET = RID_R2, @@ -62,10 +63,10 @@ enum { /* -- Register sets ------------------------------------------------------- */ -/* Make use of all registers, except ZERO, TMP, SP, SYS1, SYS2 and JGL. */ +/* Make use of all registers, except ZERO, TMP, SP, SYS1, SYS2, JGL and GP. */ #define RSET_FIXED \ (RID2RSET(RID_ZERO)|RID2RSET(RID_TMP)|RID2RSET(RID_SP)|\ - RID2RSET(RID_SYS1)|RID2RSET(RID_SYS2)|RID2RSET(RID_JGL)) + RID2RSET(RID_SYS1)|RID2RSET(RID_SYS2)|RID2RSET(RID_JGL)|RID2RSET(RID_GP)) #define RSET_GPR (RSET_RANGE(RID_MIN_GPR, RID_MAX_GPR) - RSET_FIXED) #define RSET_FPR \ (RID2RSET(RID_F0)|RID2RSET(RID_F2)|RID2RSET(RID_F4)|RID2RSET(RID_F6)|\ @@ -77,7 +78,7 @@ enum { #define RSET_SCRATCH_GPR \ (RSET_RANGE(RID_R1, RID_R15+1)|\ - RID2RSET(RID_R24)|RID2RSET(RID_R25)|RID2RSET(RID_R28)) + RID2RSET(RID_R24)|RID2RSET(RID_R25)) #define RSET_SCRATCH_FPR \ (RID2RSET(RID_F0)|RID2RSET(RID_F2)|RID2RSET(RID_F4)|RID2RSET(RID_F6)|\ RID2RSET(RID_F8)|RID2RSET(RID_F10)|RID2RSET(RID_F12)|RID2RSET(RID_F14)|\ |