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author | Davi Arnaut <Davi.Arnaut@Sun.COM> | 2010-07-05 09:00:39 -0300 |
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committer | Davi Arnaut <Davi.Arnaut@Sun.COM> | 2010-07-05 09:00:39 -0300 |
commit | cd41cd953d9d76b4b9c13fd745856d5023f12d71 (patch) | |
tree | fc5079ee6d597ddaff51838ebd4e62da399f94cd /include/atomic/x86-gcc.h | |
parent | 279b3adfc78ae93f976eb8797f41c64f3bc6b4bb (diff) | |
download | mariadb-git-cd41cd953d9d76b4b9c13fd745856d5023f12d71.tar.gz |
Bug#22320: my_atomic-t unit test fails
The atomic operations implementation on 5.1 has a few problems,
which might cause tests to abort randomly. Since no code in 5.1
uses atomic operations, simply remove the code.
Diffstat (limited to 'include/atomic/x86-gcc.h')
-rw-r--r-- | include/atomic/x86-gcc.h | 58 |
1 files changed, 0 insertions, 58 deletions
diff --git a/include/atomic/x86-gcc.h b/include/atomic/x86-gcc.h deleted file mode 100644 index d79dadbf05e..00000000000 --- a/include/atomic/x86-gcc.h +++ /dev/null @@ -1,58 +0,0 @@ -/* Copyright (C) 2006 MySQL AB - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; version 2 of the License. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ - -/* - XXX 64-bit atomic operations can be implemented using - cmpxchg8b, if necessary. Though I've heard that not all 64-bit - architectures support double-word (128-bit) cas. -*/ - -#ifdef MY_ATOMIC_NO_XADD -#define MY_ATOMIC_MODE "gcc-x86" LOCK "-no-xadd" -#else -#define MY_ATOMIC_MODE "gcc-x86" LOCK -#endif - -/* fix -ansi errors while maintaining readability */ -#ifndef asm -#define asm __asm__ -#endif - -#ifndef MY_ATOMIC_NO_XADD -#define make_atomic_add_body(S) \ - asm volatile (LOCK "; xadd %0, %1;" : "+r" (v) , "+m" (*a)) -#endif -#define make_atomic_swap_body(S) \ - asm volatile ("; xchg %0, %1;" : "+r" (v) , "+m" (*a)) -#define make_atomic_cas_body(S) \ - asm volatile (LOCK "; cmpxchg %3, %0; setz %2;" \ - : "+m" (*a), "+a" (*cmp), "=q" (ret): "r" (set)) - -#ifdef MY_ATOMIC_MODE_DUMMY -#define make_atomic_load_body(S) ret=*a -#define make_atomic_store_body(S) *a=v -#else -/* - Actually 32-bit reads/writes are always atomic on x86 - But we add LOCK here anyway to force memory barriers -*/ -#define make_atomic_load_body(S) \ - ret=0; \ - asm volatile (LOCK "; cmpxchg %2, %0" \ - : "+m" (*a), "+a" (ret): "r" (ret)) -#define make_atomic_store_body(S) \ - asm volatile ("; xchg %0, %1;" : "+m" (*a) : "r" (v)) -#endif - |