Merge bb-10.2-ext into 10.3

2 files changed, 6 insertions, 32 deletions

diff --git a/include/atomic/gcc_builtins.h b/include/atomic/gcc_builtins.h
index 99e6f628b50..e2c3b10c267 100644
--- a/include/atomic/gcc_builtins.h
+++ b/include/atomic/gcc_builtins.h
@@ -40,18 +40,18 @@
 #define my_atomic_add64_explicit(P, A, O) __atomic_fetch_add((P), (A), (O))
 
 #define my_atomic_cas32_weak_explicit(P, E, D, S, F) \
-  __atomic_compare_exchange_n((P), (E), (D), true, (S), (F))
+  __atomic_compare_exchange_n((P), (E), (D), 1, (S), (F))
 #define my_atomic_cas64_weak_explicit(P, E, D, S, F) \
-  __atomic_compare_exchange_n((P), (E), (D), true, (S), (F))
+  __atomic_compare_exchange_n((P), (E), (D), 1, (S), (F))
 #define my_atomic_casptr_weak_explicit(P, E, D, S, F) \
-  __atomic_compare_exchange_n((P), (E), (D), true, (S), (F))
+  __atomic_compare_exchange_n((P), (E), (D), 1, (S), (F))
 
 #define my_atomic_cas32_strong_explicit(P, E, D, S, F) \
-  __atomic_compare_exchange_n((P), (E), (D), false, (S), (F))
+  __atomic_compare_exchange_n((P), (E), (D), 0, (S), (F))
 #define my_atomic_cas64_strong_explicit(P, E, D, S, F) \
-  __atomic_compare_exchange_n((P), (E), (D), false, (S), (F))
+  __atomic_compare_exchange_n((P), (E), (D), 0, (S), (F))
 #define my_atomic_casptr_strong_explicit(P, E, D, S, F) \
-  __atomic_compare_exchange_n((P), (E), (D), false, (S), (F))
+  __atomic_compare_exchange_n((P), (E), (D), 0, (S), (F))
 
 #define my_atomic_store32(P, D) __atomic_store_n((P), (D), __ATOMIC_SEQ_CST)
 #define my_atomic_store64(P, D) __atomic_store_n((P), (D), __ATOMIC_SEQ_CST)
diff --git a/include/atomic/generic-msvc.h b/include/atomic/generic-msvc.h
index 56fa4f66fcd..d5eaa4738c7 100644
--- a/include/atomic/generic-msvc.h
+++ b/include/atomic/generic-msvc.h
@@ -137,30 +137,4 @@ static inline void my_atomic_storeptr(void * volatile *a, void *v)
   *a= v;
 }
 
-
-/*
-  my_yield_processor (equivalent of x86 PAUSE instruction) should be used
-  to improve performance on hyperthreaded CPUs. Intel recommends to use it in
-  spin loops also on non-HT machines to reduce power consumption (see e.g
-  http://softwarecommunity.intel.com/articles/eng/2004.htm)
-
-  Running benchmarks for spinlocks implemented with InterlockedCompareExchange
-  and YieldProcessor shows that much better performance is achieved by calling
-  YieldProcessor in a loop - that is, yielding longer. On Intel boxes setting
-  loop count in the range 200-300 brought best results.
- */
-#define YIELD_LOOPS 200
-
-static inline int my_yield_processor()
-{
-  int i;
-  for (i=0; i<YIELD_LOOPS; i++)
-  {
-    YieldProcessor();
-  }
-  return 1;
-}
-
-#define LF_BACKOFF my_yield_processor()
-
 #endif /* ATOMIC_MSC_INCLUDED */