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authorAlexey Kopytov <Alexey.Kopytov@Sun.com>2010-05-29 22:16:45 +0400
committerAlexey Kopytov <Alexey.Kopytov@Sun.com>2010-05-29 22:16:45 +0400
commitf3a83073972b510ffee922aac37434946ae0e0bc (patch)
tree77ac3c0c9d9c26af9a5b121f75e54a423aadff7e /sql/mysqld.cc
parentd72a4710aaad2f1e76ac20d50793f13f941ef899 (diff)
downloadmariadb-git-f3a83073972b510ffee922aac37434946ae0e0bc.tar.gz
Bug #48537: difference of index selection between rpm binary
and .tar.gz, windows vs linux.. On Intel x86 machines index selection by the MySQL query optimizer could sometimes depend on the compiler version and optimization flags used to build the server binary. The problem was a result of a known issue with floating point calculations on x86: since internal FPU precision (80 bit) differs from precision used by programs (32-bit float or 64-bit double), the result of calculating a complex expression may depend on how FPU registers are allocated by the compiler and whether intermediate values are spilled from FPU to memory. In this particular case compiler versions and optimization flags had an effect on cost calculation when choosing the best index in best_access_path(). A possible solution to this problem which has already been implemented in mysql-trunk is to limit FPU internal precision to 64 bits. So the fix is a backport of the relevant code to 5.1 from mysql-trunk. configure.in: Configure check for fpu_control.h mysql-test/r/explain.result: Test case for bug #48537. mysql-test/t/explain.test: Test case for bug #48537. sql/mysqld.cc: Backport of the code to switch FPU on x86 to 64-bit precision.
Diffstat (limited to 'sql/mysqld.cc')
-rw-r--r--sql/mysqld.cc36
1 files changed, 35 insertions, 1 deletions
diff --git a/sql/mysqld.cc b/sql/mysqld.cc
index 3664f46995f..3ffc1a21e9c 100644
--- a/sql/mysqld.cc
+++ b/sql/mysqld.cc
@@ -183,6 +183,21 @@ typedef fp_except fp_except_t;
/* for IRIX to use set_fpc_csr() */
#include <sys/fpu.h>
#endif
+#ifdef HAVE_FPU_CONTROL_H
+#include <fpu_control.h>
+#endif
+#if defined(__i386__) && !defined(HAVE_FPU_CONTROL_H)
+# define fpu_control_t unsigned int
+# define _FPU_EXTENDED 0x300
+# define _FPU_DOUBLE 0x200
+# ifdef __GNUC__
+# define _FPU_GETCW(cw) __asm__ __volatile__("fnstcw %0" : "=m" (*&cw))
+# define _FPU_SETCW(cw) __asm__ __volatile__("fldcw %0" : : "m" (*&cw))
+# else
+# define _FPU_GETCW(cw) (cw= 0)
+# define _FPU_SETCW(cw)
+# endif
+#endif
inline void setup_fpu()
{
@@ -204,7 +219,26 @@ inline void setup_fpu()
/* Set FPU rounding mode to "round-to-nearest" */
fesetround(FE_TONEAREST);
#endif /* HAVE_FESETROUND */
-
+
+ /*
+ x86 (32-bit) requires FPU precision to be explicitly set to 64 bit
+ (double precision) for portable results of floating point operations.
+ However, there is no need to do so if compiler is using SSE2 for floating
+ point, double values will be stored and processed in 64 bits anyway.
+ */
+#if defined(__i386__) && !defined(__SSE2_MATH__)
+#if defined(_WIN32)
+#if !defined(_WIN64)
+ _control87(_PC_53, MCW_PC);
+#endif /* !_WIN64 */
+#else /* !_WIN32 */
+ fpu_control_t cw;
+ _FPU_GETCW(cw);
+ cw= (cw & ~_FPU_EXTENDED) | _FPU_DOUBLE;
+ _FPU_SETCW(cw);
+#endif /* _WIN32 && */
+#endif /* __i386__ */
+
#if defined(__sgi) && defined(HAVE_SYS_FPU_H)
/* Enable denormalized DOUBLE values support for IRIX */
union fpc_csr n;