diff options
| -rw-r--r-- | include/my_sys.h | 3 | ||||
| -rw-r--r-- | mysys/CMakeLists.txt | 3 | ||||
| -rw-r--r-- | mysys/crc32/crc32_arm64.c | 13 | ||||
| -rw-r--r-- | storage/innobase/ut/ut0crc32.cc | 6 |
4 files changed, 21 insertions, 4 deletions
diff --git a/include/my_sys.h b/include/my_sys.h index 3acc1487f95..d2aaa5192a4 100644 --- a/include/my_sys.h +++ b/include/my_sys.h @@ -911,6 +911,9 @@ extern MYSQL_PLUGIN_IMPORT my_crc32_t my_checksum; #if defined(__GNUC__) && defined(HAVE_ARMV8_CRC) int crc32_aarch64_available(void); +#if defined(HAVE_ARMV8_CRYPTO) +int crc32c_aarch64_available(void); +#endif #endif #ifdef DBUG_ASSERT_EXISTS diff --git a/mysys/CMakeLists.txt b/mysys/CMakeLists.txt index 3d8a20e4f9a..14a4ea9e9bb 100644 --- a/mysys/CMakeLists.txt +++ b/mysys/CMakeLists.txt @@ -90,7 +90,8 @@ ELSEIF(CMAKE_SYSTEM_PROCESSOR MATCHES "aarch64|AARCH64") __asm__(\"pmull v2.1q, v2.1d, v1.1d\"); return ret; } - int main() { foo(0); }" HAVE_ARMV8_CRYPTO) + #include <sys/auxv.h> + int main() { foo(0); getauxval(AT_HWCAP); }" HAVE_ARMV8_CRYPTO) CHECK_C_COMPILER_FLAG(-march=armv8-a+crc+crypto HAVE_ARMV8_CRC_CRYPTO_INTRINSICS) IF(HAVE_ARMV8_CRC_CRYPTO_INTRINSICS) diff --git a/mysys/crc32/crc32_arm64.c b/mysys/crc32/crc32_arm64.c index 09ac7a12a66..aae6f769002 100644 --- a/mysys/crc32/crc32_arm64.c +++ b/mysys/crc32/crc32_arm64.c @@ -18,8 +18,21 @@ int crc32_aarch64_available(void) unsigned long auxv= getauxval(AT_HWCAP); return (auxv & HWCAP_CRC32) != 0; } + +#if defined(HAVE_ARMV8_CRYPTO) + +#ifndef HWCAP_PMULL +#define HWCAP_PMULL (1 << 4) #endif +/* Check if target ARM machine support crc32 + pmull for computing crc32c */ +int crc32c_aarch64_available(void) +{ + return !(~getauxval(AT_HWCAP) & (HWCAP_CRC32 | HWCAP_PMULL)); +} +#endif /* HAVE_ARMV8_CRYPTO */ +#endif /* HAVE_ARMV8_CRC */ + #ifndef HAVE_ARMV8_CRC_CRYPTO_INTRINSICS /* Request crc extension capabilities from the assembler */ diff --git a/storage/innobase/ut/ut0crc32.cc b/storage/innobase/ut/ut0crc32.cc index dabf92e875b..9de0ca81fe3 100644 --- a/storage/innobase/ut/ut0crc32.cc +++ b/storage/innobase/ut/ut0crc32.cc @@ -342,11 +342,11 @@ allocations, would not hurt if called twice, but would be pointless. */ void ut_crc32_init() { #ifndef HAVE_CRC32_VPMSUM -# if defined(__GNUC__) && defined(HAVE_ARMV8_CRC) - if (crc32_aarch64_available()) +# if defined(__GNUC__) && defined(HAVE_ARMV8_CRC) && defined(HAVE_ARMV8_CRYPTO) + if (crc32c_aarch64_available()) { ut_crc32_low= crc32c_aarch64; - ut_crc32_implementation= "Using ARMv8 crc32 instructions"; + ut_crc32_implementation= "Using ARMv8 crc32 + pmull instructions"; return; } # elif defined(TRY_SSE4_2) |