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-rw-r--r--include/atomic/x86-gcc.h18
1 files changed, 10 insertions, 8 deletions
diff --git a/include/atomic/x86-gcc.h b/include/atomic/x86-gcc.h
index 8baa84e110e..90602ef900c 100644
--- a/include/atomic/x86-gcc.h
+++ b/include/atomic/x86-gcc.h
@@ -111,9 +111,9 @@
On some platforms (e.g. Mac OS X and Solaris) the ebx register
is held as a pointer to the global offset table. Thus we're not
allowed to use the b-register on those platforms when compiling
- PIC code, to avoid this we push ebx and pop ebx and add a movl
- instruction to avoid having ebx in the interface of the assembler
- instruction.
+ PIC code, to avoid this we push ebx and pop ebx. The new value
+ is copied directly from memory to avoid problems with a implicit
+ manipulation of the stack pointer by the push.
cmpxchg8b works on both 32-bit platforms and 64-bit platforms but
the code here is only used on 32-bit platforms, on 64-bit
@@ -121,11 +121,13 @@
fine.
*/
#define make_atomic_cas_body64 \
- int32 ebx=(set & 0xFFFFFFFF), ecx=(set >> 32); \
- asm volatile ("push %%ebx; movl %3, %%ebx;" \
- LOCK_prefix "; cmpxchg8b %0; setz %2; pop %%ebx" \
- : "=m" (*a), "+A" (*cmp), "=c" (ret) \
- : "m" (ebx), "c" (ecx), "m" (*a) \
+ asm volatile ("push %%ebx;" \
+ "movl (%%ecx), %%ebx;" \
+ "movl 4(%%ecx), %%ecx;" \
+ LOCK_prefix "; cmpxchg8b %0;" \
+ "setz %2; pop %%ebx" \
+ : "=m" (*a), "+A" (*cmp), "=c" (ret) \
+ : "c" (&set), "m" (*a) \
: "memory", "esp")
#endif