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-rw-r--r--innobase/include/sync0sync.ic17
1 files changed, 16 insertions, 1 deletions
diff --git a/innobase/include/sync0sync.ic b/innobase/include/sync0sync.ic
index a937ac5d579..5a872c6b093 100644
--- a/innobase/include/sync0sync.ic
+++ b/innobase/include/sync0sync.ic
@@ -86,6 +86,20 @@ mutex_test_and_set(
/* mutex_fence(); */
return(res);
+#elif defined(__GNUC__) && defined(UNIV_INTEL_X86)
+ ulint* lw;
+ ulint res;
+
+ lw = &(mutex->lock_word);
+
+ /* In assembly we use the so-called AT & T syntax where
+ the order of operands is inverted compared to the ordinary Intel
+ syntax. The 'l' after the mnemonics denotes a 32-bit operation. */
+
+ asm volatile("movl $1, %%eax; xchgl (%%ecx), %%eax" :
+ "=eax" (res):
+ "ecx" (lw));
+ return(res);
#else
ibool ret;
@@ -120,9 +134,10 @@ mutex_reset_lock_word(
__asm XCHG EDX, DWORD PTR [ECX]
#else
mutex->lock_word = 0;
-
+#if !(defined(__GNUC__) && defined(UNIV_INTEL_X86))
os_fast_mutex_unlock(&(mutex->os_fast_mutex));
#endif
+#endif
}
/**********************************************************************