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authorDylan Baker <dylan.c.baker@intel.com>2022-11-21 09:46:21 -0800
committerDylan Baker <dylan.c.baker@intel.com>2022-11-21 09:46:21 -0800
commitcbd39e87c8e6afcd5f755cddda6089b3855536ca (patch)
tree20618a78d3e277395f769b52bd26318c1187e770 /.pick_status.json
parent05f98731b7fa134d8ebb29c43ac6803e78d3aa8c (diff)
downloadmesa-cbd39e87c8e6afcd5f755cddda6089b3855536ca.tar.gz
.pick_status.json: Update to 8133d5551de13a2c1912f61ab9f87938b33aa5ea
Diffstat (limited to '.pick_status.json')
-rw-r--r--.pick_status.json1242
1 files changed, 1242 insertions, 0 deletions
diff --git a/.pick_status.json b/.pick_status.json
index 15a9f13468c..b2d045283bf 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -1,5 +1,1247 @@
[
{
+ "sha": "8133d5551de13a2c1912f61ab9f87938b33aa5ea",
+ "description": "radv/rt: Return the correct result for requested deferral",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "8d8caa44bd5a3e7397a77789a5fd1b1593df9d25",
+ "description": "frontends/va: remove unused slice_param_idx variable",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "3061bc792d3d0252854a38bff956c15c51b06643",
+ "description": "aco: ensure MRT0 is written with dual source blending",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "ea0ae17fc453401223918b27e0610352fe67e66d",
+ "description": "radv: disable MRT compaction with dual-source blending",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "68652dca0c281e509ad271229be037a5e10ed594",
+ "description": "iris: Fix iris_bo_alloc() flags call argument",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "f1305d49d913ee9d3b297a6ce76ef7156483cf96",
+ "description": "tu: Implement VK_EXT_post_depth_coverage",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "1ec172646cd7f5b8c04173a6b45a871aa48aa12e",
+ "description": "r300: more informative too many ALU instructions error",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "b70543a95584aea448b9ae03d2fae7c53fff9ca3",
+ "description": "r300: delete backend branch emulation",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "2fe73e3bcb00ac6ef75e5d03962c16b950126386",
+ "description": "r300: abort shader compilation early on loops and branches",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "8d37ab6bfa0321674fe74cc4c76c21aa94d36840",
+ "description": "radv: Fix custom build id with C90 compilation.",
+ "nominated": true,
+ "nomination_type": 1,
+ "resolution": 0,
+ "main_sha": null,
+ "because_sha": "97641e5c9422430b74967a77ddb12f3e57604e4b"
+ },
+ {
+ "sha": "d34f3a1db594c778e0c6bae7a5798742edb9635d",
+ "description": "v3dv: fix multiple typos",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "67ffe25fd9de94acc654312ec9261d811d139adf",
+ "description": "r600: Fix lower-to-scalar on TTN path",
+ "nominated": false,
+ "nomination_type": 1,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": "a81c50a21447a95e05f73badf6e4e7bfe734f7a8"
+ },
+ {
+ "sha": "a69eafc4226479fc143807a3a0c2ce52a3bc3939",
+ "description": "r600: reference glsl type system during translation",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "089ae08ab1f2c8035680013fe267b049777c2d1b",
+ "description": "intel_batch_decoder: disasm shaders when decoding states besides VS",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "c82775e3c726792ca7b3e98fc7a8b0eeea3c8e8d",
+ "description": "v3d: Minor fixes on sand8 blit based on sand30 modifications",
+ "nominated": true,
+ "nomination_type": 1,
+ "resolution": 0,
+ "main_sha": null,
+ "because_sha": "95c4f0f91098a0da5a8e8ec76cb38f2c95bafe1c"
+ },
+ {
+ "sha": "e97b20f3ca5e874d6944e5f914bd32b2321afa72",
+ "description": "v3d: Also expose DRM_FORMAT_MOD_BROADCOM_SAND128 with PIPE_FORMAT_P030",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "653cf8c8d236745302197ece510be2036e03e942",
+ "description": "v3d: Blit for P030 format with BROADCOM_SAND128 modifier to P010 UIF",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "4ea41479359a2f876c8110d8a0cbdd1da7acbfec",
+ "description": "gallium/dri: Add P030 format",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "e253729e0374af5e5afb97baaac842a9c869eb7e",
+ "description": "zink: require extendedDynamicState3ColorBlendEquation for full ds3",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "390c4b337aa7b4a4efda259a0eba14d553ee2363",
+ "description": "radv: Support accelerationStructureCaptureReplay.",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "165ef452fd7dac75a658a096ad11ccd6fc086c8a",
+ "description": "radv/ci: add one more pipeline barrier test as flake",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "5c5735fd68168fd1e80d474df84dc819d7a1ad24",
+ "description": "radv: advertise VK_EXT_descriptor_buffer",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "46e0c77582dd2cfbe77e78cf33399eb761ccb7b6",
+ "description": "radv: implement VK_EXT_descriptor_buffer",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "e3fae40e966cafe9dba04de307826dea8fa410ec",
+ "description": "radv: always restore NULL descriptor sets for meta operations",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "a59be04ea5520efb7baaf94d327eaa30b2993526",
+ "description": "radv: rework writing image/buffer/accel_struct descriptors slightly",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "e8cff91bd5f17df13d1a4336cd3ff3564f6db1f0",
+ "description": "radv: avoid RMW operations in radv_make_texel_buffer_descriptor()",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "fcd53eda0e136761c0309493953ff44a23f03dc8",
+ "description": "radv: force 32-bit address-space for descriptor buffers usage",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "94bea63936bc7de2167dae2b203ba23b1de943fa",
+ "description": "radv: add 32-bit memory types for visible VRAM and cached GTT",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "d6d772d3d162f9cee1f64fc7d0c87b63f7d1c9d4",
+ "description": "asahi: Fix memory leak on error path.",
+ "nominated": false,
+ "nomination_type": 1,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": "7522f4f71477d3df0b0baa0842c8b00e90abdbc5"
+ },
+ {
+ "sha": "e3b1f26a2b83538eb175be28b2e785bbe626bf5f",
+ "description": "ac/llvm: fix 16bit varying llvm compile error",
+ "nominated": true,
+ "nomination_type": 1,
+ "resolution": 0,
+ "main_sha": null,
+ "because_sha": "279eea5bda2444fdce21744b972dad5016f0f366"
+ },
+ {
+ "sha": "e8ff841e983c4b45ff0449796fc17d73a8ca599c",
+ "description": "asahi: Fix memory leak on error path.",
+ "nominated": false,
+ "nomination_type": 1,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": "01964625eb23c0921dbacc33f10eee7724075bee"
+ },
+ {
+ "sha": "0803e39b7190eed90402565477329a1be7479b9b",
+ "description": "mapi: update gles 1.1 extention packet link",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "f1f33582e7d608cd558579363f9bbc1cc90aa89b",
+ "description": "radv/rt: use explicitly named sbt entries in radv_pipeline_group_handle",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "2b99523a959af726054db29f12281db5c1fde341",
+ "description": "v3d(v): account for debug flags when using the cache",
+ "nominated": true,
+ "nomination_type": 0,
+ "resolution": 0,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "cee2c4624d05f49e15d03142305c5ae8a5422816",
+ "description": "asahi: Advertise all supported renderable formats",
+ "nominated": false,
+ "nomination_type": 2,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": "32ab63b4fcaaaf832d549ddcf7b3a225c5f73df4"
+ },
+ {
+ "sha": "74e92274af3940fa232b5e92fb52a9991c7eaadf",
+ "description": "asahi,agx: Use new tilebuffer infrastructure",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "c5c0ea39f6a04ce26b505cf0276be26282336fa9",
+ "description": "asahi: Add new clear/reload/store infrastructure",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "4f96651f1e46ccc673c75534a7f7b17e3b18e6d7",
+ "description": "asahi: Use correct tib settings for USC",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "555447769d3bb894f9f986361412810a531f0871",
+ "description": "asahi: Extend texture descriptor packing for MSAA",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "cc555e0c04f79503eee26d42a6e1b420369cc2ea",
+ "description": "asahi: Remove some bogus asserts",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "bbe7d8e4f5d4c0d2a6eaa72c2413533c7ee5eac7",
+ "description": "asahi: Implement texture_barrier trivially",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "03dc4bc3e80c68e48e0a2f9d698f92f4e0f58041",
+ "description": "asahi: Calculate tilebuffer layout per batch",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "b1f5004ee7937490b9b81a63b9b6abf55d0a80b9",
+ "description": "asahi: Add agx_usc_shared_none helper",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "c713197c25cbc0f7f44b95c24ed34e3397a1bea1",
+ "description": "asahi: Add R16 SNORM formats",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "d637189d366e719f9ea574216d771f8bcf44dda3",
+ "description": "asahi: Add more XML via PowerVR",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "a3907e92da4d7418b0560237e64b3b25b7e8573d",
+ "description": "asahi: Add note to XML about 16-bit varyings",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "94a8fe51d5ae0723111183b09b43d7f43e5c336d",
+ "description": "asahi: Identify more depth-related fields in XML",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "6ce615d852f8e52da78af92317498218934b5232",
+ "description": "asahi: Add XML for layered rendering",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "74de571402a21e15855a6bb5506fecc77e50b4ef",
+ "description": "asahi: Add NIR pass to lower tilebuffer access",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "66a680a0435f5d1a7ba937fcd11aeba3581bbee8",
+ "description": "asahi: Add tilebuffer layout helpers",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "5d3243ea2db1e8b74238376e29830dd5d4d20732",
+ "description": "asahi: Add some notes about unknowns to the XML",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "363ffa779da2eee58c57fa53074ec20521841a95",
+ "description": "asahi: Identify multisampling fields of shared layout",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "5a20c90508cb4957af77db164f55cb7e73f015e0",
+ "description": "asahi: Add _with_bo pool uploads",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "4a166acc93001e91800b2d25660dcf94a10169aa",
+ "description": "agx: Add block_image_store instruction",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "0e106681e0d4ab384daeb1da61085d1eb0ec70fb",
+ "description": "agx: Add helper to map pipe formats to agx_formats",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "db0461a8d0a1e83726abecd8d71392ebc5b99300",
+ "description": "agx: Implement nir_texop_txf_ms",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "53d013a60503c15abf0f6aefbf441a4fa37ecb1c",
+ "description": "ail: Handle multisampling",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "8781aef6b4349420cb715e89378c0a329fa735ba",
+ "description": "asahi: Make libasahi_lib depend on libasahi_decode",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "6ee6cfec4129e54b881ade0629eadbc09b5fa311",
+ "description": "asahi: Use PIPE_FORMATs for driver-compiler ABI",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "940b871dbab6c4013c8e2bb86fa3a0f3962c422c",
+ "description": "nir: Define AGX intrinsics for local pixel access",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "7befecf5004b6b2786f2dbc93f0dfe5a661e83e0",
+ "description": "turnip: Apply the RB_DBG_ECO_CNTL_blit workaround.",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "9076b38610d9635beefa0354e148ac67f1467514",
+ "description": "freedreno: Don't WFI and set RB_DBG_ECO_CNTL if it's not changing.",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "4ab489a0b7b1e38a1ab4f901664c920def422c46",
+ "description": "freedreno: Update RB_DBG_ECO_CNTL/RB_DBG_ECO_CNTL_blit.",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "be570cd32254f1360e5010d091eea142b3990e72",
+ "description": "r600/sfn: sort FS color outputs before all other outputs",
+ "nominated": true,
+ "nomination_type": 1,
+ "resolution": 0,
+ "main_sha": null,
+ "because_sha": "79ca456b4837b3bc21cf9ef3c03c505c4b4909f6"
+ },
+ {
+ "sha": "85e140aa5ce3dbf7294c83acfaa34a19209df43d",
+ "description": "r600: Print RAT instruction names in disassembly",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "684e90b15c708898dbbf8a300d52600adb187213",
+ "description": "r600: Update scratch buffer late",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "394d8e4122e1682db40e75bf33943d90a53cfe33",
+ "description": "freedreno/drm/virtio: Defer flush on BO free",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "b4a54824e5c31ab949fd7c9397f4e874182a51bd",
+ "description": "freedreno/drm: Support for batched frees",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "e5a60e1df27fb13ee4ffd952ac868b55bde54090",
+ "description": "freedreno/drm: Add optimized path for freeing many BOs",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "d7511ad784ce0fc6a5060de2d7c969a1300a0fb9",
+ "description": "asahi: Add batch tracking logic",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "de1eb9400f1d0d64627630dd28d11073ad1c1a7e",
+ "description": "asahi: Use the batch for submission",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "0d3b4ff2aa2f1f2ede5bdd2d73bb27bd0e67200a",
+ "description": "asahi: Use batch_reads for sysvals",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "84f623ae7b423ec23a3dffbfa795356b5ae23629",
+ "description": "asahi: Use a pipe_framebuffer_state batch key",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "d36c911b7b1b467f4e378a477d81ceea0264552b",
+ "description": "asahi: Use batch instead of ctx for pipelines",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "fb7257af4e6f89b7aee681b240bfb3e2a155d061",
+ "description": "asahi: Hide ctx->batch",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "3104b1aaaf934ad5bef5dda129d516c72c5065c0",
+ "description": "asahi: Factor out prepare_for_map",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "9c1c1888d9895d05246005620953ee307d1a17f1",
+ "description": "intel/fs: put scratch surface in the surface state heap",
+ "nominated": true,
+ "nomination_type": 1,
+ "resolution": 0,
+ "main_sha": null,
+ "because_sha": "4ceaed7839afd724b2a2f10f6879f54199c041ad"
+ },
+ {
+ "sha": "daab161535747cf5aef443e4cee46c5415662848",
+ "description": "iris: move bindless surface state heap inside the surface state heap",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "64f1ae4bc51276326fdce1fde06906b5aa42375d",
+ "description": "iris: prevent crash in decoder",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "1b5dc33caac8c24a8e2a6667bec35cb92acdc065",
+ "description": "radv: Convert instance bvh address to node in bvh build.",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "d09ed23b9a319421e6f120b4c942eb7fe3a3c60f",
+ "description": "radv: Fiddle with opaque flag positions to reduce instructions.",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "38842109020515d3fd9c06d4918956a63a8c65ad",
+ "description": "radv: Skip and for node_to_addr with bvh_base.",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "0a269758407219a74bcd92515aa7a2f9680b0f52",
+ "description": "radv: Move ray flag compares out of the loop.",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "e2dadda35f87af08358f0ea43a12434c1626ea82",
+ "description": "Revert \"nir/lower_shader_calls: put inserted instructions into a dummy block\"",
+ "nominated": true,
+ "nomination_type": 0,
+ "resolution": 0,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "3686d5a31291354eb836ce6ea757bf6fbf41ad5b",
+ "description": "nir/lower_shader_calls: wrap only jumps rather than entire code blocks",
+ "nominated": true,
+ "nomination_type": 0,
+ "resolution": 0,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "96d84e2a77568e27af6fac90bd0ab81d932eecbd",
+ "description": "nir/lower_shader_calls: update metadata before validation",
+ "nominated": true,
+ "nomination_type": 0,
+ "resolution": 0,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "6f45c98b580de5a534ebb0a0644ac5514793a141",
+ "description": "radv/bvh: Adjust sah cost based on depth",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "2ba55ec504f8391775622c3753ddb03bdcd85aff",
+ "description": "nir/range_analysis: Set higher default maximum for max_workgroup_count",
+ "nominated": true,
+ "nomination_type": 1,
+ "resolution": 0,
+ "main_sha": null,
+ "because_sha": "c2a81ebe19f98b025b296fcadc279b4358d37345"
+ },
+ {
+ "sha": "d989746e55b7941e54f78407fc49935a393f653f",
+ "description": "iris: Pass devinfo directly in iris_setup_uniforms",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "a9602134a321029cf28d81f467f0d3473cd1ade7",
+ "description": "intel/compiler: Require C++17",
+ "nominated": false,
+ "nomination_type": 1,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": "6c194ddd18f24a2fe995aa6b09c8d5d6d2c97d34"
+ },
+ {
+ "sha": "11a607dbc8dc67c5b08912bdc5b1744b71604dfc",
+ "description": "asahi: Don't support 16-bit vertex attributes",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "9dddbfeaef207a74a393e48d636697c88aa0e54d",
+ "description": "asahi: Fix logic ops",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "a22ed9990687def207a99dffcd43fa8d53a5322d",
+ "description": "asahi: Restrict rendering to what we support",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "37617ab09e98916e8c493821bae29eee8dcfc9a6",
+ "description": "asahi: Don't validate WSI (twiddled) strides",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "f32820747502472e7a4480565ac7e6e5ba234a46",
+ "description": "asahi: Split out agx_usc.h into a common file",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "8be506039da40e1d6b57a6146d3843a74ced4b68",
+ "description": "asahi: Note some magic bits used with memoryless RTs",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "3fa87e47d575257f325e42301363113b660bf46a",
+ "description": "asahi: Identify \"Sample mask after depth/stencil\" bit",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "ff616099ce1b9ccf24fd55d16cbfc4d1c5478f6e",
+ "description": "asahi: Identify the pass type enum",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "2e6369f5f63aa2900014000ea9de11eae73293de",
+ "description": "asahi: Identify PBE sample count",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "1f0edc0158aa132eb236102e72d48573279d1b64",
+ "description": "asahi: Identify Dimension for Render Target",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "016a699fa9e920e44432e709c0d0db642cbf5148",
+ "description": "asahi: Fix agx_set_framebuffer_state for MRT",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "7e662320aa768a0bf0418e179de2cc870371e7be",
+ "description": "asahi: Set data_valid for the correct level",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "9c52001a1d6c2b465d65c37d8b79e2811551337f",
+ "description": "asahi: Implement stencil texturing",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "1ffbd53aa2d638af607829e53e1ed1de6a59d040",
+ "description": "asahi: Add internal formats for RGB10A2",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "efb5aef9353e1ad775edd0156cc4c76cf4649cd2",
+ "description": "asahi: Implement perf_debug",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "c8e520985b8b52ac0de5b6228a7ce834c1de8fc0",
+ "description": "asahi: Free the scanout resource",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "6a12d793d84a5111e9926bc02f4d5c567c2a2092",
+ "description": "agx: Handle collects in backwards isel",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "3b9d27164630069b388bccbe36552d34b3e39e39",
+ "description": "agx: Assert more invariants in RA",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "c2159ce9e403de76db4bd31f9398f3294f4741c1",
+ "description": "agx: Validate part of SSA form",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "1110fcccc2636cbe7aa571a9e53ccef3c4fb0076",
+ "description": "agx: Split off NIR preprocessing from compiling",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "972354b5fd1323350330bbcdf27a335359bb5cd6",
+ "description": "agx: Handle scalar texture destinations",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "a92fb4f38c8fbd9207105038d9a851aa490a24da",
+ "description": "agx: Don't depend on GenXML",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "3789dba5f6af144ec7e9ea8c6f5d3b96c4015e82",
+ "description": "agx: Lower packs/unpacks and bitfields",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "94886a2975f34446908f2422f0b0850457999865",
+ "description": "util: Move src/gallium/include/pipe/p_format.h to src/util/format/u_formats.h",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "1facb6fbe80343cab0b11f250f978cd758935829",
+ "description": "ci/freedreno: disable flaking Civilization V",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "e5f0d222b1d4ca18eaaebed8819c2af11bbd7c94",
+ "description": "util: Rename PIPE_ALIGN_STACK to UTIL_ALIGN_STACK and moved into util/compiler.h",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "778402f3b0f22866d15ee036ce90bdd4cddaa75b",
+ "description": "llvmpipe: fixes error: \u2018enum pipe_blendfactor\u2019 declared in lp_test_blend.c",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "6832a9433d1d64e9ced08439f9f234a40959aa00",
+ "description": "util: convert usage of uint to unsigned in u_format.h",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "b728bed56719a2edcc3d50b12ce8d2ce1d5abe18",
+ "description": "util: use void * instead of byte * for util_copy_rect in u_format.h",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "2f42ffcd028d2c53cf7feaf69067f2664fc5b2bb",
+ "description": "tgsi: fixes error: \u2018enum pipe_shader_type\u2019 declared in tgsi_info.h",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "887e0fdace63b80a9e42ef299381ca3eeee89aab",
+ "description": "aco: fixes error: 'uint' was not declared in aco_instruction_selection.cpp",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "72cf2b540cecb8e6a6a95d9164a332dee7513d16",
+ "description": "util: Remove the usage of enum pipe_error in u_hash_table.*",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "8eff2c222389a514cc22c82bccce11b6a55391d1",
+ "description": "util: Remove redundant #include \"util/u_inlines.h\" in u_trace.c",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "fbe40720e008f7f01c4f62cb0f4d53bb41dace0a",
+ "description": "intel/compiler: Remove redundant argument from brw_nir_create_passthrough_tcs",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "f0115ebc25a73dd1b52c1f3438cd7b44f3de0eeb",
+ "description": "intel/perf: fix printf formatting of size_t for 32bit builds",
+ "nominated": false,
+ "nomination_type": 1,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": "bdacd6df5adc2330409e15264e3be0033c483695"
+ },
+ {
+ "sha": "bc34217978d9ff8811278d3ab2c1493ba32d5ce9",
+ "description": "ci/dzn: add flake",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "5cf862fbb9c20917e5706d47a6c6cc47389e7913",
+ "description": "docs: update Python requirement to 3.7",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "6e4f0bdb7d07fbb6b0af211cc87508c6521711bd",
+ "description": "include: Update the OpenCL headers",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "9a9a49d630e2cff18fdb1e98b1f0b7115d027f7f",
+ "description": "clover: Use braces arround a union initializer",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "4b6c5781dc83c135a4a5a780f56076d9c0476f71",
+ "description": "scripts: Fix khronos-update.py to use main for OpenCL headers",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "db2b098323b0aaf8e08ab5cd0912490cf32fc8d6",
+ "description": "Update 00-mesa-defaults.conf",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "723b15fb75aac03b95d452ba173383666edcfc67",
+ "description": "nir/lower_explicit_io: fix metadata preserve",
+ "nominated": true,
+ "nomination_type": 0,
+ "resolution": 0,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "716aaf36731ab07c12c1da7f304611c4b0aa7c05",
+ "description": "nir/lower_bit_size: lower uadd_sat/iadd_sat/isub_sat to unsaturated alu",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "8a4f9a874ba861eb7b984e31adc85fc5254edc11",
+ "description": "nir/lower_bit_size: optimize usub_sat lowering",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "e19584db2b8085dd6cf2a2d977b783dcd0a05378",
+ "description": "nir/algebraic: optimize open-coded uadd_sat/usub_sat",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "6fc4a760571443fae71a45076255090518daa900",
+ "description": "radv: lower 8/16-bit uadd_carry/usub_borrow",
+ "nominated": true,
+ "nomination_type": 0,
+ "resolution": 0,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "da30fb5df705d38e6d3aefadf769ec4517b9b20e",
+ "description": "nir/lower_bit_size: lower uadd_carry",
+ "nominated": true,
+ "nomination_type": 0,
+ "resolution": 0,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
+ "sha": "42395122103b2ce393dfedfcc213c1c992d28815",
+ "description": "crocus: Pass devinfo directly in crocus_setup_uniforms",
+ "nominated": false,
+ "nomination_type": null,
+ "resolution": 4,
+ "main_sha": null,
+ "because_sha": null
+ },
+ {
"sha": "5a5bc3dd52964a2d865c5b0c45c4eb3a6a4cd013",
"description": "radv: advertise extendedDynamicState3ColorBlendEnable",
"nominated": false,