diff options
| author | Lionel Landwerlin <lionel.g.landwerlin@intel.com> | 2023-03-05 23:12:36 +0200 |
|---|---|---|
| committer | Eric Engestrom <eric@engestrom.ch> | 2023-03-08 18:00:17 +0000 |
| commit | 58f6de78bdbe9817068b284ddef0d95f1cf8fb85 (patch) | |
| tree | 37b102993b43cea5cfd08b60e65268c3fbcabb2e | |
| parent | d8e120afdc7e69a5c9f412bc7cf1e66b2f732da6 (diff) | |
| download | mesa-58f6de78bdbe9817068b284ddef0d95f1cf8fb85.tar.gz | |
nir: fix nir_ishl_imm
Both GLSL & SPIRV have undefined values for shift > bitsize. But SM5
says :
"This instruction performs a component-wise shift of each 32-bit
value in src0 left by an unsigned integer bit count provided by
the LSB 5 bits (0-31 range) in src1, inserting 0."
Better to not hard code the wrong behavior in NIR.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: e227bb9fd5 ("nir/builder: add ishl_imm helper")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@colllabora.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21720>
(cherry picked from commit a278eeb71974a89b6dd7c0fa3dbfe97183aeb657)
| -rw-r--r-- | .pick_status.json | 2 | ||||
| -rw-r--r-- | src/compiler/nir/nir_builder.h | 3 |
2 files changed, 2 insertions, 3 deletions
diff --git a/.pick_status.json b/.pick_status.json index eb0d73ccd13..c9e81e5bdb6 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -1012,7 +1012,7 @@ "description": "nir: fix nir_ishl_imm", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": "e227bb9fd58268788a79449ed247311744210279" }, diff --git a/src/compiler/nir/nir_builder.h b/src/compiler/nir/nir_builder.h index 04f33fa7476..eb19e0edacd 100644 --- a/src/compiler/nir/nir_builder.h +++ b/src/compiler/nir/nir_builder.h @@ -766,9 +766,8 @@ nir_ishl_imm(nir_builder *build, nir_ssa_def *x, uint32_t y) { if (y == 0) { return x; - } else if (y >= x->bit_size) { - return nir_imm_intN_t(build, 0, x->bit_size); } else { + assert (y < x->bit_size); return nir_ishl(build, x, nir_imm_int(build, y)); } } |