summaryrefslogtreecommitdiff
Commit message (Collapse)AuthorAgeFilesLines
* Set the C standard version to C111020-u_queue-c-173-7-error-implicit-declaration-of-function-timespec_get-is-invalid-in-c99Jeremy Huddleston Sequoia2021-01-141-1/+1
| | | | | | | | timespec_get() was added in C11, so we should set the appropriate language version. https://gitlab.freedesktop.org/mesa/mesa/-/issues/1020 Signed-off-by: Jeremy Huddleston Sequoia <jeremyhu@apple.com>
* Fall back on clock_gettime when timespec_get() is unavailableJeremy Huddleston Sequoia2021-01-141-0/+4
| | | | | | https://gitlab.freedesktop.org/mesa/mesa/-/issues/1020 Signed-off-by: Jeremy Huddleston Sequoia <jeremyhu@apple.com>
* util/set: split off create() into an init() functionMike Blumenkrantz2021-01-142-11/+26
| | | | | | | this brings parity with the matching hash_table api Reviewed-by: Eric Anholt <eric@anholt.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8450>
* util/set: add the found param to search_or_addMike Blumenkrantz2021-01-144-8/+12
| | | | | | | this brings parity with the internal api Reviewed-by: Eric Anholt <eric@anholt.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8450>
* util/set: optimize rehash for empty table and no-func clearsMike Blumenkrantz2021-01-142-8/+31
| | | | | | | | | | | if the table is filled with deleted entries, we don't need to rzalloc+free an identical block of memory for the table, we can just memset the existing one the same applies to table clears without a function passed in that the table doesn't need to be iterated and can just be memset Reviewed-by: Eric Anholt <eric@anholt.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8450>
* util/hash_table: optimize rehash for empty table and no-func clearsMike Blumenkrantz2021-01-142-8/+29
| | | | | | | | | | | if the table is filled with deleted entries, we don't need to rzalloc+free an identical block of memory for the table, we can just memset the existing one the same applies to table clears without a function passed in that the table doesn't need to be iterated and can just be memset Reviewed-by: Eric Anholt <eric@anholt.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8450>
* radeonsi: invalidate compute sgprs in si_rebind_bufferPierre-Eric Pelloux-Prayer2021-01-141-6/+16
| | | | | | | | | | If we don't tag compute sgpr as dirty they will point to the ol buffer location. This fixes arb_compute_shader-dlist with mcbp enabled. Fixes: 85a6bcca615 ("radeonsi: pass at most 3 images and/or shader buffers via user SGPRs for compute") Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8433>
* ac: add ifdef __cplusplus guard to headerPierre-Eric Pelloux-Prayer2021-01-141-0/+9
| | | | | | | | ac_shadowed_regs.h can be included from si_state_draw.cpp so this commit adds the needed guards. Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8433>
* ci: Use meson test directly instead of ninja testMichel Dänzer2021-01-142-2/+2
| | | | | | | | | The former allows specifying how many processes to spawn for tests. The latter seems to spawn (up to) as many test processes as there are CPU cores. Acked-by: Daniel Stone <daniels@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8451>
* ci: Remove .gitlab-ci/meson-build.batMichel Dänzer2021-01-141-13/+0
| | | | | | | Unused since 07885cbcdb0b "CI: Add native Windows VS2019 build" Acked-by: Daniel Stone <daniels@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8451>
* anv: add transfer usage for color/depth/stencil attachmentsLionel Landwerlin2021-01-141-3/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | We sometimes use anv_layout_to_aux_state() to compute the aux state of an image during the resolve operations at the end of a render (sub)pass. If we're dealing with a multisampled image that is created without a transfer usage, our internal code might trigger a resolve using the transfer layout (see genX_cmd_buffer.c:cmd_buffer_end_subpass), for which the image doesn't the usage bit. The current code tries to AND the 2 usages which won't have any bit in common, thus skipping all checks below. v2: Add the transfer usages depending on attachment usage (Lionel) v3: Limit to samples > 1 (Jason) && DEPTH_STENCIL_ATTACHMENT_BIT (Lionel) v4: Add transfer usage at image creation (Jason) Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Fixes: 54b525caf0aa99 ("anv: Rework anv_layout_to_aux_state") Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4037 Reviewed-by: Reviewed-by: Tapani Pälli <tapani.palli@intel.com> (v1) Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8307>
* turnip/ir3: handle image load/stores produced by AtomicLoad/StoreDanylo Piliaiev2021-01-142-5/+6
| | | | | | | | | | | | | | | | | | SpvOpAtomicLoad and SpvOpAtomicStore are translated into nir_intrinsic_image_deref_store/load instead of some separate atomic intrinsics, however they don't have src or dest type specified. Turnip doesn't support shaderImageFloat32Atomics so type is just integer. Fixes: dEQP-VK.memory_model.message_passing.core11.u32.coherent.fence_fence.atomicwrite.device.payload_local.image.guard_local.image.frag dEQP-VK.memory_model.message_passing.core11.u32.coherent.fence_fence.atomicwrite.workgroup.payload_local.buffer.guard_local.image.comp dEQP-VK.memory_model.write_after_read.core11.u32.coherent.fence_fence.atomicwrite.device.payload_local.buffer.guard_local.image.comp dEQP-VK.memory_model.write_after_read.core11.u32.coherent.fence_fence.atomicwrite.workgroup.payload_local.image.guard_local.image.comp dEQP-VK.memory_model.write_after_read.core11.u32.coherent.fence_fence.atomicwrite.workgroup.payload_nonlocal.workgroup.guard_local.image.comp Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8476>
* lavapipe: Defer lavapipe warning to CreateDeviceWitold Baryluk2021-01-141-2/+2
| | | | | | Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4055 Fixes: b38879f8c5f57b7f1802e433e33181bdf5e72aef Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8377>
* panfrost: Fix typos.Vinson Lee2021-01-144-4/+4
| | | | | | Signed-off-by: Vinson Lee <vlee@freedesktop.org> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8400>
* gallium/tgsi: garbage collect unused TGSI_UTIL_SIGN_MODE.Eric Anholt2021-01-133-79/+1
| | | | | | | | Noticed while git grepping for abs/neg stuff. Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Gert Wollny <gert.wollny@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8369>
* gallium/tgsi: Rewrite the docs on source modifiers.Eric Anholt2021-01-131-12/+15
| | | | | | | Clarify what the rules are, and warn about the exceptions. Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8369>
* gallium/tgsi: Remove support for f64 src modifiers.Eric Anholt2021-01-132-7/+3
| | | | | | | | | | | The tgsi.rst was not very clear but didn't indicate that they were supported, and llvmpipe only supported double abs and not negate. glsl_to_tgsi never generated them, and neither did the new nir_to_tgsi, so just garbage collect it. Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Gert Wollny <gert.wollny@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8369>
* gallium/tgsi: Assert that we don't see integer abs modifiers.Eric Anholt2021-01-132-9/+4
| | | | | | | | | | tgsi.rst says it's not supported, and llvmpipe, r600, and virgl don't support it. Make sure nobody else introduces them like I did while testing only on softpipe. Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Gert Wollny <gert.wollny@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8369>
* gallium/ntt: Stop lowering integer source mods.Eric Anholt2021-01-131-3/+5
| | | | | | | | | | | | | | | While tgsi_exec.c (softpipe) implemented 32b integer src mods, the tgsi.rst documentation says only 32b negate is supported and not abs. llvmpipe implemented 32 and 64 negate but not abs, virgl implemented negate incorrectly, and r600 apparently doesn't do any integer src mods. glsl_to_tgsi has apparently never generated integer src mods. Given that r600 can't do any integer src mods, just stop trying to generate them for TGSI. Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Gert Wollny <gert.wollny@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8369>
* gallium/ttn: Add support for TGSI_OPCODE_I64NEG/ABS.Eric Anholt2021-01-131-0/+2
| | | | | | | | Found when converting AMD's built-in TGSI shaders to not using 64-bit src mods. Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8369>
* nv50,nvc0: explicitly list recently-added capsIlia Mirkin2021-01-132-0/+24
| | | | | | | | | Some of these should be implemented, but that can be done in a later change. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Karol Herbst <kherbst@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8461>
* nv50/ir: ignore FS_BLEND_EQUATION_ADVANCEDIlia Mirkin2021-01-131-0/+1
| | | | | | | | | It's unsupported, but gets set unconditionally by the state tracker, even when fbfetch is to be used. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Karol Herbst <kherbst@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8461>
* zink: clamp sampler+samplerview limitsMike Blumenkrantz2021-01-135-24/+12
| | | | | | | | | * struct shader_info provides a 32bit mask for textures_used * samplers and samplerviews are a 1:1 mapping for shader descriptors * also according to spec this is always 32 per stage Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8457>
* intel/genxml,anv,iris: Drop the legacy compute path from gen125.xmlJason Ekstrand2021-01-133-227/+3
| | | | | Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8342>
* iris: Add support for COMPUTE_WALKERJordan Justen2021-01-131-4/+81
| | | | | | Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8342>
* anv: Enable push constants on gen12-hpJason Ekstrand2021-01-134-11/+27
| | | | | Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8342>
* intel/fs: Emit code for Gen12-HP indirect compute dataJason Ekstrand2021-01-132-0/+76
| | | | | | | | | Reworks: * Jordan: Apply to gen > 12 * Jordan: Adjust comment about loading constants Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8342>
* anv: Add a general state poolJason Ekstrand2021-01-134-3/+37
| | | | | Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8342>
* anv: Use COMPUTE_WALKER for gen12-hpJordan Justen2021-01-131-3/+63
| | | | | | | Rework: Rafael Antognolli, Jason Ekstrand Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8342>
* anv: Don't use MEDIA_INTERFACE_DESCRIPTOR_LOAD for gen12-hpJordan Justen2021-01-131-0/+2
| | | | | | Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8342>
* anv: Emit CFE_STATE for gen12-hpJordan Justen2021-01-131-3/+32
| | | | | | | | | | Rework: * make scratch TODO. (Jason) * emit_compute_cs_state => emit_compute_state. (Jason) Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8342>
* intel/fs: Allow compute dispatch without a pushed subgroup ID on Gen12-HPJason Ekstrand2021-01-131-3/+8
| | | | | Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8342>
* intel/compiler: Disable push constants on gen12-hpJordan Justen2021-01-131-2/+8
| | | | | | | | | | | | We currently don't use push constants with the COMPUTE_WALKER command. Make all uniforms to be pull constants. The local group id previously was a push constant, but is now available in R0.2[7:0]. Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8342>
* intel/tools: Decode COMPUTE_WALKERJason Ekstrand2021-01-131-23/+49
| | | | | Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8342>
* intel/genxml/gen125: Add CFE_STATE and COMPUTE_WALKERJordan Justen2021-01-131-0/+154
| | | | | | | | | | | Reworks: * Jason: Captalize COMPUTE_WALKER::BTD mode * Jason: Make COMPUTE_WALKER::InlineData an array * Jason: Remove stale fields, uint=>bool, add missing enum values. Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8342>
* docs: update calendar for 21.0.0-rc1Dylan Baker2021-01-131-2/+1
| | | | Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8478>
* docs: update calendar and link releases notes for 20.3.3Dylan Baker2021-01-132-2/+3
| | | | Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8478>
* docs: Add sha256sum for 20.3.3Dylan Baker2021-01-131-1/+1
| | | | Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8478>
* docs: add release notes for 20.3.3Dylan Baker2021-01-131-0/+133
| | | | Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8478>
* panfrost: Don't skip the test with a 4k shaderBoris Brezillon2021-01-131-5/+0
| | | | | | | | | Commit bfcdc8f1747e ("pan/bi: Add some zero bytes after shaders on Bifrost") should have fixed the problem. Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8470>
* nir/loop_unroll: unroll more aggressively if it can improve load schedulingRhys Perry2021-01-133-7/+83
| | | | | | | | | | | | | | | | | | | | | | | | | Significantly improves performance of a Control compute shader. Also seems to increase FPS at the very start of the game by ~5% (RX 580, 1080p, medium settings, no MSAA). fossil-db (Sienna): Totals from 81 (0.06% of 139391) affected shaders: SGPRs: 3848 -> 4362 (+13.36%); split: -0.99%, +14.35% VGPRs: 4132 -> 4648 (+12.49%) CodeSize: 275532 -> 659188 (+139.24%) MaxWaves: 986 -> 906 (-8.11%) Instrs: 54422 -> 126865 (+133.11%) Cycles: 1057240 -> 750464 (-29.02%); split: -42.61%, +13.60% VMEM: 26507 -> 61829 (+133.26%); split: +135.56%, -2.30% SMEM: 4748 -> 5895 (+24.16%); split: +31.47%, -7.31% VClause: 1933 -> 6802 (+251.89%); split: -0.72%, +252.61% SClause: 1179 -> 1810 (+53.52%); split: -3.14%, +56.66% Branches: 1174 -> 1157 (-1.45%); split: -23.94%, +22.49% PreVGPRs: 3219 -> 3387 (+5.22%); split: -0.96%, +6.18% Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6538>
* freedreno/ir3: Remove legacy packed-struct encodingRob Clark2021-01-132-890/+1
| | | | | | | | Note that we can't actually remove the packed structs themselves yet, because tu still uses them in some hand-coded blit shaders. Signed-off-by: Rob Clark <robdclark@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7997>
* freedreno/ir3/decode: Switch over to new disasmRob Clark2021-01-137-2779/+286
| | | | | Signed-off-by: Rob Clark <robdclark@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7997>
* freedreno/ir3: Realign disasm shader statsRob Clark2021-01-133-98/+110
| | | | | | | | To better match up with what mesa shader-db stats look like, for easier comparision. Signed-off-by: Rob Clark <robdclark@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7997>
* freedreno/ir3: Better sstall estimationRob Clark2021-01-134-83/+85
| | | | | | | | 1) Take into account repeat/nop cycles 2) Clear sfu_delay after an (ss) sync Signed-off-by: Rob Clark <robdclark@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7997>
* freedreno/ir3: Small resinfo disasm tweakRob Clark2021-01-132-7/+7
| | | | | | | Add the 'type' field. Signed-off-by: Rob Clark <robdclark@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7997>
* freedreno/ir3: Switch over to new encoder/decoderRob Clark2021-01-132-2/+9
| | | | | Signed-off-by: Rob Clark <robdclark@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7997>
* freedreno/ir3/tests: Switch disasm test over to new decoderRob Clark2021-01-133-25/+25
| | | | | | | | | | | | | | | | | Also, uncomment the `stc` test vectors (since the new decoder decodes these properly) and comment out an instruction which looks suspiciously like -6.0 in hex. This also switches the parser back to `atomic.b.op` from `atomic.op.b` which was a short-term workaround to make it easier for the legacy disassembler. Also switch the binary encoding for ldib to clear b0, because the new disassembler warns about unexpected dontcare bits (which cases the disasm to not match). Signed-off-by: Rob Clark <robdclark@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7997>
* freedreno/hw/isa: Add expression cachingRob Clark2021-01-131-0/+29
| | | | | | | | | | | Drops decoding an ~850KB collection of instructions from ~4min to ~1sec. Granted for normal sized shaders, this probably doesn't matter.. but it at reduces my cycle time for fixing things to match existing disasm syntax using this massive collection of unique instructions. Signed-off-by: Rob Clark <robdclark@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7997>
* freedreno/hw/isa: Add description of ir3 ISARob Clark2021-01-1312-0/+3414
| | | | | Signed-off-by: Rob Clark <robdclark@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7997>
View Lorry Controller Status