diff options
Diffstat (limited to 'src/third_party/wiredtiger/src/checksum/x86/crc32-x86.c')
| -rw-r--r-- | src/third_party/wiredtiger/src/checksum/x86/crc32-x86.c | 158 |
1 files changed, 71 insertions, 87 deletions
diff --git a/src/third_party/wiredtiger/src/checksum/x86/crc32-x86.c b/src/third_party/wiredtiger/src/checksum/x86/crc32-x86.c index 207d860c780..9bb97f321e4 100644 --- a/src/third_party/wiredtiger/src/checksum/x86/crc32-x86.c +++ b/src/third_party/wiredtiger/src/checksum/x86/crc32-x86.c @@ -37,88 +37,75 @@ #if (defined(__amd64) || defined(__x86_64)) /* * __wt_checksum_hw -- - * Return a checksum for a chunk of memory, computed in hardware - * using 8 byte steps. + * Return a checksum for a chunk of memory, computed in hardware using 8 byte steps. */ static uint32_t __wt_checksum_hw(const void *chunk, size_t len) { - uint32_t crc; - size_t nqwords; - const uint8_t *p; - const uint64_t *p64; - - crc = 0xffffffff; - - /* Checksum one byte at a time to the first 4B boundary. */ - for (p = chunk; - ((uintptr_t)p & (sizeof(uint32_t) - 1)) != 0 && - len > 0; ++p, --len) { - __asm__ __volatile__( - ".byte 0xF2, 0x0F, 0x38, 0xF0, 0xF1" - : "=S" (crc) - : "0" (crc), "c" (*p)); - } - - p64 = (const uint64_t *)p; - /* Checksum in 8B chunks. */ - for (nqwords = len / sizeof(uint64_t); nqwords; nqwords--) { - __asm__ __volatile__ ( - ".byte 0xF2, 0x48, 0x0F, 0x38, 0xF1, 0xF1" - : "=S"(crc) - : "0"(crc), "c" (*p64)); - p64++; - } - - /* Checksum trailing bytes one byte at a time. */ - p = (const uint8_t *)p64; - for (len &= 0x7; len > 0; ++p, len--) { - __asm__ __volatile__( - ".byte 0xF2, 0x0F, 0x38, 0xF0, 0xF1" - : "=S" (crc) - : "0" (crc), "c" (*p)); - } - return (~crc); + uint32_t crc; + size_t nqwords; + const uint8_t *p; + const uint64_t *p64; + + crc = 0xffffffff; + + /* Checksum one byte at a time to the first 4B boundary. */ + for (p = chunk; ((uintptr_t)p & (sizeof(uint32_t) - 1)) != 0 && len > 0; ++p, --len) { + __asm__ __volatile__(".byte 0xF2, 0x0F, 0x38, 0xF0, 0xF1" : "=S"(crc) : "0"(crc), "c"(*p)); + } + + p64 = (const uint64_t *)p; + /* Checksum in 8B chunks. */ + for (nqwords = len / sizeof(uint64_t); nqwords; nqwords--) { + __asm__ __volatile__(".byte 0xF2, 0x48, 0x0F, 0x38, 0xF1, 0xF1" + : "=S"(crc) + : "0"(crc), "c"(*p64)); + p64++; + } + + /* Checksum trailing bytes one byte at a time. */ + p = (const uint8_t *)p64; + for (len &= 0x7; len > 0; ++p, len--) { + __asm__ __volatile__(".byte 0xF2, 0x0F, 0x38, 0xF0, 0xF1" : "=S"(crc) : "0"(crc), "c"(*p)); + } + return (~crc); } #endif #if defined(_M_AMD64) /* * __wt_checksum_hw -- - * Return a checksum for a chunk of memory, computed in hardware - * using 8 byte steps. + * Return a checksum for a chunk of memory, computed in hardware using 8 byte steps. */ static uint32_t __wt_checksum_hw(const void *chunk, size_t len) { - uint32_t crc; - size_t nqwords; - const uint8_t *p; - const uint64_t *p64; - - crc = 0xffffffff; - - /* Checksum one byte at a time to the first 4B boundary. */ - for (p = chunk; - ((uintptr_t)p & (sizeof(uint32_t) - 1)) != 0 && - len > 0; ++p, --len) { - crc = _mm_crc32_u8(crc, *p); - } - - p64 = (const uint64_t *)p; - /* Checksum in 8B chunks. */ - for (nqwords = len / sizeof(uint64_t); nqwords; nqwords--) { - crc = (uint32_t)_mm_crc32_u64(crc, *p64); - p64++; - } - - /* Checksum trailing bytes one byte at a time. */ - p = (const uint8_t *)p64; - for (len &= 0x7; len > 0; ++p, len--) { - crc = _mm_crc32_u8(crc, *p); - } - - return (~crc); + uint32_t crc; + size_t nqwords; + const uint8_t *p; + const uint64_t *p64; + + crc = 0xffffffff; + + /* Checksum one byte at a time to the first 4B boundary. */ + for (p = chunk; ((uintptr_t)p & (sizeof(uint32_t) - 1)) != 0 && len > 0; ++p, --len) { + crc = _mm_crc32_u8(crc, *p); + } + + p64 = (const uint64_t *)p; + /* Checksum in 8B chunks. */ + for (nqwords = len / sizeof(uint64_t); nqwords; nqwords--) { + crc = (uint32_t)_mm_crc32_u64(crc, *p64); + p64++; + } + + /* Checksum trailing bytes one byte at a time. */ + p = (const uint8_t *)p64; + for (len &= 0x7; len > 0; ++p, len--) { + crc = _mm_crc32_u8(crc, *p); + } + + return (~crc); } #endif #endif @@ -126,44 +113,41 @@ __wt_checksum_hw(const void *chunk, size_t len) extern uint32_t __wt_checksum_sw(const void *chunk, size_t len); #if defined(__GNUC__) extern uint32_t (*wiredtiger_crc32c_func(void))(const void *, size_t) - __attribute__((visibility("default"))); + __attribute__((visibility("default"))); #else extern uint32_t (*wiredtiger_crc32c_func(void))(const void *, size_t); #endif /* * wiredtiger_crc32c_func -- - * WiredTiger: detect CRC hardware and return the checksum function. + * WiredTiger: detect CRC hardware and return the checksum function. */ uint32_t (*wiredtiger_crc32c_func(void))(const void *, size_t) { #if !defined(HAVE_NO_CRC32_HARDWARE) #if (defined(__amd64) || defined(__x86_64)) - unsigned int eax, ebx, ecx, edx; + unsigned int eax, ebx, ecx, edx; - __asm__ __volatile__ ( - "cpuid" - : "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx) - : "a" (1)); + __asm__ __volatile__("cpuid" : "=a"(eax), "=b"(ebx), "=c"(ecx), "=d"(edx) : "a"(1)); -#define CPUID_ECX_HAS_SSE42 (1 << 20) - if (ecx & CPUID_ECX_HAS_SSE42) - return (__wt_checksum_hw); - return (__wt_checksum_sw); +#define CPUID_ECX_HAS_SSE42 (1 << 20) + if (ecx & CPUID_ECX_HAS_SSE42) + return (__wt_checksum_hw); + return (__wt_checksum_sw); #elif defined(_M_AMD64) - int cpuInfo[4]; + int cpuInfo[4]; - __cpuid(cpuInfo, 1); + __cpuid(cpuInfo, 1); -#define CPUID_ECX_HAS_SSE42 (1 << 20) - if (cpuInfo[2] & CPUID_ECX_HAS_SSE42) - return (__wt_checksum_hw); - return (__wt_checksum_sw); +#define CPUID_ECX_HAS_SSE42 (1 << 20) + if (cpuInfo[2] & CPUID_ECX_HAS_SSE42) + return (__wt_checksum_hw); + return (__wt_checksum_sw); #else - return (__wt_checksum_sw); + return (__wt_checksum_sw); #endif #else - return (__wt_checksum_sw); + return (__wt_checksum_sw); #endif } |