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authorzimmerma <zimmerma@280ebfd0-de03-0410-8827-d642c229c3f4>2007-11-30 12:05:02 +0000
committerzimmerma <zimmerma@280ebfd0-de03-0410-8827-d642c229c3f4>2007-11-30 12:05:02 +0000
commitbb9f453f87ceae743940218945572b3b5793bbb1 (patch)
tree3bfe3fa93ae284642055af71e3a83ff7f8973845
parent05239c494c2dc8c72581433ee5bbe438161af60f (diff)
downloadmpfr-bb9f453f87ceae743940218945572b3b5793bbb1.tar.gz
experimental code to distinguish Core2 from AMD64
git-svn-id: svn://scm.gforge.inria.fr/svn/mpfr/trunk@5063 280ebfd0-de03-0410-8827-d642c229c3f4
-rw-r--r--acinclude.m48
-rw-r--r--mparam_h.in5
2 files changed, 12 insertions, 1 deletions
diff --git a/acinclude.m4 b/acinclude.m4
index a244b6da2..8ee851a49 100644
--- a/acinclude.m4
+++ b/acinclude.m4
@@ -87,6 +87,14 @@ alpha*-*-*)
fi
esac
+dnl Check for Core2 processor
+case $host in
+x86_64-*linux*)
+ case `sed -n '/^vendor_id/s/^.*: \(.*\)/\1/p' < /proc/cpuinfo` in
+ *Intel*) AC_DEFINE(HAVE_HOST_CORE2,1,[Define if processor is Core 2]) ;;
+ esac
+esac
+
AC_CHECK_TYPE( [union fpc_csr],
AC_DEFINE(HAVE_FPC_CSR,1,[Define if union fpc_csr is available]), ,
[
diff --git a/mparam_h.in b/mparam_h.in
index d7d5e885a..303cf45b6 100644
--- a/mparam_h.in
+++ b/mparam_h.in
@@ -23,6 +23,9 @@ MA 02110-1301, USA. */
# error "MPFR Internal not included"
#endif
+/* note: the different macros used here are those defined by gcc,
+ for example with gcc -dM -E -xc /dev/null */
+
/*****************************
* Threshold for Pentium 4 *
*****************************/
@@ -101,7 +104,7 @@ MA 02110-1301, USA. */
/****************************
* Threshold for Core 2 *
****************************/
-#elif defined (__core2) && !defined (__i386)
+#elif defined (HAVE_HOST_CORE2) && !defined (__i386)
#define MPFR_MULHIGH_TAB \
-1,-1,-1,0,0,0,0,0,0,0,0,0,0,0,0,0, \