From f0eeeb3c1e78f6db8fda078f35409873dc17db56 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Niels=20M=C3=B6ller?= Date: Wed, 9 Nov 2022 11:26:18 +0100 Subject: Whitespace fixes. --- powerpc64/p9/poly1305-blocks.asm | 6 +++--- powerpc64/p9/poly1305.m4 | 8 ++++---- 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/powerpc64/p9/poly1305-blocks.asm b/powerpc64/p9/poly1305-blocks.asm index cbd03505..90e3df7b 100644 --- a/powerpc64/p9/poly1305-blocks.asm +++ b/powerpc64/p9/poly1305-blocks.asm @@ -250,7 +250,7 @@ C Process data blocks of number of multiple 4 COMPUTE_S(S1, S2, R1, R2) C Calculate R^2 = R R - + MUL(T0, T1, T2, R0, R1, R2) RED(H0, H1, H2, T0, T1, T2) xxpermdi VSR(R0), VSR(R0), VSR(H0), 0b01 @@ -260,7 +260,7 @@ C Process data blocks of number of multiple 4 COMPUTE_S(S1, S2, R1, R2) C Calculate R^3 = R^2 R - + xxmrghd VSR(R3), VSR(ZERO), VSR(R0) xxmrghd VSR(R4), VSR(ZERO), VSR(R1) xxmrghd VSR(R5), VSR(ZERO), VSR(R2) @@ -269,7 +269,7 @@ C Process data blocks of number of multiple 4 RED(H0, H1, H2, T0, T1, T2) C Calculate R^4 = R^2 R^2 - + xxmrgld VSR(R3), VSR(ZERO), VSR(R0) xxmrgld VSR(R4), VSR(ZERO), VSR(R1) xxmrgld VSR(R5), VSR(ZERO), VSR(R2) diff --git a/powerpc64/p9/poly1305.m4 b/powerpc64/p9/poly1305.m4 index 7fc495b4..13a57e83 100644 --- a/powerpc64/p9/poly1305.m4 +++ b/powerpc64/p9/poly1305.m4 @@ -7,7 +7,7 @@ define(`DEFINES_BLOCK_R64', ` define(`H0', `$1') define(`H1', `INC_GPR($1,1)') define(`H2', `INC_GPR($1,2)') - + define(`T0', `INC_GPR($1,3)') define(`T1', `INC_GPR($1,4)') define(`T2', `H2') @@ -18,7 +18,7 @@ define(`DEFINES_BLOCK_R64', ` define(`F0', `$2') define(`F1', `INC_VR($2,1)') - + define(`ZERO', `INC_VR($2,2)') define(`F0S', `INC_VR($2,3)') define(`F11', `INC_VR($2,4)') @@ -37,7 +37,7 @@ define(`DEFINES_BLOCK_R64', ` C CTX is the address of context where key and pre-computed values are stored C DATA is the address of input block C PADBYTE is padding byte for input block -C GPR0 is the starting register of sequential general-purpose registers +C GPR0 is the starting register of sequential general-purpose registers C used in the macro of following layout C GPR0, GPR1, GPR2 are inputs representing the previous state radix 2^64 C GPR3, GPR4 are temporary registers @@ -59,7 +59,7 @@ IF_BE(` ldbrx T1, IDX, $2 ldbrx T0, 0, $2 ') - C Combine state with input block, latter is padded to 17-bytes + C Combine state with input block, latter is padded to 17-bytes C by low-order byte of PADBYTE register addc T0, T0, H0 adde T1, T1, H1 -- cgit v1.2.1