deps: update V8 to 6.4.388.40

PR-URL: https://github.com/nodejs/node/pull/17489
Reviewed-By: Colin Ihrig <cjihrig@gmail.com>
Reviewed-By: Matteo Collina <matteo.collina@gmail.com>
Reviewed-By: Myles Borins <myles.borins@gmail.com>
Reviewed-By: Ali Ijaz Sheikh <ofrobots@google.com>

1 files changed, 146 insertions, 140 deletions

diff --git a/deps/v8/src/arm/simulator-arm.cc b/deps/v8/src/arm/simulator-arm.cc
index f83d6f2a2a..8ab6cb6b5c 100644
--- a/deps/v8/src/arm/simulator-arm.cc
+++ b/deps/v8/src/arm/simulator-arm.cc
@@ -14,6 +14,7 @@
 #include "src/base/bits.h"
 #include "src/codegen.h"
 #include "src/disasm.h"
+#include "src/macro-assembler.h"
 #include "src/objects-inl.h"
 #include "src/runtime/runtime-utils.h"
 
@@ -92,7 +93,7 @@ double ArmDebugger::GetRegisterPairDoubleValue(int regnum) {
 
 
 double ArmDebugger::GetVFPDoubleRegisterValue(int regnum) {
-  return sim_->get_double_from_d_register(regnum);
+  return sim_->get_double_from_d_register(regnum).get_scalar();
 }
 
 
@@ -116,7 +117,7 @@ bool ArmDebugger::GetVFPSingleValue(const char* desc, float* value) {
   bool is_double;
   int regnum = VFPRegisters::Number(desc, &is_double);
   if (regnum != kNoRegister && !is_double) {
-    *value = sim_->get_float_from_s_register(regnum);
+    *value = sim_->get_float_from_s_register(regnum).get_scalar();
     return true;
   }
   return false;
@@ -127,7 +128,7 @@ bool ArmDebugger::GetVFPDoubleValue(const char* desc, double* value) {
   bool is_double;
   int regnum = VFPRegisters::Number(desc, &is_double);
   if (regnum != kNoRegister && is_double) {
-    *value = sim_->get_double_from_d_register(regnum);
+    *value = sim_->get_double_from_d_register(regnum).get_scalar();
     return true;
   }
   return false;
@@ -136,7 +137,7 @@ bool ArmDebugger::GetVFPDoubleValue(const char* desc, double* value) {
 
 bool ArmDebugger::SetBreakpoint(Instruction* breakpc) {
   // Check if a breakpoint can be set. If not return without any side-effects.
-  if (sim_->break_pc_ != NULL) {
+  if (sim_->break_pc_ != nullptr) {
     return false;
   }
 
@@ -150,25 +151,25 @@ bool ArmDebugger::SetBreakpoint(Instruction* breakpc) {
 
 
 bool ArmDebugger::DeleteBreakpoint(Instruction* breakpc) {
-  if (sim_->break_pc_ != NULL) {
+  if (sim_->break_pc_ != nullptr) {
     sim_->break_pc_->SetInstructionBits(sim_->break_instr_);
   }
 
-  sim_->break_pc_ = NULL;
+  sim_->break_pc_ = nullptr;
   sim_->break_instr_ = 0;
   return true;
 }
 
 
 void ArmDebugger::UndoBreakpoints() {
-  if (sim_->break_pc_ != NULL) {
+  if (sim_->break_pc_ != nullptr) {
     sim_->break_pc_->SetInstructionBits(sim_->break_instr_);
   }
 }
 
 
 void ArmDebugger::RedoBreakpoints() {
-  if (sim_->break_pc_ != NULL) {
+  if (sim_->break_pc_ != nullptr) {
     sim_->break_pc_->SetInstructionBits(kBreakpointInstr);
   }
 }
@@ -210,11 +211,11 @@ void ArmDebugger::Debug() {
       last_pc = sim_->get_pc();
     }
     char* line = ReadLine("sim> ");
-    if (line == NULL) {
+    if (line == nullptr) {
       break;
     } else {
       char* last_input = sim_->last_debugger_input();
-      if (strcmp(line, "\n") == 0 && last_input != NULL) {
+      if (strcmp(line, "\n") == 0 && last_input != nullptr) {
         line = last_input;
       } else {
         // Ownership is transferred to sim_;
@@ -305,8 +306,8 @@ void ArmDebugger::Debug() {
           PrintF("printobject <value>\n");
         }
       } else if (strcmp(cmd, "stack") == 0 || strcmp(cmd, "mem") == 0) {
-        int32_t* cur = NULL;
-        int32_t* end = NULL;
+        int32_t* cur = nullptr;
+        int32_t* end = nullptr;
         int next_arg = 1;
 
         if (strcmp(cmd, "stack") == 0) {
@@ -356,9 +357,9 @@ void ArmDebugger::Debug() {
         // use a reasonably large buffer
         v8::internal::EmbeddedVector<char, 256> buffer;
 
-        byte* prev = NULL;
-        byte* cur = NULL;
-        byte* end = NULL;
+        byte* prev = nullptr;
+        byte* cur = nullptr;
+        byte* end = nullptr;
 
         if (argc == 1) {
           cur = reinterpret_cast<byte*>(sim_->get_pc());
@@ -415,7 +416,7 @@ void ArmDebugger::Debug() {
           PrintF("break <address>\n");
         }
       } else if (strcmp(cmd, "del") == 0) {
-        if (!DeleteBreakpoint(NULL)) {
+        if (!DeleteBreakpoint(nullptr)) {
           PrintF("deleting breakpoint failed\n");
         }
       } else if (strcmp(cmd, "flags") == 0) {
@@ -552,8 +553,8 @@ void ArmDebugger::Debug() {
 
 
 static bool ICacheMatch(void* one, void* two) {
-  DCHECK((reinterpret_cast<intptr_t>(one) & CachePage::kPageMask) == 0);
-  DCHECK((reinterpret_cast<intptr_t>(two) & CachePage::kPageMask) == 0);
+  DCHECK_EQ(reinterpret_cast<intptr_t>(one) & CachePage::kPageMask, 0);
+  DCHECK_EQ(reinterpret_cast<intptr_t>(two) & CachePage::kPageMask, 0);
   return one == two;
 }
 
@@ -598,7 +599,7 @@ void Simulator::FlushICache(base::CustomMatcherHashMap* i_cache,
 CachePage* Simulator::GetCachePage(base::CustomMatcherHashMap* i_cache,
                                    void* page) {
   base::HashMap::Entry* entry = i_cache->LookupOrInsert(page, ICacheHash(page));
-  if (entry->value == NULL) {
+  if (entry->value == nullptr) {
     CachePage* new_page = new CachePage();
     entry->value = new_page;
   }
@@ -609,10 +610,10 @@ CachePage* Simulator::GetCachePage(base::CustomMatcherHashMap* i_cache,
 // Flush from start up to and not including start + size.
 void Simulator::FlushOnePage(base::CustomMatcherHashMap* i_cache,
                              intptr_t start, int size) {
-  DCHECK(size <= CachePage::kPageSize);
+  DCHECK_LE(size, CachePage::kPageSize);
   DCHECK(AllOnOnePage(start, size - 1));
-  DCHECK((start & CachePage::kLineMask) == 0);
-  DCHECK((size & CachePage::kLineMask) == 0);
+  DCHECK_EQ(start & CachePage::kLineMask, 0);
+  DCHECK_EQ(size & CachePage::kLineMask, 0);
   void* page = reinterpret_cast<void*>(start & (~CachePage::kPageMask));
   int offset = (start & CachePage::kPageMask);
   CachePage* cache_page = GetCachePage(i_cache, page);
@@ -653,7 +654,7 @@ void Simulator::Initialize(Isolate* isolate) {
 
 Simulator::Simulator(Isolate* isolate) : isolate_(isolate) {
   i_cache_ = isolate_->simulator_i_cache();
-  if (i_cache_ == NULL) {
+  if (i_cache_ == nullptr) {
     i_cache_ = new base::CustomMatcherHashMap(&ICacheMatch);
     isolate_->set_simulator_i_cache(i_cache_);
   }
@@ -664,7 +665,7 @@ Simulator::Simulator(Isolate* isolate) : isolate_(isolate) {
   stack_ = reinterpret_cast<char*>(malloc(stack_size));
   pc_modified_ = false;
   icount_ = 0;
-  break_pc_ = NULL;
+  break_pc_ = nullptr;
   break_instr_ = 0;
 
   // Set up architecture state.
@@ -706,7 +707,7 @@ Simulator::Simulator(Isolate* isolate) : isolate_(isolate) {
   registers_[pc] = bad_lr;
   registers_[lr] = bad_lr;
 
-  last_debugger_input_ = NULL;
+  last_debugger_input_ = nullptr;
 }
 
 Simulator::~Simulator() {
@@ -728,7 +729,7 @@ class Redirection {
       : external_function_(external_function),
         swi_instruction_(al | (0xf * B24) | kCallRtRedirected),
         type_(type),
-        next_(NULL) {
+        next_(nullptr) {
     next_ = isolate->simulator_redirection();
     Simulator::current(isolate)->
         FlushICache(isolate->simulator_i_cache(),
@@ -747,9 +748,9 @@ class Redirection {
   static Redirection* Get(Isolate* isolate, void* external_function,
                           ExternalReference::Type type) {
     Redirection* current = isolate->simulator_redirection();
-    for (; current != NULL; current = current->next_) {
-      if (current->external_function_ == external_function) {
-        DCHECK_EQ(current->type(), type);
+    for (; current != nullptr; current = current->next_) {
+      if (current->external_function_ == external_function &&
+          current->type_ == type) {
         return current;
       }
     }
@@ -813,10 +814,10 @@ void* Simulator::RedirectExternalReference(Isolate* isolate,
 Simulator* Simulator::current(Isolate* isolate) {
   v8::internal::Isolate::PerIsolateThreadData* isolate_data =
       isolate->FindOrAllocatePerThreadDataForThisThread();
-  DCHECK(isolate_data != NULL);
+  DCHECK_NOT_NULL(isolate_data);
 
   Simulator* sim = isolate_data->simulator();
-  if (sim == NULL) {
+  if (sim == nullptr) {
     // TODO(146): delete the simulator object when a thread/isolate goes away.
     sim = new Simulator(isolate);
     isolate_data->set_simulator(sim);
@@ -946,28 +947,26 @@ unsigned int Simulator::get_s_register(int sreg) const {
 
 template<class InputType, int register_size>
 void Simulator::SetVFPRegister(int reg_index, const InputType& value) {
-  DCHECK(reg_index >= 0);
+  unsigned bytes = register_size * sizeof(vfp_registers_[0]);
+  DCHECK_EQ(sizeof(InputType), bytes);
+  DCHECK_GE(reg_index, 0);
   if (register_size == 1) DCHECK(reg_index < num_s_registers);
   if (register_size == 2) DCHECK(reg_index < DwVfpRegister::NumRegisters());
 
-  char buffer[register_size * sizeof(vfp_registers_[0])];
-  memcpy(buffer, &value, register_size * sizeof(vfp_registers_[0]));
-  memcpy(&vfp_registers_[reg_index * register_size], buffer,
-         register_size * sizeof(vfp_registers_[0]));
+  memcpy(&vfp_registers_[reg_index * register_size], &value, bytes);
 }
 
 
 template<class ReturnType, int register_size>
 ReturnType Simulator::GetFromVFPRegister(int reg_index) {
-  DCHECK(reg_index >= 0);
+  unsigned bytes = register_size * sizeof(vfp_registers_[0]);
+  DCHECK_EQ(sizeof(ReturnType), bytes);
+  DCHECK_GE(reg_index, 0);
   if (register_size == 1) DCHECK(reg_index < num_s_registers);
   if (register_size == 2) DCHECK(reg_index < DwVfpRegister::NumRegisters());
 
-  ReturnType value = 0;
-  char buffer[register_size * sizeof(vfp_registers_[0])];
-  memcpy(buffer, &vfp_registers_[register_size * reg_index],
-         register_size * sizeof(vfp_registers_[0]));
-  memcpy(&value, buffer, register_size * sizeof(vfp_registers_[0]));
+  ReturnType value;
+  memcpy(&value, &vfp_registers_[register_size * reg_index], bytes);
   return value;
 }
 
@@ -1004,8 +1003,8 @@ uint32_t Simulator::GetFromSpecialRegister(SRegister reg) {
 // All are consructed here from r0-r3 or d0, d1 and r0.
 void Simulator::GetFpArgs(double* x, double* y, int32_t* z) {
   if (use_eabi_hardfloat()) {
-    *x = get_double_from_d_register(0);
-    *y = get_double_from_d_register(1);
+    *x = get_double_from_d_register(0).get_scalar();
+    *y = get_double_from_d_register(1).get_scalar();
     *z = get_register(0);
   } else {
     // Registers 0 and 1 -> x.
@@ -1479,7 +1478,7 @@ int32_t Simulator::GetShiftRm(Instruction* instr, bool* carry_out) {
           *carry_out = (result & 1) == 1;
           result >>= 1;
         } else {
-          DCHECK(shift_amount >= 32);
+          DCHECK_GE(shift_amount, 32);
           if (result < 0) {
             *carry_out = true;
             result = 0xffffffff;
@@ -1502,7 +1501,7 @@ int32_t Simulator::GetShiftRm(Instruction* instr, bool* carry_out) {
           *carry_out = (result & 1) == 1;
           result = 0;
         } else {
-          DCHECK(shift_amount > 32);
+          DCHECK_GT(shift_amount, 32);
           *carry_out = false;
           result = 0;
         }
@@ -1966,24 +1965,37 @@ void Simulator::SoftwareInterrupt(Instruction* instr) {
 float Simulator::canonicalizeNaN(float value) {
   // Default NaN value, see "NaN handling" in "IEEE 754 standard implementation
   // choices" of the ARM Reference Manual.
-  const uint32_t kDefaultNaN = 0x7FC00000u;
+  constexpr uint32_t kDefaultNaN = 0x7FC00000u;
   if (FPSCR_default_NaN_mode_ && std::isnan(value)) {
     value = bit_cast<float>(kDefaultNaN);
   }
   return value;
 }
 
+Float32 Simulator::canonicalizeNaN(Float32 value) {
+  // Default NaN value, see "NaN handling" in "IEEE 754 standard implementation
+  // choices" of the ARM Reference Manual.
+  constexpr Float32 kDefaultNaN = Float32::FromBits(0x7FC00000u);
+  return FPSCR_default_NaN_mode_ && value.is_nan() ? kDefaultNaN : value;
+}
 
 double Simulator::canonicalizeNaN(double value) {
   // Default NaN value, see "NaN handling" in "IEEE 754 standard implementation
   // choices" of the ARM Reference Manual.
-  const uint64_t kDefaultNaN = V8_UINT64_C(0x7FF8000000000000);
+  constexpr uint64_t kDefaultNaN = V8_UINT64_C(0x7FF8000000000000);
   if (FPSCR_default_NaN_mode_ && std::isnan(value)) {
     value = bit_cast<double>(kDefaultNaN);
   }
   return value;
 }
 
+Float64 Simulator::canonicalizeNaN(Float64 value) {
+  // Default NaN value, see "NaN handling" in "IEEE 754 standard implementation
+  // choices" of the ARM Reference Manual.
+  constexpr Float64 kDefaultNaN =
+      Float64::FromBits(V8_UINT64_C(0x7FF8000000000000));
+  return FPSCR_default_NaN_mode_ && value.is_nan() ? kDefaultNaN : value;
+}
 
 // Stop helper functions.
 bool Simulator::isStopInstruction(Instruction* instr) {
@@ -1992,13 +2004,13 @@ bool Simulator::isStopInstruction(Instruction* instr) {
 
 
 bool Simulator::isWatchedStop(uint32_t code) {
-  DCHECK(code <= kMaxStopCode);
+  DCHECK_LE(code, kMaxStopCode);
   return code < kNumOfWatchedStops;
 }
 
 
 bool Simulator::isEnabledStop(uint32_t code) {
-  DCHECK(code <= kMaxStopCode);
+  DCHECK_LE(code, kMaxStopCode);
   // Unwatched stops are always enabled.
   return !isWatchedStop(code) ||
     !(watched_stops_[code].count & kStopDisabledBit);
@@ -2022,7 +2034,7 @@ void Simulator::DisableStop(uint32_t code) {
 
 
 void Simulator::IncreaseStopCounter(uint32_t code) {
-  DCHECK(code <= kMaxStopCode);
+  DCHECK_LE(code, kMaxStopCode);
   DCHECK(isWatchedStop(code));
   if ((watched_stops_[code].count & ~(1 << 31)) == 0x7fffffff) {
     PrintF("Stop counter for code %i has overflowed.\n"
@@ -2037,7 +2049,7 @@ void Simulator::IncreaseStopCounter(uint32_t code) {
 
 // Print a stop status.
 void Simulator::PrintStopInfo(uint32_t code) {
-  DCHECK(code <= kMaxStopCode);
+  DCHECK_LE(code, kMaxStopCode);
   if (!isWatchedStop(code)) {
     PrintF("Stop not watched.");
   } else {
@@ -2305,7 +2317,7 @@ void Simulator::DecodeType01(Instruction* instr) {
         }
       }
       if (((instr->Bits(7, 4) & 0xd) == 0xd) && (instr->Bit(20) == 0)) {
-        DCHECK((rd % 2) == 0);
+        DCHECK_EQ(rd % 2, 0);
         if (instr->HasH()) {
           // The strd instruction.
           int32_t value1 = get_register(rd);
@@ -2416,7 +2428,7 @@ void Simulator::DecodeType01(Instruction* instr) {
     if (type == 0) {
       shifter_operand = GetShiftRm(instr, &shifter_carry_out);
     } else {
-      DCHECK(instr->TypeValue() == 1);
+      DCHECK_EQ(instr->TypeValue(), 1);
       shifter_operand = GetImm(instr, &shifter_carry_out);
     }
     int32_t alu_out;
@@ -3119,7 +3131,7 @@ void Simulator::DecodeType3(Instruction* instr) {
 
 
 void Simulator::DecodeType4(Instruction* instr) {
-  DCHECK(instr->Bit(22) == 0);  // only allowed to be set in privileged mode
+  DCHECK_EQ(instr->Bit(22), 0);  // only allowed to be set in privileged mode
   if (instr->HasL()) {
     // Format(instr, "ldm'cond'pu 'rn'w, 'rlist");
     HandleRList(instr, true);
@@ -3193,7 +3205,7 @@ void Simulator::DecodeType7(Instruction* instr) {
 // vdup.size Qd, Rt.
 void Simulator::DecodeTypeVFP(Instruction* instr) {
   DCHECK((instr->TypeValue() == 7) && (instr->Bit(24) == 0x0) );
-  DCHECK(instr->Bits(11, 9) == 0x5);
+  DCHECK_EQ(instr->Bits(11, 9), 0x5);
   // Obtain single precision register codes.
   int m = instr->VFPMRegValue(kSinglePrecision);
   int d = instr->VFPDRegValue(kSinglePrecision);
@@ -3218,28 +3230,32 @@ void Simulator::DecodeTypeVFP(Instruction* instr) {
       } else if ((instr->Opc2Value() == 0x0) && (instr->Opc3Value() == 0x3)) {
         // vabs
         if (instr->SzValue() == 0x1) {
-          double dm_value = get_double_from_d_register(vm);
-          double dd_value = std::fabs(dm_value);
-          dd_value = canonicalizeNaN(dd_value);
-          set_d_register_from_double(vd, dd_value);
+          Float64 dm = get_double_from_d_register(vm);
+          constexpr uint64_t kSignBit64 = uint64_t{1} << 63;
+          Float64 dd = Float64::FromBits(dm.get_bits() & ~kSignBit64);
+          dd = canonicalizeNaN(dd);
+          set_d_register_from_double(vd, dd);
         } else {
-          float sm_value = get_float_from_s_register(m);
-          float sd_value = std::fabs(sm_value);
-          sd_value = canonicalizeNaN(sd_value);
-          set_s_register_from_float(d, sd_value);
+          Float32 sm = get_float_from_s_register(m);
+          constexpr uint32_t kSignBit32 = uint32_t{1} << 31;
+          Float32 sd = Float32::FromBits(sm.get_bits() & ~kSignBit32);
+          sd = canonicalizeNaN(sd);
+          set_s_register_from_float(d, sd);
         }
       } else if ((instr->Opc2Value() == 0x1) && (instr->Opc3Value() == 0x1)) {
         // vneg
         if (instr->SzValue() == 0x1) {
-          double dm_value = get_double_from_d_register(vm);
-          double dd_value = -dm_value;
-          dd_value = canonicalizeNaN(dd_value);
-          set_d_register_from_double(vd, dd_value);
+          Float64 dm = get_double_from_d_register(vm);
+          constexpr uint64_t kSignBit64 = uint64_t{1} << 63;
+          Float64 dd = Float64::FromBits(dm.get_bits() ^ kSignBit64);
+          dd = canonicalizeNaN(dd);
+          set_d_register_from_double(vd, dd);
         } else {
-          float sm_value = get_float_from_s_register(m);
-          float sd_value = -sm_value;
-          sd_value = canonicalizeNaN(sd_value);
-          set_s_register_from_float(d, sd_value);
+          Float32 sm = get_float_from_s_register(m);
+          constexpr uint32_t kSignBit32 = uint32_t{1} << 31;
+          Float32 sd = Float32::FromBits(sm.get_bits() ^ kSignBit32);
+          sd = canonicalizeNaN(sd);
+          set_s_register_from_float(d, sd);
         }
       } else if ((instr->Opc2Value() == 0x7) && (instr->Opc3Value() == 0x3)) {
         DecodeVCVTBetweenDoubleAndSingle(instr);
@@ -3262,12 +3278,12 @@ void Simulator::DecodeTypeVFP(Instruction* instr) {
         // vsqrt
         lazily_initialize_fast_sqrt(isolate_);
         if (instr->SzValue() == 0x1) {
-          double dm_value = get_double_from_d_register(vm);
+          double dm_value = get_double_from_d_register(vm).get_scalar();
           double dd_value = fast_sqrt(dm_value, isolate_);
           dd_value = canonicalizeNaN(dd_value);
           set_d_register_from_double(vd, dd_value);
         } else {
-          float sm_value = get_float_from_s_register(m);
+          float sm_value = get_float_from_s_register(m).get_scalar();
           float sd_value = fast_sqrt(sm_value, isolate_);
           sd_value = canonicalizeNaN(sd_value);
           set_s_register_from_float(d, sd_value);
@@ -3277,17 +3293,19 @@ void Simulator::DecodeTypeVFP(Instruction* instr) {
         if (instr->SzValue() == 0x1) {
           set_d_register_from_double(vd, instr->DoubleImmedVmov());
         } else {
-          set_s_register_from_float(d, instr->DoubleImmedVmov());
+          // Cast double to float.
+          float value = instr->DoubleImmedVmov().get_scalar();
+          set_s_register_from_float(d, value);
         }
       } else if (((instr->Opc2Value() == 0x6)) && (instr->Opc3Value() == 0x3)) {
         // vrintz - truncate
         if (instr->SzValue() == 0x1) {
-          double dm_value = get_double_from_d_register(vm);
+          double dm_value = get_double_from_d_register(vm).get_scalar();
           double dd_value = trunc(dm_value);
           dd_value = canonicalizeNaN(dd_value);
           set_d_register_from_double(vd, dd_value);
         } else {
-          float sm_value = get_float_from_s_register(m);
+          float sm_value = get_float_from_s_register(m).get_scalar();
           float sd_value = truncf(sm_value);
           sd_value = canonicalizeNaN(sd_value);
           set_s_register_from_float(d, sd_value);
@@ -3299,14 +3317,14 @@ void Simulator::DecodeTypeVFP(Instruction* instr) {
       if (instr->Opc3Value() & 0x1) {
         // vsub
         if (instr->SzValue() == 0x1) {
-          double dn_value = get_double_from_d_register(vn);
-          double dm_value = get_double_from_d_register(vm);
+          double dn_value = get_double_from_d_register(vn).get_scalar();
+          double dm_value = get_double_from_d_register(vm).get_scalar();
           double dd_value = dn_value - dm_value;
           dd_value = canonicalizeNaN(dd_value);
           set_d_register_from_double(vd, dd_value);
         } else {
-          float sn_value = get_float_from_s_register(n);
-          float sm_value = get_float_from_s_register(m);
+          float sn_value = get_float_from_s_register(n).get_scalar();
+          float sm_value = get_float_from_s_register(m).get_scalar();
           float sd_value = sn_value - sm_value;
           sd_value = canonicalizeNaN(sd_value);
           set_s_register_from_float(d, sd_value);
@@ -3314,14 +3332,14 @@ void Simulator::DecodeTypeVFP(Instruction* instr) {
       } else {
         // vadd
         if (instr->SzValue() == 0x1) {
-          double dn_value = get_double_from_d_register(vn);
-          double dm_value = get_double_from_d_register(vm);
+          double dn_value = get_double_from_d_register(vn).get_scalar();
+          double dm_value = get_double_from_d_register(vm).get_scalar();
           double dd_value = dn_value + dm_value;
           dd_value = canonicalizeNaN(dd_value);
           set_d_register_from_double(vd, dd_value);
         } else {
-          float sn_value = get_float_from_s_register(n);
-          float sm_value = get_float_from_s_register(m);
+          float sn_value = get_float_from_s_register(n).get_scalar();
+          float sm_value = get_float_from_s_register(m).get_scalar();
           float sd_value = sn_value + sm_value;
           sd_value = canonicalizeNaN(sd_value);
           set_s_register_from_float(d, sd_value);
@@ -3330,14 +3348,14 @@ void Simulator::DecodeTypeVFP(Instruction* instr) {
     } else if ((instr->Opc1Value() == 0x2) && !(instr->Opc3Value() & 0x1)) {
       // vmul
       if (instr->SzValue() == 0x1) {
-        double dn_value = get_double_from_d_register(vn);
-        double dm_value = get_double_from_d_register(vm);
+        double dn_value = get_double_from_d_register(vn).get_scalar();
+        double dm_value = get_double_from_d_register(vm).get_scalar();
         double dd_value = dn_value * dm_value;
         dd_value = canonicalizeNaN(dd_value);
         set_d_register_from_double(vd, dd_value);
       } else {
-        float sn_value = get_float_from_s_register(n);
-        float sm_value = get_float_from_s_register(m);
+        float sn_value = get_float_from_s_register(n).get_scalar();
+        float sm_value = get_float_from_s_register(m).get_scalar();
         float sd_value = sn_value * sm_value;
         sd_value = canonicalizeNaN(sd_value);
         set_s_register_from_float(d, sd_value);
@@ -3346,48 +3364,46 @@ void Simulator::DecodeTypeVFP(Instruction* instr) {
       // vmla, vmls
       const bool is_vmls = (instr->Opc3Value() & 0x1);
       if (instr->SzValue() == 0x1) {
-        const double dd_val = get_double_from_d_register(vd);
-        const double dn_val = get_double_from_d_register(vn);
-        const double dm_val = get_double_from_d_register(vm);
+        const double dd_val = get_double_from_d_register(vd).get_scalar();
+        const double dn_val = get_double_from_d_register(vn).get_scalar();
+        const double dm_val = get_double_from_d_register(vm).get_scalar();
 
         // Note: we do the mul and add/sub in separate steps to avoid getting a
         // result with too high precision.
-        set_d_register_from_double(vd, dn_val * dm_val);
+        const double res = dn_val * dm_val;
+        set_d_register_from_double(vd, res);
         if (is_vmls) {
-          set_d_register_from_double(
-              vd, canonicalizeNaN(dd_val - get_double_from_d_register(vd)));
+          set_d_register_from_double(vd, canonicalizeNaN(dd_val - res));
         } else {
-          set_d_register_from_double(
-              vd, canonicalizeNaN(dd_val + get_double_from_d_register(vd)));
+          set_d_register_from_double(vd, canonicalizeNaN(dd_val + res));
         }
       } else {
-        const float sd_val = get_float_from_s_register(d);
-        const float sn_val = get_float_from_s_register(n);
-        const float sm_val = get_float_from_s_register(m);
+        const float sd_val = get_float_from_s_register(d).get_scalar();
+        const float sn_val = get_float_from_s_register(n).get_scalar();
+        const float sm_val = get_float_from_s_register(m).get_scalar();
 
         // Note: we do the mul and add/sub in separate steps to avoid getting a
         // result with too high precision.
-        set_s_register_from_float(d, sn_val * sm_val);
+        const float res = sn_val * sm_val;
+        set_s_register_from_float(d, res);
         if (is_vmls) {
-          set_s_register_from_float(
-              d, canonicalizeNaN(sd_val - get_float_from_s_register(d)));
+          set_s_register_from_float(d, canonicalizeNaN(sd_val - res));
         } else {
-          set_s_register_from_float(
-              d, canonicalizeNaN(sd_val + get_float_from_s_register(d)));
+          set_s_register_from_float(d, canonicalizeNaN(sd_val + res));
         }
       }
     } else if ((instr->Opc1Value() == 0x4) && !(instr->Opc3Value() & 0x1)) {
       // vdiv
       if (instr->SzValue() == 0x1) {
-        double dn_value = get_double_from_d_register(vn);
-        double dm_value = get_double_from_d_register(vm);
+        double dn_value = get_double_from_d_register(vn).get_scalar();
+        double dm_value = get_double_from_d_register(vm).get_scalar();
         double dd_value = dn_value / dm_value;
         div_zero_vfp_flag_ = (dm_value == 0);
         dd_value = canonicalizeNaN(dd_value);
         set_d_register_from_double(vd, dd_value);
       } else {
-        float sn_value = get_float_from_s_register(n);
-        float sm_value = get_float_from_s_register(m);
+        float sn_value = get_float_from_s_register(n).get_scalar();
+        float sm_value = get_float_from_s_register(m).get_scalar();
         float sd_value = sn_value / sm_value;
         div_zero_vfp_flag_ = (sm_value == 0);
         sd_value = canonicalizeNaN(sd_value);
@@ -3565,7 +3581,7 @@ void Simulator::DecodeTypeVFP(Instruction* instr) {
 
 void Simulator::DecodeTypeCP15(Instruction* instr) {
   DCHECK((instr->TypeValue() == 7) && (instr->Bit(24) == 0x0));
-  DCHECK(instr->CoprocessorValue() == 15);
+  DCHECK_EQ(instr->CoprocessorValue(), 15);
 
   if (instr->Bit(4) == 1) {
     // mcr
@@ -3626,10 +3642,10 @@ void Simulator::DecodeVCMP(Instruction* instr) {
   }
 
   if (precision == kDoublePrecision) {
-    double dd_value = get_double_from_d_register(d);
+    double dd_value = get_double_from_d_register(d).get_scalar();
     double dm_value = 0.0;
     if (instr->Opc2Value() == 0x4) {
-      dm_value = get_double_from_d_register(m);
+      dm_value = get_double_from_d_register(m).get_scalar();
     }
 
     // Raise exceptions for quiet NaNs if necessary.
@@ -3641,10 +3657,10 @@ void Simulator::DecodeVCMP(Instruction* instr) {
 
     Compute_FPSCR_Flags(dd_value, dm_value);
   } else {
-    float sd_value = get_float_from_s_register(d);
+    float sd_value = get_float_from_s_register(d).get_scalar();
     float sm_value = 0.0;
     if (instr->Opc2Value() == 0x4) {
-      sm_value = get_float_from_s_register(m);
+      sm_value = get_float_from_s_register(m).get_scalar();
     }
 
     // Raise exceptions for quiet NaNs if necessary.
@@ -3674,10 +3690,10 @@ void Simulator::DecodeVCVTBetweenDoubleAndSingle(Instruction* instr) {
   int src = instr->VFPMRegValue(src_precision);
 
   if (dst_precision == kSinglePrecision) {
-    double val = get_double_from_d_register(src);
+    double val = get_double_from_d_register(src).get_scalar();
     set_s_register_from_float(dst, static_cast<float>(val));
   } else {
-    float val = get_float_from_s_register(src);
+    float val = get_float_from_s_register(src).get_scalar();
     set_d_register_from_double(dst, static_cast<double>(val));
   }
 }
@@ -3810,8 +3826,8 @@ void Simulator::DecodeVCVTBetweenFloatingPointAndInteger(Instruction* instr) {
     bool unsigned_integer = (instr->Bit(16) == 0);
     bool double_precision = (src_precision == kDoublePrecision);
 
-    double val = double_precision ? get_double_from_d_register(src)
-                                  : get_float_from_s_register(src);
+    double val = double_precision ? get_double_from_d_register(src).get_scalar()
+                                  : get_float_from_s_register(src).get_scalar();
 
     int32_t temp = ConvertDoubleToInt(val, unsigned_integer, mode);
 
@@ -3852,7 +3868,7 @@ void Simulator::DecodeVCVTBetweenFloatingPointAndInteger(Instruction* instr) {
 // Ddst = MEM(Rbase + 4*offset).
 // MEM(Rbase + 4*offset) = Dsrc.
 void Simulator::DecodeType6CoprocessorIns(Instruction* instr) {
-  DCHECK((instr->TypeValue() == 6));
+  DCHECK_EQ(instr->TypeValue(), 6);
 
   if (instr->CoprocessorValue() == 0xA) {
     switch (instr->OpcodeValue()) {
@@ -3870,7 +3886,7 @@ void Simulator::DecodeType6CoprocessorIns(Instruction* instr) {
         int32_t address = get_register(rn) + 4 * offset;
         // Load and store address for singles must be at least four-byte
         // aligned.
-        DCHECK((address % 4) == 0);
+        DCHECK_EQ(address % 4, 0);
         if (instr->HasL()) {
           // Load single from memory: vldr.
           set_s_register_from_sinteger(vd, ReadW(address, instr));
@@ -3926,7 +3942,7 @@ void Simulator::DecodeType6CoprocessorIns(Instruction* instr) {
         int32_t address = get_register(rn) + 4 * offset;
         // Load and store address for doubles must be at least four-byte
         // aligned.
-        DCHECK((address % 4) == 0);
+        DCHECK_EQ(address % 4, 0);
         if (instr->HasL()) {
           // Load double from memory: vldr.
           int32_t data[] = {
@@ -5561,7 +5577,7 @@ void Simulator::DecodeSpecialCondition(Instruction* instr) {
         if (instr->SzValue() == 0x1) {
           int vm = instr->VFPMRegValue(kDoublePrecision);
           int vd = instr->VFPDRegValue(kDoublePrecision);
-          double dm_value = get_double_from_d_register(vm);
+          double dm_value = get_double_from_d_register(vm).get_scalar();
           double dd_value = 0.0;
           int rounding_mode = instr->Bits(17, 16);
           switch (rounding_mode) {
@@ -5587,7 +5603,7 @@ void Simulator::DecodeSpecialCondition(Instruction* instr) {
         } else {
           int m = instr->VFPMRegValue(kSinglePrecision);
           int d = instr->VFPDRegValue(kSinglePrecision);
-          float sm_value = get_float_from_s_register(m);
+          float sm_value = get_float_from_s_register(m).get_scalar();
           float sd_value = 0.0;
           int rounding_mode = instr->Bits(17, 16);
           switch (rounding_mode) {
@@ -5617,8 +5633,8 @@ void Simulator::DecodeSpecialCondition(Instruction* instr) {
           int m = instr->VFPMRegValue(kDoublePrecision);
           int n = instr->VFPNRegValue(kDoublePrecision);
           int d = instr->VFPDRegValue(kDoublePrecision);
-          double dn_value = get_double_from_d_register(n);
-          double dm_value = get_double_from_d_register(m);
+          double dn_value = get_double_from_d_register(n).get_scalar();
+          double dm_value = get_double_from_d_register(m).get_scalar();
           double dd_value;
           if (instr->Bit(6) == 0x1) {  // vminnm
             if ((dn_value < dm_value) || std::isnan(dm_value)) {
@@ -5647,8 +5663,8 @@ void Simulator::DecodeSpecialCondition(Instruction* instr) {
           int m = instr->VFPMRegValue(kSinglePrecision);
           int n = instr->VFPNRegValue(kSinglePrecision);
           int d = instr->VFPDRegValue(kSinglePrecision);
-          float sn_value = get_float_from_s_register(n);
-          float sm_value = get_float_from_s_register(m);
+          float sn_value = get_float_from_s_register(n).get_scalar();
+          float sm_value = get_float_from_s_register(m).get_scalar();
           float sd_value;
           if (instr->Bit(6) == 0x1) {  // vminnm
             if ((sn_value < sm_value) || std::isnan(sm_value)) {
@@ -5704,13 +5720,13 @@ void Simulator::DecodeSpecialCondition(Instruction* instr) {
           int n = instr->VFPNRegValue(kDoublePrecision);
           int m = instr->VFPMRegValue(kDoublePrecision);
           int d = instr->VFPDRegValue(kDoublePrecision);
-          double result = get_double_from_d_register(condition_holds ? n : m);
+          Float64 result = get_double_from_d_register(condition_holds ? n : m);
           set_d_register_from_double(d, result);
         } else {
           int n = instr->VFPNRegValue(kSinglePrecision);
           int m = instr->VFPMRegValue(kSinglePrecision);
           int d = instr->VFPDRegValue(kSinglePrecision);
-          float result = get_float_from_s_register(condition_holds ? n : m);
+          Float32 result = get_float_from_s_register(condition_holds ? n : m);
           set_s_register_from_float(d, result);
         }
       } else {
@@ -5884,7 +5900,7 @@ int32_t Simulator::Call(byte* entry, int argument_count, ...) {
   // Set up arguments
 
   // First four arguments passed in registers.
-  DCHECK(argument_count >= 4);
+  DCHECK_GE(argument_count, 4);
   set_register(r0, va_arg(parameters, int32_t));
   set_register(r1, va_arg(parameters, int32_t));
   set_register(r2, va_arg(parameters, int32_t));
@@ -5935,16 +5951,6 @@ int32_t Simulator::CallFPReturnsInt(byte* entry, double d0, double d1) {
 }
 
 
-double Simulator::CallFPReturnsDouble(byte* entry, double d0, double d1) {
-  CallFP(entry, d0, d1);
-  if (use_eabi_hardfloat()) {
-    return get_double_from_d_register(0);
-  } else {
-    return get_double_from_register_pair(0);
-  }
-}
-
-
 uintptr_t Simulator::PushAddress(uintptr_t address) {
   int new_sp = get_register(sp) - sizeof(uintptr_t);
   uintptr_t* stack_slot = reinterpret_cast<uintptr_t*>(new_sp);