diff options
author | Michaƫl Zasso <targos@protonmail.com> | 2018-01-24 20:16:06 +0100 |
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committer | Myles Borins <mylesborins@google.com> | 2018-01-24 15:02:20 -0800 |
commit | 4c4af643e5042d615a60c6bbc05aee9d81b903e5 (patch) | |
tree | 3fb0a97988fe4439ae3ae06f26915d1dcf8cab92 /deps/v8/src/mips/assembler-mips.h | |
parent | fa9f31a4fda5a3782c652e56e394465805ebb50f (diff) | |
download | node-new-4c4af643e5042d615a60c6bbc05aee9d81b903e5.tar.gz |
deps: update V8 to 6.4.388.40
PR-URL: https://github.com/nodejs/node/pull/17489
Reviewed-By: Colin Ihrig <cjihrig@gmail.com>
Reviewed-By: Matteo Collina <matteo.collina@gmail.com>
Reviewed-By: Myles Borins <myles.borins@gmail.com>
Reviewed-By: Ali Ijaz Sheikh <ofrobots@google.com>
Diffstat (limited to 'deps/v8/src/mips/assembler-mips.h')
-rw-r--r-- | deps/v8/src/mips/assembler-mips.h | 71 |
1 files changed, 28 insertions, 43 deletions
diff --git a/deps/v8/src/mips/assembler-mips.h b/deps/v8/src/mips/assembler-mips.h index d2a9802b5e..76f3245e2c 100644 --- a/deps/v8/src/mips/assembler-mips.h +++ b/deps/v8/src/mips/assembler-mips.h @@ -54,8 +54,9 @@ namespace internal { V(k0) V(k1) V(gp) V(sp) V(fp) V(ra) #define ALLOCATABLE_GENERAL_REGISTERS(V) \ - V(v0) V(v1) V(a0) V(a1) V(a2) V(a3) \ - V(t0) V(t1) V(t2) V(t3) V(t4) V(t5) V(t6) V(s7) + V(a0) V(a1) V(a2) V(a3) \ + V(t0) V(t1) V(t2) V(t3) V(t4) V(t5) V(t6) V(s7) \ + V(v0) V(v1) #define DOUBLE_REGISTERS(V) \ V(f0) V(f1) V(f2) V(f3) V(f4) V(f5) V(f6) V(f7) \ @@ -252,12 +253,12 @@ class FPURegister : public RegisterBase<FPURegister, kDoubleAfterLast> { public: FPURegister low() const { // Find low reg of a Double-reg pair, which is the reg itself. - DCHECK(code() % 2 == 0); // Specified Double reg must be even. + DCHECK_EQ(code() % 2, 0); // Specified Double reg must be even. return FPURegister::from_code(code()); } FPURegister high() const { // Find high reg of a Doubel-reg pair, which is reg + 1. - DCHECK(code() % 2 == 0); // Specified Double reg must be even. + DCHECK_EQ(code() % 2, 0); // Specified Double reg must be even. return FPURegister::from_code(code() + 1); } @@ -481,14 +482,15 @@ class Assembler : public AssemblerBase { // relocation information starting from the end of the buffer. See CodeDesc // for a detailed comment on the layout (globals.h). // - // If the provided buffer is NULL, the assembler allocates and grows its own - // buffer, and buffer_size determines the initial buffer size. The buffer is - // owned by the assembler and deallocated upon destruction of the assembler. + // If the provided buffer is nullptr, the assembler allocates and grows its + // own buffer, and buffer_size determines the initial buffer size. The buffer + // is owned by the assembler and deallocated upon destruction of the + // assembler. // - // If the provided buffer is not NULL, the assembler uses the provided buffer - // for code generation and assumes its size to be buffer_size. If the buffer - // is too small, a fatal error occurs. No deallocation of the buffer is done - // upon destruction of the assembler. + // If the provided buffer is not nullptr, the assembler uses the provided + // buffer for code generation and assumes its size to be buffer_size. If the + // buffer is too small, a fatal error occurs. No deallocation of the buffer is + // done upon destruction of the assembler. Assembler(Isolate* isolate, void* buffer, int buffer_size) : Assembler(IsolateData(isolate), buffer, buffer_size) {} Assembler(IsolateData isolate_data, void* buffer, int buffer_size); @@ -686,7 +688,7 @@ class Assembler : public AssemblerBase { // sll(zero_reg, zero_reg, 0). We use rt_reg == at for non-zero // marking, to avoid conflict with ssnop and ehb instructions. void nop(unsigned int type = 0) { - DCHECK(type < 32); + DCHECK_LT(type, 32); Register nop_rt_reg = (type == 0) ? zero_reg : at; sll(zero_reg, nop_rt_reg, type, true); } @@ -1993,12 +1995,8 @@ class Assembler : public AssemblerBase { // few aliases, but mixing both does not look clean to me. // Anyway we could surely implement this differently. - void GenInstrRegister(Opcode opcode, - Register rs, - Register rt, - Register rd, - uint16_t sa = 0, - SecondaryField func = NULLSF); + void GenInstrRegister(Opcode opcode, Register rs, Register rt, Register rd, + uint16_t sa = 0, SecondaryField func = nullptrSF); void GenInstrRegister(Opcode opcode, Register rs, @@ -2007,32 +2005,20 @@ class Assembler : public AssemblerBase { uint16_t lsb, SecondaryField func); - void GenInstrRegister(Opcode opcode, - SecondaryField fmt, - FPURegister ft, - FPURegister fs, - FPURegister fd, - SecondaryField func = NULLSF); + void GenInstrRegister(Opcode opcode, SecondaryField fmt, FPURegister ft, + FPURegister fs, FPURegister fd, + SecondaryField func = nullptrSF); - void GenInstrRegister(Opcode opcode, - FPURegister fr, - FPURegister ft, - FPURegister fs, - FPURegister fd, - SecondaryField func = NULLSF); + void GenInstrRegister(Opcode opcode, FPURegister fr, FPURegister ft, + FPURegister fs, FPURegister fd, + SecondaryField func = nullptrSF); - void GenInstrRegister(Opcode opcode, - SecondaryField fmt, - Register rt, - FPURegister fs, - FPURegister fd, - SecondaryField func = NULLSF); + void GenInstrRegister(Opcode opcode, SecondaryField fmt, Register rt, + FPURegister fs, FPURegister fd, + SecondaryField func = nullptrSF); - void GenInstrRegister(Opcode opcode, - SecondaryField fmt, - Register rt, - FPUControlRegister fs, - SecondaryField func = NULLSF); + void GenInstrRegister(Opcode opcode, SecondaryField fmt, Register rt, + FPUControlRegister fs, SecondaryField func = nullptrSF); void GenInstrImmediate( Opcode opcode, Register rs, Register rt, int32_t j, @@ -2127,7 +2113,7 @@ class Assembler : public AssemblerBase { } // Labels. - void print(Label* L); + void print(const Label* L); void bind_to(Label* L, int pos); void next(Label* L, bool is_internal); @@ -2226,7 +2212,6 @@ class Assembler : public AssemblerBase { friend class RegExpMacroAssemblerMIPS; friend class RelocInfo; - friend class CodePatcher; friend class BlockTrampolinePoolScope; friend class EnsureSpace; }; |