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authorMichaël Zasso <targos@protonmail.com>2017-05-02 10:50:00 +0200
committerMichaël Zasso <targos@protonmail.com>2017-05-06 20:02:35 +0200
commit60d1aac8d225e844e68ae48e8f3d58802e635fbe (patch)
tree922f347dd054db18d88666fad7181e5a777f4022 /deps/v8/src/mips/assembler-mips.h
parent73d9c0f903ae371cd5011af64c3a6f69a1bda978 (diff)
downloadnode-new-60d1aac8d225e844e68ae48e8f3d58802e635fbe.tar.gz
deps: update V8 to 5.8.283.38
PR-URL: https://github.com/nodejs/node/pull/12784 Reviewed-By: Ben Noordhuis <info@bnoordhuis.nl> Reviewed-By: Gibson Fahnestock <gibfahn@gmail.com>
Diffstat (limited to 'deps/v8/src/mips/assembler-mips.h')
-rw-r--r--deps/v8/src/mips/assembler-mips.h12
1 files changed, 3 insertions, 9 deletions
diff --git a/deps/v8/src/mips/assembler-mips.h b/deps/v8/src/mips/assembler-mips.h
index dec4c18889..9b259bbf83 100644
--- a/deps/v8/src/mips/assembler-mips.h
+++ b/deps/v8/src/mips/assembler-mips.h
@@ -155,6 +155,7 @@ int ToNumber(Register reg);
Register ToRegister(int num);
static const bool kSimpleFPAliasing = true;
+static const bool kSimdMaskRegisters = false;
// Coprocessor register.
struct FPURegister {
@@ -472,17 +473,10 @@ class Assembler : public AssemblerBase {
ICacheFlushMode icache_flush_mode = FLUSH_ICACHE_IF_NEEDED)) {
set_target_address_at(isolate, pc, target, icache_flush_mode);
}
- INLINE(static Address target_address_at(Address pc, Code* code)) {
- Address constant_pool = code ? code->constant_pool() : NULL;
- return target_address_at(pc, constant_pool);
- }
+ INLINE(static Address target_address_at(Address pc, Code* code));
INLINE(static void set_target_address_at(
Isolate* isolate, Address pc, Code* code, Address target,
- ICacheFlushMode icache_flush_mode = FLUSH_ICACHE_IF_NEEDED)) {
- Address constant_pool = code ? code->constant_pool() : NULL;
- set_target_address_at(isolate, pc, constant_pool, target,
- icache_flush_mode);
- }
+ ICacheFlushMode icache_flush_mode = FLUSH_ICACHE_IF_NEEDED));
// Return the code target address at a call site from the return address
// of that call in the instruction stream.