diff options
author | Trevor Norris <trev.norris@gmail.com> | 2014-01-23 12:14:40 -0800 |
---|---|---|
committer | Trevor Norris <trev.norris@gmail.com> | 2014-01-23 12:26:51 -0800 |
commit | f78e5df85467343bf91b4811bc1cb6cd47cc7575 (patch) | |
tree | f86cdfa54be742059aa5da261e12128883527403 /deps/v8/src/mips | |
parent | c79c304ead2e16082465a61156d9e29b01a7909e (diff) | |
download | node-new-f78e5df85467343bf91b4811bc1cb6cd47cc7575.tar.gz |
v8: upgrade to 3.22.24.17
Diffstat (limited to 'deps/v8/src/mips')
-rw-r--r-- | deps/v8/src/mips/assembler-mips-inl.h | 8 | ||||
-rw-r--r-- | deps/v8/src/mips/builtins-mips.cc | 25 | ||||
-rw-r--r-- | deps/v8/src/mips/codegen-mips.cc | 25 | ||||
-rw-r--r-- | deps/v8/src/mips/deoptimizer-mips.cc | 5 | ||||
-rw-r--r-- | deps/v8/src/mips/lithium-codegen-mips.cc | 67 | ||||
-rw-r--r-- | deps/v8/src/mips/lithium-codegen-mips.h | 3 | ||||
-rw-r--r-- | deps/v8/src/mips/macro-assembler-mips.cc | 16 | ||||
-rw-r--r-- | deps/v8/src/mips/macro-assembler-mips.h | 6 | ||||
-rw-r--r-- | deps/v8/src/mips/simulator-mips.cc | 7 | ||||
-rw-r--r-- | deps/v8/src/mips/simulator-mips.h | 1 |
10 files changed, 103 insertions, 60 deletions
diff --git a/deps/v8/src/mips/assembler-mips-inl.h b/deps/v8/src/mips/assembler-mips-inl.h index de91051ed0..8c825d24ee 100644 --- a/deps/v8/src/mips/assembler-mips-inl.h +++ b/deps/v8/src/mips/assembler-mips-inl.h @@ -271,16 +271,14 @@ Handle<Object> RelocInfo::code_age_stub_handle(Assembler* origin) { Code* RelocInfo::code_age_stub() { ASSERT(rmode_ == RelocInfo::CODE_AGE_SEQUENCE); return Code::GetCodeFromTargetAddress( - Memory::Address_at(pc_ + Assembler::kInstrSize * - (kNoCodeAgeSequenceLength - 1))); + Assembler::target_address_at(pc_ + Assembler::kInstrSize)); } void RelocInfo::set_code_age_stub(Code* stub) { ASSERT(rmode_ == RelocInfo::CODE_AGE_SEQUENCE); - Memory::Address_at(pc_ + Assembler::kInstrSize * - (kNoCodeAgeSequenceLength - 1)) = - stub->instruction_start(); + Assembler::set_target_address_at(pc_ + Assembler::kInstrSize, + stub->instruction_start()); } diff --git a/deps/v8/src/mips/builtins-mips.cc b/deps/v8/src/mips/builtins-mips.cc index 0b495831b9..d0ae073737 100644 --- a/deps/v8/src/mips/builtins-mips.cc +++ b/deps/v8/src/mips/builtins-mips.cc @@ -821,12 +821,9 @@ static void GenerateMakeCodeYoungAgainCommon(MacroAssembler* masm) { // internal frame to make the code faster, since we shouldn't have to do stack // crawls in MakeCodeYoung. This seems a bit fragile. - __ mov(a0, ra); - // Adjust a0 to point to the head of the PlatformCodeAge sequence + // Set a0 to point to the head of the PlatformCodeAge sequence. __ Subu(a0, a0, Operand((kNoCodeAgeSequenceLength - 1) * Assembler::kInstrSize)); - // Restore the original return address of the function - __ mov(ra, at); // The following registers must be saved and restored when calling through to // the runtime: @@ -863,12 +860,9 @@ void Builtins::Generate_MarkCodeAsExecutedOnce(MacroAssembler* masm) { // save/restore the registers without worrying about which of them contain // pointers. - __ mov(a0, ra); - // Adjust a0 to point to the head of the PlatformCodeAge sequence + // Set a0 to point to the head of the PlatformCodeAge sequence. __ Subu(a0, a0, Operand((kNoCodeAgeSequenceLength - 1) * Assembler::kInstrSize)); - // Restore the original return address of the function - __ mov(ra, at); // The following registers must be saved and restored when calling through to // the runtime: @@ -900,7 +894,8 @@ void Builtins::Generate_MarkCodeAsExecutedTwice(MacroAssembler* masm) { } -void Builtins::Generate_NotifyStubFailure(MacroAssembler* masm) { +static void Generate_NotifyStubFailureHelper(MacroAssembler* masm, + SaveFPRegsMode save_doubles) { { FrameScope scope(masm, StackFrame::INTERNAL); @@ -909,7 +904,7 @@ void Builtins::Generate_NotifyStubFailure(MacroAssembler* masm) { // registers. __ MultiPush(kJSCallerSaved | kCalleeSaved); // Pass the function and deoptimization type to the runtime system. - __ CallRuntime(Runtime::kNotifyStubFailure, 0); + __ CallRuntime(Runtime::kNotifyStubFailure, 0, save_doubles); __ MultiPop(kJSCallerSaved | kCalleeSaved); } @@ -918,6 +913,16 @@ void Builtins::Generate_NotifyStubFailure(MacroAssembler* masm) { } +void Builtins::Generate_NotifyStubFailure(MacroAssembler* masm) { + Generate_NotifyStubFailureHelper(masm, kDontSaveFPRegs); +} + + +void Builtins::Generate_NotifyStubFailureSaveDoubles(MacroAssembler* masm) { + Generate_NotifyStubFailureHelper(masm, kSaveFPRegs); +} + + static void Generate_NotifyDeoptimizedHelper(MacroAssembler* masm, Deoptimizer::BailoutType type) { { diff --git a/deps/v8/src/mips/codegen-mips.cc b/deps/v8/src/mips/codegen-mips.cc index ec6649533f..9d4b52c9da 100644 --- a/deps/v8/src/mips/codegen-mips.cc +++ b/deps/v8/src/mips/codegen-mips.cc @@ -641,8 +641,8 @@ void Code::GetCodeAgeAndParity(byte* sequence, Age* age, *age = kNoAgeCodeAge; *parity = NO_MARKING_PARITY; } else { - Address target_address = Memory::Address_at( - sequence + Assembler::kInstrSize * (kNoCodeAgeSequenceLength - 1)); + Address target_address = Assembler::target_address_at( + sequence + Assembler::kInstrSize); Code* stub = GetCodeFromTargetAddress(target_address); GetCodeAgeAndParity(stub, age, parity); } @@ -661,17 +661,18 @@ void Code::PatchPlatformCodeAge(Isolate* isolate, } else { Code* stub = GetCodeAgeStub(isolate, age, parity); CodePatcher patcher(sequence, young_length / Assembler::kInstrSize); - // Mark this code sequence for FindPlatformCodeAgeSequence() + // Mark this code sequence for FindPlatformCodeAgeSequence(). patcher.masm()->nop(Assembler::CODE_AGE_MARKER_NOP); - // Save the function's original return address - // (it will be clobbered by Call(t9)) - patcher.masm()->mov(at, ra); - // Load the stub address to t9 and call it - patcher.masm()->li(t9, - Operand(reinterpret_cast<uint32_t>(stub->instruction_start()))); - patcher.masm()->Call(t9); - // Record the stub address in the empty space for GetCodeAgeAndParity() - patcher.masm()->dd(reinterpret_cast<uint32_t>(stub->instruction_start())); + // Load the stub address to t9 and call it, + // GetCodeAgeAndParity() extracts the stub address from this instruction. + patcher.masm()->li( + t9, + Operand(reinterpret_cast<uint32_t>(stub->instruction_start())), + CONSTANT_SIZE); + patcher.masm()->nop(); // Prevent jalr to jal optimization. + patcher.masm()->jalr(t9, a0); + patcher.masm()->nop(); // Branch delay slot nop. + patcher.masm()->nop(); // Pad the empty space. } } diff --git a/deps/v8/src/mips/deoptimizer-mips.cc b/deps/v8/src/mips/deoptimizer-mips.cc index d31990be5c..971ead6c23 100644 --- a/deps/v8/src/mips/deoptimizer-mips.cc +++ b/deps/v8/src/mips/deoptimizer-mips.cc @@ -125,6 +125,11 @@ bool Deoptimizer::HasAlignmentPadding(JSFunction* function) { } +Code* Deoptimizer::NotifyStubFailureBuiltin() { + return isolate_->builtins()->builtin(Builtins::kNotifyStubFailureSaveDoubles); +} + + #define __ masm()-> diff --git a/deps/v8/src/mips/lithium-codegen-mips.cc b/deps/v8/src/mips/lithium-codegen-mips.cc index 4484dc634e..26ffd66e1d 100644 --- a/deps/v8/src/mips/lithium-codegen-mips.cc +++ b/deps/v8/src/mips/lithium-codegen-mips.cc @@ -98,6 +98,38 @@ void LChunkBuilder::Abort(BailoutReason reason) { } +void LCodeGen::SaveCallerDoubles() { + ASSERT(info()->saves_caller_doubles()); + ASSERT(NeedsEagerFrame()); + Comment(";;; Save clobbered callee double registers"); + int count = 0; + BitVector* doubles = chunk()->allocated_double_registers(); + BitVector::Iterator save_iterator(doubles); + while (!save_iterator.Done()) { + __ sdc1(DoubleRegister::FromAllocationIndex(save_iterator.Current()), + MemOperand(sp, count * kDoubleSize)); + save_iterator.Advance(); + count++; + } +} + + +void LCodeGen::RestoreCallerDoubles() { + ASSERT(info()->saves_caller_doubles()); + ASSERT(NeedsEagerFrame()); + Comment(";;; Restore clobbered callee double registers"); + BitVector* doubles = chunk()->allocated_double_registers(); + BitVector::Iterator save_iterator(doubles); + int count = 0; + while (!save_iterator.Done()) { + __ ldc1(DoubleRegister::FromAllocationIndex(save_iterator.Current()), + MemOperand(sp, count * kDoubleSize)); + save_iterator.Advance(); + count++; + } +} + + bool LCodeGen::GeneratePrologue() { ASSERT(is_generating()); @@ -160,16 +192,7 @@ bool LCodeGen::GeneratePrologue() { } if (info()->saves_caller_doubles()) { - Comment(";;; Save clobbered callee double registers"); - int count = 0; - BitVector* doubles = chunk()->allocated_double_registers(); - BitVector::Iterator save_iterator(doubles); - while (!save_iterator.Done()) { - __ sdc1(DoubleRegister::FromAllocationIndex(save_iterator.Current()), - MemOperand(sp, count * kDoubleSize)); - save_iterator.Advance(); - count++; - } + SaveCallerDoubles(); } // Possibly allocate a local context. @@ -298,6 +321,7 @@ bool LCodeGen::GenerateDeoptJumpTable() { } __ li(t9, Operand(ExternalReference::ForDeoptEntry(entry))); if (deopt_jump_table_[i].needs_frame) { + ASSERT(!info()->saves_caller_doubles()); if (needs_frame.is_bound()) { __ Branch(&needs_frame); } else { @@ -313,6 +337,10 @@ bool LCodeGen::GenerateDeoptJumpTable() { __ Call(t9); } } else { + if (info()->saves_caller_doubles()) { + ASSERT(info()->IsStub()); + RestoreCallerDoubles(); + } __ Call(t9); } } @@ -757,7 +785,10 @@ void LCodeGen::DeoptimizeIf(Condition condition, } ASSERT(info()->IsStub() || frame_is_built_); - if (condition == al && frame_is_built_) { + // Go through jump table if we need to handle condition, build frame, or + // restore caller doubles. + if (condition == al && frame_is_built_ && + !info()->saves_caller_doubles()) { __ Call(entry, RelocInfo::RUNTIME_ENTRY, condition, src1, src2); } else { // We often have several deopts to the same entry, reuse the last @@ -2706,16 +2737,7 @@ void LCodeGen::DoReturn(LReturn* instr) { __ CallRuntime(Runtime::kTraceExit, 1); } if (info()->saves_caller_doubles()) { - ASSERT(NeedsEagerFrame()); - BitVector* doubles = chunk()->allocated_double_registers(); - BitVector::Iterator save_iterator(doubles); - int count = 0; - while (!save_iterator.Done()) { - __ ldc1(DoubleRegister::FromAllocationIndex(save_iterator.Current()), - MemOperand(sp, count * kDoubleSize)); - save_iterator.Advance(); - count++; - } + RestoreCallerDoubles(); } int no_frame_start = -1; if (NeedsEagerFrame()) { @@ -3303,7 +3325,8 @@ void LCodeGen::DoWrapReceiver(LWrapReceiver* instr) { __ Branch(&receiver_ok); __ bind(&global_object); - __ lw(receiver, GlobalObjectOperand()); + __ lw(receiver, MemOperand(fp, StandardFrameConstants::kContextOffset)); + __ lw(receiver, ContextOperand(receiver, Context::GLOBAL_OBJECT_INDEX)); __ lw(receiver, FieldMemOperand(receiver, JSGlobalObject::kGlobalReceiverOffset)); __ bind(&receiver_ok); diff --git a/deps/v8/src/mips/lithium-codegen-mips.h b/deps/v8/src/mips/lithium-codegen-mips.h index f643d02191..29a89d5885 100644 --- a/deps/v8/src/mips/lithium-codegen-mips.h +++ b/deps/v8/src/mips/lithium-codegen-mips.h @@ -186,6 +186,9 @@ class LCodeGen: public LCodeGenBase { void AddDeferredCode(LDeferredCode* code) { deferred_.Add(code, zone()); } + void SaveCallerDoubles(); + void RestoreCallerDoubles(); + // Code generation passes. Returns true if code generation should // continue. bool GeneratePrologue(); diff --git a/deps/v8/src/mips/macro-assembler-mips.cc b/deps/v8/src/mips/macro-assembler-mips.cc index e0cb1ba824..d6e8af1fc0 100644 --- a/deps/v8/src/mips/macro-assembler-mips.cc +++ b/deps/v8/src/mips/macro-assembler-mips.cc @@ -4601,15 +4601,15 @@ void MacroAssembler::Prologue(PrologueFrameMode frame_mode) { // Pre-age the code. Code* stub = Code::GetPreAgedCodeAgeStub(isolate()); nop(Assembler::CODE_AGE_MARKER_NOP); - // Save the function's original return address - // (it will be clobbered by Call(t9)) - mov(at, ra); - // Load the stub address to t9 and call it + // Load the stub address to t9 and call it, + // GetCodeAgeAndParity() extracts the stub address from this instruction. li(t9, - Operand(reinterpret_cast<uint32_t>(stub->instruction_start()))); - Call(t9); - // Record the stub address in the empty space for GetCodeAgeAndParity() - dd(reinterpret_cast<uint32_t>(stub->instruction_start())); + Operand(reinterpret_cast<uint32_t>(stub->instruction_start())), + CONSTANT_SIZE); + nop(); // Prevent jalr to jal optimization. + jalr(t9, a0); + nop(); // Branch delay slot nop. + nop(); // Pad the empty space. } else { Push(ra, fp, cp, a1); nop(Assembler::CODE_AGE_SEQUENCE_NOP); diff --git a/deps/v8/src/mips/macro-assembler-mips.h b/deps/v8/src/mips/macro-assembler-mips.h index 0805bb9670..a4fd766e66 100644 --- a/deps/v8/src/mips/macro-assembler-mips.h +++ b/deps/v8/src/mips/macro-assembler-mips.h @@ -1210,8 +1210,10 @@ class MacroAssembler: public Assembler { } // Convenience function: Same as above, but takes the fid instead. - void CallRuntime(Runtime::FunctionId id, int num_arguments) { - CallRuntime(Runtime::FunctionForId(id), num_arguments); + void CallRuntime(Runtime::FunctionId id, + int num_arguments, + SaveFPRegsMode save_doubles = kDontSaveFPRegs) { + CallRuntime(Runtime::FunctionForId(id), num_arguments, save_doubles); } // Convenience function: call an external reference. diff --git a/deps/v8/src/mips/simulator-mips.cc b/deps/v8/src/mips/simulator-mips.cc index 5a96efe9c1..acc65251e2 100644 --- a/deps/v8/src/mips/simulator-mips.cc +++ b/deps/v8/src/mips/simulator-mips.cc @@ -1722,6 +1722,7 @@ void Simulator::ConfigureTypeRegister(Instruction* instr, int64_t& i64hilo, uint64_t& u64hilo, int32_t& next_pc, + int32_t& return_addr_reg, bool& do_interrupt) { // Every local variable declared here needs to be const. // This is to make sure that changed values are sent back to @@ -1782,6 +1783,7 @@ void Simulator::ConfigureTypeRegister(Instruction* instr, case JR: case JALR: next_pc = get_register(instr->RsValue()); + return_addr_reg = instr->RdValue(); break; case SLL: alu_out = rt << sa; @@ -1986,6 +1988,7 @@ void Simulator::DecodeTypeRegister(Instruction* instr) { int32_t current_pc = get_pc(); // Next pc int32_t next_pc = 0; + int32_t return_addr_reg = 31; // Set up the variables if needed before executing the instruction. ConfigureTypeRegister(instr, @@ -1993,6 +1996,7 @@ void Simulator::DecodeTypeRegister(Instruction* instr) { i64hilo, u64hilo, next_pc, + return_addr_reg, do_interrupt); // ---------- Raise exceptions triggered. @@ -2258,7 +2262,8 @@ void Simulator::DecodeTypeRegister(Instruction* instr) { Instruction* branch_delay_instr = reinterpret_cast<Instruction*>( current_pc+Instruction::kInstrSize); BranchDelayInstructionDecode(branch_delay_instr); - set_register(31, current_pc + 2 * Instruction::kInstrSize); + set_register(return_addr_reg, + current_pc + 2 * Instruction::kInstrSize); set_pc(next_pc); pc_modified_ = true; break; diff --git a/deps/v8/src/mips/simulator-mips.h b/deps/v8/src/mips/simulator-mips.h index 601cd6d99d..d9fd10f245 100644 --- a/deps/v8/src/mips/simulator-mips.h +++ b/deps/v8/src/mips/simulator-mips.h @@ -289,6 +289,7 @@ class Simulator { int64_t& i64hilo, uint64_t& u64hilo, int32_t& next_pc, + int32_t& return_addr_reg, bool& do_interrupt); void DecodeTypeImmediate(Instruction* instr); |