diff options
Diffstat (limited to 'deps/v8/src/x64/assembler-x64.h')
-rw-r--r-- | deps/v8/src/x64/assembler-x64.h | 78 |
1 files changed, 73 insertions, 5 deletions
diff --git a/deps/v8/src/x64/assembler-x64.h b/deps/v8/src/x64/assembler-x64.h index c7f763222e..fde88df776 100644 --- a/deps/v8/src/x64/assembler-x64.h +++ b/deps/v8/src/x64/assembler-x64.h @@ -30,7 +30,7 @@ // The original source code covered by the above license above has been // modified significantly by Google Inc. -// Copyright 2006-2009 the V8 project authors. All rights reserved. +// Copyright 2010 the V8 project authors. All rights reserved. // A lightweight X64 Assembler. @@ -88,11 +88,38 @@ static inline bool is_uint32(uint64_t x) { // struct Register { + // The non-allocatable registers are: + // rsp - stack pointer + // rbp - frame pointer + // rsi - context register + // r10 - fixed scratch register + // r13 - root register + // r15 - smi constant register + static const int kNumRegisters = 16; + static const int kNumAllocatableRegisters = 10; + + static const char* AllocationIndexToString(int index) { + ASSERT(index >= 0 && index < kNumAllocatableRegisters); + const char* const names[] = { + "rax", + "rcx", + "rdx", + "rbx", + "rdi", + "r8", + "r9", + "r11", + "r12", + "r14" + }; + return names[index]; + } + static Register toRegister(int code) { Register r = { code }; return r; } - bool is_valid() const { return 0 <= code_ && code_ < 16; } + bool is_valid() const { return 0 <= code_ && code_ < kNumRegisters; } bool is(Register reg) const { return code_ == reg.code_; } int code() const { ASSERT(is_valid()); @@ -138,7 +165,37 @@ const Register no_reg = { -1 }; struct XMMRegister { - bool is_valid() const { return 0 <= code_ && code_ < 16; } + static const int kNumRegisters = 16; + static const int kNumAllocatableRegisters = 15; + + static int ToAllocationIndex(XMMRegister reg) { + ASSERT(reg.code() != 0); + return reg.code() - 1; + } + + static const char* AllocationIndexToString(int index) { + ASSERT(index >= 0 && index < kNumAllocatableRegisters); + const char* const names[] = { + "xmm1", + "xmm2", + "xmm3", + "xmm4", + "xmm5", + "xmm6", + "xmm7", + "xmm8", + "xmm9", + "xmm10", + "xmm11", + "xmm12", + "xmm13", + "xmm14", + "xmm15" + }; + return names[index]; + } + + bool is_valid() const { return 0 <= code_ && code_ < kNumRegisters; } int code() const { ASSERT(is_valid()); return code_; @@ -175,6 +232,10 @@ const XMMRegister xmm13 = { 13 }; const XMMRegister xmm14 = { 14 }; const XMMRegister xmm15 = { 15 }; + +typedef XMMRegister DoubleRegister; + + enum Condition { // any value < 0 is considered no_condition no_condition = -1, @@ -345,7 +406,7 @@ class CpuFeatures : public AllStatic { public: // Detect features of the target CPU. Set safe defaults if the serializer // is enabled (snapshots must be portable). - static void Probe(); + static void Probe(bool portable); // Check whether a feature is supported by the target CPU. static bool IsSupported(CpuFeature f) { if (f == SSE2 && !FLAG_enable_sse2) return false; @@ -1046,6 +1107,7 @@ class Assembler : public Malloced { void fld1(); void fldz(); void fldpi(); + void fldln2(); void fld_s(const Operand& adr); void fld_d(const Operand& adr); @@ -1100,6 +1162,7 @@ class Assembler : public Malloced { void fsin(); void fcos(); + void fyl2x(); void frndint(); @@ -1171,9 +1234,14 @@ class Assembler : public Malloced { void RecordDebugBreakSlot(); // Record a comment relocation entry that can be used by a disassembler. - // Use --debug_code to enable. + // Use --code-comments to enable. void RecordComment(const char* msg); + // Writes a single word of data in the code stream. + // Used for inline tables, e.g., jump-tables. + void db(uint8_t data) { UNIMPLEMENTED(); } + void dd(uint32_t data); + int pc_offset() const { return static_cast<int>(pc_ - buffer_); } PositionsRecorder* positions_recorder() { return &positions_recorder_; } |