diff options
| author | Alexandre Courbot <acourbot@nvidia.com> | 2015-12-07 15:49:00 +0900 |
|---|---|---|
| committer | Alexandre Courbot <acourbot@nvidia.com> | 2015-12-11 17:56:11 +0900 |
| commit | d19bec80b575be27119159b321a53368e408d06b (patch) | |
| tree | 1191150bdbab3bb20c3a5a122ac806d3cd4573a5 | |
| parent | 9d4de39f194bee2aa18165b8486d6f5bf295fb7f (diff) | |
| download | nouveau-d19bec80b575be27119159b321a53368e408d06b.tar.gz | |
sb: set instance block location properly for dGPU as well
| -rw-r--r-- | drm/nouveau/nvkm/core/secure_boot.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/drm/nouveau/nvkm/core/secure_boot.c b/drm/nouveau/nvkm/core/secure_boot.c index 7756db026..84aabdd99 100644 --- a/drm/nouveau/nvkm/core/secure_boot.c +++ b/drm/nouveau/nvkm/core/secure_boot.c @@ -1375,6 +1375,7 @@ sb_setup_falcon(struct nvkm_device *device) { struct secure_boot *sb = device->secure_boot_state; const u32 reg_base = sb->base + 0xe00; + u32 inst_loc; int err; err = falcon_wait_clear_halt_interrupt(device); @@ -1398,9 +1399,14 @@ sb_setup_falcon(struct nvkm_device *device) 0x4 | 0x2); /* Set context */ + if (device->fb->ram) + inst_loc = 0x0; /* FB */ + else + inst_loc = 0x3; /* Non-coherent sysmem */ + nvkm_mask(device, sb->base + 0x048, 0x1, 0x1); nvkm_wr32(device, sb->base + 0x480, ((sb->inst->addr >> 12) & 0xfffffff) - | (1 << 29) | (1 << 30)); + | (inst_loc << 28) | (1 << 30)); return 0; } |