diff options
| author | Alexandre Courbot <acourbot@nvidia.com> | 2016-02-24 14:42:22 +0900 |
|---|---|---|
| committer | Ben Skeggs <bskeggs@redhat.com> | 2016-02-25 13:22:11 +1000 |
| commit | b33eab51d19a7baefe68713d08c6e1227eaf7f58 (patch) | |
| tree | b5d9706b5100d1e215d36dec3858a273ba07ddaf | |
| parent | 8599ecc0cf922cf18c260f6be99649b3318d3d5b (diff) | |
| download | nouveau-b33eab51d19a7baefe68713d08c6e1227eaf7f58.tar.gz | |
gr/gm200: do not load firmware for secure falcons
Secure falcons' firmware is managed by secboot. Do not load it in GR for
them.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| -rw-r--r-- | drm/nouveau/nvkm/engine/gr/gm200.c | 21 |
1 files changed, 15 insertions, 6 deletions
diff --git a/drm/nouveau/nvkm/engine/gr/gm200.c b/drm/nouveau/nvkm/engine/gr/gm200.c index 24c0c45be..5e232e584 100644 --- a/drm/nouveau/nvkm/engine/gr/gm200.c +++ b/drm/nouveau/nvkm/engine/gr/gm200.c @@ -24,6 +24,8 @@ #include "gf100.h" #include "ctxgf100.h" +#include <subdev/secboot.h> + #include <nvif/class.h> /******************************************************************************* @@ -366,12 +368,19 @@ gm200_gr_new_(const struct gf100_gr_func *func, struct nvkm_device *device, if (ret) return ret; - if ((ret = gf100_gr_ctor_fw(gr, "gr/fecs_inst", &gr->fuc409c)) || - (ret = gf100_gr_ctor_fw(gr, "gr/fecs_data", &gr->fuc409d))) - return ret; - if ((ret = gf100_gr_ctor_fw(gr, "gr/gpccs_inst", &gr->fuc41ac)) || - (ret = gf100_gr_ctor_fw(gr, "gr/gpccs_data", &gr->fuc41ad))) - return ret; + /* Load firmwares for non-secure falcons */ + if (!nvkm_secboot_is_managed(device->secboot, + NVKM_SECBOOT_FALCON_FECS)) { + if ((ret = gf100_gr_ctor_fw(gr, "gr/fecs_inst", &gr->fuc409c)) || + (ret = gf100_gr_ctor_fw(gr, "gr/fecs_data", &gr->fuc409d))) + return ret; + } + if (!nvkm_secboot_is_managed(device->secboot, + NVKM_SECBOOT_FALCON_GPCCS)) { + if ((ret = gf100_gr_ctor_fw(gr, "gr/gpccs_inst", &gr->fuc41ac)) || + (ret = gf100_gr_ctor_fw(gr, "gr/gpccs_data", &gr->fuc41ad))) + return ret; + } if ((ret = gk20a_gr_av_to_init(gr, "gr/sw_nonctx", &gr->fuc_sw_nonctx)) || (ret = gk20a_gr_aiv_to_init(gr, "gr/sw_ctx", &gr->fuc_sw_ctx)) || |