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| author | Alexandre Courbot <acourbot@nvidia.com> | 2014-10-27 18:49:16 +0900 |
|---|---|---|
| committer | Ben Skeggs <bskeggs@redhat.com> | 2014-11-10 10:26:09 +1000 |
| commit | d8cedb4e3dc4449cf95e6a713de00cd1f6e47d47 (patch) | |
| tree | 8fab4f32d20cdb0a1d92fc4445989e2183002504 | |
| parent | d860f96e2c91742551cf777972daa852aa7392ae (diff) | |
| download | nouveau-d8cedb4e3dc4449cf95e6a713de00cd1f6e47d47.tar.gz | |
drm: introduce nv_device_is_cpu_coherent()
Add a function allowing us to know whether a device is CPU-coherent,
i.e. accesses performed by the CPU on GPU-mapped buffers will
be immediately visible on the GPU side and vice-versa.
For now, a device is considered to be coherent if it uses the PCI bus on
a non-ARM architecture.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| -rw-r--r-- | lib/core/os.h | 2 | ||||
| -rw-r--r-- | nvkm/include/core/device.h | 6 |
2 files changed, 8 insertions, 0 deletions
diff --git a/lib/core/os.h b/lib/core/os.h index e3fb9e4d3..aea628eb3 100644 --- a/lib/core/os.h +++ b/lib/core/os.h @@ -105,6 +105,8 @@ typedef dma_addr_t resource_size_t; #define __printf(a,b) #define __user +#define IS_ENABLED(x) (0) + static inline int order_base_2(u64 base) { diff --git a/nvkm/include/core/device.h b/nvkm/include/core/device.h index 1d9d89392..0d839e1dd 100644 --- a/nvkm/include/core/device.h +++ b/nvkm/include/core/device.h @@ -158,6 +158,12 @@ nv_device_is_pci(struct nouveau_device *device) return device->pdev != NULL; } +static inline bool +nv_device_is_cpu_coherent(struct nouveau_device *device) +{ + return (!IS_ENABLED(CONFIG_ARM) && nv_device_is_pci(device)); +} + static inline struct device * nv_device_base(struct nouveau_device *device) { |