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| author | Alexandre Courbot <acourbot@nvidia.com> | 2017-02-23 18:14:30 +0900 |
|---|---|---|
| committer | Alexandre Courbot <acourbot@nvidia.com> | 2017-02-28 19:08:05 +0900 |
| commit | dcaec3409f0fbf1228049dfbbe9cdc9fd47ac7d1 (patch) | |
| tree | 96f18176269a66f93a37db0244de2b3f098b9084 | |
| parent | 5c27f33a308f0816a05a24f198f4bbf29fc65f37 (diff) | |
| download | nouveau-dcaec3409f0fbf1228049dfbbe9cdc9fd47ac7d1.tar.gz | |
falcon/msgqueue: add SEC2 support
Add support for running a msgqueue on the SEC2 falcon.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
| -rw-r--r-- | drm/nouveau/nvkm/falcon/msgqueue.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drm/nouveau/nvkm/falcon/msgqueue.c b/drm/nouveau/nvkm/falcon/msgqueue.c index 8583fe1c2..59ed1c45b 100644 --- a/drm/nouveau/nvkm/falcon/msgqueue.c +++ b/drm/nouveau/nvkm/falcon/msgqueue.c @@ -396,6 +396,9 @@ msgqueue_handle_init_msg(struct nvkm_msgqueue *priv, case NVKM_SUBDEV_PMU: tail_reg = 0x4cc; break; + case NVKM_ENGINE_SEC2: + tail_reg = 0xa34; + break; default: nvkm_error(subdev, "falcon %s unsupported for msgqueue!\n", nvkm_subdev_name[falcon->owner->index]); |