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author | Alexandre Courbot <acourbot@nvidia.com> | 2015-04-29 23:04:23 +0900 |
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committer | Alexandre Courbot <acourbot@nvidia.com> | 2015-06-08 17:42:23 +0900 |
commit | 16942d593eb931b81f617a4b1a57fa9211ae2f92 (patch) | |
tree | 62bc0fc04747ff7b9c4c6b1785bdcec5a9f8f5d1 | |
parent | 8caa6bad9ab78dbb08aae45bc85fd8e97cf0c23a (diff) | |
download | nouveau-16942d593eb931b81f617a4b1a57fa9211ae2f92.tar.gz |
gr/gf100: wait on bottom half of FE's pipeline
When emitting the ICMD bundle, wait on the bottom half (bit 3 of the
GR_STATUS register) instead of upper half (bit 2) to make sure methods
are effectively emitted.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
-rw-r--r-- | drm/nouveau/nvkm/engine/gr/gf100.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drm/nouveau/nvkm/engine/gr/gf100.c b/drm/nouveau/nvkm/engine/gr/gf100.c index 5606c25e5..01efc2c96 100644 --- a/drm/nouveau/nvkm/engine/gr/gf100.c +++ b/drm/nouveau/nvkm/engine/gr/gf100.c @@ -699,7 +699,7 @@ gf100_gr_icmd(struct gf100_gr_priv *priv, const struct gf100_gr_pack *p) while (addr < next) { nv_wr32(priv, 0x400200, addr); - nv_wait(priv, 0x400700, 0x00000002, 0x00000000); + nv_wait(priv, 0x400700, 0x00000004, 0x00000000); addr += init->pitch; } } |