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| author | Ben Skeggs <bskeggs@redhat.com> | 2015-01-14 15:22:43 +1000 |
|---|---|---|
| committer | Ben Skeggs <bskeggs@redhat.com> | 2015-01-19 15:42:02 +1000 |
| commit | 79a618a9425b44046abb12f257fcff519bff796a (patch) | |
| tree | 40ff0bfaf568455c9517c051d2370771f4c54fe2 /drm/nouveau/nvkm/engine/device | |
| parent | 8b2b3bfe00659c2702e02220c0f471009756a9f7 (diff) | |
| download | nouveau-79a618a9425b44046abb12f257fcff519bff796a.tar.gz | |
cipher: namespace + nvidia gpu names (no binary change)
The namespace of NVKM is being changed to nvkm_ instead of nouveau_,
which will be used for the DRM part of the driver. This is being
done in order to make it very clear as to what part of the driver a
given symbol belongs to, and as a minor step towards splitting the
DRM driver out to be able to stand on its own (for virt).
Because there's already a large amount of churn here anyway, this is
as good a time as any to also switch to NVIDIA's device and chipset
naming to ease collaboration with them.
A comparison of objdump disassemblies proves no code changes.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drm/nouveau/nvkm/engine/device')
| -rw-r--r-- | drm/nouveau/nvkm/engine/device/nv50.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/drm/nouveau/nvkm/engine/device/nv50.c b/drm/nouveau/nvkm/engine/device/nv50.c index 88353d339..72a90c745 100644 --- a/drm/nouveau/nvkm/engine/device/nv50.c +++ b/drm/nouveau/nvkm/engine/device/nv50.c @@ -111,7 +111,7 @@ nv50_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &nv84_mpeg_oclass; device->oclass[NVDEV_ENGINE_VP ] = &nv84_vp_oclass; - device->oclass[NVDEV_ENGINE_CIPHER ] = &nv84_cipher_oclass; + device->oclass[NVDEV_ENGINE_CIPHER ] = &g84_cipher_oclass; device->oclass[NVDEV_ENGINE_BSP ] = &g84_bsp_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv84_disp_oclass; device->oclass[NVDEV_ENGINE_PM ] = nv84_pm_oclass; @@ -140,7 +140,7 @@ nv50_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &nv84_mpeg_oclass; device->oclass[NVDEV_ENGINE_VP ] = &nv84_vp_oclass; - device->oclass[NVDEV_ENGINE_CIPHER ] = &nv84_cipher_oclass; + device->oclass[NVDEV_ENGINE_CIPHER ] = &g84_cipher_oclass; device->oclass[NVDEV_ENGINE_BSP ] = &g84_bsp_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv84_disp_oclass; device->oclass[NVDEV_ENGINE_PM ] = nv84_pm_oclass; @@ -169,7 +169,7 @@ nv50_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &nv84_mpeg_oclass; device->oclass[NVDEV_ENGINE_VP ] = &nv84_vp_oclass; - device->oclass[NVDEV_ENGINE_CIPHER ] = &nv84_cipher_oclass; + device->oclass[NVDEV_ENGINE_CIPHER ] = &g84_cipher_oclass; device->oclass[NVDEV_ENGINE_BSP ] = &g84_bsp_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv84_disp_oclass; device->oclass[NVDEV_ENGINE_PM ] = nv84_pm_oclass; @@ -198,7 +198,7 @@ nv50_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &nv84_mpeg_oclass; device->oclass[NVDEV_ENGINE_VP ] = &nv84_vp_oclass; - device->oclass[NVDEV_ENGINE_CIPHER ] = &nv84_cipher_oclass; + device->oclass[NVDEV_ENGINE_CIPHER ] = &g84_cipher_oclass; device->oclass[NVDEV_ENGINE_BSP ] = &g84_bsp_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv94_disp_oclass; device->oclass[NVDEV_ENGINE_PM ] = nv84_pm_oclass; @@ -227,7 +227,7 @@ nv50_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &nv84_mpeg_oclass; device->oclass[NVDEV_ENGINE_VP ] = &nv84_vp_oclass; - device->oclass[NVDEV_ENGINE_CIPHER ] = &nv84_cipher_oclass; + device->oclass[NVDEV_ENGINE_CIPHER ] = &g84_cipher_oclass; device->oclass[NVDEV_ENGINE_BSP ] = &g84_bsp_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv94_disp_oclass; device->oclass[NVDEV_ENGINE_PM ] = nv84_pm_oclass; @@ -285,7 +285,7 @@ nv50_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &nv84_mpeg_oclass; device->oclass[NVDEV_ENGINE_VP ] = &nv84_vp_oclass; - device->oclass[NVDEV_ENGINE_CIPHER ] = &nv84_cipher_oclass; + device->oclass[NVDEV_ENGINE_CIPHER ] = &g84_cipher_oclass; device->oclass[NVDEV_ENGINE_BSP ] = &g84_bsp_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nva0_disp_oclass; device->oclass[NVDEV_ENGINE_PM ] = nv84_pm_oclass; |