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authorBen Skeggs <bskeggs@redhat.com>2015-01-14 15:08:21 +1000
committerBen Skeggs <bskeggs@redhat.com>2015-01-19 15:42:01 +1000
commit3f13efb6c376e5d5ced60b0a819d03d0e1317ddf (patch)
tree029ee30e0d2828336ac23e3b7b4e740c249686b4 /drm/nouveau/nvkm/subdev/mc/nv44.c
parentd1c70b0826ae9d409a02586a34f36f24491b2b2f (diff)
downloadnouveau-3f13efb6c376e5d5ced60b0a819d03d0e1317ddf.tar.gz
mc: namespace + nvidia gpu names (no binary change)
The namespace of NVKM is being changed to nvkm_ instead of nouveau_, which will be used for the DRM part of the driver. This is being done in order to make it very clear as to what part of the driver a given symbol belongs to, and as a minor step towards splitting the DRM driver out to be able to stand on its own (for virt). Because there's already a large amount of churn here anyway, this is as good a time as any to also switch to NVIDIA's device and chipset naming to ease collaboration with them. A comparison of objdump disassemblies proves no code changes. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drm/nouveau/nvkm/subdev/mc/nv44.c')
-rw-r--r--drm/nouveau/nvkm/subdev/mc/nv44.c15
1 files changed, 7 insertions, 8 deletions
diff --git a/drm/nouveau/nvkm/subdev/mc/nv44.c b/drm/nouveau/nvkm/subdev/mc/nv44.c
index cc4d0d2d8..2c7f7c701 100644
--- a/drm/nouveau/nvkm/subdev/mc/nv44.c
+++ b/drm/nouveau/nvkm/subdev/mc/nv44.c
@@ -21,11 +21,10 @@
*
* Authors: Ben Skeggs
*/
-
#include "nv04.h"
int
-nv44_mc_init(struct nouveau_object *object)
+nv44_mc_init(struct nvkm_object *object)
{
struct nv04_mc_priv *priv = (void *)object;
u32 tmp = nv_rd32(priv, 0x10020c);
@@ -37,17 +36,17 @@ nv44_mc_init(struct nouveau_object *object)
nv_wr32(priv, 0x001708, 0);
nv_wr32(priv, 0x00170c, tmp);
- return nouveau_mc_init(&priv->base);
+ return nvkm_mc_init(&priv->base);
}
-struct nouveau_oclass *
-nv44_mc_oclass = &(struct nouveau_mc_oclass) {
+struct nvkm_oclass *
+nv44_mc_oclass = &(struct nvkm_mc_oclass) {
.base.handle = NV_SUBDEV(MC, 0x44),
- .base.ofuncs = &(struct nouveau_ofuncs) {
+ .base.ofuncs = &(struct nvkm_ofuncs) {
.ctor = nv04_mc_ctor,
- .dtor = _nouveau_mc_dtor,
+ .dtor = _nvkm_mc_dtor,
.init = nv44_mc_init,
- .fini = _nouveau_mc_fini,
+ .fini = _nvkm_mc_fini,
},
.intr = nv04_mc_intr,
.msi_rearm = nv40_mc_msi_rearm,