diff options
| author | Roy Spliet <rspliet@eclipso.eu> | 2015-05-23 10:37:43 +0200 |
|---|---|---|
| committer | Ben Skeggs <bskeggs@redhat.com> | 2015-08-28 12:37:22 +1000 |
| commit | f9d195337f8c0531600c49e4ee1a091d2f2beb3d (patch) | |
| tree | 37a05e5adf5cd7ffe54b64413574b05f6f3e9661 /drm/nouveau/nvkm/subdev | |
| parent | 57f843ca24dbdf3723dd55eb9f6151926c372760 (diff) | |
| download | nouveau-f9d195337f8c0531600c49e4ee1a091d2f2beb3d.tar.gz | |
bios/rammap: Pull DLLoff bit out of version 0x10 struct
In preparation of NV50 reclocking, where there is no version
Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drm/nouveau/nvkm/subdev')
| -rw-r--r-- | drm/nouveau/nvkm/subdev/bios/rammap.c | 2 | ||||
| -rw-r--r-- | drm/nouveau/nvkm/subdev/fb/gddr3.c | 2 | ||||
| -rw-r--r-- | drm/nouveau/nvkm/subdev/fb/ramgt215.c | 6 | ||||
| -rw-r--r-- | drm/nouveau/nvkm/subdev/fb/sddr2.c | 2 | ||||
| -rw-r--r-- | drm/nouveau/nvkm/subdev/fb/sddr3.c | 2 |
5 files changed, 7 insertions, 7 deletions
diff --git a/drm/nouveau/nvkm/subdev/bios/rammap.c b/drm/nouveau/nvkm/subdev/bios/rammap.c index 8b17bb4b2..a688d3b4e 100644 --- a/drm/nouveau/nvkm/subdev/bios/rammap.c +++ b/drm/nouveau/nvkm/subdev/bios/rammap.c @@ -157,7 +157,7 @@ nvbios_rammapSp(struct nvkm_bios *bios, u32 data, p->ramcfg_10_02_08 = (nv_ro08(bios, data + 0x02) & 0x08) >> 3; p->ramcfg_10_02_10 = (nv_ro08(bios, data + 0x02) & 0x10) >> 4; p->ramcfg_10_02_20 = (nv_ro08(bios, data + 0x02) & 0x20) >> 5; - p->ramcfg_10_DLLoff = (nv_ro08(bios, data + 0x02) & 0x40) >> 6; + p->ramcfg_DLLoff = (nv_ro08(bios, data + 0x02) & 0x40) >> 6; p->ramcfg_10_03_0f = (nv_ro08(bios, data + 0x03) & 0x0f) >> 0; p->ramcfg_10_04_01 = (nv_ro08(bios, data + 0x04) & 0x01) >> 0; p->ramcfg_10_05 = (nv_ro08(bios, data + 0x05) & 0xff) >> 0; diff --git a/drm/nouveau/nvkm/subdev/fb/gddr3.c b/drm/nouveau/nvkm/subdev/fb/gddr3.c index 15b462ae3..e1d11f709 100644 --- a/drm/nouveau/nvkm/subdev/fb/gddr3.c +++ b/drm/nouveau/nvkm/subdev/fb/gddr3.c @@ -77,7 +77,7 @@ nvkm_gddr3_calc(struct nvkm_ram *ram) CWL = ram->next->bios.timing_10_CWL; CL = ram->next->bios.timing_10_CL; WR = ram->next->bios.timing_10_WR; - DLL = !ram->next->bios.ramcfg_10_DLLoff; + DLL = !ram->next->bios.ramcfg_DLLoff; ODT = ram->next->bios.timing_10_ODT; break; case 0x20: diff --git a/drm/nouveau/nvkm/subdev/fb/ramgt215.c b/drm/nouveau/nvkm/subdev/fb/ramgt215.c index 24176401b..47d53edbf 100644 --- a/drm/nouveau/nvkm/subdev/fb/ramgt215.c +++ b/drm/nouveau/nvkm/subdev/fb/ramgt215.c @@ -590,7 +590,7 @@ gt215_ram_calc(struct nvkm_fb *pfb, u32 freq) r100da0 = 0x00000000; } - if (!next->bios.ramcfg_10_DLLoff) + if (!next->bios.ramcfg_DLLoff) r004018 |= 0x00004000; /* pll2pll requires to switch to a safe clock first */ @@ -630,7 +630,7 @@ gt215_ram_calc(struct nvkm_fb *pfb, u32 freq) } /* If we're disabling the DLL, do it now */ - switch (next->bios.ramcfg_10_DLLoff * ram->base.type) { + switch (next->bios.ramcfg_DLLoff * ram->base.type) { case NV_MEM_TYPE_DDR3: nvkm_sddr3_dll_disable(fuc, ram->base.mr); break; @@ -810,7 +810,7 @@ gt215_ram_calc(struct nvkm_fb *pfb, u32 freq) gt215_ram_fbvref(fuc, 1); /* Reset DLL */ - if (!next->bios.ramcfg_10_DLLoff) + if (!next->bios.ramcfg_DLLoff) nvkm_sddr2_dll_reset(fuc); if (ram->base.type == NV_MEM_TYPE_GDDR3) { diff --git a/drm/nouveau/nvkm/subdev/fb/sddr2.c b/drm/nouveau/nvkm/subdev/fb/sddr2.c index afab42df2..86bf67456 100644 --- a/drm/nouveau/nvkm/subdev/fb/sddr2.c +++ b/drm/nouveau/nvkm/subdev/fb/sddr2.c @@ -65,7 +65,7 @@ nvkm_sddr2_calc(struct nvkm_ram *ram) case 0x10: CL = ram->next->bios.timing_10_CL; WR = ram->next->bios.timing_10_WR; - DLL = !ram->next->bios.ramcfg_10_DLLoff; + DLL = !ram->next->bios.ramcfg_DLLoff; ODT = ram->next->bios.timing_10_ODT & 3; break; case 0x20: diff --git a/drm/nouveau/nvkm/subdev/fb/sddr3.c b/drm/nouveau/nvkm/subdev/fb/sddr3.c index 10844355c..77c53f955 100644 --- a/drm/nouveau/nvkm/subdev/fb/sddr3.c +++ b/drm/nouveau/nvkm/subdev/fb/sddr3.c @@ -79,7 +79,7 @@ nvkm_sddr3_calc(struct nvkm_ram *ram) CWL = ram->next->bios.timing_10_CWL; CL = ram->next->bios.timing_10_CL; WR = ram->next->bios.timing_10_WR; - DLL = !ram->next->bios.ramcfg_10_DLLoff; + DLL = !ram->next->bios.ramcfg_DLLoff; ODT = ram->next->bios.timing_10_ODT; break; case 0x20: |