diff options
| author | Alexandre Courbot <acourbot@nvidia.com> | 2014-10-30 18:21:25 +0900 |
|---|---|---|
| committer | Alexandre Courbot <acourbot@nvidia.com> | 2014-11-11 18:59:43 +0900 |
| commit | b0cfd481fffce1302b4221fb0e56baff6fe2c994 (patch) | |
| tree | f47136794eae6f0b6254199ba1b379940016b866 /drm/nv84_fence.c | |
| parent | d337b253ef0562d4f02a06bfdbd44445e2938b7a (diff) | |
| download | nouveau-gk20a_next.tar.gz | |
fb/ramgk20a: support IOMMU if presentgk20a_next
Tegra SoCs come with an IOMMU that can make physically non-contiguous
regions of memory appear contiguous to the GPU. This patch adds support
for this unit if present. This greatly optimizes memory usage and allows
GK20A to perform without CMA.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Diffstat (limited to 'drm/nv84_fence.c')
| -rw-r--r-- | drm/nv84_fence.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drm/nv84_fence.c b/drm/nv84_fence.c index 4d79be755..1adb246ab 100644 --- a/drm/nv84_fence.c +++ b/drm/nv84_fence.c @@ -232,9 +232,9 @@ nv84_fence_create(struct nouveau_drm *drm) priv->base.uevent = true; ret = nouveau_bo_new(drm->dev, 16 * priv->base.contexts, 0, - TTM_PL_FLAG_VRAM, 0, 0, NULL, NULL, &priv->bo); + TTM_PL_FLAG_TT | TTM_PL_FLAG_UNCACHED, 0, 0, NULL, NULL, &priv->bo); if (ret == 0) { - ret = nouveau_bo_pin(priv->bo, TTM_PL_FLAG_VRAM); + ret = nouveau_bo_pin(priv->bo, TTM_PL_FLAG_TT); if (ret == 0) { ret = nouveau_bo_map(priv->bo); if (ret) |