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| author | Ben Skeggs <bskeggs@redhat.com> | 2013-10-14 14:58:16 +1000 |
|---|---|---|
| committer | Ben Skeggs <bskeggs@redhat.com> | 2013-11-05 16:15:45 +1000 |
| commit | 48a33fdcef8b9b1d91444576e6bac85edeac396d (patch) | |
| tree | 194935d2473489539c52dadf590a7cb0f21fa5e5 /lib | |
| parent | 893405de8273bfb37ac1fed5bc0ef5d75ebcbe1d (diff) | |
| download | nouveau-48a33fdcef8b9b1d91444576e6bac85edeac396d.tar.gz | |
mc/nv50-nv86,nv92: rearm msi via pci config space, rather than mmio mirror
This is what NVIDIA do on these chipsets, let's hope it works around
the reported MSI failures for us on NV86.
v2: updated to include G92, as per information provided by NVIDIA.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/core/os.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/lib/core/os.h b/lib/core/os.h index 5cf75ce9d..eda6a4d82 100644 --- a/lib/core/os.h +++ b/lib/core/os.h @@ -515,6 +515,12 @@ pci_find_capability(struct pci_dev *pdev, int cap) return 0; } +static inline int +pci_write_config_byte(struct pci_dev *pdev, int addr, u8 data) +{ + return pci_device_cfg_write_u8(pdev->pdev, data, addr); +} + static inline u64 pci_resource_start(struct pci_dev *pdev, int bar) { |