diff options
Diffstat (limited to 'drm/nouveau/nvkm/engine/device/base.c')
| -rw-r--r-- | drm/nouveau/nvkm/engine/device/base.c | 138 |
1 files changed, 69 insertions, 69 deletions
diff --git a/drm/nouveau/nvkm/engine/device/base.c b/drm/nouveau/nvkm/engine/device/base.c index d1ee594df..96ac8804c 100644 --- a/drm/nouveau/nvkm/engine/device/base.c +++ b/drm/nouveau/nvkm/engine/device/base.c @@ -83,7 +83,7 @@ nv4_chipset = { .fb = nv04_fb_new, .i2c = nv04_i2c_new, .imem = nv04_instmem_new, -// .mc = nv04_mc_new, + .mc = nv04_mc_new, // .mmu = nv04_mmu_new, // .timer = nv04_timer_new, // .disp = nv04_disp_new, @@ -103,7 +103,7 @@ nv5_chipset = { .fb = nv04_fb_new, .i2c = nv04_i2c_new, .imem = nv04_instmem_new, -// .mc = nv04_mc_new, + .mc = nv04_mc_new, // .mmu = nv04_mmu_new, // .timer = nv04_timer_new, // .disp = nv04_disp_new, @@ -124,7 +124,7 @@ nv10_chipset = { .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, .imem = nv04_instmem_new, -// .mc = nv04_mc_new, + .mc = nv04_mc_new, // .mmu = nv04_mmu_new, // .timer = nv04_timer_new, // .disp = nv04_disp_new, @@ -143,7 +143,7 @@ nv11_chipset = { .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, .imem = nv04_instmem_new, -// .mc = nv04_mc_new, + .mc = nv04_mc_new, // .mmu = nv04_mmu_new, // .timer = nv04_timer_new, // .disp = nv04_disp_new, @@ -164,7 +164,7 @@ nv15_chipset = { .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, .imem = nv04_instmem_new, -// .mc = nv04_mc_new, + .mc = nv04_mc_new, // .mmu = nv04_mmu_new, // .timer = nv04_timer_new, // .disp = nv04_disp_new, @@ -185,7 +185,7 @@ nv17_chipset = { .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, .imem = nv04_instmem_new, -// .mc = nv04_mc_new, + .mc = nv04_mc_new, // .mmu = nv04_mmu_new, // .timer = nv04_timer_new, // .disp = nv04_disp_new, @@ -206,7 +206,7 @@ nv18_chipset = { .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, .imem = nv04_instmem_new, -// .mc = nv04_mc_new, + .mc = nv04_mc_new, // .mmu = nv04_mmu_new, // .timer = nv04_timer_new, // .disp = nv04_disp_new, @@ -227,7 +227,7 @@ nv1a_chipset = { .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, .imem = nv04_instmem_new, -// .mc = nv04_mc_new, + .mc = nv04_mc_new, // .mmu = nv04_mmu_new, // .timer = nv04_timer_new, // .disp = nv04_disp_new, @@ -248,7 +248,7 @@ nv1f_chipset = { .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, .imem = nv04_instmem_new, -// .mc = nv04_mc_new, + .mc = nv04_mc_new, // .mmu = nv04_mmu_new, // .timer = nv04_timer_new, // .disp = nv04_disp_new, @@ -269,7 +269,7 @@ nv20_chipset = { .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, .imem = nv04_instmem_new, -// .mc = nv04_mc_new, + .mc = nv04_mc_new, // .mmu = nv04_mmu_new, // .timer = nv04_timer_new, // .disp = nv04_disp_new, @@ -290,7 +290,7 @@ nv25_chipset = { .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, .imem = nv04_instmem_new, -// .mc = nv04_mc_new, + .mc = nv04_mc_new, // .mmu = nv04_mmu_new, // .timer = nv04_timer_new, // .disp = nv04_disp_new, @@ -311,7 +311,7 @@ nv28_chipset = { .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, .imem = nv04_instmem_new, -// .mc = nv04_mc_new, + .mc = nv04_mc_new, // .mmu = nv04_mmu_new, // .timer = nv04_timer_new, // .disp = nv04_disp_new, @@ -332,7 +332,7 @@ nv2a_chipset = { .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, .imem = nv04_instmem_new, -// .mc = nv04_mc_new, + .mc = nv04_mc_new, // .mmu = nv04_mmu_new, // .timer = nv04_timer_new, // .disp = nv04_disp_new, @@ -353,7 +353,7 @@ nv30_chipset = { .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, .imem = nv04_instmem_new, -// .mc = nv04_mc_new, + .mc = nv04_mc_new, // .mmu = nv04_mmu_new, // .timer = nv04_timer_new, // .disp = nv04_disp_new, @@ -374,7 +374,7 @@ nv31_chipset = { .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, .imem = nv04_instmem_new, -// .mc = nv04_mc_new, + .mc = nv04_mc_new, // .mmu = nv04_mmu_new, // .timer = nv04_timer_new, // .disp = nv04_disp_new, @@ -396,7 +396,7 @@ nv34_chipset = { .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, .imem = nv04_instmem_new, -// .mc = nv04_mc_new, + .mc = nv04_mc_new, // .mmu = nv04_mmu_new, // .timer = nv04_timer_new, // .disp = nv04_disp_new, @@ -418,7 +418,7 @@ nv35_chipset = { .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, .imem = nv04_instmem_new, -// .mc = nv04_mc_new, + .mc = nv04_mc_new, // .mmu = nv04_mmu_new, // .timer = nv04_timer_new, // .disp = nv04_disp_new, @@ -439,7 +439,7 @@ nv36_chipset = { .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, .imem = nv04_instmem_new, -// .mc = nv04_mc_new, + .mc = nv04_mc_new, // .mmu = nv04_mmu_new, // .timer = nv04_timer_new, // .disp = nv04_disp_new, @@ -461,7 +461,7 @@ nv40_chipset = { .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, .imem = nv40_instmem_new, -// .mc = nv40_mc_new, + .mc = nv40_mc_new, // .mmu = nv04_mmu_new, // .therm = nv40_therm_new, // .timer = nv04_timer_new, @@ -486,7 +486,7 @@ nv41_chipset = { .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, .imem = nv40_instmem_new, -// .mc = nv40_mc_new, + .mc = nv40_mc_new, // .mmu = nv41_mmu_new, // .therm = nv40_therm_new, // .timer = nv04_timer_new, @@ -511,7 +511,7 @@ nv42_chipset = { .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, .imem = nv40_instmem_new, -// .mc = nv40_mc_new, + .mc = nv40_mc_new, // .mmu = nv41_mmu_new, // .therm = nv40_therm_new, // .timer = nv04_timer_new, @@ -536,7 +536,7 @@ nv43_chipset = { .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, .imem = nv40_instmem_new, -// .mc = nv40_mc_new, + .mc = nv40_mc_new, // .mmu = nv41_mmu_new, // .therm = nv40_therm_new, // .timer = nv04_timer_new, @@ -561,7 +561,7 @@ nv44_chipset = { .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, .imem = nv40_instmem_new, -// .mc = nv44_mc_new, + .mc = nv44_mc_new, // .mmu = nv44_mmu_new, // .therm = nv40_therm_new, // .timer = nv04_timer_new, @@ -586,7 +586,7 @@ nv45_chipset = { .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, .imem = nv40_instmem_new, -// .mc = nv40_mc_new, + .mc = nv40_mc_new, // .mmu = nv04_mmu_new, // .therm = nv40_therm_new, // .timer = nv04_timer_new, @@ -611,7 +611,7 @@ nv46_chipset = { .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, .imem = nv40_instmem_new, -// .mc = nv44_mc_new, + .mc = nv44_mc_new, // .mmu = nv44_mmu_new, // .therm = nv40_therm_new, // .timer = nv04_timer_new, @@ -636,7 +636,7 @@ nv47_chipset = { .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, .imem = nv40_instmem_new, -// .mc = nv40_mc_new, + .mc = nv40_mc_new, // .mmu = nv41_mmu_new, // .therm = nv40_therm_new, // .timer = nv04_timer_new, @@ -661,7 +661,7 @@ nv49_chipset = { .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, .imem = nv40_instmem_new, -// .mc = nv40_mc_new, + .mc = nv40_mc_new, // .mmu = nv41_mmu_new, // .therm = nv40_therm_new, // .timer = nv04_timer_new, @@ -686,7 +686,7 @@ nv4a_chipset = { .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, .imem = nv40_instmem_new, -// .mc = nv44_mc_new, + .mc = nv44_mc_new, // .mmu = nv44_mmu_new, // .therm = nv40_therm_new, // .timer = nv04_timer_new, @@ -711,7 +711,7 @@ nv4b_chipset = { .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, .imem = nv40_instmem_new, -// .mc = nv40_mc_new, + .mc = nv40_mc_new, // .mmu = nv41_mmu_new, // .therm = nv40_therm_new, // .timer = nv04_timer_new, @@ -736,7 +736,7 @@ nv4c_chipset = { .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, .imem = nv40_instmem_new, -// .mc = nv4c_mc_new, + .mc = nv4c_mc_new, // .mmu = nv44_mmu_new, // .therm = nv40_therm_new, // .timer = nv04_timer_new, @@ -761,7 +761,7 @@ nv4e_chipset = { .gpio = nv10_gpio_new, .i2c = nv4e_i2c_new, .imem = nv40_instmem_new, -// .mc = nv4c_mc_new, + .mc = nv4c_mc_new, // .mmu = nv44_mmu_new, // .therm = nv40_therm_new, // .timer = nv04_timer_new, @@ -788,7 +788,7 @@ nv50_chipset = { .gpio = nv50_gpio_new, .i2c = nv50_i2c_new, .imem = nv50_instmem_new, -// .mc = nv50_mc_new, + .mc = nv50_mc_new, // .mmu = nv50_mmu_new, // .mxm = nv50_mxm_new, // .therm = nv50_therm_new, @@ -814,7 +814,7 @@ nv63_chipset = { .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, .imem = nv40_instmem_new, -// .mc = nv4c_mc_new, + .mc = nv4c_mc_new, // .mmu = nv44_mmu_new, // .therm = nv40_therm_new, // .timer = nv04_timer_new, @@ -839,7 +839,7 @@ nv67_chipset = { .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, .imem = nv40_instmem_new, -// .mc = nv4c_mc_new, + .mc = nv4c_mc_new, // .mmu = nv44_mmu_new, // .therm = nv40_therm_new, // .timer = nv04_timer_new, @@ -864,7 +864,7 @@ nv68_chipset = { .gpio = nv10_gpio_new, .i2c = nv04_i2c_new, .imem = nv40_instmem_new, -// .mc = nv4c_mc_new, + .mc = nv4c_mc_new, // .mmu = nv44_mmu_new, // .therm = nv40_therm_new, // .timer = nv04_timer_new, @@ -891,7 +891,7 @@ nv84_chipset = { .gpio = nv50_gpio_new, .i2c = nv50_i2c_new, .imem = nv50_instmem_new, -// .mc = nv50_mc_new, + .mc = nv50_mc_new, // .mmu = nv50_mmu_new, // .mxm = nv50_mxm_new, // .therm = g84_therm_new, @@ -922,7 +922,7 @@ nv86_chipset = { .gpio = nv50_gpio_new, .i2c = nv50_i2c_new, .imem = nv50_instmem_new, -// .mc = nv50_mc_new, + .mc = nv50_mc_new, // .mmu = nv50_mmu_new, // .mxm = nv50_mxm_new, // .therm = g84_therm_new, @@ -953,7 +953,7 @@ nv92_chipset = { .gpio = nv50_gpio_new, .i2c = nv50_i2c_new, .imem = nv50_instmem_new, -// .mc = nv50_mc_new, + .mc = nv50_mc_new, // .mmu = nv50_mmu_new, // .mxm = nv50_mxm_new, // .therm = g84_therm_new, @@ -984,7 +984,7 @@ nv94_chipset = { .gpio = g94_gpio_new, .i2c = g94_i2c_new, .imem = nv50_instmem_new, -// .mc = g94_mc_new, + .mc = g94_mc_new, // .mmu = nv50_mmu_new, // .mxm = nv50_mxm_new, // .therm = g84_therm_new, @@ -1013,7 +1013,7 @@ nv96_chipset = { // .therm = g84_therm_new, // .mxm = nv50_mxm_new, .devinit = g84_devinit_new, -// .mc = g94_mc_new, + .mc = g94_mc_new, .bus = g94_bus_new, // .timer = nv04_timer_new, .fb = g84_fb_new, @@ -1044,7 +1044,7 @@ nv98_chipset = { // .therm = g84_therm_new, // .mxm = nv50_mxm_new, .devinit = g98_devinit_new, -// .mc = g98_mc_new, + .mc = g98_mc_new, .bus = g94_bus_new, // .timer = nv04_timer_new, .fb = g84_fb_new, @@ -1077,7 +1077,7 @@ nva0_chipset = { .gpio = g94_gpio_new, .i2c = nv50_i2c_new, .imem = nv50_instmem_new, -// .mc = g98_mc_new, + .mc = g98_mc_new, // .mmu = nv50_mmu_new, // .mxm = nv50_mxm_new, // .therm = g84_therm_new, @@ -1108,7 +1108,7 @@ nva3_chipset = { .gpio = g94_gpio_new, .i2c = g94_i2c_new, .imem = nv50_instmem_new, -// .mc = g98_mc_new, + .mc = g98_mc_new, // .mmu = nv50_mmu_new, // .mxm = nv50_mxm_new, // .pmu = gt215_pmu_new, @@ -1141,7 +1141,7 @@ nva5_chipset = { .gpio = g94_gpio_new, .i2c = g94_i2c_new, .imem = nv50_instmem_new, -// .mc = g98_mc_new, + .mc = g98_mc_new, // .mmu = nv50_mmu_new, // .mxm = nv50_mxm_new, // .pmu = gt215_pmu_new, @@ -1173,7 +1173,7 @@ nva8_chipset = { .gpio = g94_gpio_new, .i2c = g94_i2c_new, .imem = nv50_instmem_new, -// .mc = g98_mc_new, + .mc = g98_mc_new, // .mmu = nv50_mmu_new, // .mxm = nv50_mxm_new, // .pmu = gt215_pmu_new, @@ -1205,7 +1205,7 @@ nvaa_chipset = { .gpio = g94_gpio_new, .i2c = g94_i2c_new, .imem = nv50_instmem_new, -// .mc = g98_mc_new, + .mc = g98_mc_new, // .mmu = nv50_mmu_new, // .mxm = nv50_mxm_new, // .therm = g84_therm_new, @@ -1236,7 +1236,7 @@ nvac_chipset = { .gpio = g94_gpio_new, .i2c = g94_i2c_new, .imem = nv50_instmem_new, -// .mc = g98_mc_new, + .mc = g98_mc_new, // .mmu = nv50_mmu_new, // .mxm = nv50_mxm_new, // .therm = g84_therm_new, @@ -1267,7 +1267,7 @@ nvaf_chipset = { .gpio = g94_gpio_new, .i2c = g94_i2c_new, .imem = nv50_instmem_new, -// .mc = g98_mc_new, + .mc = g98_mc_new, // .mmu = nv50_mmu_new, // .mxm = nv50_mxm_new, // .pmu = gt215_pmu_new, @@ -1301,7 +1301,7 @@ nvc0_chipset = { .ibus = gf100_ibus_new, .imem = nv50_instmem_new, .ltc = gf100_ltc_new, -// .mc = gf100_mc_new, + .mc = gf100_mc_new, // .mmu = gf100_mmu_new, // .mxm = nv50_mxm_new, // .pmu = gf100_pmu_new, @@ -1336,7 +1336,7 @@ nvc1_chipset = { .ibus = gf100_ibus_new, .imem = nv50_instmem_new, .ltc = gf100_ltc_new, -// .mc = gf106_mc_new, + .mc = gf106_mc_new, // .mmu = gf100_mmu_new, // .mxm = nv50_mxm_new, // .pmu = gf100_pmu_new, @@ -1370,7 +1370,7 @@ nvc3_chipset = { .ibus = gf100_ibus_new, .imem = nv50_instmem_new, .ltc = gf100_ltc_new, -// .mc = gf106_mc_new, + .mc = gf106_mc_new, // .mmu = gf100_mmu_new, // .mxm = nv50_mxm_new, // .pmu = gf100_pmu_new, @@ -1404,7 +1404,7 @@ nvc4_chipset = { .ibus = gf100_ibus_new, .imem = nv50_instmem_new, .ltc = gf100_ltc_new, -// .mc = gf100_mc_new, + .mc = gf100_mc_new, // .mmu = gf100_mmu_new, // .mxm = nv50_mxm_new, // .pmu = gf100_pmu_new, @@ -1439,7 +1439,7 @@ nvc8_chipset = { .ibus = gf100_ibus_new, .imem = nv50_instmem_new, .ltc = gf100_ltc_new, -// .mc = gf100_mc_new, + .mc = gf100_mc_new, // .mmu = gf100_mmu_new, // .mxm = nv50_mxm_new, // .pmu = gf100_pmu_new, @@ -1474,7 +1474,7 @@ nvce_chipset = { .ibus = gf100_ibus_new, .imem = nv50_instmem_new, .ltc = gf100_ltc_new, -// .mc = gf100_mc_new, + .mc = gf100_mc_new, // .mmu = gf100_mmu_new, // .mxm = nv50_mxm_new, // .pmu = gf100_pmu_new, @@ -1509,7 +1509,7 @@ nvcf_chipset = { .ibus = gf100_ibus_new, .imem = nv50_instmem_new, .ltc = gf100_ltc_new, -// .mc = gf106_mc_new, + .mc = gf106_mc_new, // .mmu = gf100_mmu_new, // .mxm = nv50_mxm_new, // .pmu = gf100_pmu_new, @@ -1543,7 +1543,7 @@ nvd7_chipset = { .ibus = gf100_ibus_new, .imem = nv50_instmem_new, .ltc = gf100_ltc_new, -// .mc = gf106_mc_new, + .mc = gf106_mc_new, // .mmu = gf100_mmu_new, // .mxm = nv50_mxm_new, // .therm = gf110_therm_new, @@ -1575,7 +1575,7 @@ nvd9_chipset = { .ibus = gf100_ibus_new, .imem = nv50_instmem_new, .ltc = gf100_ltc_new, -// .mc = gf106_mc_new, + .mc = gf106_mc_new, // .mmu = gf100_mmu_new, // .mxm = nv50_mxm_new, // .pmu = gf110_pmu_new, @@ -1609,7 +1609,7 @@ nve4_chipset = { .ibus = gk104_ibus_new, .imem = nv50_instmem_new, .ltc = gk104_ltc_new, -// .mc = gf106_mc_new, + .mc = gf106_mc_new, // .mmu = gf100_mmu_new, // .mxm = nv50_mxm_new, // .pmu = gk104_pmu_new, @@ -1645,7 +1645,7 @@ nve6_chipset = { .ibus = gk104_ibus_new, .imem = nv50_instmem_new, .ltc = gk104_ltc_new, -// .mc = gf106_mc_new, + .mc = gf106_mc_new, // .mmu = gf100_mmu_new, // .mxm = nv50_mxm_new, // .pmu = gk104_pmu_new, @@ -1681,7 +1681,7 @@ nve7_chipset = { .ibus = gk104_ibus_new, .imem = nv50_instmem_new, .ltc = gk104_ltc_new, -// .mc = gf106_mc_new, + .mc = gf106_mc_new, // .mmu = gf100_mmu_new, // .mxm = nv50_mxm_new, // .pmu = gf110_pmu_new, @@ -1713,7 +1713,7 @@ nvea_chipset = { .ibus = gk20a_ibus_new, .imem = gk20a_instmem_new, .ltc = gk104_ltc_new, -// .mc = gk20a_mc_new, + .mc = gk20a_mc_new, // .mmu = gf100_mmu_new, // .pmu = gk20a_pmu_new, // .timer = gk20a_timer_new, @@ -1741,7 +1741,7 @@ nvf0_chipset = { .ibus = gk104_ibus_new, .imem = nv50_instmem_new, .ltc = gk104_ltc_new, -// .mc = gf106_mc_new, + .mc = gf106_mc_new, // .mmu = gf100_mmu_new, // .mxm = nv50_mxm_new, // .pmu = gk110_pmu_new, @@ -1777,7 +1777,7 @@ nvf1_chipset = { .ibus = gk104_ibus_new, .imem = nv50_instmem_new, .ltc = gk104_ltc_new, -// .mc = gf106_mc_new, + .mc = gf106_mc_new, // .mmu = gf100_mmu_new, // .mxm = nv50_mxm_new, // .pmu = gk110_pmu_new, @@ -1813,7 +1813,7 @@ nv106_chipset = { .ibus = gk104_ibus_new, .imem = nv50_instmem_new, .ltc = gk104_ltc_new, -// .mc = gk20a_mc_new, + .mc = gk20a_mc_new, // .mmu = gf100_mmu_new, // .mxm = nv50_mxm_new, // .pmu = gk208_pmu_new, @@ -1848,7 +1848,7 @@ nv108_chipset = { .ibus = gk104_ibus_new, .imem = nv50_instmem_new, .ltc = gk104_ltc_new, -// .mc = gk20a_mc_new, + .mc = gk20a_mc_new, // .mmu = gf100_mmu_new, // .mxm = nv50_mxm_new, // .pmu = gk208_pmu_new, @@ -1883,7 +1883,7 @@ nv117_chipset = { .ibus = gk104_ibus_new, .imem = nv50_instmem_new, .ltc = gm107_ltc_new, -// .mc = gk20a_mc_new, + .mc = gk20a_mc_new, // .mmu = gf100_mmu_new, // .mxm = nv50_mxm_new, // .pmu = gk208_pmu_new, @@ -1912,7 +1912,7 @@ nv124_chipset = { .ibus = gk104_ibus_new, .imem = nv50_instmem_new, .ltc = gm107_ltc_new, -// .mc = gk20a_mc_new, + .mc = gk20a_mc_new, // .mmu = gf100_mmu_new, // .mxm = nv50_mxm_new, // .pmu = gk208_pmu_new, @@ -1941,7 +1941,7 @@ nv126_chipset = { .ibus = gk104_ibus_new, .imem = nv50_instmem_new, .ltc = gm107_ltc_new, -// .mc = gk20a_mc_new, + .mc = gk20a_mc_new, // .mmu = gf100_mmu_new, // .mxm = nv50_mxm_new, // .pmu = gk208_pmu_new, @@ -1966,7 +1966,7 @@ nv12b_chipset = { .ibus = gk20a_ibus_new, .imem = gk20a_instmem_new, .ltc = gm107_ltc_new, -// .mc = gk20a_mc_new, + .mc = gk20a_mc_new, // .mmu = gf100_mmu_new, // .mmu = gf100_mmu_new, // .timer = gk20a_timer_new, |