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* instmem/gk20a: exclusively acquire instobjsgk20aAlexandre Courbot2015-09-251-9/+6
| | | | Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
* gm204/6: add voltage control using the new gk104 volt classMartin Peres2015-09-171-0/+2
| | | | | | | | | | I got confirmation that we can read and change the voltage with the same code. The divider is also computed correctly on the gm204 we got our hands on. Thanks to Yoshimo on IRC for executing the tests on his gm204! Signed-off-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* gm107: add voltage control using the new gk104 volt classMartin Peres2015-09-171-0/+1
| | | | | | | Let's ignore the other desktop Maxwells until I get my hands on one and confirm that we still can change the voltage. Signed-off-by: Martin Peres <martin.peres@free.fr>
* volt/gk104: add support for pwm and gpio modesMartin Peres2015-09-176-7/+133
| | | | | | | | | | | | | Most Keplers actually use the GPIO-based voltage management instead of the new PWM-based one. Use the GPIO mode as a fallback as it already gracefully handles the case where no GPIOs exist. All the Maxwells seem to use the PWM method though. v2: - Do not forget to commit the PWM configuration change! Signed-off-by: Martin Peres <martin.peres@free.fr>
* volt: add support for non-vid-based voltage controllersMartin Peres2015-09-112-1/+12
| | | | | | | | This patch is not ideal but it definitely beats a rewrite of the current interface and is very self-contained. Signed-off-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* bios/volt: add support for pwm-based volt managementMartin Peres2015-09-112-3/+29
| | | | | Signed-off-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* ttm: set the DMA mask for platform devicesAlexandre Courbot2015-09-111-6/+19
| | | | | | | | | | So far the DMA mask was not set for platform devices, which limited them to a 32-bit physical space. Allow dma_set_mask() to be called for non-PCI devices, and also take the IOMMU bit into account since it could restrict the physically addressable space. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* ttm: convert to DMA APIAlexandre Courbot2015-09-111-7/+5
| | | | | | | | The pci_dma_* functions are now superseeded in the kernel by the DMA API. Make the conversion to this more generic API. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* instmem/gk20a: make use of the IOMMU bitAlexandre Courbot2015-09-111-4/+6
| | | | | | | | Use the IOMMU bit specified in platform data instead of hardcoding it to the bit used by current Tegra GPUs. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* platform: allow to specify the IOMMU bitAlexandre Courbot2015-09-116-10/+46
| | | | | | | | | | | Current Tegra code taking advantage of the IOMMU assumes a hardcoded value for the IOMMU bit. Make it a platform property instead for flexibility. v2 (Ben Skeggs): remove nvkm dependence on drm structures Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* instmem/gk20a: use direct CPU accessAlexandre Courbot2015-09-112-116/+317
| | | | | | | | | | | | | | | | | | | | | | | | | | The Great Nouveau Refactoring Take II brought us a lot of goodness, including acquire/release methods that are called before and after an instobj is modified. These functions can be used as synchronization points to manage CPU/GPU coherency if we modify an instobj using the CPU. This patch replaces the legacy and slow PRAMIN access for gk20a instmem with CPU mappings and writes. A LRU list is used to unmap unused mappings after a certain threshold (currently 1MB) of mapped instobjs is reached. This allows mappings to be reused most of the time. Accessing instobjs using the CPU requires to maintain the GPU L2 cache, which we do in the acquire/release functions. This triggers a lot of L2 flushes/invalidates, but most of them are performed on an empty cache (and thus return immediately), and overall context setup performance greatly benefits from this (from 250ms to 160ms on Jetson TK1 for a simple libdrm program). Making L2 management more explicit should allow us to grab some more performance in the future. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm: remove unnecessary usage of object handlesBen Skeggs2015-09-1110-61/+31
| | | | | | | No longer required in a lot of cases, as objects are identified over NVIF via an alternate mechanism since the rework. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* ltc/gf100: add flush/invalidate functionsAlexandre Courbot2015-09-115-0/+39
| | | | | | | | Allow clients to manually flush and invalidate L2. This will be useful for Tegra systems for which we want to write instmem using the CPU. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* ltc: add hooks for invalidate and flushAlexandre Courbot2015-09-113-0/+20
| | | | | | | | These are useful for systems without a coherent CPU/GPU bus. For such systems we may need to maintain the L2 ourselves. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* timer: re-introduce nvkm_wait_xsec macrosAlexandre Courbot2015-09-111-0/+10
| | | | | | | | | Reintroduce macros allowing us to test a register against a certain mask, since this is the most common usage pattern for the more generic nvkm_xsec macros and makes the code more concise and readable. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* pmu: do not assume a PMU is presentAlexandre Courbot2015-09-111-1/+1
| | | | | | | | | Some devices may not have a PMU. Avoid a NULL pointer dereference in such cases by checking whether the pointer given to nvkm_pmu_pgob() is valid. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* device: enable c800 quirk for tecra w50Ben Skeggs2015-09-111-0/+1
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* clk/gt215: Unbreak engine pausing for GT21x/MCP7xRoy Spliet2015-09-111-1/+1
| | | | | | | | Typo that snuck in with commit 6979c6303a4abf263753cd9d577d79f05c6e8c47 Signed-off-by: Roy Spliet <rspliet@eclipso.eu> Reported-by: Pierre Moreau <pierre.morrow@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* gr/nv04: fix big endian setting on gr contextIlia Mirkin2015-09-111-3/+3
| | | | | | | | | Broken since "gr: convert user classes to new-style nvkm_object" Tested on a PPC64 G5 + NV34 Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm: bump driver version for releaseBen Skeggs2015-08-281-2/+5
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* tegra: merge platform setup from nouveau drmBen Skeggs2015-08-2814-299/+417
| | | | | | | | The copyright header in nvkm/engine/device/platform.c has been replaced with the NVIDIA one from drm/nouveau_platform.c, as most of the actual code is now theirs. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* pci: merge agp handling from nouveau drmBen Skeggs2015-08-2820-240/+327
| | | | | | | This commit reinstates the pre-DEVINIT AGP fiddling that was broken in an earlier commit. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* device: remove pci/platform_device from common structBen Skeggs2015-08-2827-108/+106
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* device: import pciid list and integrate quirks with itBen Skeggs2015-08-287-27/+1580
| | | | | | PCI IDs taken from the NVIDIA binary driver, with permission. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* device: cleaner abstraction for device resource functionsBen Skeggs2015-08-2822-74/+83
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* mc: move device irq handling to platform-specific codeBen Skeggs2015-08-2819-324/+182
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* mc/gf100-: handle second interrupt treeBen Skeggs2015-08-284-9/+38
| | | | | | | Doesn't fix any known issue, but best be safe in case control is handed to us from firmware with these left enabled. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* mc: abstract interface to master intr registersBen Skeggs2015-08-2813-11/+84
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* pci: new subdevBen Skeggs2015-08-2815-39/+491
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* object: merge with handleBen Skeggs2015-08-2818-442/+219
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* core: remove the remainder of the previous styleBen Skeggs2015-08-2871-1862/+502
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* mpeg: convert to new-style nvkm_engineBen Skeggs2015-08-2814-363/+166
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* sw: convert to new-style nvkm_engineBen Skeggs2015-08-2819-292/+115
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* pm: convert to new-style nvkm_engineBen Skeggs2015-08-2821-400/+219
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* gr: convert to new-style nvkm_engineBen Skeggs2015-08-2859-1847/+1744
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* fifo: convert to new-style nvkm_engineBen Skeggs2015-08-2856-801/+640
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* disp: convert to new-style nvkm_engineBen Skeggs2015-08-2832-890/+696
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* dma: convert to new-style nvkm_engineBen Skeggs2015-08-2822-242/+162
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* cipher: convert to new-style nvkm_engineBen Skeggs2015-08-284-61/+27
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* ce: convert to new-style nvkm_engineBen Skeggs2015-08-289-278/+86
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* xtensa: convert to new-style nvkm_engineBen Skeggs2015-08-288-148/+84
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* falcon: convert to new-style nvkm_engineBen Skeggs2015-08-2836-771/+640
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* volt: convert to new-style nvkm_subdevBen Skeggs2015-08-2812-253/+161
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* tmr: convert to new-style nvkm_subdevBen Skeggs2015-08-2827-427/+501
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* therm: convert to new-style nvkm_subdevBen Skeggs2015-08-2824-714/+507
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* pmu: convert to new-style nvkm_subdevBen Skeggs2015-08-2822-262/+230
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* mxm: convert to new-style nvkm_subdevBen Skeggs2015-08-2811-123/+66
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* mmu: convert to new-style nvkm_subdevBen Skeggs2015-08-2821-478/+387
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* mc: convert to new-style nvkm_subdevBen Skeggs2015-08-2828-381/+265
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* ltc: convert to new-style nvkm_subdevBen Skeggs2015-08-2813-342/+235
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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