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* clk/gm20b: add basic drivergm20b_clkAlexandre Courbot2016-03-124-0/+201
| | | | | | Add a basic clock driver that reuses the GK20A logic. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
* clk/gk20a: share reusable structures/functionsAlexandre Courbot2016-03-122-36/+73
| | | | | | Make functions/structures that the GM20B driver will reuse public. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
* clk/gk20a: set lowest frequency during init()Alexandre Courbot2016-03-121-2/+5
| | | | | | | Err on the safe side by setting the lowest frequency (and thus voltage) during device init. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
* clk/gk20a: split gk20a_clk_new()Alexandre Courbot2016-03-121-12/+31
| | | | | | | | | | This allows to instanciate drivers that use the same logic as gk20a with different parameters. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Add a constructor function to allow other chips that inherit from this clock to easily initialize its members
* clk/gk20a: abstract pl_to_divAlexandre Courbot2016-03-121-21/+36
| | | | | | | pl_to_div may be done differently depending on the chip. Abstract this operation so the same logic can be reused for them as well. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
* clk/gk20a: put mnp values into their own structAlexandre Courbot2016-03-121-31/+36
| | | | | | | This allows us to read them using one single function and will be handy to the GM20B driver. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
* clk/gk20a: emit parent rate as debug messageAlexandre Courbot2016-03-121-2/+2
| | | | | | Most users are probably not interested in this information. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
* clk/gk20a: only restore divider to 1:1 if neededAlexandre Courbot2016-03-121-3/+10
| | | | | | | | Only restore the 1:1 divider if it is not set already. Also use the proper masks for this operation and add a second write as done in the Android code. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
* clk/gk20a: only compute n_lo if neededAlexandre Courbot2016-03-121-3/+5
| | | | | | | n_lo is used if we are going to slide. Compute it only if that condition succeeds to avoid confusion about future usage of this computation. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
* clk/gk20a: fix VCO bit maskAlexandre Courbot2016-03-121-1/+2
| | | | | | | | Fix the mask specified to switch to VCO mode was given as an (incorrect) immediate value. Although the side-effect happens to be the same, this is clearly incorrect. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
* clk/gk20a: rename enable/disable functionsAlexandre Courbot2016-03-121-28/+24
| | | | | | | | gk20a_pllg_disable() is only used in the context of gk20a_clk_fini(). Move its body there and rename _gk20a_pllg_enable() and _gk20a_pllg_disable() to non-underscored versions. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
* clk/gk20a: reorganize variables in gk20a_pllg_calc_mnp()Alexandre Courbot2016-03-121-4/+8
| | | | | | | Move some variables declarations to the scope where they are actually used to make the code easier to follow. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
* clk/gk20a: convert parameters to KhzAlexandre Courbot2016-03-121-15/+17
| | | | | | Perform computations in Khz instead of Mhz for better precision. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
* volt: add GM20B driverAlexandre Courbot2016-03-124-0/+59
| | | | | | Add basic GM20B volt driver that reuses the GK20A logic. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
* volt/gk20a: split constructorAlexandre Courbot2016-03-122-12/+25
| | | | | | | Split the constructor function so we can reuse the same logic in other chips. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
* volt/gk20a: share reusable members & functionsVince Hsu2016-03-122-18/+51
| | | | | | | | The CVB calculation and voltage setting functions can be reused for the future chips. So move the declaration to gk20a.h. Signed-off-by: Vince Hsu <vinceh@nvidia.com> Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
* ce/gm107: expose MaxwellDmaCopyABen Skeggs2016-03-114-2/+59
| | | | | | The HW accepts KeplerDmaCopyA and MaxwellDmaCopyA classes. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* fifo/gm107: KeplerChannelGpfifoB, and 2048 channelsBen Skeggs2016-03-114-1/+49
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* fifo/gk110: expose KeplerChannelGpfifoBBen Skeggs2016-03-119-2/+89
| | | | | | | | | | | | | | | This class supports a WFI method (0x0078) that's not present on the KeplerChannelGpfifoA class. The binary driver exposes both classes on these GPUs for some reason, though there doesn't appear to be any difference in the setup that's done for each (ie. even if you allocate GpfifoA, the WFI method will still work). We shall just expose GpfifoB, as I don't see a good reason to report the presence of both. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* fifo/gk104: submit NOP after all PBDMA_INTR_0, not just DEVICEBen Skeggs2016-03-111-1/+2
| | | | | | Prevents the same interrupt from re-triggering forever. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* fifo/gk104: add vic plumbingBen Skeggs2016-03-112-0/+3
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* fifo/gk104: add sec plumbingBen Skeggs2016-03-112-0/+3
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* fifo/gk104: add nvdec plumbingBen Skeggs2016-03-113-0/+4
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* fifo/gk104: add nvenc plumbingBen Skeggs2016-03-113-7/+25
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* fifo/gk104: add msenc plumbingBen Skeggs2016-03-111-0/+1
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* core: add vic plumbingBen Skeggs2016-03-114-0/+7
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* core: add nvdec plumbingBen Skeggs2016-03-117-0/+13
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* core: add nvenc plumbingBen Skeggs2016-03-117-21/+41
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* core: add msenc plumbingBen Skeggs2016-03-113-0/+6
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* core: sort engine indices alphabeticallyBen Skeggs2016-03-111-14/+17
| | | | | | Unlike subdevs, these aren't initialised in a defined order. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* fifo/gk104: make use of topology info during gpfifo constructionBen Skeggs2016-03-115-64/+127
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* fifo/gk104: make use of topology info during fault recoveryBen Skeggs2016-03-112-34/+26
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* fifo/gk104: make use of topology info when handling ctxsw timeoutBen Skeggs2016-03-111-20/+9
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* fifo/gk104: read device topology information from hwBen Skeggs2016-03-113-5/+103
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* fifo/gk104: cosmetic engine->runlist changesBen Skeggs2016-03-114-48/+50
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* fifo/gk104: don't attempt recovery of unknown mmu enginesBen Skeggs2016-03-111-1/+1
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* fifo/gk104: identify fault-recovery members more clearlyBen Skeggs2016-03-112-10/+12
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* fifo/gk104: rename spoon to pbdma, and move detection to oneinitBen Skeggs2016-03-112-10/+14
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* fifo/gf100: fix certain engines not being recovered after a faultBen Skeggs2016-03-112-2/+3
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* fifo/gf100: don't attempt recovery of unknown mmu enginesBen Skeggs2016-03-111-1/+1
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* fifo/gf100: identify fault-recovery members more clearlyBen Skeggs2016-03-112-10/+12
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* fifo/gf100: rename spooon to pbdma, and move detection to oneinitBen Skeggs2016-03-112-12/+17
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* gr/fuc: Store $r0 in interrupt handlerRoy Spliet2016-03-1114-932/+936
| | | | | | | | It's supposed to always be 0, but at least nv_iowr() temporarily violates this. Since the ih touches $r0, it should be stored. Signed-off-by: Roy Spliet <rs855@cam.ac.uk> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* pmu/fuc: use imm32 in ld/st macrosKarol Herbst2016-03-111-2/+2
| | | | | | Signed-off-by: Karol Herbst <nouveau@karolherbst.de> Reviewed-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* pmu/fuc: use the call macro instead of using the call instruction directlyKarol Herbst2016-03-112-9/+9
| | | | | | | | | the macro deals with target specific differences and so we should always use this Signed-off-by: Karol Herbst <nouveau@karolherbst.de> Reviewed-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* pmu/fuc: replace mov+sethi with imm32Karol Herbst2016-03-117-3148/+3140
| | | | | | | | | | on gk208+ we can simply mov 32bits, so we should have a single mov there v2: use or operator instead of add Signed-off-by: Karol Herbst <nouveau@karolherbst.de> Reviewed-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* pmu/fuc: fix imm32 for gk208+Karol Herbst2016-03-112-442/+442
| | | | | | Signed-off-by: Karol Herbst <nouveau@karolherbst.de> Reviewed-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* core: use vzalloc for allocating ramhtIlia Mirkin2016-03-111-3/+3
| | | | | | | | | | Most calls to nvkm_ramht_new use 0x8000 as the size. This results in a fairly sizeable chunk of memory to be allocated, which may not be available with kzalloc. Since this is done fairly rarely (once per channel), use vzalloc instead. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* fifo/gk104: kick channel upon removalAlexandre Courbot2016-03-111-0/+1
| | | | | | | | | | | | | A channel may still be processed by the PBDMA even after removal, unless it is properly kicked. Some chips are more sensible to this than others, with GM20B triggering the issue very easily (the PBDMA will try to fetch methods from the previously-removed channel after a new one is added). Make sure this cannot happen by kicking the channel right after it is disabled, and before the new runlist is submitted. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* instmem/gk20a: add write barrier when releasing DMA objectAlexandre Courbot2016-03-111-0/+2
| | | | | | | | | | When using the DMA-API for instmem, we may obtain a write-combined mapping. For such cases, add a write barrier in gk20a_instobj_release_dma() to make sure that all writes have reached memory at this time. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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