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* hwref: hardware reference headersKen Adams2015-11-10598-0/+59004
| | | | | | | | These headers are generated from NVIDIA-internal hardware manuals. For this check-in all chips Nouveau supports >= nv50/g80 are included. Signed-off-by: Ken Adams <kadams@nvidia.com>
* bus/hwsq: Implement VBLANK waiting heuristicRoy Spliet2015-11-031-0/+1
| | | | | | | | | Avoids waiting for VBLANKS that never arrive on headless or otherwise unconventional set-ups. Strategy taken from MEMX. Signed-off-by: Roy Spliet <rspliet@eclipso.eu> Tested-by: Pierre Moreau <pierre.morrow@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* fb/ramgt215: Change FBVDD/Q when BIOS asks for itRoy Spliet2015-11-031-0/+1
| | | | | Signed-off-by: Roy Spliet <rspliet@eclipso.eu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* bios/rammap: Identify DLLoff for >= GF100Roy Spliet2015-11-031-1/+0
| | | | | Signed-off-by: Roy Spliet <rspliet@eclipso.eu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* pci: Handle 5-bit and 8-bit tag fieldPierre Moreau2015-11-031-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the hardware supports extended tag field (8-bit ones), then enable it. This is usually done by the VBIOS, but not on some MBPs (see fdo#86537). In case extended tag field is not supported, 5-bit tag field is used which limits the possible number of requests to 32. Apparently bits 7:0 of 0x08841c stores some number of outstanding requests, so cap it to 32 if extended tag is unsupported. Fixes: fdo#86537 v2: Restrict changes to chipsets >= 0x84 v3: * Add nvkm_pci_mask to pci.h * Mask bit 8 before setting it v4: * Rename `add` argument of nvkm_pci_mask to `value` * Move code from nvkm_pci_init to g84_pci_init and remove PCIe and chipset checks v5: * Rebase code on latest PCI structure * Restore PCIe check * Fix namings in nvkm_pci_mask * Rephrase part of the commit message Signed-off-by: Pierre Moreau <pierre.morrow@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm: remove unused functionSudip Mukherjee2015-11-031-2/+0
| | | | | | | | | | coverity.com reported that memset was using a buffer of size 0, on checking the code it turned out that the function was not being used. So remove it. Signed-off-by: Sudip Mukherjee <sudip@vectorindia.org> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* pci/nv46: attempt to fix msi, and re-enable by defaultBen Skeggs2015-11-031-1/+1
| | | | | | | | Was not able to obtain a trace of NVRM due to kernel version annoyances, however, experimentally confirmed that the WAR we use on NV50/G8x boards works here too. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* pci/g94: split implementation from nv40Ben Skeggs2015-11-031-0/+1
| | | | | | | An upcoming patch will implement functionality that we don't use on any NV40 chipset. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* pci/g84: split implementation from nv50Ben Skeggs2015-11-031-0/+1
| | | | | | | An upcoming patch will implement functionality that we don't use on the original NV50. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* ibus/gf100: increase wait timeout to avoid read faultsSamuel Pitoiset2015-11-031-0/+1
| | | | | | | | | | | | Increase clock timeout of some unknown engines in order to avoid failure at high gpcclk rate. This fixes IBUS read faults on my GF119 when reclocking is manually enabled. Note that memory reclocking is completely broken and NvMemExec has to be disabled to allow core clock reclocking only. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* volt/gk104: add support for pwm and gpio modesMartin Peres2015-11-032-0/+2
| | | | | | | | | | | | | Most Keplers actually use the GPIO-based voltage management instead of the new PWM-based one. Use the GPIO mode as a fallback as it already gracefully handles the case where no GPIOs exist. All the Maxwells seem to use the PWM method though. v2: - Do not forget to commit the PWM configuration change! Signed-off-by: Martin Peres <martin.peres@free.fr>
* bios/volt: add support for pwm-based volt managementMartin Peres2015-11-031-1/+14
| | | | | Signed-off-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* platform: allow to specify the IOMMU bitAlexandre Courbot2015-11-031-1/+12
| | | | | | | | | | | Current Tegra code taking advantage of the IOMMU assumes a hardcoded value for the IOMMU bit. Make it a platform property instead for flexibility. v2 (Ben Skeggs): remove nvkm dependence on drm structures Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* ltc/gf100: add flush/invalidate functionsAlexandre Courbot2015-11-031-0/+1
| | | | | | | | Allow clients to manually flush and invalidate L2. This will be useful for Tegra systems for which we want to write instmem using the CPU. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* ltc: add hooks for invalidate and flushAlexandre Courbot2015-11-031-0/+3
| | | | | | | | These are useful for systems without a coherent CPU/GPU bus. For such systems we may need to maintain the L2 ourselves. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* timer: re-introduce nvkm_wait_xsec macrosAlexandre Courbot2015-11-031-0/+10
| | | | | | | | | Reintroduce macros allowing us to test a register against a certain mask, since this is the most common usage pattern for the more generic nvkm_xsec macros and makes the code more concise and readable. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* tegra: merge platform setup from nouveau drmBen Skeggs2015-08-282-2/+20
| | | | | | | | The copyright header in nvkm/engine/device/platform.c has been replaced with the NVIDIA one from drm/nouveau_platform.c, as most of the actual code is now theirs. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* pci: merge agp handling from nouveau drmBen Skeggs2015-08-282-0/+12
| | | | | | | This commit reinstates the pre-DEVINIT AGP fiddling that was broken in an earlier commit. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* device: remove pci/platform_device from common structBen Skeggs2015-08-281-30/+10
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* device: import pciid list and integrate quirks with itBen Skeggs2015-08-281-8/+3
| | | | | | PCI IDs taken from the NVIDIA binary driver, with permission. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* device: cleaner abstraction for device resource functionsBen Skeggs2015-08-281-6/+2
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* mc: move device irq handling to platform-specific codeBen Skeggs2015-08-284-12/+6
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* mc: abstract interface to master intr registersBen Skeggs2015-08-281-0/+3
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* pci: new subdevBen Skeggs2015-08-282-0/+24
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* object: merge with handleBen Skeggs2015-08-283-59/+21
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* core: remove the remainder of the previous styleBen Skeggs2015-08-287-284/+60
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* mpeg: convert to new-style nvkm_engineBen Skeggs2015-08-282-36/+5
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* sw: convert to new-style nvkm_engineBen Skeggs2015-08-281-23/+6
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* pm: convert to new-style nvkm_engineBen Skeggs2015-08-281-13/+10
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* gr: convert to new-style nvkm_engineBen Skeggs2015-08-282-58/+40
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* fifo: convert to new-style nvkm_engineBen Skeggs2015-08-281-66/+17
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* disp: convert to new-style nvkm_engineBen Skeggs2015-08-281-15/+15
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* dma: convert to new-style nvkm_engineBen Skeggs2015-08-281-10/+5
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* cipher: convert to new-style nvkm_engineBen Skeggs2015-08-281-1/+1
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* ce: convert to new-style nvkm_engineBen Skeggs2015-08-281-8/+2
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* xtensa: convert to new-style nvkm_engineBen Skeggs2015-08-283-20/+10
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* falcon: convert to new-style nvkm_engineBen Skeggs2015-08-286-45/+33
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* volt: convert to new-style nvkm_subdevBen Skeggs2015-08-281-41/+5
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* tmr: convert to new-style nvkm_subdevBen Skeggs2015-08-281-35/+19
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* therm: convert to new-style nvkm_subdevBen Skeggs2015-08-281-42/+62
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* pmu: convert to new-style nvkm_subdevBen Skeggs2015-08-281-16/+13
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* mxm: convert to new-style nvkm_subdevBen Skeggs2015-08-281-29/+1
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* mmu: convert to new-style nvkm_subdevBen Skeggs2015-08-281-56/+15
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* mc: convert to new-style nvkm_subdevBen Skeggs2015-08-281-17/+14
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* ltc: convert to new-style nvkm_subdevBen Skeggs2015-08-281-15/+20
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* imem: convert to new-style nvkm_subdevBen Skeggs2015-08-281-25/+10
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* devinit: run devinit scripts right after preinitBen Skeggs2015-08-281-0/+1
| | | | | | | | This ensures we have a valid mask of disabled engines before we start trying to execute fini()/init() on the subdevs, potentially touching devices that don't exist. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* ibus: convert to new-style nvkm_subdevBen Skeggs2015-08-281-27/+3
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* i2c: convert to new-style nvkm_subdevBen Skeggs2015-08-281-15/+11
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* gpio: convert to new-style nvkm_subdevBen Skeggs2015-08-281-17/+12
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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