summaryrefslogtreecommitdiff
path: root/drm/nouveau/nvkm
Commit message (Collapse)AuthorAgeFilesLines
...
* fb/ramnv50: Make 0x100da0 per-partitionRoy Spliet2015-07-281-7/+13
| | | | | | | Like on GT215 Signed-off-by: Roy Spliet <rspliet@eclipso.eu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* bios/rammap: Pull DLLoff bit out of version 0x10 structRoy Spliet2015-07-285-7/+7
| | | | | | | In preparation of NV50 reclocking, where there is no version Signed-off-by: Roy Spliet <rspliet@eclipso.eu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* bios: add proper support for opcode 0x59Ilia Mirkin2015-07-271-4/+20
| | | | | | | | | More analysis shows that this is identical to 0x79 except that it loads the frequency indirectly from elsewhere in the VBIOS. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91025 Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* bios: add 0x59 and 0x5a opcodesIlia Mirkin2015-07-271-0/+24
| | | | | | | | | | | Opcode 0x5a is a register write for data looked up from another part of the VBIOS image. 0x59 is a more complex opcode, but we may as well recognize it. These occur on a single known instance of Riva TNT2 hardware. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91025 Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* disp: Use NULL for pointersThierry Reding2015-07-271-1/+1
| | | | | | | | | The return type of exec_lookup() is struct nvkm_output *, so it should return NULL rather than 0. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* pm: fix a potential race condition when creating an engine contextSamuel Pitoiset2015-07-271-4/+3
| | | | | | | | | | | There is always the possiblity that the ppm->context pointer would get partially updated and accidentally would equal ctx. This would allow two contexts to co-exist, which is not acceptable. Moving the test to the critical section takes care of this problem. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Signed-off-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* pm: prevent freeing the wrong engine contextSamuel Pitoiset2015-07-271-2/+5
| | | | | | | | This fixes a crash when multiple PM engine contexts are created. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* gr/gf100: wait for GR idle after GO_IDLE bundleAlexandre Courbot2015-07-272-0/+38
| | | | | | | | | | After submitting a GO_IDLE bundle, one must wait for GR to effectively be idle before submitting the next bundle. Failure to do so may result in undefined behavior in some rare cases. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Reported-by: Kary Jin <karyj@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* gr/gf100: wait on bottom half of FE's pipelineAlexandre Courbot2015-07-271-1/+1
| | | | | | | | | When emitting the ICMD bundle, wait on the bottom half (bit 3 of the GR_STATUS register) instead of upper half (bit 2) to make sure methods are effectively emitted. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* fifo/gk104: kick channels when deactivating themAlexandre Courbot2015-07-271-8/+21
| | | | | | | | | | | | | Kicking channels is part of their deactivation process. Maxwell chips are particularly sensitive to this, and can start fetching the previous pushbuffer of a recycled channel if this is not done. While we are at it, improve the channel preemption code to only wait for bit 20 of 0x002634 to turn to 0, as it is the bit indicating a preempt is pending. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* ibus/gk20a: increase SM wait timeoutAlexandre Courbot2015-07-271-0/+8
| | | | | | | | Increase clock timeout for SYS, FPB and GPC in order to avoid operation failure at high gpcclk rate. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* clk/gt215: u32->s32 for difference in req. and set clockRoy Spliet2015-07-271-1/+2
| | | | | | | This difference can of course be negative too... Signed-off-by: Roy Spliet <rspliet@eclipso.eu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nv04-nv40/instmem: protect access to priv->heap by mutexKamil Dudka2015-07-271-0/+8
| | | | | | | This fixes the list_del corruption reported at <https://bugzilla.redhat.com/1205985>. Signed-off-by: Kamil Dudka <kdudka@redhat.com>
* gr/gm204: remove a stray printkBen Skeggs2015-05-291-1/+0
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* devinit/gm100-: force devinit table execution on boards without PDISPBen Skeggs2015-05-294-3/+6
| | | | | | Should fix fdo#89558 Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* devinit/gf100: make the force-post condition more obviousBen Skeggs2015-05-291-1/+4
| | | | | | And also more generic, so it can be used on newer chipsets. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* v4.1-rc5Ben Skeggs2015-05-291-1/+1
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* bios: fix fetching from acpi on certain systemsJan Vesely2015-04-141-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | nvbios_extend() returns 1 to indicate "extended the array" and 0 to indicate the array is already big enough. This is used by the core shadowing code to prevent re-fetching chunks of the image that have already been shadowed. The ACPI fetching code may possibly need to extend this further due to requiring fetches to happen in 4KiB chunks. Under certain circumstances (that happen if the total image size is a multiple of 4KiB), the memory allocated to store the shadow will already be big enough, causing the ACPI code's nvbios_extend() call to return 0, which is misinterpreted as a failure. The fix is simple, accept >= 0 as a successful condition here. The core will have already made sure that we're not re-fetching data we already have. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89047 v2 (Ben Skeggs): - dropped hunk which would cause unnecessary re-fetching - more descriptive explanation Signed-off-by: Jan Vesely <jano.vesely@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* gr/gm206: initial init+ctx codeBen Skeggs2015-04-148-16/+161
| | | | | | | | Uncertain whether the GPC pack change is due to a newer driver version, or a legitimate difference from GM204. My GM204 has broken vram, so can't currently try a newer binary driver on it to confirm. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* ce/gm206: enable support via gm204 codeBen Skeggs2015-04-141-1/+1
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* fifo/gm206: enable support via gm204 codeBen Skeggs2015-04-141-2/+2
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* gr/gm204: initial init+ctx codeBen Skeggs2015-04-148-18/+1481
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* ce/gm204: initial supportBen Skeggs2015-04-143-1/+175
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* fifo/gm204: initial supportBen Skeggs2015-04-145-5/+66
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* gr/gk104-: prevent reading non-existent regs in intr handlerBen Skeggs2015-04-131-1/+6
| | | | | | | | | Under certain circumstances the trapped address will contain subc 7, which GK104 GR doesn't have anymore. Notice this case to avoid causing additional priv ring faults. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* gr/gm107: very slightly demagic part of attrib cb setupBen Skeggs2015-04-131-1/+1
| | | | | | | No idea if "3" is a constant or derived from something else, but the value is unchanged in the limited traces of gm107/gm204 I have here. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* gr/gk104-: correct crop/zrop num_active_fbps settingBen Skeggs2015-04-133-14/+11
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* gr/gf100-: add symbolic names for classesBen Skeggs2015-04-138-17/+17
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* gr/gm107: support tpc "strand" ctxsw in gpccs ucodeBen Skeggs2015-04-1310-766/+1025
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* gr/gf100-: support mmio access with gpc offset from gpccs ucodeBen Skeggs2015-04-138-709/+726
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* pmu/gk20a: add some missing staticsAlexandre Courbot2015-04-131-3/+4
| | | | | | | Make static a few functions and structures that should be. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* gr/gk104-gk20a: call pmu to disable any power-gating before ctor()Ben Skeggs2015-04-135-4/+18
| | | | | | | | On some of these chipsets, reading NV_PGRAPH_GPC_GPM_PD_PES_TPC_ID_MASK can trigger a PRI fault and return an error code instead of a TPC mask, unless PGOB has been disabled first. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* pmu/gk208: implement gr power-up magic with gk110_pmu_pgob()Ben Skeggs2015-04-134-39/+5
| | | | | | | | Before we moved gk110's implementation of this to pmu, the functions were identical. This commit just switches GK208 to use the new (more complete) implementation of the power-up sequence. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* pmu/gk110: implement gr power-up magic like PGOB on earlier chipsBen Skeggs2015-04-136-44/+100
| | | | | | | Turns out the PTHERM part of this dance is bracketed by the same PMU fiddling that occurs on GK104/6, let's assume it's also PGOB. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* pbus/hwsq: Make code size u16Roy Spliet2015-04-131-1/+1
| | | | | | | So we can actually use the full 512 byte code space Signed-off-by: Roy Spliet <rspliet@eclipso.eu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* pbus/hwsq: Support strided register writesRoy Spliet2015-04-131-7/+37
| | | | | Signed-off-by: Roy Spliet <rspliet@eclipso.eu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* instmem/gk20a: fix crash during error pathAlexandre Courbot2015-04-131-1/+1
| | | | | | | | | | | | | If a memory allocation fails when using the DMA allocator, gk20a_instobj_dtor_dma() will be called on the failed instmem object. At this time, node->handle might not be NULL despite the call to dma_alloc_attrs() having failed. node->cpuaddr is the right member to check for such a failure, so use it instead. Reported-by: Vince Hsu <vinceh@nvidia.com> Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* disp/gf110-: fix base channel update debug/error outputBen Skeggs2015-03-171-2/+2
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* disp/nv50-: fix push buffers in vramBen Skeggs2015-03-171-1/+1
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* instmem/gk20a: add IOMMU supportAlexandre Courbot2015-03-171-39/+252
| | | | | | | | | | Let GK20A's instmem take advantage of the IOMMU if it is present. Having an IOMMU means that instmem is no longer allocated using the DMA API, but instead obtained through page_alloc and made contiguous to the GPU by IOMMU mappings. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* instmem/gk20a: use DMA attributesAlexandre Courbot2015-03-171-4/+20
| | | | | | | | | | | instmem for GK20A is allocated using dma_alloc_coherent(), which provides us with a coherent CPU mapping that we never use because instmem objects are accessed through PRAMIN. Switch to dma_alloc_attrs() which gives us the option to dismiss that CPU mapping and free up some CPU virtual space. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* gk20a: remove RAM deviceAlexandre Courbot2015-03-174-70/+0
| | | | | | | | Now that Nouveau can operate even when there is no RAM device, remove the dummy one used by GK20A. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* instmem/gk20a: move memory allocation to instmemAlexandre Courbot2015-03-174-85/+215
| | | | | | | | | GK20A does not have dedicated RAM, thus having a RAM device for it does not make sense. Move the contiguous physical memory allocation to instmem. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* make RAM device optionalAlexandre Courbot2015-03-174-13/+35
| | | | | | | | | | | | | | | Having a RAM device does not make sense for chips like GK20A which have no dedicated video memory. The dummy RAM device that we used so far works as a temporary band-aid, but in the longer term it is desirable for the driver to be able to work without any kind of VRAM. This patch adds a few conditionals in places where a RAM device was assumed to be present and allows some more objects to be allocated from the TT domain, allowing Nouveau to handle GPUs for which pfb->ram == NULL. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* gr/gf100: Clear notify interruptLauri Peltonen2015-03-171-0/+9
| | | | | | | | | Notify interrupt is only used for cyclestats. We can just clear it and avoid an "unknown stat" error that gets printed to dmesg otherwise. Signed-off-by: Lauri Peltonen <lpeltonen@nvidia.com> Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* graph/nvc0: Fix engine pointer retrievalLauri Peltonen2015-03-171-1/+1
| | | | | | | | | Other methods in this file suggest this is the correct way to retrieve the engine pointer. Signed-off-by: Lauri Peltonen <lpeltonen@nvidia.com> Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* devinit/nv04: change owner to intBen Skeggs2015-03-171-1/+1
| | | | | | | We use -1 to mean "not read from hw yet" Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* mxm: indent an if statementDan Carpenter2015-03-171-1/+1
| | | | | | | | This if statement is correct but it wasn't indented, so it looked like some code was missing. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* fuse/gm107: simplify the return logicMartin Peres2015-03-171-3/+1
| | | | | | | | | Spotted by coccinelle: drivers/gpu/drm/nouveau/core/subdev/fuse/gm107.c:50:5-8: WARNING: end returns can be simpified Signed-off-by: Martin Peres <martin.peres@free.fr> Reviewed-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* bios: fix i2c table parsing for dcb 4.1Stefan Huehner2015-03-171-1/+5
| | | | | | | | | Code before looked only at bit 31 to decide if a port is unused. However dcb 4.1 spec says 0x1F in bits 31-27 and 26-22 means unused. This fixed hdmi monitor detection on GM206. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>