| Commit message (Collapse) | Author | Age | Files | Lines |
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For NV98+, BSP/VP/PPP are all FUC-based engines. Hook them all up in the
same way as NVC0, but with a couple of different values. Also make sure
that the PPP engine is handled in the fifo/mc/vm.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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This prevents 100% cpu usage on fermi cards when the exit interrupt
from the secret scrubber is not acked.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Not really "core" per-se. About to merge Ilia's work adding another
similar class for the VP2 xtensa engines, so, seems like a good time to
move all these to engine/.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Ignore (or, if you're really keen, fix) any of the horrors that are part
of the emulate-linux-on-libpciaccess (lib/) layer. When I started down
this path I was only aiming to prototype the reworked driver core, and
never actually intended on going quite this far with things, but it turns
out that being able to develop and test the nouveau core from userspace
is *very* useful.
This tree is based on the code available as of Linux 3.8-rc2.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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