From a1832c352c8c3dfa77f486acb7ace5c156686bf4 Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Thu, 1 Oct 2015 11:36:58 +1000 Subject: pci/nv46: attempt to fix msi, and re-enable by default Was not able to obtain a trace of NVRM due to kernel version annoyances, however, experimentally confirmed that the WAR we use on NV50/G8x boards works here too. Signed-off-by: Ben Skeggs --- drm/nouveau/include/nvkm/subdev/pci.h | 2 +- drm/nouveau/nvkm/engine/device/base.c | 4 +-- drm/nouveau/nvkm/subdev/pci/Kbuild | 2 +- drm/nouveau/nvkm/subdev/pci/g84.c | 2 +- drm/nouveau/nvkm/subdev/pci/nv46.c | 51 +++++++++++++++++++++++++++++++++++ drm/nouveau/nvkm/subdev/pci/nv50.c | 51 ----------------------------------- drm/nouveau/nvkm/subdev/pci/priv.h | 2 +- 7 files changed, 57 insertions(+), 57 deletions(-) create mode 100644 drm/nouveau/nvkm/subdev/pci/nv46.c delete mode 100644 drm/nouveau/nvkm/subdev/pci/nv50.c diff --git a/drm/nouveau/include/nvkm/subdev/pci.h b/drm/nouveau/include/nvkm/subdev/pci.h index 9c0b5e160..39ca88f36 100644 --- a/drm/nouveau/include/nvkm/subdev/pci.h +++ b/drm/nouveau/include/nvkm/subdev/pci.h @@ -28,8 +28,8 @@ void nvkm_pci_rom_shadow(struct nvkm_pci *, bool shadow); int nv04_pci_new(struct nvkm_device *, int, struct nvkm_pci **); int nv40_pci_new(struct nvkm_device *, int, struct nvkm_pci **); +int nv46_pci_new(struct nvkm_device *, int, struct nvkm_pci **); int nv4c_pci_new(struct nvkm_device *, int, struct nvkm_pci **); -int nv50_pci_new(struct nvkm_device *, int, struct nvkm_pci **); int g84_pci_new(struct nvkm_device *, int, struct nvkm_pci **); int g94_pci_new(struct nvkm_device *, int, struct nvkm_pci **); int gf100_pci_new(struct nvkm_device *, int, struct nvkm_pci **); diff --git a/drm/nouveau/nvkm/engine/device/base.c b/drm/nouveau/nvkm/engine/device/base.c index 727e18e0a..2cff79cf6 100644 --- a/drm/nouveau/nvkm/engine/device/base.c +++ b/drm/nouveau/nvkm/engine/device/base.c @@ -637,7 +637,7 @@ nv46_chipset = { .imem = nv40_instmem_new, .mc = nv44_mc_new, .mmu = nv44_mmu_new, - .pci = nv4c_pci_new, + .pci = nv46_pci_new, .therm = nv40_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, @@ -822,7 +822,7 @@ nv50_chipset = { .mc = nv50_mc_new, .mmu = nv50_mmu_new, .mxm = nv50_mxm_new, - .pci = nv50_pci_new, + .pci = nv46_pci_new, .therm = nv50_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, diff --git a/drm/nouveau/nvkm/subdev/pci/Kbuild b/drm/nouveau/nvkm/subdev/pci/Kbuild index 85cb52501..4476ef75a 100644 --- a/drm/nouveau/nvkm/subdev/pci/Kbuild +++ b/drm/nouveau/nvkm/subdev/pci/Kbuild @@ -2,8 +2,8 @@ nvkm-y += nvkm/subdev/pci/agp.o nvkm-y += nvkm/subdev/pci/base.o nvkm-y += nvkm/subdev/pci/nv04.o nvkm-y += nvkm/subdev/pci/nv40.o +nvkm-y += nvkm/subdev/pci/nv46.o nvkm-y += nvkm/subdev/pci/nv4c.o -nvkm-y += nvkm/subdev/pci/nv50.o nvkm-y += nvkm/subdev/pci/g84.o nvkm-y += nvkm/subdev/pci/g94.o nvkm-y += nvkm/subdev/pci/gf100.o diff --git a/drm/nouveau/nvkm/subdev/pci/g84.c b/drm/nouveau/nvkm/subdev/pci/g84.c index 30be277ed..8f3b00199 100644 --- a/drm/nouveau/nvkm/subdev/pci/g84.c +++ b/drm/nouveau/nvkm/subdev/pci/g84.c @@ -30,7 +30,7 @@ g84_pci_func = { .rd32 = nv40_pci_rd32, .wr08 = nv40_pci_wr08, .wr32 = nv40_pci_wr32, - .msi_rearm = nv50_pci_msi_rearm, + .msi_rearm = nv46_pci_msi_rearm, }; int diff --git a/drm/nouveau/nvkm/subdev/pci/nv46.c b/drm/nouveau/nvkm/subdev/pci/nv46.c new file mode 100644 index 000000000..fc617e4c0 --- /dev/null +++ b/drm/nouveau/nvkm/subdev/pci/nv46.c @@ -0,0 +1,51 @@ +/* + * Copyright 2015 Red Hat Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: Ben Skeggs + */ +#include "priv.h" + +#include + +/* MSI re-arm through the PRI appears to be broken on NV46/NV50/G84/G86/G92, + * so we access it via alternate PCI config space mechanisms. + */ +void +nv46_pci_msi_rearm(struct nvkm_pci *pci) +{ + struct nvkm_device *device = pci->subdev.device; + struct pci_dev *pdev = device->func->pci(device)->pdev; + pci_write_config_byte(pdev, 0x68, 0xff); +} + +static const struct nvkm_pci_func +nv46_pci_func = { + .rd32 = nv40_pci_rd32, + .wr08 = nv40_pci_wr08, + .wr32 = nv40_pci_wr32, + .msi_rearm = nv46_pci_msi_rearm, +}; + +int +nv46_pci_new(struct nvkm_device *device, int index, struct nvkm_pci **ppci) +{ + return nvkm_pci_new_(&nv46_pci_func, device, index, ppci); +} diff --git a/drm/nouveau/nvkm/subdev/pci/nv50.c b/drm/nouveau/nvkm/subdev/pci/nv50.c deleted file mode 100644 index 027481519..000000000 --- a/drm/nouveau/nvkm/subdev/pci/nv50.c +++ /dev/null @@ -1,51 +0,0 @@ -/* - * Copyright 2015 Red Hat Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: Ben Skeggs - */ -#include "priv.h" - -#include - -/* MSI re-arm through the PRI appears to be broken on NV50/G84/G86/G92, - * so we access it via alternate PCI config space mechanisms. - */ -void -nv50_pci_msi_rearm(struct nvkm_pci *pci) -{ - struct nvkm_device *device = pci->subdev.device; - struct pci_dev *pdev = device->func->pci(device)->pdev; - pci_write_config_byte(pdev, 0x68, 0xff); -} - -static const struct nvkm_pci_func -nv50_pci_func = { - .rd32 = nv40_pci_rd32, - .wr08 = nv40_pci_wr08, - .wr32 = nv40_pci_wr32, - .msi_rearm = nv50_pci_msi_rearm, -}; - -int -nv50_pci_new(struct nvkm_device *device, int index, struct nvkm_pci **ppci) -{ - return nvkm_pci_new_(&nv50_pci_func, device, index, ppci); -} diff --git a/drm/nouveau/nvkm/subdev/pci/priv.h b/drm/nouveau/nvkm/subdev/pci/priv.h index 68ce8e554..473b8ab25 100644 --- a/drm/nouveau/nvkm/subdev/pci/priv.h +++ b/drm/nouveau/nvkm/subdev/pci/priv.h @@ -18,5 +18,5 @@ void nv40_pci_wr08(struct nvkm_pci *, u16, u8); void nv40_pci_wr32(struct nvkm_pci *, u16, u32); void nv40_pci_msi_rearm(struct nvkm_pci *); -void nv50_pci_msi_rearm(struct nvkm_pci *); +void nv46_pci_msi_rearm(struct nvkm_pci *); #endif -- cgit v1.2.1