From d0b241aeba2c42ce217867d676cfdf386e9b292a Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Wed, 14 Jan 2015 15:29:43 +1000 Subject: gr: namespace + nvidia gpu names (no binary change) The namespace of NVKM is being changed to nvkm_ instead of nouveau_, which will be used for the DRM part of the driver. This is being done in order to make it very clear as to what part of the driver a given symbol belongs to, and as a minor step towards splitting the DRM driver out to be able to stand on its own (for virt). Because there's already a large amount of churn here anyway, this is as good a time as any to also switch to NVIDIA's device and chipset naming to ease collaboration with them. A comparison of objdump disassemblies proves no code changes. Signed-off-by: Ben Skeggs --- drm/nouveau/nvkm/engine/device/nvc0.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) (limited to 'drm/nouveau/nvkm/engine/device/nvc0.c') diff --git a/drm/nouveau/nvkm/engine/device/nvc0.c b/drm/nouveau/nvkm/engine/device/nvc0.c index 3ebf71728..15ed4382e 100644 --- a/drm/nouveau/nvkm/engine/device/nvc0.c +++ b/drm/nouveau/nvkm/engine/device/nvc0.c @@ -83,7 +83,7 @@ nvc0_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf100_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = gf100_fifo_oclass; device->oclass[NVDEV_ENGINE_SW ] = nvc0_sw_oclass; - device->oclass[NVDEV_ENGINE_GR ] = nvc0_gr_oclass; + device->oclass[NVDEV_ENGINE_GR ] = gf100_gr_oclass; device->oclass[NVDEV_ENGINE_MSPDEC ] = &nvc0_mspdec_oclass; device->oclass[NVDEV_ENGINE_MSVLD ] = &nvc0_msvld_oclass; device->oclass[NVDEV_ENGINE_MSPPP ] = &nvc0_msppp_oclass; @@ -116,7 +116,7 @@ nvc0_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf100_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = gf100_fifo_oclass; device->oclass[NVDEV_ENGINE_SW ] = nvc0_sw_oclass; - device->oclass[NVDEV_ENGINE_GR ] = nvc4_gr_oclass; + device->oclass[NVDEV_ENGINE_GR ] = gf104_gr_oclass; device->oclass[NVDEV_ENGINE_MSPDEC ] = &nvc0_mspdec_oclass; device->oclass[NVDEV_ENGINE_MSVLD ] = &nvc0_msvld_oclass; device->oclass[NVDEV_ENGINE_MSPPP ] = &nvc0_msppp_oclass; @@ -149,7 +149,7 @@ nvc0_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf100_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = gf100_fifo_oclass; device->oclass[NVDEV_ENGINE_SW ] = nvc0_sw_oclass; - device->oclass[NVDEV_ENGINE_GR ] = nvc4_gr_oclass; + device->oclass[NVDEV_ENGINE_GR ] = gf104_gr_oclass; device->oclass[NVDEV_ENGINE_MSPDEC ] = &nvc0_mspdec_oclass; device->oclass[NVDEV_ENGINE_MSVLD ] = &nvc0_msvld_oclass; device->oclass[NVDEV_ENGINE_MSPPP ] = &nvc0_msppp_oclass; @@ -181,7 +181,7 @@ nvc0_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf100_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = gf100_fifo_oclass; device->oclass[NVDEV_ENGINE_SW ] = nvc0_sw_oclass; - device->oclass[NVDEV_ENGINE_GR ] = nvc4_gr_oclass; + device->oclass[NVDEV_ENGINE_GR ] = gf104_gr_oclass; device->oclass[NVDEV_ENGINE_MSPDEC ] = &nvc0_mspdec_oclass; device->oclass[NVDEV_ENGINE_MSVLD ] = &nvc0_msvld_oclass; device->oclass[NVDEV_ENGINE_MSPPP ] = &nvc0_msppp_oclass; @@ -214,7 +214,7 @@ nvc0_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf100_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = gf100_fifo_oclass; device->oclass[NVDEV_ENGINE_SW ] = nvc0_sw_oclass; - device->oclass[NVDEV_ENGINE_GR ] = nvc4_gr_oclass; + device->oclass[NVDEV_ENGINE_GR ] = gf104_gr_oclass; device->oclass[NVDEV_ENGINE_MSPDEC ] = &nvc0_mspdec_oclass; device->oclass[NVDEV_ENGINE_MSVLD ] = &nvc0_msvld_oclass; device->oclass[NVDEV_ENGINE_MSPPP ] = &nvc0_msppp_oclass; @@ -246,7 +246,7 @@ nvc0_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf100_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = gf100_fifo_oclass; device->oclass[NVDEV_ENGINE_SW ] = nvc0_sw_oclass; - device->oclass[NVDEV_ENGINE_GR ] = nvc1_gr_oclass; + device->oclass[NVDEV_ENGINE_GR ] = gf108_gr_oclass; device->oclass[NVDEV_ENGINE_MSPDEC ] = &nvc0_mspdec_oclass; device->oclass[NVDEV_ENGINE_MSVLD ] = &nvc0_msvld_oclass; device->oclass[NVDEV_ENGINE_MSPPP ] = &nvc0_msppp_oclass; @@ -278,7 +278,7 @@ nvc0_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf100_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = gf100_fifo_oclass; device->oclass[NVDEV_ENGINE_SW ] = nvc0_sw_oclass; - device->oclass[NVDEV_ENGINE_GR ] = nvc8_gr_oclass; + device->oclass[NVDEV_ENGINE_GR ] = gf110_gr_oclass; device->oclass[NVDEV_ENGINE_MSPDEC ] = &nvc0_mspdec_oclass; device->oclass[NVDEV_ENGINE_MSVLD ] = &nvc0_msvld_oclass; device->oclass[NVDEV_ENGINE_MSPPP ] = &nvc0_msppp_oclass; @@ -311,7 +311,7 @@ nvc0_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = gf100_fifo_oclass; device->oclass[NVDEV_ENGINE_SW ] = nvc0_sw_oclass; - device->oclass[NVDEV_ENGINE_GR ] = nvd9_gr_oclass; + device->oclass[NVDEV_ENGINE_GR ] = gf119_gr_oclass; device->oclass[NVDEV_ENGINE_MSPDEC ] = &nvc0_mspdec_oclass; device->oclass[NVDEV_ENGINE_MSVLD ] = &nvc0_msvld_oclass; device->oclass[NVDEV_ENGINE_MSPPP ] = &nvc0_msppp_oclass; @@ -341,7 +341,7 @@ nvc0_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass; device->oclass[NVDEV_ENGINE_FIFO ] = gf100_fifo_oclass; device->oclass[NVDEV_ENGINE_SW ] = nvc0_sw_oclass; - device->oclass[NVDEV_ENGINE_GR ] = nvd7_gr_oclass; + device->oclass[NVDEV_ENGINE_GR ] = gf117_gr_oclass; device->oclass[NVDEV_ENGINE_MSPDEC ] = &nvc0_mspdec_oclass; device->oclass[NVDEV_ENGINE_MSVLD ] = &nvc0_msvld_oclass; device->oclass[NVDEV_ENGINE_MSPPP ] = &nvc0_msppp_oclass; -- cgit v1.2.1