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authorwtc%google.com <devnull@localhost>2013-01-27 00:34:35 +0000
committerwtc%google.com <devnull@localhost>2013-01-27 00:34:35 +0000
commit3e273eada9a71da1a96b929f02632c65c21bc90d (patch)
treec74b8a8c508f1d066b72915086bf7dfa22813ef1
parent5131107cab917fde3bef0db82423d8c295029b0c (diff)
downloadnss-hg-3e273eada9a71da1a96b929f02632c65c21bc90d.tar.gz
Bug 805604 and bug 835050: don't use Clang's integrated assembler becauseNSS_3_14_2_BETA3
it cannot handle how intel-gcm.s uses the .set directive to refer to registers by symbolic names. r=kaie.
-rw-r--r--security/nss/lib/freebl/Makefile8
1 files changed, 8 insertions, 0 deletions
diff --git a/security/nss/lib/freebl/Makefile b/security/nss/lib/freebl/Makefile
index 9ad9599da..9d64b2abe 100644
--- a/security/nss/lib/freebl/Makefile
+++ b/security/nss/lib/freebl/Makefile
@@ -188,6 +188,14 @@ ifeq ($(CPU_ARCH),x86_64)
# comment the next two lines to turn off intel HW accelleration
DEFINES += -DUSE_HW_AES
ASFILES += intel-aes.s intel-gcm.s
+ # The integrated assembler in Clang 3.0 does not support % in the
+ # expression of a .set directive. intel-gcm.s uses .set to give
+ # symbolic names to registers, for example,
+ # .set Htbl, %rdi
+ # So we can't use Clang's integrated assembler with intel-gcm.s.
+ ifneq (,$(findstring clang,$(AS)))
+ ASFLAGS += -no-integrated-as
+ endif
EXTRA_SRCS += intel-gcm-wrap.c
INTEL_GCM=1
MPI_SRCS += mpi_amd64.c mp_comba.c