From e8e6985e138f84d1c4cac75e2f44710cb3f99dcc Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Tue, 9 Apr 2013 16:19:22 -0600 Subject: Re-organize directory structure With the increasing number of boards and vendors supported, create a directory hierarchy to organize things. The hierarchy is ${soc}/${vendor}/${board} Signed-off-by: Stephen Warren Reviewed-by: Thierry Reding --- ...H5TC4G83MFR-PBA_400MHz_120613_sdmmc4_x8.bct.cfg | 819 ------------- beaver/beaver-emmc.img.cfg | 22 - beaver/build.sh | 27 - ...2G83BFR-PBA_375MHz_111114_317_sdmmc4_x8.bct.cfg | 819 ------------- ...2G83BFR-PBA_667MHz_111121_317_sdmmc4_x8.bct.cfg | 819 ------------- ...4G83MFR-PBA_375MHz_111122_317_sdmmc4_x8.bct.cfg | 819 ------------- cardhu/README.txt | 49 - cardhu/build.sh | 37 - cardhu/cardhu-a02-a04-1gb-emmc.img.cfg | 22 - cardhu/cardhu-a02-a04-2gb-emmc.img.cfg | 22 - cardhu/cardhu-a05-2gb-emmc.img.cfg | 22 - ...nix_2GB_H5TC4G63AFR-RDA_792MHz_r403_v03.bct.cfg | 1273 -------------------- ...ynix_2GB_H5TC4G63AFR-RDA_792Mhz_r403_v2.bct.cfg | 1273 -------------------- ...nix_2GB_H5TC4G63MFR-PBA_792Mhz_r403_v05.bct.cfg | 1273 -------------------- dalmore/README.txt | 7 - dalmore/build.sh | 37 - dalmore/dalmore-t40s-1600.img.cfg | 22 - dalmore/dalmore-t40s-1866.img.cfg | 22 - dalmore/dalmore-t40x-1866.img.cfg | 22 - harmony/build.sh | 27 - harmony/harmony-nand.img.cfg | 22 - ...-S6C_333Mhz_1GB_2K8Nand_HY27UF084G2B-TP.bct.cfg | 153 --- medcom-wide/build.sh | 27 - plutux/build.sh | 27 - ...2_Hynix_1GB_H5PS2G83AFR-S6C_380MHz_nand.bct.cfg | 153 --- seaboard/build.sh | 27 - seaboard/seaboard-nand.img.cfg | 22 - ...onten_T2_512MB_MEM2G16D2D-ABG-25_366MHz.bct.cfg | 132 -- tamonten/tegra20.img.cfg | 22 - tec/build.sh | 27 - ...nix_2GB_H5TC4G63AFR-RDA_792MHz_r403_v03.bct.cfg | 1273 ++++++++++++++++++++ ...ynix_2GB_H5TC4G63AFR-RDA_792Mhz_r403_v2.bct.cfg | 1273 ++++++++++++++++++++ ...nix_2GB_H5TC4G63MFR-PBA_792Mhz_r403_v05.bct.cfg | 1273 ++++++++++++++++++++ tegra114/nvidia/dalmore/README.txt | 7 + tegra114/nvidia/dalmore/build.sh | 37 + tegra114/nvidia/dalmore/dalmore-t40s-1600.img.cfg | 22 + tegra114/nvidia/dalmore/dalmore-t40s-1866.img.cfg | 22 + tegra114/nvidia/dalmore/dalmore-t40x-1866.img.cfg | 22 + tegra20/avionic-design/medcom-wide/build.sh | 27 + tegra20/avionic-design/plutux/build.sh | 27 + ...onten_T2_512MB_MEM2G16D2D-ABG-25_366MHz.bct.cfg | 132 ++ tegra20/avionic-design/tamonten/tegra20.img.cfg | 22 + tegra20/avionic-design/tec/build.sh | 27 + tegra20/compulab/trimslice/README.txt | 25 + tegra20/compulab/trimslice/build.sh | 28 + tegra20/compulab/trimslice/trimslice-mmc.bct.cfg | 149 +++ tegra20/compulab/trimslice/trimslice-mmc.img.cfg | 23 + tegra20/compulab/trimslice/trimslice-spi.bct.cfg | 134 +++ tegra20/compulab/trimslice/trimslice-spi.img.cfg | 21 + tegra20/nvidia/harmony/build.sh | 27 + tegra20/nvidia/harmony/harmony-nand.img.cfg | 22 + ...-S6C_333Mhz_1GB_2K8Nand_HY27UF084G2B-TP.bct.cfg | 153 +++ ...2_Hynix_1GB_H5PS2G83AFR-S6C_380MHz_nand.bct.cfg | 153 +++ tegra20/nvidia/seaboard/build.sh | 27 + tegra20/nvidia/seaboard/seaboard-nand.img.cfg | 22 + tegra20/nvidia/ventana/build.sh | 27 + tegra20/nvidia/ventana/ventana-emmc.img.cfg | 22 + ...B1PB6DF_300Mhz_1GB_emmc_THGBM1G6D4EBAI4.bct.cfg | 145 +++ ...MB_EDB4032B2PB-6D-F_300MHz_40nm_emmc_x8.bct.cfg | 145 +++ tegra20/nvidia/whistler/build.sh | 27 + tegra20/nvidia/whistler/whistler-emmc.img.cfg | 22 + ...H5TC4G83MFR-PBA_400MHz_120613_sdmmc4_x8.bct.cfg | 819 +++++++++++++ tegra30/nvidia/beaver/beaver-emmc.img.cfg | 22 + tegra30/nvidia/beaver/build.sh | 27 + ...2G83BFR-PBA_375MHz_111114_317_sdmmc4_x8.bct.cfg | 819 +++++++++++++ ...2G83BFR-PBA_667MHz_111121_317_sdmmc4_x8.bct.cfg | 819 +++++++++++++ ...4G83MFR-PBA_375MHz_111122_317_sdmmc4_x8.bct.cfg | 819 +++++++++++++ tegra30/nvidia/cardhu/README.txt | 49 + tegra30/nvidia/cardhu/build.sh | 37 + .../nvidia/cardhu/cardhu-a02-a04-1gb-emmc.img.cfg | 22 + .../nvidia/cardhu/cardhu-a02-a04-2gb-emmc.img.cfg | 22 + tegra30/nvidia/cardhu/cardhu-a05-2gb-emmc.img.cfg | 22 + trimslice/README.txt | 25 - trimslice/build.sh | 28 - trimslice/trimslice-mmc.bct.cfg | 149 --- trimslice/trimslice-mmc.img.cfg | 23 - trimslice/trimslice-spi.bct.cfg | 134 --- trimslice/trimslice-spi.img.cfg | 21 - ventana/build.sh | 27 - ventana/ventana-emmc.img.cfg | 22 - ...B1PB6DF_300Mhz_1GB_emmc_THGBM1G6D4EBAI4.bct.cfg | 145 --- ...MB_EDB4032B2PB-6D-F_300MHz_40nm_emmc_x8.bct.cfg | 145 --- whistler/build.sh | 27 - whistler/whistler-emmc.img.cfg | 22 - 84 files changed, 8813 insertions(+), 8813 deletions(-) delete mode 100644 beaver/Pm315_Hynix_2GB_H5TC4G83MFR-PBA_400MHz_120613_sdmmc4_x8.bct.cfg delete mode 100644 beaver/beaver-emmc.img.cfg delete mode 100755 beaver/build.sh delete mode 100644 cardhu/E1186_Hynix_1GB_H5TC2G83BFR-PBA_375MHz_111114_317_sdmmc4_x8.bct.cfg delete mode 100644 cardhu/E1198_Hynix_2GB_H5TC2G83BFR-PBA_667MHz_111121_317_sdmmc4_x8.bct.cfg delete mode 100644 cardhu/E1198_Hynix_2GB_H5TC4G83MFR-PBA_375MHz_111122_317_sdmmc4_x8.bct.cfg delete mode 100644 cardhu/README.txt delete mode 100755 cardhu/build.sh delete mode 100644 cardhu/cardhu-a02-a04-1gb-emmc.img.cfg delete mode 100644 cardhu/cardhu-a02-a04-2gb-emmc.img.cfg delete mode 100644 cardhu/cardhu-a05-2gb-emmc.img.cfg delete mode 100644 dalmore/E1611_Hynix_2GB_H5TC4G63AFR-RDA_792MHz_r403_v03.bct.cfg delete mode 100644 dalmore/E1611_Hynix_2GB_H5TC4G63AFR-RDA_792Mhz_r403_v2.bct.cfg delete mode 100644 dalmore/E1611_Hynix_2GB_H5TC4G63MFR-PBA_792Mhz_r403_v05.bct.cfg delete mode 100644 dalmore/README.txt delete mode 100755 dalmore/build.sh delete mode 100644 dalmore/dalmore-t40s-1600.img.cfg delete mode 100644 dalmore/dalmore-t40s-1866.img.cfg delete mode 100644 dalmore/dalmore-t40x-1866.img.cfg delete mode 100755 harmony/build.sh delete mode 100644 harmony/harmony-nand.img.cfg delete mode 100644 harmony/harmony_a02_12Mhz_H5PS1G83EFR-S6C_333Mhz_1GB_2K8Nand_HY27UF084G2B-TP.bct.cfg delete mode 100755 medcom-wide/build.sh delete mode 100755 plutux/build.sh delete mode 100644 seaboard/PM282_Hynix_1GB_H5PS2G83AFR-S6C_380MHz_nand.bct.cfg delete mode 100755 seaboard/build.sh delete mode 100644 seaboard/seaboard-nand.img.cfg delete mode 100644 tamonten/Tamonten_T2_512MB_MEM2G16D2D-ABG-25_366MHz.bct.cfg delete mode 100644 tamonten/tegra20.img.cfg delete mode 100755 tec/build.sh create mode 100644 tegra114/nvidia/dalmore/E1611_Hynix_2GB_H5TC4G63AFR-RDA_792MHz_r403_v03.bct.cfg create mode 100644 tegra114/nvidia/dalmore/E1611_Hynix_2GB_H5TC4G63AFR-RDA_792Mhz_r403_v2.bct.cfg create mode 100644 tegra114/nvidia/dalmore/E1611_Hynix_2GB_H5TC4G63MFR-PBA_792Mhz_r403_v05.bct.cfg create mode 100644 tegra114/nvidia/dalmore/README.txt create mode 100755 tegra114/nvidia/dalmore/build.sh create mode 100644 tegra114/nvidia/dalmore/dalmore-t40s-1600.img.cfg create mode 100644 tegra114/nvidia/dalmore/dalmore-t40s-1866.img.cfg create mode 100644 tegra114/nvidia/dalmore/dalmore-t40x-1866.img.cfg create mode 100755 tegra20/avionic-design/medcom-wide/build.sh create mode 100755 tegra20/avionic-design/plutux/build.sh create mode 100644 tegra20/avionic-design/tamonten/Tamonten_T2_512MB_MEM2G16D2D-ABG-25_366MHz.bct.cfg create mode 100644 tegra20/avionic-design/tamonten/tegra20.img.cfg create mode 100755 tegra20/avionic-design/tec/build.sh create mode 100644 tegra20/compulab/trimslice/README.txt create mode 100755 tegra20/compulab/trimslice/build.sh create mode 100644 tegra20/compulab/trimslice/trimslice-mmc.bct.cfg create mode 100644 tegra20/compulab/trimslice/trimslice-mmc.img.cfg create mode 100644 tegra20/compulab/trimslice/trimslice-spi.bct.cfg create mode 100644 tegra20/compulab/trimslice/trimslice-spi.img.cfg create mode 100755 tegra20/nvidia/harmony/build.sh create mode 100644 tegra20/nvidia/harmony/harmony-nand.img.cfg create mode 100644 tegra20/nvidia/harmony/harmony_a02_12Mhz_H5PS1G83EFR-S6C_333Mhz_1GB_2K8Nand_HY27UF084G2B-TP.bct.cfg create mode 100644 tegra20/nvidia/seaboard/PM282_Hynix_1GB_H5PS2G83AFR-S6C_380MHz_nand.bct.cfg create mode 100755 tegra20/nvidia/seaboard/build.sh create mode 100644 tegra20/nvidia/seaboard/seaboard-nand.img.cfg create mode 100755 tegra20/nvidia/ventana/build.sh create mode 100644 tegra20/nvidia/ventana/ventana-emmc.img.cfg create mode 100644 tegra20/nvidia/ventana/ventana_A03_12MHz_EDB8132B1PB6DF_300Mhz_1GB_emmc_THGBM1G6D4EBAI4.bct.cfg create mode 100644 tegra20/nvidia/whistler/E1108_Elpida_512MB_EDB4032B2PB-6D-F_300MHz_40nm_emmc_x8.bct.cfg create mode 100755 tegra20/nvidia/whistler/build.sh create mode 100644 tegra20/nvidia/whistler/whistler-emmc.img.cfg create mode 100644 tegra30/nvidia/beaver/Pm315_Hynix_2GB_H5TC4G83MFR-PBA_400MHz_120613_sdmmc4_x8.bct.cfg create mode 100644 tegra30/nvidia/beaver/beaver-emmc.img.cfg create mode 100755 tegra30/nvidia/beaver/build.sh create mode 100644 tegra30/nvidia/cardhu/E1186_Hynix_1GB_H5TC2G83BFR-PBA_375MHz_111114_317_sdmmc4_x8.bct.cfg create mode 100644 tegra30/nvidia/cardhu/E1198_Hynix_2GB_H5TC2G83BFR-PBA_667MHz_111121_317_sdmmc4_x8.bct.cfg create mode 100644 tegra30/nvidia/cardhu/E1198_Hynix_2GB_H5TC4G83MFR-PBA_375MHz_111122_317_sdmmc4_x8.bct.cfg create mode 100644 tegra30/nvidia/cardhu/README.txt create mode 100755 tegra30/nvidia/cardhu/build.sh create mode 100644 tegra30/nvidia/cardhu/cardhu-a02-a04-1gb-emmc.img.cfg create mode 100644 tegra30/nvidia/cardhu/cardhu-a02-a04-2gb-emmc.img.cfg create mode 100644 tegra30/nvidia/cardhu/cardhu-a05-2gb-emmc.img.cfg delete mode 100644 trimslice/README.txt delete mode 100755 trimslice/build.sh delete mode 100644 trimslice/trimslice-mmc.bct.cfg delete mode 100644 trimslice/trimslice-mmc.img.cfg delete mode 100644 trimslice/trimslice-spi.bct.cfg delete mode 100644 trimslice/trimslice-spi.img.cfg delete mode 100755 ventana/build.sh delete mode 100644 ventana/ventana-emmc.img.cfg delete mode 100644 ventana/ventana_A03_12MHz_EDB8132B1PB6DF_300Mhz_1GB_emmc_THGBM1G6D4EBAI4.bct.cfg delete mode 100644 whistler/E1108_Elpida_512MB_EDB4032B2PB-6D-F_300MHz_40nm_emmc_x8.bct.cfg delete mode 100755 whistler/build.sh delete mode 100644 whistler/whistler-emmc.img.cfg diff --git a/beaver/Pm315_Hynix_2GB_H5TC4G83MFR-PBA_400MHz_120613_sdmmc4_x8.bct.cfg b/beaver/Pm315_Hynix_2GB_H5TC4G83MFR-PBA_400MHz_120613_sdmmc4_x8.bct.cfg deleted file mode 100644 index 49f302f..0000000 --- a/beaver/Pm315_Hynix_2GB_H5TC4G83MFR-PBA_400MHz_120613_sdmmc4_x8.bct.cfg +++ /dev/null @@ -1,819 +0,0 @@ -# Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. -# -# This software is provided 'as-is', without any express or implied -# warranty. In no event will the authors be held liable for any damages -# arising from the use of this software. -# -# Permission is granted to anyone to use this software for any purpose, -# including commercial applications, and to alter it and redistribute it -# freely, subject to the following restrictions: -# -# 1. The origin of this software must not be misrepresented; you must not -# claim that you wrote the original software. If you use this software -# in a product, an acknowledgment in the product documentation would be -# appreciated but is not required. -# 2. Altered source versions must be plainly marked as such, and must not be -# misrepresented as being the original software. -# 3. This notice may not be removed or altered from any source distribution. - -Version = 0x00030001; -BlockSize = 0x00004000; -PageSize = 0x00000200; -PartitionSize = 0x02000000; -OdmData = 0x800c0000; - -DevType[0] = NvBootDevType_Sdmmc; -DeviceParam[0].SdmmcParams.ClockDivider = 0x00000009; -DeviceParam[0].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_8Bit; -DeviceParam[0].SdmmcParams.MaxPowerClassSupported = 0x00000000; -DeviceParam[0].SdmmcParams.SdController = 0x00000000; - -DevType[1] = NvBootDevType_Sdmmc; -DeviceParam[1].SdmmcParams.ClockDivider = 0x00000009; -DeviceParam[1].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_8Bit; -DeviceParam[1].SdmmcParams.MaxPowerClassSupported = 0x00000000; -DeviceParam[1].SdmmcParams.SdController = 0x00000000; - -DevType[2] = NvBootDevType_Sdmmc; -DeviceParam[2].SdmmcParams.ClockDivider = 0x00000009; -DeviceParam[2].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_8Bit; -DeviceParam[2].SdmmcParams.MaxPowerClassSupported = 0x00000000; -DeviceParam[2].SdmmcParams.SdController = 0x00000000; - -DevType[3] = NvBootDevType_Sdmmc; -DeviceParam[3].SdmmcParams.ClockDivider = 0x00000009; -DeviceParam[3].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_8Bit; -DeviceParam[3].SdmmcParams.MaxPowerClassSupported = 0x00000000; -DeviceParam[3].SdmmcParams.SdController = 0x00000000; - -SDRAM[0].MemoryType = NvBootMemoryType_Ddr3; -SDRAM[0].PllMChargePumpSetupControl = 0x00000008; -SDRAM[0].PllMLoopFilterSetupControl = 0x00000000; -SDRAM[0].PllMInputDivider = 0x0000000c; -SDRAM[0].PllMFeedbackDivider = 0x00000320; -SDRAM[0].PllMPostDivider = 0x00000000; -SDRAM[0].PllMStableTime = 0x0000012c; -SDRAM[0].EmcClockDivider = 0x00000002; -SDRAM[0].EmcAutoCalInterval = 0x001fffff; -SDRAM[0].EmcAutoCalConfig = 0xa0f10000; -SDRAM[0].EmcAutoCalWait = 0x00000064; -SDRAM[0].EmcPinProgramWait = 0x00000001; -SDRAM[0].EmcRc = 0x00000012; -SDRAM[0].EmcRfc = 0x00000066; -SDRAM[0].EmcRas = 0x0000000c; -SDRAM[0].EmcRp = 0x00000004; -SDRAM[0].EmcR2w = 0x00000003; -SDRAM[0].EmcW2r = 0x00000008; -SDRAM[0].EmcR2p = 0x00000002; -SDRAM[0].EmcW2p = 0x0000000a; -SDRAM[0].EmcRrd = 0x00000002; -SDRAM[0].EmcRdRcd = 0x00000004; -SDRAM[0].EmcWrRcd = 0x00000004; -SDRAM[0].EmcRext = 0x00000001; -SDRAM[0].EmcWdv = 0x00000004; -SDRAM[0].EmcQUseExtra = 0x00000000; -SDRAM[0].EmcQUse = 0x00000006; -SDRAM[0].EmcQRst = 0x00000004; -SDRAM[0].EmcQSafe = 0x0000000a; -SDRAM[0].EmcRdv = 0x0000000d; -SDRAM[0].EmcRefresh = 0x00000bf0; -SDRAM[0].EmcBurstRefreshNum = 0x00000000; -SDRAM[0].EmcPdEx2Wr = 0x00000001; -SDRAM[0].EmcPdEx2Rd = 0x00000008; -SDRAM[0].EmcPChg2Pden = 0x00000001; -SDRAM[0].EmcAct2Pden = 0x00000000; -SDRAM[0].EmcAr2Pden = 0x00000008; -SDRAM[0].EmcRw2Pden = 0x0000000f; -SDRAM[0].EmcTxsr = 0x0000006c; -SDRAM[0].EmcTcke = 0x00000004; -SDRAM[0].EmcTfaw = 0x0000000c; -SDRAM[0].EmcTrpab = 0x00000000; -SDRAM[0].EmcTClkStable = 0x00000004; -SDRAM[0].EmcTClkStop = 0x00000005; -SDRAM[0].EmcTRefBw = 0x00000c30; -SDRAM[0].EmcFbioCfg5 = 0x00007088; -SDRAM[0].EmcFbioCfg6 = 0x00000006; -SDRAM[0].EmcFbioSpare = 0xe8000000; -SDRAM[0].EmcMrsResetDllWait = 0x00000000; -SDRAM[0].EmcMrsResetDll = 0x00000000; -SDRAM[0].EmcMrsDdr2DllReset = 0x00000000; -SDRAM[0].EmcMrs = 0x80000521; -SDRAM[0].EmcEmrsEmr2 = 0x80200000; -SDRAM[0].EmcEmrsEmr3 = 0x80300000; -SDRAM[0].EmcEmrsDdr2DllEnable = 0x00000000; -SDRAM[0].EmcEmrsDdr2OcdCalib = 0x00000000; -SDRAM[0].EmcEmrs = 0x80100002; -SDRAM[0].EmcMrw1 = 0x00000000; -SDRAM[0].EmcMrw2 = 0x00000000; -SDRAM[0].EmcMrw3 = 0x00000000; -SDRAM[0].EmcMrwResetCommand = 0x00000000; -SDRAM[0].EmcMrwResetNInitWait = 0x00000000; -SDRAM[0].EmcAdrCfg = 0x00000080; -SDRAM[0].McEmemCfg = 0x00000800; -SDRAM[0].EmcCfg2 = 0x000c0099; -SDRAM[0].EmcCfgDigDll = 0x001d0084; -SDRAM[0].EmcCfgDigDllPeriod = 0x00008000; -SDRAM[0].EmcCfg = 0x23c00000; -SDRAM[0].EmcDbg = 0x01000400; -SDRAM[0].WarmBootWait = 0x00000002; -SDRAM[0].EmcCttTermCtrl = 0x00000802; -SDRAM[0].EmcOdtWrite = 0x00000000; -SDRAM[0].EmcOdtRead = 0x00000000; -SDRAM[0].EmcZcalWaitCnt = 0x00000040; -SDRAM[0].EmcZcalMrwCmd = 0x80000000; -SDRAM[0].EmcDdr2Wait = 0x00000000; -SDRAM[0].PmcDdrPwr = 0x00000003; -SDRAM[0].EmcClockSource = 0x00000000; -SDRAM[0].EmcClockUsePllMUD = 0x00000000; -SDRAM[0].EmcPinExtraWait = 0x00000000; -SDRAM[0].EmcTimingControlWait = 0x00000000; -SDRAM[0].EmcWext = 0x00000000; -SDRAM[0].EmcCtt = 0x00000000; -SDRAM[0].EmcCttDuration = 0x00000000; -SDRAM[0].EmcPreRefreshReqCnt = 0x000002fc; -SDRAM[0].EmcTxsrDll = 0x00000200; -SDRAM[0].EmcCfgRsv = 0xff00ff89; -SDRAM[0].EmcMrwExtra = 0x00000000; -SDRAM[0].EmcWarmBootMrw1 = 0x00000000; -SDRAM[0].EmcWarmBootMrw2 = 0x00000000; -SDRAM[0].EmcWarmBootMrw3 = 0x00000000; -SDRAM[0].EmcWarmBootMrwExtra = 0x00000000; -SDRAM[0].EmcWarmBootExtraModeRegWriteEnable = 0x00000000; -SDRAM[0].EmcExtraModeRegWriteEnable = 0x00000000; -SDRAM[0].EmcMrsWaitCnt = 0x0158000c; -SDRAM[0].EmcCmdQ = 0x10004408; -SDRAM[0].EmcMc2EmcQ = 0x06000404; -SDRAM[0].EmcDynSelfRefControl = 0x800018c8; -SDRAM[0].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; -SDRAM[0].EmcDevSelect = 0x00000002; -SDRAM[0].EmcSelDpdCtrl = 0x0004032c; -SDRAM[0].EmcDllXformDqs0 = 0x00038000; -SDRAM[0].EmcDllXformDqs1 = 0x00038000; -SDRAM[0].EmcDllXformDqs2 = 0x00038000; -SDRAM[0].EmcDllXformDqs3 = 0x00038000; -SDRAM[0].EmcDllXformDqs4 = 0x00038000; -SDRAM[0].EmcDllXformDqs5 = 0x00038000; -SDRAM[0].EmcDllXformDqs6 = 0x00038000; -SDRAM[0].EmcDllXformDqs7 = 0x00038000; -SDRAM[0].EmcDllXformQUse0 = 0x00000000; -SDRAM[0].EmcDllXformQUse1 = 0x00000000; -SDRAM[0].EmcDllXformQUse2 = 0x00000000; -SDRAM[0].EmcDllXformQUse3 = 0x00000000; -SDRAM[0].EmcDllXformQUse4 = 0x00000000; -SDRAM[0].EmcDllXformQUse5 = 0x00000000; -SDRAM[0].EmcDllXformQUse6 = 0x00000000; -SDRAM[0].EmcDllXformQUse7 = 0x00000000; -SDRAM[0].EmcDliTrimTxDqs0 = 0x00000000; -SDRAM[0].EmcDliTrimTxDqs1 = 0x00000000; -SDRAM[0].EmcDliTrimTxDqs2 = 0x00000000; -SDRAM[0].EmcDliTrimTxDqs3 = 0x00000000; -SDRAM[0].EmcDliTrimTxDqs4 = 0x00000000; -SDRAM[0].EmcDliTrimTxDqs5 = 0x00000000; -SDRAM[0].EmcDliTrimTxDqs6 = 0x00000000; -SDRAM[0].EmcDliTrimTxDqs7 = 0x00000000; -SDRAM[0].EmcDllXformDq0 = 0x00030000; -SDRAM[0].EmcDllXformDq1 = 0x00030000; -SDRAM[0].EmcDllXformDq2 = 0x00030000; -SDRAM[0].EmcDllXformDq3 = 0x00030000; -SDRAM[0].EmcZcalInterval = 0x00020000; -SDRAM[0].EmcZcalInitDev0 = 0x80000011; -SDRAM[0].EmcZcalInitDev1 = 0x00000000; -SDRAM[0].EmcZcalInitWait = 0x00000002; -SDRAM[0].EmcZcalColdBootEnable = 0x00000001; -SDRAM[0].EmcZcalWarmBootEnable = 0x00000001; -SDRAM[0].EmcMrwLpddr2ZcalWarmBoot = 0x000a00ab; -SDRAM[0].EmcZqCalDdr3WarmBoot = 0x00000011; -SDRAM[0].EmcZcalWarmBootWait = 0x00000001; -SDRAM[0].EmcMrsWarmBootEnable = 0x00000001; -SDRAM[0].EmcMrsExtra = 0x80000521; -SDRAM[0].EmcWarmBootMrs = 0x80100002; -SDRAM[0].EmcWarmBootEmrs = 0x80000521; -SDRAM[0].EmcWarmBootEmr2 = 0x80200000; -SDRAM[0].EmcWarmBootEmr3 = 0x80300000; -SDRAM[0].EmcWarmBootMrsExtra = 0x80100002; -SDRAM[0].EmcClkenOverride = 0x00000000; -SDRAM[0].EmcExtraRefreshNum = 0x00000002; -SDRAM[0].EmcClkenOverrideAllWarmBoot = 0x00000000; -SDRAM[0].McClkenOverrideAllWarmBoot = 0x00000000; -SDRAM[0].EmcCfgDigDllPeriodWarmBoot = 0x00000003; -SDRAM[0].PmcVddpSel = 0x00000002; -SDRAM[0].PmcDdrCfg = 0x00000002; -SDRAM[0].PmcIoDpdReq = 0x80800000; -SDRAM[0].PmcENoVttGen = 0x00000000; -SDRAM[0].PmcNoIoPower = 0x00000000; -SDRAM[0].EmcXm2CmdPadCtrl = 0x000002a0; -SDRAM[0].EmcXm2CmdPadCtrl2 = 0x770c0000; -SDRAM[0].EmcXm2DqsPadCtrl = 0x770c1414; -SDRAM[0].EmcXm2DqsPadCtrl2 = 0x0800013d; -SDRAM[0].EmcXm2DqsPadCtrl3 = 0x08000021; -SDRAM[0].EmcXm2DqPadCtrl = 0x770c2990; -SDRAM[0].EmcXm2DqPadCtrl2 = 0x00000000; -SDRAM[0].EmcXm2ClkPadCtrl = 0x77fff884; -SDRAM[0].EmcXm2CompPadCtrl = 0x01f1f508; -SDRAM[0].EmcXm2VttGenPadCtrl = 0x05057404; -SDRAM[0].EmcXm2VttGenPadCtrl2 = 0x54000007; -SDRAM[0].EmcXm2QUsePadCtrl = 0x080001e8; -SDRAM[0].McEmemAdrCfg = 0x00000000; -SDRAM[0].McEmemAdrCfgDev0 = 0x00090303; -SDRAM[0].McEmemAdrCfgDev1 = 0x00090303; -SDRAM[0].McEmemArbCfg = 0x00000006; -SDRAM[0].McEmemArbOutstandingReq = 0x80000048; -SDRAM[0].McEmemArbTimingRcd = 0x00000001; -SDRAM[0].McEmemArbTimingRp = 0x00000002; -SDRAM[0].McEmemArbTimingRc = 0x00000009; -SDRAM[0].McEmemArbTimingRas = 0x00000005; -SDRAM[0].McEmemArbTimingFaw = 0x00000005; -SDRAM[0].McEmemArbTimingRrd = 0x00000001; -SDRAM[0].McEmemArbTimingRap2Pre = 0x00000002; -SDRAM[0].McEmemArbTimingWap2Pre = 0x00000008; -SDRAM[0].McEmemArbTimingR2R = 0x00000002; -SDRAM[0].McEmemArbTimingW2W = 0x00000002; -SDRAM[0].McEmemArbTimingR2W = 0x00000003; -SDRAM[0].McEmemArbTimingW2R = 0x00000006; -SDRAM[0].McEmemArbDaTurns = 0x06030202; -SDRAM[0].McEmemArbDaCovers = 0x000d0709; -SDRAM[0].McEmemArbMisc0 = 0x7086120a; -SDRAM[0].McEmemArbMisc1 = 0x78000000; -SDRAM[0].McEmemArbRing1Throttle = 0x001f0000; -SDRAM[0].McEmemArbOverride = 0x00000080; -SDRAM[0].McEmemArbRsv = 0xff00ff00; -SDRAM[0].McClkenOverride = 0x00000000; - -SDRAM[1].MemoryType = NvBootMemoryType_Ddr3; -SDRAM[1].PllMChargePumpSetupControl = 0x00000008; -SDRAM[1].PllMLoopFilterSetupControl = 0x00000000; -SDRAM[1].PllMInputDivider = 0x0000000c; -SDRAM[1].PllMFeedbackDivider = 0x00000320; -SDRAM[1].PllMPostDivider = 0x00000000; -SDRAM[1].PllMStableTime = 0x0000012c; -SDRAM[1].EmcClockDivider = 0x00000002; -SDRAM[1].EmcAutoCalInterval = 0x001fffff; -SDRAM[1].EmcAutoCalConfig = 0xa0f10000; -SDRAM[1].EmcAutoCalWait = 0x00000064; -SDRAM[1].EmcPinProgramWait = 0x00000001; -SDRAM[1].EmcRc = 0x00000012; -SDRAM[1].EmcRfc = 0x00000066; -SDRAM[1].EmcRas = 0x0000000c; -SDRAM[1].EmcRp = 0x00000004; -SDRAM[1].EmcR2w = 0x00000003; -SDRAM[1].EmcW2r = 0x00000008; -SDRAM[1].EmcR2p = 0x00000002; -SDRAM[1].EmcW2p = 0x0000000a; -SDRAM[1].EmcRrd = 0x00000002; -SDRAM[1].EmcRdRcd = 0x00000004; -SDRAM[1].EmcWrRcd = 0x00000004; -SDRAM[1].EmcRext = 0x00000001; -SDRAM[1].EmcWdv = 0x00000004; -SDRAM[1].EmcQUseExtra = 0x00000000; -SDRAM[1].EmcQUse = 0x00000006; -SDRAM[1].EmcQRst = 0x00000004; -SDRAM[1].EmcQSafe = 0x0000000a; -SDRAM[1].EmcRdv = 0x0000000d; -SDRAM[1].EmcRefresh = 0x00000bf0; -SDRAM[1].EmcBurstRefreshNum = 0x00000000; -SDRAM[1].EmcPdEx2Wr = 0x00000001; -SDRAM[1].EmcPdEx2Rd = 0x00000008; -SDRAM[1].EmcPChg2Pden = 0x00000001; -SDRAM[1].EmcAct2Pden = 0x00000000; -SDRAM[1].EmcAr2Pden = 0x00000008; -SDRAM[1].EmcRw2Pden = 0x0000000f; -SDRAM[1].EmcTxsr = 0x0000006c; -SDRAM[1].EmcTcke = 0x00000004; -SDRAM[1].EmcTfaw = 0x0000000c; -SDRAM[1].EmcTrpab = 0x00000000; -SDRAM[1].EmcTClkStable = 0x00000004; -SDRAM[1].EmcTClkStop = 0x00000005; -SDRAM[1].EmcTRefBw = 0x00000c30; -SDRAM[1].EmcFbioCfg5 = 0x00007088; -SDRAM[1].EmcFbioCfg6 = 0x00000006; -SDRAM[1].EmcFbioSpare = 0xe8000000; -SDRAM[1].EmcMrsResetDllWait = 0x00000000; -SDRAM[1].EmcMrsResetDll = 0x00000000; -SDRAM[1].EmcMrsDdr2DllReset = 0x00000000; -SDRAM[1].EmcMrs = 0x80000521; -SDRAM[1].EmcEmrsEmr2 = 0x80200000; -SDRAM[1].EmcEmrsEmr3 = 0x80300000; -SDRAM[1].EmcEmrsDdr2DllEnable = 0x00000000; -SDRAM[1].EmcEmrsDdr2OcdCalib = 0x00000000; -SDRAM[1].EmcEmrs = 0x80100002; -SDRAM[1].EmcMrw1 = 0x00000000; -SDRAM[1].EmcMrw2 = 0x00000000; -SDRAM[1].EmcMrw3 = 0x00000000; -SDRAM[1].EmcMrwResetCommand = 0x00000000; -SDRAM[1].EmcMrwResetNInitWait = 0x00000000; -SDRAM[1].EmcAdrCfg = 0x00000080; -SDRAM[1].McEmemCfg = 0x00000800; -SDRAM[1].EmcCfg2 = 0x000c0099; -SDRAM[1].EmcCfgDigDll = 0x001d0084; -SDRAM[1].EmcCfgDigDllPeriod = 0x00008000; -SDRAM[1].EmcCfg = 0x23c00000; -SDRAM[1].EmcDbg = 0x01000400; -SDRAM[1].WarmBootWait = 0x00000002; -SDRAM[1].EmcCttTermCtrl = 0x00000802; -SDRAM[1].EmcOdtWrite = 0x00000000; -SDRAM[1].EmcOdtRead = 0x00000000; -SDRAM[1].EmcZcalWaitCnt = 0x00000040; -SDRAM[1].EmcZcalMrwCmd = 0x80000000; -SDRAM[1].EmcDdr2Wait = 0x00000000; -SDRAM[1].PmcDdrPwr = 0x00000003; -SDRAM[1].EmcClockSource = 0x00000000; -SDRAM[1].EmcClockUsePllMUD = 0x00000000; -SDRAM[1].EmcPinExtraWait = 0x00000000; -SDRAM[1].EmcTimingControlWait = 0x00000000; -SDRAM[1].EmcWext = 0x00000000; -SDRAM[1].EmcCtt = 0x00000000; -SDRAM[1].EmcCttDuration = 0x00000000; -SDRAM[1].EmcPreRefreshReqCnt = 0x000002fc; -SDRAM[1].EmcTxsrDll = 0x00000200; -SDRAM[1].EmcCfgRsv = 0xff00ff89; -SDRAM[1].EmcMrwExtra = 0x00000000; -SDRAM[1].EmcWarmBootMrw1 = 0x00000000; -SDRAM[1].EmcWarmBootMrw2 = 0x00000000; -SDRAM[1].EmcWarmBootMrw3 = 0x00000000; -SDRAM[1].EmcWarmBootMrwExtra = 0x00000000; -SDRAM[1].EmcWarmBootExtraModeRegWriteEnable = 0x00000000; -SDRAM[1].EmcExtraModeRegWriteEnable = 0x00000000; -SDRAM[1].EmcMrsWaitCnt = 0x0158000c; -SDRAM[1].EmcCmdQ = 0x10004408; -SDRAM[1].EmcMc2EmcQ = 0x06000404; -SDRAM[1].EmcDynSelfRefControl = 0x800018c8; -SDRAM[1].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; -SDRAM[1].EmcDevSelect = 0x00000002; -SDRAM[1].EmcSelDpdCtrl = 0x0004032c; -SDRAM[1].EmcDllXformDqs0 = 0x00038000; -SDRAM[1].EmcDllXformDqs1 = 0x00038000; -SDRAM[1].EmcDllXformDqs2 = 0x00038000; -SDRAM[1].EmcDllXformDqs3 = 0x00038000; -SDRAM[1].EmcDllXformDqs4 = 0x00038000; -SDRAM[1].EmcDllXformDqs5 = 0x00038000; -SDRAM[1].EmcDllXformDqs6 = 0x00038000; -SDRAM[1].EmcDllXformDqs7 = 0x00038000; -SDRAM[1].EmcDllXformQUse0 = 0x00000000; -SDRAM[1].EmcDllXformQUse1 = 0x00000000; -SDRAM[1].EmcDllXformQUse2 = 0x00000000; -SDRAM[1].EmcDllXformQUse3 = 0x00000000; -SDRAM[1].EmcDllXformQUse4 = 0x00000000; -SDRAM[1].EmcDllXformQUse5 = 0x00000000; -SDRAM[1].EmcDllXformQUse6 = 0x00000000; -SDRAM[1].EmcDllXformQUse7 = 0x00000000; -SDRAM[1].EmcDliTrimTxDqs0 = 0x00000000; -SDRAM[1].EmcDliTrimTxDqs1 = 0x00000000; -SDRAM[1].EmcDliTrimTxDqs2 = 0x00000000; -SDRAM[1].EmcDliTrimTxDqs3 = 0x00000000; -SDRAM[1].EmcDliTrimTxDqs4 = 0x00000000; -SDRAM[1].EmcDliTrimTxDqs5 = 0x00000000; -SDRAM[1].EmcDliTrimTxDqs6 = 0x00000000; -SDRAM[1].EmcDliTrimTxDqs7 = 0x00000000; -SDRAM[1].EmcDllXformDq0 = 0x00030000; -SDRAM[1].EmcDllXformDq1 = 0x00030000; -SDRAM[1].EmcDllXformDq2 = 0x00030000; -SDRAM[1].EmcDllXformDq3 = 0x00030000; -SDRAM[1].EmcZcalInterval = 0x00020000; -SDRAM[1].EmcZcalInitDev0 = 0x80000011; -SDRAM[1].EmcZcalInitDev1 = 0x00000000; -SDRAM[1].EmcZcalInitWait = 0x00000002; -SDRAM[1].EmcZcalColdBootEnable = 0x00000001; -SDRAM[1].EmcZcalWarmBootEnable = 0x00000001; -SDRAM[1].EmcMrwLpddr2ZcalWarmBoot = 0x000a00ab; -SDRAM[1].EmcZqCalDdr3WarmBoot = 0x00000011; -SDRAM[1].EmcZcalWarmBootWait = 0x00000001; -SDRAM[1].EmcMrsWarmBootEnable = 0x00000001; -SDRAM[1].EmcMrsExtra = 0x80000521; -SDRAM[1].EmcWarmBootMrs = 0x80100002; -SDRAM[1].EmcWarmBootEmrs = 0x80000521; -SDRAM[1].EmcWarmBootEmr2 = 0x80200000; -SDRAM[1].EmcWarmBootEmr3 = 0x80300000; -SDRAM[1].EmcWarmBootMrsExtra = 0x80100002; -SDRAM[1].EmcClkenOverride = 0x00000000; -SDRAM[1].EmcExtraRefreshNum = 0x00000002; -SDRAM[1].EmcClkenOverrideAllWarmBoot = 0x00000000; -SDRAM[1].McClkenOverrideAllWarmBoot = 0x00000000; -SDRAM[1].EmcCfgDigDllPeriodWarmBoot = 0x00000003; -SDRAM[1].PmcVddpSel = 0x00000002; -SDRAM[1].PmcDdrCfg = 0x00000002; -SDRAM[1].PmcIoDpdReq = 0x80800000; -SDRAM[1].PmcENoVttGen = 0x00000000; -SDRAM[1].PmcNoIoPower = 0x00000000; -SDRAM[1].EmcXm2CmdPadCtrl = 0x000002a0; -SDRAM[1].EmcXm2CmdPadCtrl2 = 0x770c0000; -SDRAM[1].EmcXm2DqsPadCtrl = 0x770c1414; -SDRAM[1].EmcXm2DqsPadCtrl2 = 0x0800013d; -SDRAM[1].EmcXm2DqsPadCtrl3 = 0x08000021; -SDRAM[1].EmcXm2DqPadCtrl = 0x770c2990; -SDRAM[1].EmcXm2DqPadCtrl2 = 0x00000000; -SDRAM[1].EmcXm2ClkPadCtrl = 0x77fff884; -SDRAM[1].EmcXm2CompPadCtrl = 0x01f1f508; -SDRAM[1].EmcXm2VttGenPadCtrl = 0x05057404; -SDRAM[1].EmcXm2VttGenPadCtrl2 = 0x54000007; -SDRAM[1].EmcXm2QUsePadCtrl = 0x080001e8; -SDRAM[1].McEmemAdrCfg = 0x00000000; -SDRAM[1].McEmemAdrCfgDev0 = 0x00090303; -SDRAM[1].McEmemAdrCfgDev1 = 0x00090303; -SDRAM[1].McEmemArbCfg = 0x00000006; -SDRAM[1].McEmemArbOutstandingReq = 0x80000048; -SDRAM[1].McEmemArbTimingRcd = 0x00000001; -SDRAM[1].McEmemArbTimingRp = 0x00000002; -SDRAM[1].McEmemArbTimingRc = 0x00000009; -SDRAM[1].McEmemArbTimingRas = 0x00000005; -SDRAM[1].McEmemArbTimingFaw = 0x00000005; -SDRAM[1].McEmemArbTimingRrd = 0x00000001; -SDRAM[1].McEmemArbTimingRap2Pre = 0x00000002; -SDRAM[1].McEmemArbTimingWap2Pre = 0x00000008; -SDRAM[1].McEmemArbTimingR2R = 0x00000002; -SDRAM[1].McEmemArbTimingW2W = 0x00000002; -SDRAM[1].McEmemArbTimingR2W = 0x00000003; -SDRAM[1].McEmemArbTimingW2R = 0x00000006; -SDRAM[1].McEmemArbDaTurns = 0x06030202; -SDRAM[1].McEmemArbDaCovers = 0x000d0709; -SDRAM[1].McEmemArbMisc0 = 0x7086120a; -SDRAM[1].McEmemArbMisc1 = 0x78000000; -SDRAM[1].McEmemArbRing1Throttle = 0x001f0000; -SDRAM[1].McEmemArbOverride = 0x00000080; -SDRAM[1].McEmemArbRsv = 0xff00ff00; -SDRAM[1].McClkenOverride = 0x00000000; - -SDRAM[2].MemoryType = NvBootMemoryType_Ddr3; -SDRAM[2].PllMChargePumpSetupControl = 0x00000008; -SDRAM[2].PllMLoopFilterSetupControl = 0x00000000; -SDRAM[2].PllMInputDivider = 0x0000000c; -SDRAM[2].PllMFeedbackDivider = 0x00000320; -SDRAM[2].PllMPostDivider = 0x00000000; -SDRAM[2].PllMStableTime = 0x0000012c; -SDRAM[2].EmcClockDivider = 0x00000002; -SDRAM[2].EmcAutoCalInterval = 0x001fffff; -SDRAM[2].EmcAutoCalConfig = 0xa0f10000; -SDRAM[2].EmcAutoCalWait = 0x00000064; -SDRAM[2].EmcPinProgramWait = 0x00000001; -SDRAM[2].EmcRc = 0x00000012; -SDRAM[2].EmcRfc = 0x00000066; -SDRAM[2].EmcRas = 0x0000000c; -SDRAM[2].EmcRp = 0x00000004; -SDRAM[2].EmcR2w = 0x00000003; -SDRAM[2].EmcW2r = 0x00000008; -SDRAM[2].EmcR2p = 0x00000002; -SDRAM[2].EmcW2p = 0x0000000a; -SDRAM[2].EmcRrd = 0x00000002; -SDRAM[2].EmcRdRcd = 0x00000004; -SDRAM[2].EmcWrRcd = 0x00000004; -SDRAM[2].EmcRext = 0x00000001; -SDRAM[2].EmcWdv = 0x00000004; -SDRAM[2].EmcQUseExtra = 0x00000000; -SDRAM[2].EmcQUse = 0x00000006; -SDRAM[2].EmcQRst = 0x00000004; -SDRAM[2].EmcQSafe = 0x0000000a; -SDRAM[2].EmcRdv = 0x0000000d; -SDRAM[2].EmcRefresh = 0x00000bf0; -SDRAM[2].EmcBurstRefreshNum = 0x00000000; -SDRAM[2].EmcPdEx2Wr = 0x00000001; -SDRAM[2].EmcPdEx2Rd = 0x00000008; -SDRAM[2].EmcPChg2Pden = 0x00000001; -SDRAM[2].EmcAct2Pden = 0x00000000; -SDRAM[2].EmcAr2Pden = 0x00000008; -SDRAM[2].EmcRw2Pden = 0x0000000f; -SDRAM[2].EmcTxsr = 0x0000006c; -SDRAM[2].EmcTcke = 0x00000004; -SDRAM[2].EmcTfaw = 0x0000000c; -SDRAM[2].EmcTrpab = 0x00000000; -SDRAM[2].EmcTClkStable = 0x00000004; -SDRAM[2].EmcTClkStop = 0x00000005; -SDRAM[2].EmcTRefBw = 0x00000c30; -SDRAM[2].EmcFbioCfg5 = 0x00007088; -SDRAM[2].EmcFbioCfg6 = 0x00000006; -SDRAM[2].EmcFbioSpare = 0xe8000000; -SDRAM[2].EmcMrsResetDllWait = 0x00000000; -SDRAM[2].EmcMrsResetDll = 0x00000000; -SDRAM[2].EmcMrsDdr2DllReset = 0x00000000; -SDRAM[2].EmcMrs = 0x80000521; -SDRAM[2].EmcEmrsEmr2 = 0x80200000; -SDRAM[2].EmcEmrsEmr3 = 0x80300000; -SDRAM[2].EmcEmrsDdr2DllEnable = 0x00000000; -SDRAM[2].EmcEmrsDdr2OcdCalib = 0x00000000; -SDRAM[2].EmcEmrs = 0x80100002; -SDRAM[2].EmcMrw1 = 0x00000000; -SDRAM[2].EmcMrw2 = 0x00000000; -SDRAM[2].EmcMrw3 = 0x00000000; -SDRAM[2].EmcMrwResetCommand = 0x00000000; -SDRAM[2].EmcMrwResetNInitWait = 0x00000000; -SDRAM[2].EmcAdrCfg = 0x00000080; -SDRAM[2].McEmemCfg = 0x00000800; -SDRAM[2].EmcCfg2 = 0x000c0099; -SDRAM[2].EmcCfgDigDll = 0x001d0084; -SDRAM[2].EmcCfgDigDllPeriod = 0x00008000; -SDRAM[2].EmcCfg = 0x23c00000; -SDRAM[2].EmcDbg = 0x01000400; -SDRAM[2].WarmBootWait = 0x00000002; -SDRAM[2].EmcCttTermCtrl = 0x00000802; -SDRAM[2].EmcOdtWrite = 0x00000000; -SDRAM[2].EmcOdtRead = 0x00000000; -SDRAM[2].EmcZcalWaitCnt = 0x00000040; -SDRAM[2].EmcZcalMrwCmd = 0x80000000; -SDRAM[2].EmcDdr2Wait = 0x00000000; -SDRAM[2].PmcDdrPwr = 0x00000003; -SDRAM[2].EmcClockSource = 0x00000000; -SDRAM[2].EmcClockUsePllMUD = 0x00000000; -SDRAM[2].EmcPinExtraWait = 0x00000000; -SDRAM[2].EmcTimingControlWait = 0x00000000; -SDRAM[2].EmcWext = 0x00000000; -SDRAM[2].EmcCtt = 0x00000000; -SDRAM[2].EmcCttDuration = 0x00000000; -SDRAM[2].EmcPreRefreshReqCnt = 0x000002fc; -SDRAM[2].EmcTxsrDll = 0x00000200; -SDRAM[2].EmcCfgRsv = 0xff00ff89; -SDRAM[2].EmcMrwExtra = 0x00000000; -SDRAM[2].EmcWarmBootMrw1 = 0x00000000; -SDRAM[2].EmcWarmBootMrw2 = 0x00000000; -SDRAM[2].EmcWarmBootMrw3 = 0x00000000; -SDRAM[2].EmcWarmBootMrwExtra = 0x00000000; -SDRAM[2].EmcWarmBootExtraModeRegWriteEnable = 0x00000000; -SDRAM[2].EmcExtraModeRegWriteEnable = 0x00000000; -SDRAM[2].EmcMrsWaitCnt = 0x0158000c; -SDRAM[2].EmcCmdQ = 0x10004408; -SDRAM[2].EmcMc2EmcQ = 0x06000404; -SDRAM[2].EmcDynSelfRefControl = 0x800018c8; -SDRAM[2].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; -SDRAM[2].EmcDevSelect = 0x00000002; -SDRAM[2].EmcSelDpdCtrl = 0x0004032c; -SDRAM[2].EmcDllXformDqs0 = 0x00038000; -SDRAM[2].EmcDllXformDqs1 = 0x00038000; -SDRAM[2].EmcDllXformDqs2 = 0x00038000; -SDRAM[2].EmcDllXformDqs3 = 0x00038000; -SDRAM[2].EmcDllXformDqs4 = 0x00038000; -SDRAM[2].EmcDllXformDqs5 = 0x00038000; -SDRAM[2].EmcDllXformDqs6 = 0x00038000; -SDRAM[2].EmcDllXformDqs7 = 0x00038000; -SDRAM[2].EmcDllXformQUse0 = 0x00000000; -SDRAM[2].EmcDllXformQUse1 = 0x00000000; -SDRAM[2].EmcDllXformQUse2 = 0x00000000; -SDRAM[2].EmcDllXformQUse3 = 0x00000000; -SDRAM[2].EmcDllXformQUse4 = 0x00000000; -SDRAM[2].EmcDllXformQUse5 = 0x00000000; -SDRAM[2].EmcDllXformQUse6 = 0x00000000; -SDRAM[2].EmcDllXformQUse7 = 0x00000000; -SDRAM[2].EmcDliTrimTxDqs0 = 0x00000000; -SDRAM[2].EmcDliTrimTxDqs1 = 0x00000000; -SDRAM[2].EmcDliTrimTxDqs2 = 0x00000000; -SDRAM[2].EmcDliTrimTxDqs3 = 0x00000000; -SDRAM[2].EmcDliTrimTxDqs4 = 0x00000000; -SDRAM[2].EmcDliTrimTxDqs5 = 0x00000000; -SDRAM[2].EmcDliTrimTxDqs6 = 0x00000000; -SDRAM[2].EmcDliTrimTxDqs7 = 0x00000000; -SDRAM[2].EmcDllXformDq0 = 0x00030000; -SDRAM[2].EmcDllXformDq1 = 0x00030000; -SDRAM[2].EmcDllXformDq2 = 0x00030000; -SDRAM[2].EmcDllXformDq3 = 0x00030000; -SDRAM[2].EmcZcalInterval = 0x00020000; -SDRAM[2].EmcZcalInitDev0 = 0x80000011; -SDRAM[2].EmcZcalInitDev1 = 0x00000000; -SDRAM[2].EmcZcalInitWait = 0x00000002; -SDRAM[2].EmcZcalColdBootEnable = 0x00000001; -SDRAM[2].EmcZcalWarmBootEnable = 0x00000001; -SDRAM[2].EmcMrwLpddr2ZcalWarmBoot = 0x000a00ab; -SDRAM[2].EmcZqCalDdr3WarmBoot = 0x00000011; -SDRAM[2].EmcZcalWarmBootWait = 0x00000001; -SDRAM[2].EmcMrsWarmBootEnable = 0x00000001; -SDRAM[2].EmcMrsExtra = 0x80000521; -SDRAM[2].EmcWarmBootMrs = 0x80100002; -SDRAM[2].EmcWarmBootEmrs = 0x80000521; -SDRAM[2].EmcWarmBootEmr2 = 0x80200000; -SDRAM[2].EmcWarmBootEmr3 = 0x80300000; -SDRAM[2].EmcWarmBootMrsExtra = 0x80100002; -SDRAM[2].EmcClkenOverride = 0x00000000; -SDRAM[2].EmcExtraRefreshNum = 0x00000002; -SDRAM[2].EmcClkenOverrideAllWarmBoot = 0x00000000; -SDRAM[2].McClkenOverrideAllWarmBoot = 0x00000000; -SDRAM[2].EmcCfgDigDllPeriodWarmBoot = 0x00000003; -SDRAM[2].PmcVddpSel = 0x00000002; -SDRAM[2].PmcDdrCfg = 0x00000002; -SDRAM[2].PmcIoDpdReq = 0x80800000; -SDRAM[2].PmcENoVttGen = 0x00000000; -SDRAM[2].PmcNoIoPower = 0x00000000; -SDRAM[2].EmcXm2CmdPadCtrl = 0x000002a0; -SDRAM[2].EmcXm2CmdPadCtrl2 = 0x770c0000; -SDRAM[2].EmcXm2DqsPadCtrl = 0x770c1414; -SDRAM[2].EmcXm2DqsPadCtrl2 = 0x0800013d; -SDRAM[2].EmcXm2DqsPadCtrl3 = 0x08000021; -SDRAM[2].EmcXm2DqPadCtrl = 0x770c2990; -SDRAM[2].EmcXm2DqPadCtrl2 = 0x00000000; -SDRAM[2].EmcXm2ClkPadCtrl = 0x77fff884; -SDRAM[2].EmcXm2CompPadCtrl = 0x01f1f508; -SDRAM[2].EmcXm2VttGenPadCtrl = 0x05057404; -SDRAM[2].EmcXm2VttGenPadCtrl2 = 0x54000007; -SDRAM[2].EmcXm2QUsePadCtrl = 0x080001e8; -SDRAM[2].McEmemAdrCfg = 0x00000000; -SDRAM[2].McEmemAdrCfgDev0 = 0x00090303; -SDRAM[2].McEmemAdrCfgDev1 = 0x00090303; -SDRAM[2].McEmemArbCfg = 0x00000006; -SDRAM[2].McEmemArbOutstandingReq = 0x80000048; -SDRAM[2].McEmemArbTimingRcd = 0x00000001; -SDRAM[2].McEmemArbTimingRp = 0x00000002; -SDRAM[2].McEmemArbTimingRc = 0x00000009; -SDRAM[2].McEmemArbTimingRas = 0x00000005; -SDRAM[2].McEmemArbTimingFaw = 0x00000005; -SDRAM[2].McEmemArbTimingRrd = 0x00000001; -SDRAM[2].McEmemArbTimingRap2Pre = 0x00000002; -SDRAM[2].McEmemArbTimingWap2Pre = 0x00000008; -SDRAM[2].McEmemArbTimingR2R = 0x00000002; -SDRAM[2].McEmemArbTimingW2W = 0x00000002; -SDRAM[2].McEmemArbTimingR2W = 0x00000003; -SDRAM[2].McEmemArbTimingW2R = 0x00000006; -SDRAM[2].McEmemArbDaTurns = 0x06030202; -SDRAM[2].McEmemArbDaCovers = 0x000d0709; -SDRAM[2].McEmemArbMisc0 = 0x7086120a; -SDRAM[2].McEmemArbMisc1 = 0x78000000; -SDRAM[2].McEmemArbRing1Throttle = 0x001f0000; -SDRAM[2].McEmemArbOverride = 0x00000080; -SDRAM[2].McEmemArbRsv = 0xff00ff00; -SDRAM[2].McClkenOverride = 0x00000000; - -SDRAM[3].MemoryType = NvBootMemoryType_Ddr3; -SDRAM[3].PllMChargePumpSetupControl = 0x00000008; -SDRAM[3].PllMLoopFilterSetupControl = 0x00000000; -SDRAM[3].PllMInputDivider = 0x0000000c; -SDRAM[3].PllMFeedbackDivider = 0x00000320; -SDRAM[3].PllMPostDivider = 0x00000000; -SDRAM[3].PllMStableTime = 0x0000012c; -SDRAM[3].EmcClockDivider = 0x00000002; -SDRAM[3].EmcAutoCalInterval = 0x001fffff; -SDRAM[3].EmcAutoCalConfig = 0xa0f10000; -SDRAM[3].EmcAutoCalWait = 0x00000064; -SDRAM[3].EmcPinProgramWait = 0x00000001; -SDRAM[3].EmcRc = 0x00000012; -SDRAM[3].EmcRfc = 0x00000066; -SDRAM[3].EmcRas = 0x0000000c; -SDRAM[3].EmcRp = 0x00000004; -SDRAM[3].EmcR2w = 0x00000003; -SDRAM[3].EmcW2r = 0x00000008; -SDRAM[3].EmcR2p = 0x00000002; -SDRAM[3].EmcW2p = 0x0000000a; -SDRAM[3].EmcRrd = 0x00000002; -SDRAM[3].EmcRdRcd = 0x00000004; -SDRAM[3].EmcWrRcd = 0x00000004; -SDRAM[3].EmcRext = 0x00000001; -SDRAM[3].EmcWdv = 0x00000004; -SDRAM[3].EmcQUseExtra = 0x00000000; -SDRAM[3].EmcQUse = 0x00000006; -SDRAM[3].EmcQRst = 0x00000004; -SDRAM[3].EmcQSafe = 0x0000000a; -SDRAM[3].EmcRdv = 0x0000000d; -SDRAM[3].EmcRefresh = 0x00000bf0; -SDRAM[3].EmcBurstRefreshNum = 0x00000000; -SDRAM[3].EmcPdEx2Wr = 0x00000001; -SDRAM[3].EmcPdEx2Rd = 0x00000008; -SDRAM[3].EmcPChg2Pden = 0x00000001; -SDRAM[3].EmcAct2Pden = 0x00000000; -SDRAM[3].EmcAr2Pden = 0x00000008; -SDRAM[3].EmcRw2Pden = 0x0000000f; -SDRAM[3].EmcTxsr = 0x0000006c; -SDRAM[3].EmcTcke = 0x00000004; -SDRAM[3].EmcTfaw = 0x0000000c; -SDRAM[3].EmcTrpab = 0x00000000; -SDRAM[3].EmcTClkStable = 0x00000004; -SDRAM[3].EmcTClkStop = 0x00000005; -SDRAM[3].EmcTRefBw = 0x00000c30; -SDRAM[3].EmcFbioCfg5 = 0x00007088; -SDRAM[3].EmcFbioCfg6 = 0x00000006; -SDRAM[3].EmcFbioSpare = 0xe8000000; -SDRAM[3].EmcMrsResetDllWait = 0x00000000; -SDRAM[3].EmcMrsResetDll = 0x00000000; -SDRAM[3].EmcMrsDdr2DllReset = 0x00000000; -SDRAM[3].EmcMrs = 0x80000521; -SDRAM[3].EmcEmrsEmr2 = 0x80200000; -SDRAM[3].EmcEmrsEmr3 = 0x80300000; -SDRAM[3].EmcEmrsDdr2DllEnable = 0x00000000; -SDRAM[3].EmcEmrsDdr2OcdCalib = 0x00000000; -SDRAM[3].EmcEmrs = 0x80100002; -SDRAM[3].EmcMrw1 = 0x00000000; -SDRAM[3].EmcMrw2 = 0x00000000; -SDRAM[3].EmcMrw3 = 0x00000000; -SDRAM[3].EmcMrwResetCommand = 0x00000000; -SDRAM[3].EmcMrwResetNInitWait = 0x00000000; -SDRAM[3].EmcAdrCfg = 0x00000080; -SDRAM[3].McEmemCfg = 0x00000800; -SDRAM[3].EmcCfg2 = 0x000c0099; -SDRAM[3].EmcCfgDigDll = 0x001d0084; -SDRAM[3].EmcCfgDigDllPeriod = 0x00008000; -SDRAM[3].EmcCfg = 0x23c00000; -SDRAM[3].EmcDbg = 0x01000400; -SDRAM[3].WarmBootWait = 0x00000002; -SDRAM[3].EmcCttTermCtrl = 0x00000802; -SDRAM[3].EmcOdtWrite = 0x00000000; -SDRAM[3].EmcOdtRead = 0x00000000; -SDRAM[3].EmcZcalWaitCnt = 0x00000040; -SDRAM[3].EmcZcalMrwCmd = 0x80000000; -SDRAM[3].EmcDdr2Wait = 0x00000000; -SDRAM[3].PmcDdrPwr = 0x00000003; -SDRAM[3].EmcClockSource = 0x00000000; -SDRAM[3].EmcClockUsePllMUD = 0x00000000; -SDRAM[3].EmcPinExtraWait = 0x00000000; -SDRAM[3].EmcTimingControlWait = 0x00000000; -SDRAM[3].EmcWext = 0x00000000; -SDRAM[3].EmcCtt = 0x00000000; -SDRAM[3].EmcCttDuration = 0x00000000; -SDRAM[3].EmcPreRefreshReqCnt = 0x000002fc; -SDRAM[3].EmcTxsrDll = 0x00000200; -SDRAM[3].EmcCfgRsv = 0xff00ff89; -SDRAM[3].EmcMrwExtra = 0x00000000; -SDRAM[3].EmcWarmBootMrw1 = 0x00000000; -SDRAM[3].EmcWarmBootMrw2 = 0x00000000; -SDRAM[3].EmcWarmBootMrw3 = 0x00000000; -SDRAM[3].EmcWarmBootMrwExtra = 0x00000000; -SDRAM[3].EmcWarmBootExtraModeRegWriteEnable = 0x00000000; -SDRAM[3].EmcExtraModeRegWriteEnable = 0x00000000; -SDRAM[3].EmcMrsWaitCnt = 0x0158000c; -SDRAM[3].EmcCmdQ = 0x10004408; -SDRAM[3].EmcMc2EmcQ = 0x06000404; -SDRAM[3].EmcDynSelfRefControl = 0x800018c8; -SDRAM[3].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; -SDRAM[3].EmcDevSelect = 0x00000002; -SDRAM[3].EmcSelDpdCtrl = 0x0004032c; -SDRAM[3].EmcDllXformDqs0 = 0x00038000; -SDRAM[3].EmcDllXformDqs1 = 0x00038000; -SDRAM[3].EmcDllXformDqs2 = 0x00038000; -SDRAM[3].EmcDllXformDqs3 = 0x00038000; -SDRAM[3].EmcDllXformDqs4 = 0x00038000; -SDRAM[3].EmcDllXformDqs5 = 0x00038000; -SDRAM[3].EmcDllXformDqs6 = 0x00038000; -SDRAM[3].EmcDllXformDqs7 = 0x00038000; -SDRAM[3].EmcDllXformQUse0 = 0x00000000; -SDRAM[3].EmcDllXformQUse1 = 0x00000000; -SDRAM[3].EmcDllXformQUse2 = 0x00000000; -SDRAM[3].EmcDllXformQUse3 = 0x00000000; -SDRAM[3].EmcDllXformQUse4 = 0x00000000; -SDRAM[3].EmcDllXformQUse5 = 0x00000000; -SDRAM[3].EmcDllXformQUse6 = 0x00000000; -SDRAM[3].EmcDllXformQUse7 = 0x00000000; -SDRAM[3].EmcDliTrimTxDqs0 = 0x00000000; -SDRAM[3].EmcDliTrimTxDqs1 = 0x00000000; -SDRAM[3].EmcDliTrimTxDqs2 = 0x00000000; -SDRAM[3].EmcDliTrimTxDqs3 = 0x00000000; -SDRAM[3].EmcDliTrimTxDqs4 = 0x00000000; -SDRAM[3].EmcDliTrimTxDqs5 = 0x00000000; -SDRAM[3].EmcDliTrimTxDqs6 = 0x00000000; -SDRAM[3].EmcDliTrimTxDqs7 = 0x00000000; -SDRAM[3].EmcDllXformDq0 = 0x00030000; -SDRAM[3].EmcDllXformDq1 = 0x00030000; -SDRAM[3].EmcDllXformDq2 = 0x00030000; -SDRAM[3].EmcDllXformDq3 = 0x00030000; -SDRAM[3].EmcZcalInterval = 0x00020000; -SDRAM[3].EmcZcalInitDev0 = 0x80000011; -SDRAM[3].EmcZcalInitDev1 = 0x00000000; -SDRAM[3].EmcZcalInitWait = 0x00000002; -SDRAM[3].EmcZcalColdBootEnable = 0x00000001; -SDRAM[3].EmcZcalWarmBootEnable = 0x00000001; -SDRAM[3].EmcMrwLpddr2ZcalWarmBoot = 0x000a00ab; -SDRAM[3].EmcZqCalDdr3WarmBoot = 0x00000011; -SDRAM[3].EmcZcalWarmBootWait = 0x00000001; -SDRAM[3].EmcMrsWarmBootEnable = 0x00000001; -SDRAM[3].EmcMrsExtra = 0x80000521; -SDRAM[3].EmcWarmBootMrs = 0x80100002; -SDRAM[3].EmcWarmBootEmrs = 0x80000521; -SDRAM[3].EmcWarmBootEmr2 = 0x80200000; -SDRAM[3].EmcWarmBootEmr3 = 0x80300000; -SDRAM[3].EmcWarmBootMrsExtra = 0x80100002; -SDRAM[3].EmcClkenOverride = 0x00000000; -SDRAM[3].EmcExtraRefreshNum = 0x00000002; -SDRAM[3].EmcClkenOverrideAllWarmBoot = 0x00000000; -SDRAM[3].McClkenOverrideAllWarmBoot = 0x00000000; -SDRAM[3].EmcCfgDigDllPeriodWarmBoot = 0x00000003; -SDRAM[3].PmcVddpSel = 0x00000002; -SDRAM[3].PmcDdrCfg = 0x00000002; -SDRAM[3].PmcIoDpdReq = 0x80800000; -SDRAM[3].PmcENoVttGen = 0x00000000; -SDRAM[3].PmcNoIoPower = 0x00000000; -SDRAM[3].EmcXm2CmdPadCtrl = 0x000002a0; -SDRAM[3].EmcXm2CmdPadCtrl2 = 0x770c0000; -SDRAM[3].EmcXm2DqsPadCtrl = 0x770c1414; -SDRAM[3].EmcXm2DqsPadCtrl2 = 0x0800013d; -SDRAM[3].EmcXm2DqsPadCtrl3 = 0x08000021; -SDRAM[3].EmcXm2DqPadCtrl = 0x770c2990; -SDRAM[3].EmcXm2DqPadCtrl2 = 0x00000000; -SDRAM[3].EmcXm2ClkPadCtrl = 0x77fff884; -SDRAM[3].EmcXm2CompPadCtrl = 0x01f1f508; -SDRAM[3].EmcXm2VttGenPadCtrl = 0x05057404; -SDRAM[3].EmcXm2VttGenPadCtrl2 = 0x54000007; -SDRAM[3].EmcXm2QUsePadCtrl = 0x080001e8; -SDRAM[3].McEmemAdrCfg = 0x00000000; -SDRAM[3].McEmemAdrCfgDev0 = 0x00090303; -SDRAM[3].McEmemAdrCfgDev1 = 0x00090303; -SDRAM[3].McEmemArbCfg = 0x00000006; -SDRAM[3].McEmemArbOutstandingReq = 0x80000048; -SDRAM[3].McEmemArbTimingRcd = 0x00000001; -SDRAM[3].McEmemArbTimingRp = 0x00000002; -SDRAM[3].McEmemArbTimingRc = 0x00000009; -SDRAM[3].McEmemArbTimingRas = 0x00000005; -SDRAM[3].McEmemArbTimingFaw = 0x00000005; -SDRAM[3].McEmemArbTimingRrd = 0x00000001; -SDRAM[3].McEmemArbTimingRap2Pre = 0x00000002; -SDRAM[3].McEmemArbTimingWap2Pre = 0x00000008; -SDRAM[3].McEmemArbTimingR2R = 0x00000002; -SDRAM[3].McEmemArbTimingW2W = 0x00000002; -SDRAM[3].McEmemArbTimingR2W = 0x00000003; -SDRAM[3].McEmemArbTimingW2R = 0x00000006; -SDRAM[3].McEmemArbDaTurns = 0x06030202; -SDRAM[3].McEmemArbDaCovers = 0x000d0709; -SDRAM[3].McEmemArbMisc0 = 0x7086120a; -SDRAM[3].McEmemArbMisc1 = 0x78000000; -SDRAM[3].McEmemArbRing1Throttle = 0x001f0000; -SDRAM[3].McEmemArbOverride = 0x00000080; -SDRAM[3].McEmemArbRsv = 0xff00ff00; -SDRAM[3].McClkenOverride = 0x00000000; diff --git a/beaver/beaver-emmc.img.cfg b/beaver/beaver-emmc.img.cfg deleted file mode 100644 index 45fdda6..0000000 --- a/beaver/beaver-emmc.img.cfg +++ /dev/null @@ -1,22 +0,0 @@ -# Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. -# -# This software is provided 'as-is', without any express or implied -# warranty. In no event will the authors be held liable for any damages -# arising from the use of this software. -# -# Permission is granted to anyone to use this software for any purpose, -# including commercial applications, and to alter it and redistribute it -# freely, subject to the following restrictions: -# -# 1. The origin of this software must not be misrepresented; you must not -# claim that you wrote the original software. If you use this software -# in a product, an acknowledgment in the product documentation would be -# appreciated but is not required. -# 2. Altered source versions must be plainly marked as such, and must not be -# misrepresented as being the original software. -# 3. This notice may not be removed or altered from any source distribution. - -Version = 0x00020001; -Bctcopy = 1; -Bctfile = Pm315_Hynix_2GB_H5TC4G83MFR-PBA_400MHz_120613_sdmmc4_x8.bct; -BootLoader = u-boot.bin,0x80108000,0x80108000,Complete; diff --git a/beaver/build.sh b/beaver/build.sh deleted file mode 100755 index c06735d..0000000 --- a/beaver/build.sh +++ /dev/null @@ -1,27 +0,0 @@ -#!/bin/sh - -# Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. -# -# This software is provided 'as-is', without any express or implied -# warranty. In no event will the authors be held liable for any damages -# arising from the use of this software. -# -# Permission is granted to anyone to use this software for any purpose, -# including commercial applications, and to alter it and redistribute it -# freely, subject to the following restrictions: -# -# 1. The origin of this software must not be misrepresented; you must not -# claim that you wrote the original software. If you use this software -# in a product, an acknowledgment in the product documentation would be -# appreciated but is not required. -# 2. Altered source versions must be plainly marked as such, and must not be -# misrepresented as being the original software. -# 3. This notice may not be removed or altered from any source distribution. - -set -e -set -x - -cbootimage -t30 -gbct \ - Pm315_Hynix_2GB_H5TC4G83MFR-PBA_400MHz_120613_sdmmc4_x8.bct.cfg \ - Pm315_Hynix_2GB_H5TC4G83MFR-PBA_400MHz_120613_sdmmc4_x8.bct -cbootimage -t30 beaver-emmc.img.cfg beaver-emmc.img diff --git a/cardhu/E1186_Hynix_1GB_H5TC2G83BFR-PBA_375MHz_111114_317_sdmmc4_x8.bct.cfg b/cardhu/E1186_Hynix_1GB_H5TC2G83BFR-PBA_375MHz_111114_317_sdmmc4_x8.bct.cfg deleted file mode 100644 index 22ede9d..0000000 --- a/cardhu/E1186_Hynix_1GB_H5TC2G83BFR-PBA_375MHz_111114_317_sdmmc4_x8.bct.cfg +++ /dev/null @@ -1,819 +0,0 @@ -# Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. -# -# This software is provided 'as-is', without any express or implied -# warranty. In no event will the authors be held liable for any damages -# arising from the use of this software. -# -# Permission is granted to anyone to use this software for any purpose, -# including commercial applications, and to alter it and redistribute it -# freely, subject to the following restrictions: -# -# 1. The origin of this software must not be misrepresented; you must not -# claim that you wrote the original software. If you use this software -# in a product, an acknowledgment in the product documentation would be -# appreciated but is not required. -# 2. Altered source versions must be plainly marked as such, and must not be -# misrepresented as being the original software. -# 3. This notice may not be removed or altered from any source distribution. - -Version = 0x00030001; -BlockSize = 0x00004000; -PageSize = 0x00000200; -PartitionSize = 0x02000000; -OdmData = 0x400c0000; - -DevType[0] = NvBootDevType_Sdmmc; -DeviceParam[0].SdmmcParams.ClockDivider = 0x00000009; -DeviceParam[0].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_8Bit; -DeviceParam[0].SdmmcParams.MaxPowerClassSupported = 0x00000000; -DeviceParam[0].SdmmcParams.SdController = 0x00000000; - -DevType[1] = NvBootDevType_Sdmmc; -DeviceParam[1].SdmmcParams.ClockDivider = 0x00000009; -DeviceParam[1].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_8Bit; -DeviceParam[1].SdmmcParams.MaxPowerClassSupported = 0x00000000; -DeviceParam[1].SdmmcParams.SdController = 0x00000000; - -DevType[2] = NvBootDevType_Sdmmc; -DeviceParam[2].SdmmcParams.ClockDivider = 0x00000009; -DeviceParam[2].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_8Bit; -DeviceParam[2].SdmmcParams.MaxPowerClassSupported = 0x00000000; -DeviceParam[2].SdmmcParams.SdController = 0x00000000; - -DevType[3] = NvBootDevType_Sdmmc; -DeviceParam[3].SdmmcParams.ClockDivider = 0x00000009; -DeviceParam[3].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_8Bit; -DeviceParam[3].SdmmcParams.MaxPowerClassSupported = 0x00000000; -DeviceParam[3].SdmmcParams.SdController = 0x00000000; - -SDRAM[0].MemoryType = NvBootMemoryType_Ddr3; -SDRAM[0].PllMChargePumpSetupControl = 0x00000008; -SDRAM[0].PllMLoopFilterSetupControl = 0x00000000; -SDRAM[0].PllMInputDivider = 0x0000000c; -SDRAM[0].PllMFeedbackDivider = 0x000002ee; -SDRAM[0].PllMPostDivider = 0x00000000; -SDRAM[0].PllMStableTime = 0x0000012c; -SDRAM[0].EmcClockDivider = 0x00000002; -SDRAM[0].EmcAutoCalInterval = 0x001fffff; -SDRAM[0].EmcAutoCalConfig = 0xa0f10000; -SDRAM[0].EmcAutoCalWait = 0x00000064; -SDRAM[0].EmcPinProgramWait = 0x00000001; -SDRAM[0].EmcRc = 0x00000011; -SDRAM[0].EmcRfc = 0x0000003a; -SDRAM[0].EmcRas = 0x0000000c; -SDRAM[0].EmcRp = 0x00000004; -SDRAM[0].EmcR2w = 0x00000003; -SDRAM[0].EmcW2r = 0x00000008; -SDRAM[0].EmcR2p = 0x00000002; -SDRAM[0].EmcW2p = 0x0000000a; -SDRAM[0].EmcRrd = 0x00000002; -SDRAM[0].EmcRdRcd = 0x00000004; -SDRAM[0].EmcWrRcd = 0x00000004; -SDRAM[0].EmcRext = 0x00000001; -SDRAM[0].EmcWdv = 0x00000004; -SDRAM[0].EmcQUseExtra = 0x00000000; -SDRAM[0].EmcQUse = 0x00000006; -SDRAM[0].EmcQRst = 0x00000004; -SDRAM[0].EmcQSafe = 0x00000008; -SDRAM[0].EmcRdv = 0x0000000d; -SDRAM[0].EmcRefresh = 0x00000b2d; -SDRAM[0].EmcBurstRefreshNum = 0x00000000; -SDRAM[0].EmcPdEx2Wr = 0x00000001; -SDRAM[0].EmcPdEx2Rd = 0x00000008; -SDRAM[0].EmcPChg2Pden = 0x00000001; -SDRAM[0].EmcAct2Pden = 0x00000000; -SDRAM[0].EmcAr2Pden = 0x00000007; -SDRAM[0].EmcRw2Pden = 0x0000000f; -SDRAM[0].EmcTxsr = 0x00000040; -SDRAM[0].EmcTcke = 0x00000004; -SDRAM[0].EmcTfaw = 0x0000000c; -SDRAM[0].EmcTrpab = 0x00000000; -SDRAM[0].EmcTClkStable = 0x00000004; -SDRAM[0].EmcTClkStop = 0x00000005; -SDRAM[0].EmcTRefBw = 0x00000b6d; -SDRAM[0].EmcFbioCfg5 = 0x00007088; -SDRAM[0].EmcFbioCfg6 = 0x00000006; -SDRAM[0].EmcFbioSpare = 0xd8000000; -SDRAM[0].EmcMrsResetDllWait = 0x00000000; -SDRAM[0].EmcMrsResetDll = 0x00000000; -SDRAM[0].EmcMrsDdr2DllReset = 0x00000000; -SDRAM[0].EmcMrs = 0x80000521; -SDRAM[0].EmcEmrsEmr2 = 0x80200000; -SDRAM[0].EmcEmrsEmr3 = 0x80300000; -SDRAM[0].EmcEmrsDdr2DllEnable = 0x00000000; -SDRAM[0].EmcEmrsDdr2OcdCalib = 0x00000000; -SDRAM[0].EmcEmrs = 0x80100002; -SDRAM[0].EmcMrw1 = 0x00000000; -SDRAM[0].EmcMrw2 = 0x00000000; -SDRAM[0].EmcMrw3 = 0x00000000; -SDRAM[0].EmcMrwResetCommand = 0x00000000; -SDRAM[0].EmcMrwResetNInitWait = 0x00000000; -SDRAM[0].EmcAdrCfg = 0x00000000; -SDRAM[0].McEmemCfg = 0x00000400; -SDRAM[0].EmcCfg2 = 0x000c0099; -SDRAM[0].EmcCfgDigDll = 0x00200084; -SDRAM[0].EmcCfgDigDllPeriod = 0x00008000; -SDRAM[0].EmcCfg = 0x23c00000; -SDRAM[0].EmcDbg = 0x01000400; -SDRAM[0].WarmBootWait = 0x00000002; -SDRAM[0].EmcCttTermCtrl = 0x00000802; -SDRAM[0].EmcOdtWrite = 0x00000000; -SDRAM[0].EmcOdtRead = 0x00000000; -SDRAM[0].EmcZcalWaitCnt = 0x00000040; -SDRAM[0].EmcZcalMrwCmd = 0x80000000; -SDRAM[0].EmcDdr2Wait = 0x00000000; -SDRAM[0].PmcDdrPwr = 0x00000003; -SDRAM[0].EmcClockSource = 0x00000000; -SDRAM[0].EmcClockUsePllMUD = 0x00000000; -SDRAM[0].EmcPinExtraWait = 0x00000000; -SDRAM[0].EmcTimingControlWait = 0x00000000; -SDRAM[0].EmcWext = 0x00000000; -SDRAM[0].EmcCtt = 0x00000000; -SDRAM[0].EmcCttDuration = 0x00000000; -SDRAM[0].EmcPreRefreshReqCnt = 0x000002cb; -SDRAM[0].EmcTxsrDll = 0x00000200; -SDRAM[0].EmcCfgRsv = 0xff00ff89; -SDRAM[0].EmcMrwExtra = 0x00000000; -SDRAM[0].EmcWarmBootMrw1 = 0x00000000; -SDRAM[0].EmcWarmBootMrw2 = 0x00000000; -SDRAM[0].EmcWarmBootMrw3 = 0x00000000; -SDRAM[0].EmcWarmBootMrwExtra = 0x00000000; -SDRAM[0].EmcWarmBootExtraModeRegWriteEnable = 0x00000000; -SDRAM[0].EmcExtraModeRegWriteEnable = 0x00000000; -SDRAM[0].EmcMrsWaitCnt = 0x0184000c; -SDRAM[0].EmcCmdQ = 0x10004408; -SDRAM[0].EmcMc2EmcQ = 0x06000404; -SDRAM[0].EmcDynSelfRefControl = 0x8000174b; -SDRAM[0].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; -SDRAM[0].EmcDevSelect = 0x00000002; -SDRAM[0].EmcSelDpdCtrl = 0x0004032c; -SDRAM[0].EmcDllXformDqs0 = 0x0003c000; -SDRAM[0].EmcDllXformDqs1 = 0x0003c000; -SDRAM[0].EmcDllXformDqs2 = 0x0003c000; -SDRAM[0].EmcDllXformDqs3 = 0x0003c000; -SDRAM[0].EmcDllXformDqs4 = 0x0003c000; -SDRAM[0].EmcDllXformDqs5 = 0x0003c000; -SDRAM[0].EmcDllXformDqs6 = 0x0003c000; -SDRAM[0].EmcDllXformDqs7 = 0x0003c000; -SDRAM[0].EmcDllXformQUse0 = 0x00000000; -SDRAM[0].EmcDllXformQUse1 = 0x00000000; -SDRAM[0].EmcDllXformQUse2 = 0x00000000; -SDRAM[0].EmcDllXformQUse3 = 0x00000000; -SDRAM[0].EmcDllXformQUse4 = 0x00000000; -SDRAM[0].EmcDllXformQUse5 = 0x00000000; -SDRAM[0].EmcDllXformQUse6 = 0x00000000; -SDRAM[0].EmcDllXformQUse7 = 0x00000000; -SDRAM[0].EmcDliTrimTxDqs0 = 0x00000000; -SDRAM[0].EmcDliTrimTxDqs1 = 0x00000000; -SDRAM[0].EmcDliTrimTxDqs2 = 0x00000000; -SDRAM[0].EmcDliTrimTxDqs3 = 0x00000000; -SDRAM[0].EmcDliTrimTxDqs4 = 0x00000000; -SDRAM[0].EmcDliTrimTxDqs5 = 0x00000000; -SDRAM[0].EmcDliTrimTxDqs6 = 0x00000000; -SDRAM[0].EmcDliTrimTxDqs7 = 0x00000000; -SDRAM[0].EmcDllXformDq0 = 0x00040000; -SDRAM[0].EmcDllXformDq1 = 0x00040000; -SDRAM[0].EmcDllXformDq2 = 0x00040000; -SDRAM[0].EmcDllXformDq3 = 0x00040000; -SDRAM[0].EmcZcalInterval = 0x00020000; -SDRAM[0].EmcZcalInitDev0 = 0x80000011; -SDRAM[0].EmcZcalInitDev1 = 0x00000000; -SDRAM[0].EmcZcalInitWait = 0x00000002; -SDRAM[0].EmcZcalColdBootEnable = 0x00000001; -SDRAM[0].EmcZcalWarmBootEnable = 0x00000001; -SDRAM[0].EmcMrwLpddr2ZcalWarmBoot = 0x000a00ab; -SDRAM[0].EmcZqCalDdr3WarmBoot = 0x00000011; -SDRAM[0].EmcZcalWarmBootWait = 0x00000001; -SDRAM[0].EmcMrsWarmBootEnable = 0x00000001; -SDRAM[0].EmcMrsExtra = 0x80000521; -SDRAM[0].EmcWarmBootMrs = 0x80100002; -SDRAM[0].EmcWarmBootEmrs = 0x80000521; -SDRAM[0].EmcWarmBootEmr2 = 0x80200000; -SDRAM[0].EmcWarmBootEmr3 = 0x80300000; -SDRAM[0].EmcWarmBootMrsExtra = 0x80100002; -SDRAM[0].EmcClkenOverride = 0x00000000; -SDRAM[0].EmcExtraRefreshNum = 0x00000002; -SDRAM[0].EmcClkenOverrideAllWarmBoot = 0x00000000; -SDRAM[0].McClkenOverrideAllWarmBoot = 0x00000000; -SDRAM[0].EmcCfgDigDllPeriodWarmBoot = 0x00000003; -SDRAM[0].PmcVddpSel = 0x00000002; -SDRAM[0].PmcDdrCfg = 0x00000002; -SDRAM[0].PmcIoDpdReq = 0x80800000; -SDRAM[0].PmcENoVttGen = 0x00000000; -SDRAM[0].PmcNoIoPower = 0x00000000; -SDRAM[0].EmcXm2CmdPadCtrl = 0x000002a0; -SDRAM[0].EmcXm2CmdPadCtrl2 = 0x770c0000; -SDRAM[0].EmcXm2DqsPadCtrl = 0x770c1414; -SDRAM[0].EmcXm2DqsPadCtrl2 = 0x0800013d; -SDRAM[0].EmcXm2DqsPadCtrl3 = 0x08000021; -SDRAM[0].EmcXm2DqPadCtrl = 0x770c2990; -SDRAM[0].EmcXm2DqPadCtrl2 = 0x00000000; -SDRAM[0].EmcXm2ClkPadCtrl = 0x77fff884; -SDRAM[0].EmcXm2CompPadCtrl = 0x01f1f508; -SDRAM[0].EmcXm2VttGenPadCtrl = 0x05057404; -SDRAM[0].EmcXm2VttGenPadCtrl2 = 0x54000007; -SDRAM[0].EmcXm2QUsePadCtrl = 0x080001e8; -SDRAM[0].McEmemAdrCfg = 0x00000000; -SDRAM[0].McEmemAdrCfgDev0 = 0x00080303; -SDRAM[0].McEmemAdrCfgDev1 = 0x00080303; -SDRAM[0].McEmemArbCfg = 0x0000000b; -SDRAM[0].McEmemArbOutstandingReq = 0xc0000044; -SDRAM[0].McEmemArbTimingRcd = 0x00000001; -SDRAM[0].McEmemArbTimingRp = 0x00000002; -SDRAM[0].McEmemArbTimingRc = 0x00000009; -SDRAM[0].McEmemArbTimingRas = 0x00000005; -SDRAM[0].McEmemArbTimingFaw = 0x00000005; -SDRAM[0].McEmemArbTimingRrd = 0x00000001; -SDRAM[0].McEmemArbTimingRap2Pre = 0x00000002; -SDRAM[0].McEmemArbTimingWap2Pre = 0x00000008; -SDRAM[0].McEmemArbTimingR2R = 0x00000002; -SDRAM[0].McEmemArbTimingW2W = 0x00000002; -SDRAM[0].McEmemArbTimingR2W = 0x00000003; -SDRAM[0].McEmemArbTimingW2R = 0x00000006; -SDRAM[0].McEmemArbDaTurns = 0x06030202; -SDRAM[0].McEmemArbDaCovers = 0x000d0709; -SDRAM[0].McEmemArbMisc0 = 0x7086110a; -SDRAM[0].McEmemArbMisc1 = 0x78000000; -SDRAM[0].McEmemArbRing1Throttle = 0x001f0000; -SDRAM[0].McEmemArbOverride = 0x00000080; -SDRAM[0].McEmemArbRsv = 0xff00ff00; -SDRAM[0].McClkenOverride = 0x00000000; - -SDRAM[1].MemoryType = NvBootMemoryType_Ddr3; -SDRAM[1].PllMChargePumpSetupControl = 0x00000008; -SDRAM[1].PllMLoopFilterSetupControl = 0x00000000; -SDRAM[1].PllMInputDivider = 0x0000000c; -SDRAM[1].PllMFeedbackDivider = 0x000002ee; -SDRAM[1].PllMPostDivider = 0x00000000; -SDRAM[1].PllMStableTime = 0x0000012c; -SDRAM[1].EmcClockDivider = 0x00000002; -SDRAM[1].EmcAutoCalInterval = 0x001fffff; -SDRAM[1].EmcAutoCalConfig = 0xa0f10000; -SDRAM[1].EmcAutoCalWait = 0x00000064; -SDRAM[1].EmcPinProgramWait = 0x00000001; -SDRAM[1].EmcRc = 0x00000011; -SDRAM[1].EmcRfc = 0x0000003a; -SDRAM[1].EmcRas = 0x0000000c; -SDRAM[1].EmcRp = 0x00000004; -SDRAM[1].EmcR2w = 0x00000003; -SDRAM[1].EmcW2r = 0x00000008; -SDRAM[1].EmcR2p = 0x00000002; -SDRAM[1].EmcW2p = 0x0000000a; -SDRAM[1].EmcRrd = 0x00000002; -SDRAM[1].EmcRdRcd = 0x00000004; -SDRAM[1].EmcWrRcd = 0x00000004; -SDRAM[1].EmcRext = 0x00000001; -SDRAM[1].EmcWdv = 0x00000004; -SDRAM[1].EmcQUseExtra = 0x00000000; -SDRAM[1].EmcQUse = 0x00000006; -SDRAM[1].EmcQRst = 0x00000004; -SDRAM[1].EmcQSafe = 0x00000008; -SDRAM[1].EmcRdv = 0x0000000d; -SDRAM[1].EmcRefresh = 0x00000b2d; -SDRAM[1].EmcBurstRefreshNum = 0x00000000; -SDRAM[1].EmcPdEx2Wr = 0x00000001; -SDRAM[1].EmcPdEx2Rd = 0x00000008; -SDRAM[1].EmcPChg2Pden = 0x00000001; -SDRAM[1].EmcAct2Pden = 0x00000000; -SDRAM[1].EmcAr2Pden = 0x00000007; -SDRAM[1].EmcRw2Pden = 0x0000000f; -SDRAM[1].EmcTxsr = 0x00000040; -SDRAM[1].EmcTcke = 0x00000004; -SDRAM[1].EmcTfaw = 0x0000000c; -SDRAM[1].EmcTrpab = 0x00000000; -SDRAM[1].EmcTClkStable = 0x00000004; -SDRAM[1].EmcTClkStop = 0x00000005; -SDRAM[1].EmcTRefBw = 0x00000b6d; -SDRAM[1].EmcFbioCfg5 = 0x00007088; -SDRAM[1].EmcFbioCfg6 = 0x00000006; -SDRAM[1].EmcFbioSpare = 0xd8000000; -SDRAM[1].EmcMrsResetDllWait = 0x00000000; -SDRAM[1].EmcMrsResetDll = 0x00000000; -SDRAM[1].EmcMrsDdr2DllReset = 0x00000000; -SDRAM[1].EmcMrs = 0x80000521; -SDRAM[1].EmcEmrsEmr2 = 0x80200000; -SDRAM[1].EmcEmrsEmr3 = 0x80300000; -SDRAM[1].EmcEmrsDdr2DllEnable = 0x00000000; -SDRAM[1].EmcEmrsDdr2OcdCalib = 0x00000000; -SDRAM[1].EmcEmrs = 0x80100002; -SDRAM[1].EmcMrw1 = 0x00000000; -SDRAM[1].EmcMrw2 = 0x00000000; -SDRAM[1].EmcMrw3 = 0x00000000; -SDRAM[1].EmcMrwResetCommand = 0x00000000; -SDRAM[1].EmcMrwResetNInitWait = 0x00000000; -SDRAM[1].EmcAdrCfg = 0x00000000; -SDRAM[1].McEmemCfg = 0x00000400; -SDRAM[1].EmcCfg2 = 0x000c0099; -SDRAM[1].EmcCfgDigDll = 0x00200084; -SDRAM[1].EmcCfgDigDllPeriod = 0x00008000; -SDRAM[1].EmcCfg = 0x23c00000; -SDRAM[1].EmcDbg = 0x01000400; -SDRAM[1].WarmBootWait = 0x00000002; -SDRAM[1].EmcCttTermCtrl = 0x00000802; -SDRAM[1].EmcOdtWrite = 0x00000000; -SDRAM[1].EmcOdtRead = 0x00000000; -SDRAM[1].EmcZcalWaitCnt = 0x00000040; -SDRAM[1].EmcZcalMrwCmd = 0x80000000; -SDRAM[1].EmcDdr2Wait = 0x00000000; -SDRAM[1].PmcDdrPwr = 0x00000003; -SDRAM[1].EmcClockSource = 0x00000000; -SDRAM[1].EmcClockUsePllMUD = 0x00000000; -SDRAM[1].EmcPinExtraWait = 0x00000000; -SDRAM[1].EmcTimingControlWait = 0x00000000; -SDRAM[1].EmcWext = 0x00000000; -SDRAM[1].EmcCtt = 0x00000000; -SDRAM[1].EmcCttDuration = 0x00000000; -SDRAM[1].EmcPreRefreshReqCnt = 0x000002cb; -SDRAM[1].EmcTxsrDll = 0x00000200; -SDRAM[1].EmcCfgRsv = 0xff00ff89; -SDRAM[1].EmcMrwExtra = 0x00000000; -SDRAM[1].EmcWarmBootMrw1 = 0x00000000; -SDRAM[1].EmcWarmBootMrw2 = 0x00000000; -SDRAM[1].EmcWarmBootMrw3 = 0x00000000; -SDRAM[1].EmcWarmBootMrwExtra = 0x00000000; -SDRAM[1].EmcWarmBootExtraModeRegWriteEnable = 0x00000000; -SDRAM[1].EmcExtraModeRegWriteEnable = 0x00000000; -SDRAM[1].EmcMrsWaitCnt = 0x0184000c; -SDRAM[1].EmcCmdQ = 0x10004408; -SDRAM[1].EmcMc2EmcQ = 0x06000404; -SDRAM[1].EmcDynSelfRefControl = 0x8000174b; -SDRAM[1].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; -SDRAM[1].EmcDevSelect = 0x00000002; -SDRAM[1].EmcSelDpdCtrl = 0x0004032c; -SDRAM[1].EmcDllXformDqs0 = 0x0003c000; -SDRAM[1].EmcDllXformDqs1 = 0x0003c000; -SDRAM[1].EmcDllXformDqs2 = 0x0003c000; -SDRAM[1].EmcDllXformDqs3 = 0x0003c000; -SDRAM[1].EmcDllXformDqs4 = 0x0003c000; -SDRAM[1].EmcDllXformDqs5 = 0x0003c000; -SDRAM[1].EmcDllXformDqs6 = 0x0003c000; -SDRAM[1].EmcDllXformDqs7 = 0x0003c000; -SDRAM[1].EmcDllXformQUse0 = 0x00000000; -SDRAM[1].EmcDllXformQUse1 = 0x00000000; -SDRAM[1].EmcDllXformQUse2 = 0x00000000; -SDRAM[1].EmcDllXformQUse3 = 0x00000000; -SDRAM[1].EmcDllXformQUse4 = 0x00000000; -SDRAM[1].EmcDllXformQUse5 = 0x00000000; -SDRAM[1].EmcDllXformQUse6 = 0x00000000; -SDRAM[1].EmcDllXformQUse7 = 0x00000000; -SDRAM[1].EmcDliTrimTxDqs0 = 0x00000000; -SDRAM[1].EmcDliTrimTxDqs1 = 0x00000000; -SDRAM[1].EmcDliTrimTxDqs2 = 0x00000000; -SDRAM[1].EmcDliTrimTxDqs3 = 0x00000000; -SDRAM[1].EmcDliTrimTxDqs4 = 0x00000000; -SDRAM[1].EmcDliTrimTxDqs5 = 0x00000000; -SDRAM[1].EmcDliTrimTxDqs6 = 0x00000000; -SDRAM[1].EmcDliTrimTxDqs7 = 0x00000000; -SDRAM[1].EmcDllXformDq0 = 0x00040000; -SDRAM[1].EmcDllXformDq1 = 0x00040000; -SDRAM[1].EmcDllXformDq2 = 0x00040000; -SDRAM[1].EmcDllXformDq3 = 0x00040000; -SDRAM[1].EmcZcalInterval = 0x00020000; -SDRAM[1].EmcZcalInitDev0 = 0x80000011; -SDRAM[1].EmcZcalInitDev1 = 0x00000000; -SDRAM[1].EmcZcalInitWait = 0x00000002; -SDRAM[1].EmcZcalColdBootEnable = 0x00000001; -SDRAM[1].EmcZcalWarmBootEnable = 0x00000001; -SDRAM[1].EmcMrwLpddr2ZcalWarmBoot = 0x000a00ab; -SDRAM[1].EmcZqCalDdr3WarmBoot = 0x00000011; -SDRAM[1].EmcZcalWarmBootWait = 0x00000001; -SDRAM[1].EmcMrsWarmBootEnable = 0x00000001; -SDRAM[1].EmcMrsExtra = 0x80000521; -SDRAM[1].EmcWarmBootMrs = 0x80100002; -SDRAM[1].EmcWarmBootEmrs = 0x80000521; -SDRAM[1].EmcWarmBootEmr2 = 0x80200000; -SDRAM[1].EmcWarmBootEmr3 = 0x80300000; -SDRAM[1].EmcWarmBootMrsExtra = 0x80100002; -SDRAM[1].EmcClkenOverride = 0x00000000; -SDRAM[1].EmcExtraRefreshNum = 0x00000002; -SDRAM[1].EmcClkenOverrideAllWarmBoot = 0x00000000; -SDRAM[1].McClkenOverrideAllWarmBoot = 0x00000000; -SDRAM[1].EmcCfgDigDllPeriodWarmBoot = 0x00000003; -SDRAM[1].PmcVddpSel = 0x00000002; -SDRAM[1].PmcDdrCfg = 0x00000002; -SDRAM[1].PmcIoDpdReq = 0x80800000; -SDRAM[1].PmcENoVttGen = 0x00000000; -SDRAM[1].PmcNoIoPower = 0x00000000; -SDRAM[1].EmcXm2CmdPadCtrl = 0x000002a0; -SDRAM[1].EmcXm2CmdPadCtrl2 = 0x770c0000; -SDRAM[1].EmcXm2DqsPadCtrl = 0x770c1414; -SDRAM[1].EmcXm2DqsPadCtrl2 = 0x0800013d; -SDRAM[1].EmcXm2DqsPadCtrl3 = 0x08000021; -SDRAM[1].EmcXm2DqPadCtrl = 0x770c2990; -SDRAM[1].EmcXm2DqPadCtrl2 = 0x00000000; -SDRAM[1].EmcXm2ClkPadCtrl = 0x77fff884; -SDRAM[1].EmcXm2CompPadCtrl = 0x01f1f508; -SDRAM[1].EmcXm2VttGenPadCtrl = 0x05057404; -SDRAM[1].EmcXm2VttGenPadCtrl2 = 0x54000007; -SDRAM[1].EmcXm2QUsePadCtrl = 0x080001e8; -SDRAM[1].McEmemAdrCfg = 0x00000000; -SDRAM[1].McEmemAdrCfgDev0 = 0x00080303; -SDRAM[1].McEmemAdrCfgDev1 = 0x00080303; -SDRAM[1].McEmemArbCfg = 0x0000000b; -SDRAM[1].McEmemArbOutstandingReq = 0xc0000044; -SDRAM[1].McEmemArbTimingRcd = 0x00000001; -SDRAM[1].McEmemArbTimingRp = 0x00000002; -SDRAM[1].McEmemArbTimingRc = 0x00000009; -SDRAM[1].McEmemArbTimingRas = 0x00000005; -SDRAM[1].McEmemArbTimingFaw = 0x00000005; -SDRAM[1].McEmemArbTimingRrd = 0x00000001; -SDRAM[1].McEmemArbTimingRap2Pre = 0x00000002; -SDRAM[1].McEmemArbTimingWap2Pre = 0x00000008; -SDRAM[1].McEmemArbTimingR2R = 0x00000002; -SDRAM[1].McEmemArbTimingW2W = 0x00000002; -SDRAM[1].McEmemArbTimingR2W = 0x00000003; -SDRAM[1].McEmemArbTimingW2R = 0x00000006; -SDRAM[1].McEmemArbDaTurns = 0x06030202; -SDRAM[1].McEmemArbDaCovers = 0x000d0709; -SDRAM[1].McEmemArbMisc0 = 0x7086110a; -SDRAM[1].McEmemArbMisc1 = 0x78000000; -SDRAM[1].McEmemArbRing1Throttle = 0x001f0000; -SDRAM[1].McEmemArbOverride = 0x00000080; -SDRAM[1].McEmemArbRsv = 0xff00ff00; -SDRAM[1].McClkenOverride = 0x00000000; - -SDRAM[2].MemoryType = NvBootMemoryType_Ddr3; -SDRAM[2].PllMChargePumpSetupControl = 0x00000008; -SDRAM[2].PllMLoopFilterSetupControl = 0x00000000; -SDRAM[2].PllMInputDivider = 0x0000000c; -SDRAM[2].PllMFeedbackDivider = 0x000002ee; -SDRAM[2].PllMPostDivider = 0x00000000; -SDRAM[2].PllMStableTime = 0x0000012c; -SDRAM[2].EmcClockDivider = 0x00000002; -SDRAM[2].EmcAutoCalInterval = 0x001fffff; -SDRAM[2].EmcAutoCalConfig = 0xa0f10000; -SDRAM[2].EmcAutoCalWait = 0x00000064; -SDRAM[2].EmcPinProgramWait = 0x00000001; -SDRAM[2].EmcRc = 0x00000011; -SDRAM[2].EmcRfc = 0x0000003a; -SDRAM[2].EmcRas = 0x0000000c; -SDRAM[2].EmcRp = 0x00000004; -SDRAM[2].EmcR2w = 0x00000003; -SDRAM[2].EmcW2r = 0x00000008; -SDRAM[2].EmcR2p = 0x00000002; -SDRAM[2].EmcW2p = 0x0000000a; -SDRAM[2].EmcRrd = 0x00000002; -SDRAM[2].EmcRdRcd = 0x00000004; -SDRAM[2].EmcWrRcd = 0x00000004; -SDRAM[2].EmcRext = 0x00000001; -SDRAM[2].EmcWdv = 0x00000004; -SDRAM[2].EmcQUseExtra = 0x00000000; -SDRAM[2].EmcQUse = 0x00000006; -SDRAM[2].EmcQRst = 0x00000004; -SDRAM[2].EmcQSafe = 0x00000008; -SDRAM[2].EmcRdv = 0x0000000d; -SDRAM[2].EmcRefresh = 0x00000b2d; -SDRAM[2].EmcBurstRefreshNum = 0x00000000; -SDRAM[2].EmcPdEx2Wr = 0x00000001; -SDRAM[2].EmcPdEx2Rd = 0x00000008; -SDRAM[2].EmcPChg2Pden = 0x00000001; -SDRAM[2].EmcAct2Pden = 0x00000000; -SDRAM[2].EmcAr2Pden = 0x00000007; -SDRAM[2].EmcRw2Pden = 0x0000000f; -SDRAM[2].EmcTxsr = 0x00000040; -SDRAM[2].EmcTcke = 0x00000004; -SDRAM[2].EmcTfaw = 0x0000000c; -SDRAM[2].EmcTrpab = 0x00000000; -SDRAM[2].EmcTClkStable = 0x00000004; -SDRAM[2].EmcTClkStop = 0x00000005; -SDRAM[2].EmcTRefBw = 0x00000b6d; -SDRAM[2].EmcFbioCfg5 = 0x00007088; -SDRAM[2].EmcFbioCfg6 = 0x00000006; -SDRAM[2].EmcFbioSpare = 0xd8000000; -SDRAM[2].EmcMrsResetDllWait = 0x00000000; -SDRAM[2].EmcMrsResetDll = 0x00000000; -SDRAM[2].EmcMrsDdr2DllReset = 0x00000000; -SDRAM[2].EmcMrs = 0x80000521; -SDRAM[2].EmcEmrsEmr2 = 0x80200000; -SDRAM[2].EmcEmrsEmr3 = 0x80300000; -SDRAM[2].EmcEmrsDdr2DllEnable = 0x00000000; -SDRAM[2].EmcEmrsDdr2OcdCalib = 0x00000000; -SDRAM[2].EmcEmrs = 0x80100002; -SDRAM[2].EmcMrw1 = 0x00000000; -SDRAM[2].EmcMrw2 = 0x00000000; -SDRAM[2].EmcMrw3 = 0x00000000; -SDRAM[2].EmcMrwResetCommand = 0x00000000; -SDRAM[2].EmcMrwResetNInitWait = 0x00000000; -SDRAM[2].EmcAdrCfg = 0x00000000; -SDRAM[2].McEmemCfg = 0x00000400; -SDRAM[2].EmcCfg2 = 0x000c0099; -SDRAM[2].EmcCfgDigDll = 0x00200084; -SDRAM[2].EmcCfgDigDllPeriod = 0x00008000; -SDRAM[2].EmcCfg = 0x23c00000; -SDRAM[2].EmcDbg = 0x01000400; -SDRAM[2].WarmBootWait = 0x00000002; -SDRAM[2].EmcCttTermCtrl = 0x00000802; -SDRAM[2].EmcOdtWrite = 0x00000000; -SDRAM[2].EmcOdtRead = 0x00000000; -SDRAM[2].EmcZcalWaitCnt = 0x00000040; -SDRAM[2].EmcZcalMrwCmd = 0x80000000; -SDRAM[2].EmcDdr2Wait = 0x00000000; -SDRAM[2].PmcDdrPwr = 0x00000003; -SDRAM[2].EmcClockSource = 0x00000000; -SDRAM[2].EmcClockUsePllMUD = 0x00000000; -SDRAM[2].EmcPinExtraWait = 0x00000000; -SDRAM[2].EmcTimingControlWait = 0x00000000; -SDRAM[2].EmcWext = 0x00000000; -SDRAM[2].EmcCtt = 0x00000000; -SDRAM[2].EmcCttDuration = 0x00000000; -SDRAM[2].EmcPreRefreshReqCnt = 0x000002cb; -SDRAM[2].EmcTxsrDll = 0x00000200; -SDRAM[2].EmcCfgRsv = 0xff00ff89; -SDRAM[2].EmcMrwExtra = 0x00000000; -SDRAM[2].EmcWarmBootMrw1 = 0x00000000; -SDRAM[2].EmcWarmBootMrw2 = 0x00000000; -SDRAM[2].EmcWarmBootMrw3 = 0x00000000; -SDRAM[2].EmcWarmBootMrwExtra = 0x00000000; -SDRAM[2].EmcWarmBootExtraModeRegWriteEnable = 0x00000000; -SDRAM[2].EmcExtraModeRegWriteEnable = 0x00000000; -SDRAM[2].EmcMrsWaitCnt = 0x0184000c; -SDRAM[2].EmcCmdQ = 0x10004408; -SDRAM[2].EmcMc2EmcQ = 0x06000404; -SDRAM[2].EmcDynSelfRefControl = 0x8000174b; -SDRAM[2].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; -SDRAM[2].EmcDevSelect = 0x00000002; -SDRAM[2].EmcSelDpdCtrl = 0x0004032c; -SDRAM[2].EmcDllXformDqs0 = 0x0003c000; -SDRAM[2].EmcDllXformDqs1 = 0x0003c000; -SDRAM[2].EmcDllXformDqs2 = 0x0003c000; -SDRAM[2].EmcDllXformDqs3 = 0x0003c000; -SDRAM[2].EmcDllXformDqs4 = 0x0003c000; -SDRAM[2].EmcDllXformDqs5 = 0x0003c000; -SDRAM[2].EmcDllXformDqs6 = 0x0003c000; -SDRAM[2].EmcDllXformDqs7 = 0x0003c000; -SDRAM[2].EmcDllXformQUse0 = 0x00000000; -SDRAM[2].EmcDllXformQUse1 = 0x00000000; -SDRAM[2].EmcDllXformQUse2 = 0x00000000; -SDRAM[2].EmcDllXformQUse3 = 0x00000000; -SDRAM[2].EmcDllXformQUse4 = 0x00000000; -SDRAM[2].EmcDllXformQUse5 = 0x00000000; -SDRAM[2].EmcDllXformQUse6 = 0x00000000; -SDRAM[2].EmcDllXformQUse7 = 0x00000000; -SDRAM[2].EmcDliTrimTxDqs0 = 0x00000000; -SDRAM[2].EmcDliTrimTxDqs1 = 0x00000000; -SDRAM[2].EmcDliTrimTxDqs2 = 0x00000000; -SDRAM[2].EmcDliTrimTxDqs3 = 0x00000000; -SDRAM[2].EmcDliTrimTxDqs4 = 0x00000000; -SDRAM[2].EmcDliTrimTxDqs5 = 0x00000000; -SDRAM[2].EmcDliTrimTxDqs6 = 0x00000000; -SDRAM[2].EmcDliTrimTxDqs7 = 0x00000000; -SDRAM[2].EmcDllXformDq0 = 0x00040000; -SDRAM[2].EmcDllXformDq1 = 0x00040000; -SDRAM[2].EmcDllXformDq2 = 0x00040000; -SDRAM[2].EmcDllXformDq3 = 0x00040000; -SDRAM[2].EmcZcalInterval = 0x00020000; -SDRAM[2].EmcZcalInitDev0 = 0x80000011; -SDRAM[2].EmcZcalInitDev1 = 0x00000000; -SDRAM[2].EmcZcalInitWait = 0x00000002; -SDRAM[2].EmcZcalColdBootEnable = 0x00000001; -SDRAM[2].EmcZcalWarmBootEnable = 0x00000001; -SDRAM[2].EmcMrwLpddr2ZcalWarmBoot = 0x000a00ab; -SDRAM[2].EmcZqCalDdr3WarmBoot = 0x00000011; -SDRAM[2].EmcZcalWarmBootWait = 0x00000001; -SDRAM[2].EmcMrsWarmBootEnable = 0x00000001; -SDRAM[2].EmcMrsExtra = 0x80000521; -SDRAM[2].EmcWarmBootMrs = 0x80100002; -SDRAM[2].EmcWarmBootEmrs = 0x80000521; -SDRAM[2].EmcWarmBootEmr2 = 0x80200000; -SDRAM[2].EmcWarmBootEmr3 = 0x80300000; -SDRAM[2].EmcWarmBootMrsExtra = 0x80100002; -SDRAM[2].EmcClkenOverride = 0x00000000; -SDRAM[2].EmcExtraRefreshNum = 0x00000002; -SDRAM[2].EmcClkenOverrideAllWarmBoot = 0x00000000; -SDRAM[2].McClkenOverrideAllWarmBoot = 0x00000000; -SDRAM[2].EmcCfgDigDllPeriodWarmBoot = 0x00000003; -SDRAM[2].PmcVddpSel = 0x00000002; -SDRAM[2].PmcDdrCfg = 0x00000002; -SDRAM[2].PmcIoDpdReq = 0x80800000; -SDRAM[2].PmcENoVttGen = 0x00000000; -SDRAM[2].PmcNoIoPower = 0x00000000; -SDRAM[2].EmcXm2CmdPadCtrl = 0x000002a0; -SDRAM[2].EmcXm2CmdPadCtrl2 = 0x770c0000; -SDRAM[2].EmcXm2DqsPadCtrl = 0x770c1414; -SDRAM[2].EmcXm2DqsPadCtrl2 = 0x0800013d; -SDRAM[2].EmcXm2DqsPadCtrl3 = 0x08000021; -SDRAM[2].EmcXm2DqPadCtrl = 0x770c2990; -SDRAM[2].EmcXm2DqPadCtrl2 = 0x00000000; -SDRAM[2].EmcXm2ClkPadCtrl = 0x77fff884; -SDRAM[2].EmcXm2CompPadCtrl = 0x01f1f508; -SDRAM[2].EmcXm2VttGenPadCtrl = 0x05057404; -SDRAM[2].EmcXm2VttGenPadCtrl2 = 0x54000007; -SDRAM[2].EmcXm2QUsePadCtrl = 0x080001e8; -SDRAM[2].McEmemAdrCfg = 0x00000000; -SDRAM[2].McEmemAdrCfgDev0 = 0x00080303; -SDRAM[2].McEmemAdrCfgDev1 = 0x00080303; -SDRAM[2].McEmemArbCfg = 0x0000000b; -SDRAM[2].McEmemArbOutstandingReq = 0xc0000044; -SDRAM[2].McEmemArbTimingRcd = 0x00000001; -SDRAM[2].McEmemArbTimingRp = 0x00000002; -SDRAM[2].McEmemArbTimingRc = 0x00000009; -SDRAM[2].McEmemArbTimingRas = 0x00000005; -SDRAM[2].McEmemArbTimingFaw = 0x00000005; -SDRAM[2].McEmemArbTimingRrd = 0x00000001; -SDRAM[2].McEmemArbTimingRap2Pre = 0x00000002; -SDRAM[2].McEmemArbTimingWap2Pre = 0x00000008; -SDRAM[2].McEmemArbTimingR2R = 0x00000002; -SDRAM[2].McEmemArbTimingW2W = 0x00000002; -SDRAM[2].McEmemArbTimingR2W = 0x00000003; -SDRAM[2].McEmemArbTimingW2R = 0x00000006; -SDRAM[2].McEmemArbDaTurns = 0x06030202; -SDRAM[2].McEmemArbDaCovers = 0x000d0709; -SDRAM[2].McEmemArbMisc0 = 0x7086110a; -SDRAM[2].McEmemArbMisc1 = 0x78000000; -SDRAM[2].McEmemArbRing1Throttle = 0x001f0000; -SDRAM[2].McEmemArbOverride = 0x00000080; -SDRAM[2].McEmemArbRsv = 0xff00ff00; -SDRAM[2].McClkenOverride = 0x00000000; - -SDRAM[3].MemoryType = NvBootMemoryType_Ddr3; -SDRAM[3].PllMChargePumpSetupControl = 0x00000008; -SDRAM[3].PllMLoopFilterSetupControl = 0x00000000; -SDRAM[3].PllMInputDivider = 0x0000000c; -SDRAM[3].PllMFeedbackDivider = 0x000002ee; -SDRAM[3].PllMPostDivider = 0x00000000; -SDRAM[3].PllMStableTime = 0x0000012c; -SDRAM[3].EmcClockDivider = 0x00000002; -SDRAM[3].EmcAutoCalInterval = 0x001fffff; -SDRAM[3].EmcAutoCalConfig = 0xa0f10000; -SDRAM[3].EmcAutoCalWait = 0x00000064; -SDRAM[3].EmcPinProgramWait = 0x00000001; -SDRAM[3].EmcRc = 0x00000011; -SDRAM[3].EmcRfc = 0x0000003a; -SDRAM[3].EmcRas = 0x0000000c; -SDRAM[3].EmcRp = 0x00000004; -SDRAM[3].EmcR2w = 0x00000003; -SDRAM[3].EmcW2r = 0x00000008; -SDRAM[3].EmcR2p = 0x00000002; -SDRAM[3].EmcW2p = 0x0000000a; -SDRAM[3].EmcRrd = 0x00000002; -SDRAM[3].EmcRdRcd = 0x00000004; -SDRAM[3].EmcWrRcd = 0x00000004; -SDRAM[3].EmcRext = 0x00000001; -SDRAM[3].EmcWdv = 0x00000004; -SDRAM[3].EmcQUseExtra = 0x00000000; -SDRAM[3].EmcQUse = 0x00000006; -SDRAM[3].EmcQRst = 0x00000004; -SDRAM[3].EmcQSafe = 0x00000008; -SDRAM[3].EmcRdv = 0x0000000d; -SDRAM[3].EmcRefresh = 0x00000b2d; -SDRAM[3].EmcBurstRefreshNum = 0x00000000; -SDRAM[3].EmcPdEx2Wr = 0x00000001; -SDRAM[3].EmcPdEx2Rd = 0x00000008; -SDRAM[3].EmcPChg2Pden = 0x00000001; -SDRAM[3].EmcAct2Pden = 0x00000000; -SDRAM[3].EmcAr2Pden = 0x00000007; -SDRAM[3].EmcRw2Pden = 0x0000000f; -SDRAM[3].EmcTxsr = 0x00000040; -SDRAM[3].EmcTcke = 0x00000004; -SDRAM[3].EmcTfaw = 0x0000000c; -SDRAM[3].EmcTrpab = 0x00000000; -SDRAM[3].EmcTClkStable = 0x00000004; -SDRAM[3].EmcTClkStop = 0x00000005; -SDRAM[3].EmcTRefBw = 0x00000b6d; -SDRAM[3].EmcFbioCfg5 = 0x00007088; -SDRAM[3].EmcFbioCfg6 = 0x00000006; -SDRAM[3].EmcFbioSpare = 0xd8000000; -SDRAM[3].EmcMrsResetDllWait = 0x00000000; -SDRAM[3].EmcMrsResetDll = 0x00000000; -SDRAM[3].EmcMrsDdr2DllReset = 0x00000000; -SDRAM[3].EmcMrs = 0x80000521; -SDRAM[3].EmcEmrsEmr2 = 0x80200000; -SDRAM[3].EmcEmrsEmr3 = 0x80300000; -SDRAM[3].EmcEmrsDdr2DllEnable = 0x00000000; -SDRAM[3].EmcEmrsDdr2OcdCalib = 0x00000000; -SDRAM[3].EmcEmrs = 0x80100002; -SDRAM[3].EmcMrw1 = 0x00000000; -SDRAM[3].EmcMrw2 = 0x00000000; -SDRAM[3].EmcMrw3 = 0x00000000; -SDRAM[3].EmcMrwResetCommand = 0x00000000; -SDRAM[3].EmcMrwResetNInitWait = 0x00000000; -SDRAM[3].EmcAdrCfg = 0x00000000; -SDRAM[3].McEmemCfg = 0x00000400; -SDRAM[3].EmcCfg2 = 0x000c0099; -SDRAM[3].EmcCfgDigDll = 0x00200084; -SDRAM[3].EmcCfgDigDllPeriod = 0x00008000; -SDRAM[3].EmcCfg = 0x23c00000; -SDRAM[3].EmcDbg = 0x01000400; -SDRAM[3].WarmBootWait = 0x00000002; -SDRAM[3].EmcCttTermCtrl = 0x00000802; -SDRAM[3].EmcOdtWrite = 0x00000000; -SDRAM[3].EmcOdtRead = 0x00000000; -SDRAM[3].EmcZcalWaitCnt = 0x00000040; -SDRAM[3].EmcZcalMrwCmd = 0x80000000; -SDRAM[3].EmcDdr2Wait = 0x00000000; -SDRAM[3].PmcDdrPwr = 0x00000003; -SDRAM[3].EmcClockSource = 0x00000000; -SDRAM[3].EmcClockUsePllMUD = 0x00000000; -SDRAM[3].EmcPinExtraWait = 0x00000000; -SDRAM[3].EmcTimingControlWait = 0x00000000; -SDRAM[3].EmcWext = 0x00000000; -SDRAM[3].EmcCtt = 0x00000000; -SDRAM[3].EmcCttDuration = 0x00000000; -SDRAM[3].EmcPreRefreshReqCnt = 0x000002cb; -SDRAM[3].EmcTxsrDll = 0x00000200; -SDRAM[3].EmcCfgRsv = 0xff00ff89; -SDRAM[3].EmcMrwExtra = 0x00000000; -SDRAM[3].EmcWarmBootMrw1 = 0x00000000; -SDRAM[3].EmcWarmBootMrw2 = 0x00000000; -SDRAM[3].EmcWarmBootMrw3 = 0x00000000; -SDRAM[3].EmcWarmBootMrwExtra = 0x00000000; -SDRAM[3].EmcWarmBootExtraModeRegWriteEnable = 0x00000000; -SDRAM[3].EmcExtraModeRegWriteEnable = 0x00000000; -SDRAM[3].EmcMrsWaitCnt = 0x0184000c; -SDRAM[3].EmcCmdQ = 0x10004408; -SDRAM[3].EmcMc2EmcQ = 0x06000404; -SDRAM[3].EmcDynSelfRefControl = 0x8000174b; -SDRAM[3].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; -SDRAM[3].EmcDevSelect = 0x00000002; -SDRAM[3].EmcSelDpdCtrl = 0x0004032c; -SDRAM[3].EmcDllXformDqs0 = 0x0003c000; -SDRAM[3].EmcDllXformDqs1 = 0x0003c000; -SDRAM[3].EmcDllXformDqs2 = 0x0003c000; -SDRAM[3].EmcDllXformDqs3 = 0x0003c000; -SDRAM[3].EmcDllXformDqs4 = 0x0003c000; -SDRAM[3].EmcDllXformDqs5 = 0x0003c000; -SDRAM[3].EmcDllXformDqs6 = 0x0003c000; -SDRAM[3].EmcDllXformDqs7 = 0x0003c000; -SDRAM[3].EmcDllXformQUse0 = 0x00000000; -SDRAM[3].EmcDllXformQUse1 = 0x00000000; -SDRAM[3].EmcDllXformQUse2 = 0x00000000; -SDRAM[3].EmcDllXformQUse3 = 0x00000000; -SDRAM[3].EmcDllXformQUse4 = 0x00000000; -SDRAM[3].EmcDllXformQUse5 = 0x00000000; -SDRAM[3].EmcDllXformQUse6 = 0x00000000; -SDRAM[3].EmcDllXformQUse7 = 0x00000000; -SDRAM[3].EmcDliTrimTxDqs0 = 0x00000000; -SDRAM[3].EmcDliTrimTxDqs1 = 0x00000000; -SDRAM[3].EmcDliTrimTxDqs2 = 0x00000000; -SDRAM[3].EmcDliTrimTxDqs3 = 0x00000000; -SDRAM[3].EmcDliTrimTxDqs4 = 0x00000000; -SDRAM[3].EmcDliTrimTxDqs5 = 0x00000000; -SDRAM[3].EmcDliTrimTxDqs6 = 0x00000000; -SDRAM[3].EmcDliTrimTxDqs7 = 0x00000000; -SDRAM[3].EmcDllXformDq0 = 0x00040000; -SDRAM[3].EmcDllXformDq1 = 0x00040000; -SDRAM[3].EmcDllXformDq2 = 0x00040000; -SDRAM[3].EmcDllXformDq3 = 0x00040000; -SDRAM[3].EmcZcalInterval = 0x00020000; -SDRAM[3].EmcZcalInitDev0 = 0x80000011; -SDRAM[3].EmcZcalInitDev1 = 0x00000000; -SDRAM[3].EmcZcalInitWait = 0x00000002; -SDRAM[3].EmcZcalColdBootEnable = 0x00000001; -SDRAM[3].EmcZcalWarmBootEnable = 0x00000001; -SDRAM[3].EmcMrwLpddr2ZcalWarmBoot = 0x000a00ab; -SDRAM[3].EmcZqCalDdr3WarmBoot = 0x00000011; -SDRAM[3].EmcZcalWarmBootWait = 0x00000001; -SDRAM[3].EmcMrsWarmBootEnable = 0x00000001; -SDRAM[3].EmcMrsExtra = 0x80000521; -SDRAM[3].EmcWarmBootMrs = 0x80100002; -SDRAM[3].EmcWarmBootEmrs = 0x80000521; -SDRAM[3].EmcWarmBootEmr2 = 0x80200000; -SDRAM[3].EmcWarmBootEmr3 = 0x80300000; -SDRAM[3].EmcWarmBootMrsExtra = 0x80100002; -SDRAM[3].EmcClkenOverride = 0x00000000; -SDRAM[3].EmcExtraRefreshNum = 0x00000002; -SDRAM[3].EmcClkenOverrideAllWarmBoot = 0x00000000; -SDRAM[3].McClkenOverrideAllWarmBoot = 0x00000000; -SDRAM[3].EmcCfgDigDllPeriodWarmBoot = 0x00000003; -SDRAM[3].PmcVddpSel = 0x00000002; -SDRAM[3].PmcDdrCfg = 0x00000002; -SDRAM[3].PmcIoDpdReq = 0x80800000; -SDRAM[3].PmcENoVttGen = 0x00000000; -SDRAM[3].PmcNoIoPower = 0x00000000; -SDRAM[3].EmcXm2CmdPadCtrl = 0x000002a0; -SDRAM[3].EmcXm2CmdPadCtrl2 = 0x770c0000; -SDRAM[3].EmcXm2DqsPadCtrl = 0x770c1414; -SDRAM[3].EmcXm2DqsPadCtrl2 = 0x0800013d; -SDRAM[3].EmcXm2DqsPadCtrl3 = 0x08000021; -SDRAM[3].EmcXm2DqPadCtrl = 0x770c2990; -SDRAM[3].EmcXm2DqPadCtrl2 = 0x00000000; -SDRAM[3].EmcXm2ClkPadCtrl = 0x77fff884; -SDRAM[3].EmcXm2CompPadCtrl = 0x01f1f508; -SDRAM[3].EmcXm2VttGenPadCtrl = 0x05057404; -SDRAM[3].EmcXm2VttGenPadCtrl2 = 0x54000007; -SDRAM[3].EmcXm2QUsePadCtrl = 0x080001e8; -SDRAM[3].McEmemAdrCfg = 0x00000000; -SDRAM[3].McEmemAdrCfgDev0 = 0x00080303; -SDRAM[3].McEmemAdrCfgDev1 = 0x00080303; -SDRAM[3].McEmemArbCfg = 0x0000000b; -SDRAM[3].McEmemArbOutstandingReq = 0xc0000044; -SDRAM[3].McEmemArbTimingRcd = 0x00000001; -SDRAM[3].McEmemArbTimingRp = 0x00000002; -SDRAM[3].McEmemArbTimingRc = 0x00000009; -SDRAM[3].McEmemArbTimingRas = 0x00000005; -SDRAM[3].McEmemArbTimingFaw = 0x00000005; -SDRAM[3].McEmemArbTimingRrd = 0x00000001; -SDRAM[3].McEmemArbTimingRap2Pre = 0x00000002; -SDRAM[3].McEmemArbTimingWap2Pre = 0x00000008; -SDRAM[3].McEmemArbTimingR2R = 0x00000002; -SDRAM[3].McEmemArbTimingW2W = 0x00000002; -SDRAM[3].McEmemArbTimingR2W = 0x00000003; -SDRAM[3].McEmemArbTimingW2R = 0x00000006; -SDRAM[3].McEmemArbDaTurns = 0x06030202; -SDRAM[3].McEmemArbDaCovers = 0x000d0709; -SDRAM[3].McEmemArbMisc0 = 0x7086110a; -SDRAM[3].McEmemArbMisc1 = 0x78000000; -SDRAM[3].McEmemArbRing1Throttle = 0x001f0000; -SDRAM[3].McEmemArbOverride = 0x00000080; -SDRAM[3].McEmemArbRsv = 0xff00ff00; -SDRAM[3].McClkenOverride = 0x00000000; diff --git a/cardhu/E1198_Hynix_2GB_H5TC2G83BFR-PBA_667MHz_111121_317_sdmmc4_x8.bct.cfg b/cardhu/E1198_Hynix_2GB_H5TC2G83BFR-PBA_667MHz_111121_317_sdmmc4_x8.bct.cfg deleted file mode 100644 index 96b8f81..0000000 --- a/cardhu/E1198_Hynix_2GB_H5TC2G83BFR-PBA_667MHz_111121_317_sdmmc4_x8.bct.cfg +++ /dev/null @@ -1,819 +0,0 @@ -# Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. -# -# This software is provided 'as-is', without any express or implied -# warranty. In no event will the authors be held liable for any damages -# arising from the use of this software. -# -# Permission is granted to anyone to use this software for any purpose, -# including commercial applications, and to alter it and redistribute it -# freely, subject to the following restrictions: -# -# 1. The origin of this software must not be misrepresented; you must not -# claim that you wrote the original software. If you use this software -# in a product, an acknowledgment in the product documentation would be -# appreciated but is not required. -# 2. Altered source versions must be plainly marked as such, and must not be -# misrepresented as being the original software. -# 3. This notice may not be removed or altered from any source distribution. - -Version = 0x00030001; -BlockSize = 0x00004000; -PageSize = 0x00000200; -PartitionSize = 0x02000000; -OdmData = 0x800c0000; - -DevType[0] = NvBootDevType_Sdmmc; -DeviceParam[0].SdmmcParams.ClockDivider = 0x00000009; -DeviceParam[0].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_8Bit; -DeviceParam[0].SdmmcParams.MaxPowerClassSupported = 0x00000000; -DeviceParam[0].SdmmcParams.SdController = 0x00000000; - -DevType[1] = NvBootDevType_Sdmmc; -DeviceParam[1].SdmmcParams.ClockDivider = 0x00000009; -DeviceParam[1].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_8Bit; -DeviceParam[1].SdmmcParams.MaxPowerClassSupported = 0x00000000; -DeviceParam[1].SdmmcParams.SdController = 0x00000000; - -DevType[2] = NvBootDevType_Sdmmc; -DeviceParam[2].SdmmcParams.ClockDivider = 0x00000009; -DeviceParam[2].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_8Bit; -DeviceParam[2].SdmmcParams.MaxPowerClassSupported = 0x00000000; -DeviceParam[2].SdmmcParams.SdController = 0x00000000; - -DevType[3] = NvBootDevType_Sdmmc; -DeviceParam[3].SdmmcParams.ClockDivider = 0x00000009; -DeviceParam[3].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_8Bit; -DeviceParam[3].SdmmcParams.MaxPowerClassSupported = 0x00000000; -DeviceParam[3].SdmmcParams.SdController = 0x00000000; - -SDRAM[0].MemoryType = NvBootMemoryType_Ddr3; -SDRAM[0].PllMChargePumpSetupControl = 0x00000008; -SDRAM[0].PllMLoopFilterSetupControl = 0x00000000; -SDRAM[0].PllMInputDivider = 0x0000000c; -SDRAM[0].PllMFeedbackDivider = 0x0000029b; -SDRAM[0].PllMPostDivider = 0x00000000; -SDRAM[0].PllMStableTime = 0x0000012c; -SDRAM[0].EmcClockDivider = 0x00000000; -SDRAM[0].EmcAutoCalInterval = 0x001fffff; -SDRAM[0].EmcAutoCalConfig = 0xa0f10000; -SDRAM[0].EmcAutoCalWait = 0x00000064; -SDRAM[0].EmcPinProgramWait = 0x00000001; -SDRAM[0].EmcRc = 0x0000001f; -SDRAM[0].EmcRfc = 0x00000069; -SDRAM[0].EmcRas = 0x00000016; -SDRAM[0].EmcRp = 0x00000008; -SDRAM[0].EmcR2w = 0x00000005; -SDRAM[0].EmcW2r = 0x0000000c; -SDRAM[0].EmcR2p = 0x00000003; -SDRAM[0].EmcW2p = 0x00000011; -SDRAM[0].EmcRrd = 0x00000002; -SDRAM[0].EmcRdRcd = 0x00000008; -SDRAM[0].EmcWrRcd = 0x00000008; -SDRAM[0].EmcRext = 0x00000001; -SDRAM[0].EmcWdv = 0x00000007; -SDRAM[0].EmcQUseExtra = 0x0000000c; -SDRAM[0].EmcQUse = 0x0000000b; -SDRAM[0].EmcQRst = 0x00000009; -SDRAM[0].EmcQSafe = 0x0000000c; -SDRAM[0].EmcRdv = 0x00000011; -SDRAM[0].EmcRefresh = 0x00001412; -SDRAM[0].EmcBurstRefreshNum = 0x00000000; -SDRAM[0].EmcPdEx2Wr = 0x00000002; -SDRAM[0].EmcPdEx2Rd = 0x0000000e; -SDRAM[0].EmcPChg2Pden = 0x00000001; -SDRAM[0].EmcAct2Pden = 0x00000000; -SDRAM[0].EmcAr2Pden = 0x0000000c; -SDRAM[0].EmcRw2Pden = 0x00000016; -SDRAM[0].EmcTxsr = 0x00000072; -SDRAM[0].EmcTcke = 0x00000005; -SDRAM[0].EmcTfaw = 0x00000015; -SDRAM[0].EmcTrpab = 0x00000000; -SDRAM[0].EmcTClkStable = 0x00000006; -SDRAM[0].EmcTClkStop = 0x00000007; -SDRAM[0].EmcTRefBw = 0x00001453; -SDRAM[0].EmcFbioCfg5 = 0x00005088; -SDRAM[0].EmcFbioCfg6 = 0x00000004; -SDRAM[0].EmcFbioSpare = 0xf8000000; -SDRAM[0].EmcMrsResetDllWait = 0x00000000; -SDRAM[0].EmcMrsResetDll = 0x00000000; -SDRAM[0].EmcMrsDdr2DllReset = 0x00000000; -SDRAM[0].EmcMrs = 0x00000b71; -SDRAM[0].EmcEmrsEmr2 = 0x00200018; -SDRAM[0].EmcEmrsEmr3 = 0x00300000; -SDRAM[0].EmcEmrsDdr2DllEnable = 0x00000000; -SDRAM[0].EmcEmrsDdr2OcdCalib = 0x00000000; -SDRAM[0].EmcEmrs = 0x00100002; -SDRAM[0].EmcMrw1 = 0x00000000; -SDRAM[0].EmcMrw2 = 0x00000000; -SDRAM[0].EmcMrw3 = 0x00000000; -SDRAM[0].EmcMrwResetCommand = 0x00000000; -SDRAM[0].EmcMrwResetNInitWait = 0x00000000; -SDRAM[0].EmcAdrCfg = 0x00000001; -SDRAM[0].McEmemCfg = 0x00000800; -SDRAM[0].EmcCfg2 = 0x000c0099; -SDRAM[0].EmcCfgDigDll = 0xf00b0191; -SDRAM[0].EmcCfgDigDllPeriod = 0x00008000; -SDRAM[0].EmcCfg = 0x23e00000; -SDRAM[0].EmcDbg = 0x01000400; -SDRAM[0].WarmBootWait = 0x00000002; -SDRAM[0].EmcCttTermCtrl = 0x00000802; -SDRAM[0].EmcOdtWrite = 0x00000000; -SDRAM[0].EmcOdtRead = 0x00000000; -SDRAM[0].EmcZcalWaitCnt = 0x00000040; -SDRAM[0].EmcZcalMrwCmd = 0x00000000; -SDRAM[0].EmcDdr2Wait = 0x00000000; -SDRAM[0].PmcDdrPwr = 0x00000003; -SDRAM[0].EmcClockSource = 0x00000000; -SDRAM[0].EmcClockUsePllMUD = 0x00000001; -SDRAM[0].EmcPinExtraWait = 0x00000000; -SDRAM[0].EmcTimingControlWait = 0x00000000; -SDRAM[0].EmcWext = 0x00000000; -SDRAM[0].EmcCtt = 0x00000000; -SDRAM[0].EmcCttDuration = 0x00000000; -SDRAM[0].EmcPreRefreshReqCnt = 0x00000504; -SDRAM[0].EmcTxsrDll = 0x00000200; -SDRAM[0].EmcCfgRsv = 0xff00ff09; -SDRAM[0].EmcMrwExtra = 0x00000000; -SDRAM[0].EmcWarmBootMrw1 = 0x00000000; -SDRAM[0].EmcWarmBootMrw2 = 0x00000000; -SDRAM[0].EmcWarmBootMrw3 = 0x00000000; -SDRAM[0].EmcWarmBootMrwExtra = 0x00000000; -SDRAM[0].EmcWarmBootExtraModeRegWriteEnable = 0x00000000; -SDRAM[0].EmcExtraModeRegWriteEnable = 0x00000000; -SDRAM[0].EmcMrsWaitCnt = 0x0116000c; -SDRAM[0].EmcCmdQ = 0x10004408; -SDRAM[0].EmcMc2EmcQ = 0x06000404; -SDRAM[0].EmcDynSelfRefControl = 0x800028a5; -SDRAM[0].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; -SDRAM[0].EmcDevSelect = 0x00000000; -SDRAM[0].EmcSelDpdCtrl = 0x0004032c; -SDRAM[0].EmcDllXformDqs0 = 0x00000008; -SDRAM[0].EmcDllXformDqs1 = 0x00000008; -SDRAM[0].EmcDllXformDqs2 = 0x00000008; -SDRAM[0].EmcDllXformDqs3 = 0x00000008; -SDRAM[0].EmcDllXformDqs4 = 0x00000008; -SDRAM[0].EmcDllXformDqs5 = 0x00000008; -SDRAM[0].EmcDllXformDqs6 = 0x00000008; -SDRAM[0].EmcDllXformDqs7 = 0x00000008; -SDRAM[0].EmcDllXformQUse0 = 0x00000000; -SDRAM[0].EmcDllXformQUse1 = 0x00000000; -SDRAM[0].EmcDllXformQUse2 = 0x00000000; -SDRAM[0].EmcDllXformQUse3 = 0x00000000; -SDRAM[0].EmcDllXformQUse4 = 0x00000000; -SDRAM[0].EmcDllXformQUse5 = 0x00000000; -SDRAM[0].EmcDllXformQUse6 = 0x00000000; -SDRAM[0].EmcDllXformQUse7 = 0x00000000; -SDRAM[0].EmcDliTrimTxDqs0 = 0x00000000; -SDRAM[0].EmcDliTrimTxDqs1 = 0x00000000; -SDRAM[0].EmcDliTrimTxDqs2 = 0x00000000; -SDRAM[0].EmcDliTrimTxDqs3 = 0x00000000; -SDRAM[0].EmcDliTrimTxDqs4 = 0x00000000; -SDRAM[0].EmcDliTrimTxDqs5 = 0x00000000; -SDRAM[0].EmcDliTrimTxDqs6 = 0x00000000; -SDRAM[0].EmcDliTrimTxDqs7 = 0x00000000; -SDRAM[0].EmcDllXformDq0 = 0x00000008; -SDRAM[0].EmcDllXformDq1 = 0x00000008; -SDRAM[0].EmcDllXformDq2 = 0x00000008; -SDRAM[0].EmcDllXformDq3 = 0x00000008; -SDRAM[0].EmcZcalInterval = 0x00020000; -SDRAM[0].EmcZcalInitDev0 = 0x80000011; -SDRAM[0].EmcZcalInitDev1 = 0x40000011; -SDRAM[0].EmcZcalInitWait = 0x00000001; -SDRAM[0].EmcZcalColdBootEnable = 0x00000001; -SDRAM[0].EmcZcalWarmBootEnable = 0x00000001; -SDRAM[0].EmcMrwLpddr2ZcalWarmBoot = 0x000a00ab; -SDRAM[0].EmcZqCalDdr3WarmBoot = 0x00000011; -SDRAM[0].EmcZcalWarmBootWait = 0x00000001; -SDRAM[0].EmcMrsWarmBootEnable = 0x00000001; -SDRAM[0].EmcMrsExtra = 0x00000b71; -SDRAM[0].EmcWarmBootMrs = 0x00100002; -SDRAM[0].EmcWarmBootEmrs = 0x00000b71; -SDRAM[0].EmcWarmBootEmr2 = 0x00200018; -SDRAM[0].EmcWarmBootEmr3 = 0x00300000; -SDRAM[0].EmcWarmBootMrsExtra = 0x00100002; -SDRAM[0].EmcClkenOverride = 0x00000000; -SDRAM[0].EmcExtraRefreshNum = 0x00000002; -SDRAM[0].EmcClkenOverrideAllWarmBoot = 0x00000000; -SDRAM[0].McClkenOverrideAllWarmBoot = 0x00000000; -SDRAM[0].EmcCfgDigDllPeriodWarmBoot = 0x00000003; -SDRAM[0].PmcVddpSel = 0x00000002; -SDRAM[0].PmcDdrCfg = 0x00000002; -SDRAM[0].PmcIoDpdReq = 0x80800000; -SDRAM[0].PmcENoVttGen = 0x00000000; -SDRAM[0].PmcNoIoPower = 0x00000000; -SDRAM[0].EmcXm2CmdPadCtrl = 0x000002a0; -SDRAM[0].EmcXm2CmdPadCtrl2 = 0x770c0000; -SDRAM[0].EmcXm2DqsPadCtrl = 0x770c1414; -SDRAM[0].EmcXm2DqsPadCtrl2 = 0x0600013d; -SDRAM[0].EmcXm2DqsPadCtrl3 = 0x07000021; -SDRAM[0].EmcXm2DqPadCtrl = 0x770c2990; -SDRAM[0].EmcXm2DqPadCtrl2 = 0x22220000; -SDRAM[0].EmcXm2ClkPadCtrl = 0x77fff884; -SDRAM[0].EmcXm2CompPadCtrl = 0x01f1f508; -SDRAM[0].EmcXm2VttGenPadCtrl = 0x07077404; -SDRAM[0].EmcXm2VttGenPadCtrl2 = 0x54000000; -SDRAM[0].EmcXm2QUsePadCtrl = 0x080001e8; -SDRAM[0].McEmemAdrCfg = 0x00000001; -SDRAM[0].McEmemAdrCfgDev0 = 0x00080303; -SDRAM[0].McEmemAdrCfgDev1 = 0x00080303; -SDRAM[0].McEmemArbCfg = 0x00000014; -SDRAM[0].McEmemArbOutstandingReq = 0xc0000079; -SDRAM[0].McEmemArbTimingRcd = 0x00000003; -SDRAM[0].McEmemArbTimingRp = 0x00000004; -SDRAM[0].McEmemArbTimingRc = 0x00000010; -SDRAM[0].McEmemArbTimingRas = 0x0000000a; -SDRAM[0].McEmemArbTimingFaw = 0x0000000a; -SDRAM[0].McEmemArbTimingRrd = 0x00000001; -SDRAM[0].McEmemArbTimingRap2Pre = 0x00000003; -SDRAM[0].McEmemArbTimingWap2Pre = 0x0000000b; -SDRAM[0].McEmemArbTimingR2R = 0x00000002; -SDRAM[0].McEmemArbTimingW2W = 0x00000002; -SDRAM[0].McEmemArbTimingR2W = 0x00000004; -SDRAM[0].McEmemArbTimingW2R = 0x00000008; -SDRAM[0].McEmemArbDaTurns = 0x08040202; -SDRAM[0].McEmemArbDaCovers = 0x00140c10; -SDRAM[0].McEmemArbMisc0 = 0x70ea1f11; -SDRAM[0].McEmemArbMisc1 = 0x78000000; -SDRAM[0].McEmemArbRing1Throttle = 0x001f0000; -SDRAM[0].McEmemArbOverride = 0x00000080; -SDRAM[0].McEmemArbRsv = 0xff00ff00; -SDRAM[0].McClkenOverride = 0x00000000; - -SDRAM[1].MemoryType = NvBootMemoryType_Ddr3; -SDRAM[1].PllMChargePumpSetupControl = 0x00000008; -SDRAM[1].PllMLoopFilterSetupControl = 0x00000000; -SDRAM[1].PllMInputDivider = 0x0000000c; -SDRAM[1].PllMFeedbackDivider = 0x0000029b; -SDRAM[1].PllMPostDivider = 0x00000000; -SDRAM[1].PllMStableTime = 0x0000012c; -SDRAM[1].EmcClockDivider = 0x00000000; -SDRAM[1].EmcAutoCalInterval = 0x001fffff; -SDRAM[1].EmcAutoCalConfig = 0xa0f10000; -SDRAM[1].EmcAutoCalWait = 0x00000064; -SDRAM[1].EmcPinProgramWait = 0x00000001; -SDRAM[1].EmcRc = 0x0000001f; -SDRAM[1].EmcRfc = 0x00000069; -SDRAM[1].EmcRas = 0x00000016; -SDRAM[1].EmcRp = 0x00000008; -SDRAM[1].EmcR2w = 0x00000005; -SDRAM[1].EmcW2r = 0x0000000c; -SDRAM[1].EmcR2p = 0x00000003; -SDRAM[1].EmcW2p = 0x00000011; -SDRAM[1].EmcRrd = 0x00000002; -SDRAM[1].EmcRdRcd = 0x00000008; -SDRAM[1].EmcWrRcd = 0x00000008; -SDRAM[1].EmcRext = 0x00000001; -SDRAM[1].EmcWdv = 0x00000007; -SDRAM[1].EmcQUseExtra = 0x0000000c; -SDRAM[1].EmcQUse = 0x0000000b; -SDRAM[1].EmcQRst = 0x00000009; -SDRAM[1].EmcQSafe = 0x0000000c; -SDRAM[1].EmcRdv = 0x00000011; -SDRAM[1].EmcRefresh = 0x00001412; -SDRAM[1].EmcBurstRefreshNum = 0x00000000; -SDRAM[1].EmcPdEx2Wr = 0x00000002; -SDRAM[1].EmcPdEx2Rd = 0x0000000e; -SDRAM[1].EmcPChg2Pden = 0x00000001; -SDRAM[1].EmcAct2Pden = 0x00000000; -SDRAM[1].EmcAr2Pden = 0x0000000c; -SDRAM[1].EmcRw2Pden = 0x00000016; -SDRAM[1].EmcTxsr = 0x00000072; -SDRAM[1].EmcTcke = 0x00000005; -SDRAM[1].EmcTfaw = 0x00000015; -SDRAM[1].EmcTrpab = 0x00000000; -SDRAM[1].EmcTClkStable = 0x00000006; -SDRAM[1].EmcTClkStop = 0x00000007; -SDRAM[1].EmcTRefBw = 0x00001453; -SDRAM[1].EmcFbioCfg5 = 0x00005088; -SDRAM[1].EmcFbioCfg6 = 0x00000004; -SDRAM[1].EmcFbioSpare = 0xf8000000; -SDRAM[1].EmcMrsResetDllWait = 0x00000000; -SDRAM[1].EmcMrsResetDll = 0x00000000; -SDRAM[1].EmcMrsDdr2DllReset = 0x00000000; -SDRAM[1].EmcMrs = 0x00000b71; -SDRAM[1].EmcEmrsEmr2 = 0x00200018; -SDRAM[1].EmcEmrsEmr3 = 0x00300000; -SDRAM[1].EmcEmrsDdr2DllEnable = 0x00000000; -SDRAM[1].EmcEmrsDdr2OcdCalib = 0x00000000; -SDRAM[1].EmcEmrs = 0x00100002; -SDRAM[1].EmcMrw1 = 0x00000000; -SDRAM[1].EmcMrw2 = 0x00000000; -SDRAM[1].EmcMrw3 = 0x00000000; -SDRAM[1].EmcMrwResetCommand = 0x00000000; -SDRAM[1].EmcMrwResetNInitWait = 0x00000000; -SDRAM[1].EmcAdrCfg = 0x00000001; -SDRAM[1].McEmemCfg = 0x00000800; -SDRAM[1].EmcCfg2 = 0x000c0099; -SDRAM[1].EmcCfgDigDll = 0xf00b0191; -SDRAM[1].EmcCfgDigDllPeriod = 0x00008000; -SDRAM[1].EmcCfg = 0x23e00000; -SDRAM[1].EmcDbg = 0x01000400; -SDRAM[1].WarmBootWait = 0x00000002; -SDRAM[1].EmcCttTermCtrl = 0x00000802; -SDRAM[1].EmcOdtWrite = 0x00000000; -SDRAM[1].EmcOdtRead = 0x00000000; -SDRAM[1].EmcZcalWaitCnt = 0x00000040; -SDRAM[1].EmcZcalMrwCmd = 0x00000000; -SDRAM[1].EmcDdr2Wait = 0x00000000; -SDRAM[1].PmcDdrPwr = 0x00000003; -SDRAM[1].EmcClockSource = 0x00000000; -SDRAM[1].EmcClockUsePllMUD = 0x00000001; -SDRAM[1].EmcPinExtraWait = 0x00000000; -SDRAM[1].EmcTimingControlWait = 0x00000000; -SDRAM[1].EmcWext = 0x00000000; -SDRAM[1].EmcCtt = 0x00000000; -SDRAM[1].EmcCttDuration = 0x00000000; -SDRAM[1].EmcPreRefreshReqCnt = 0x00000504; -SDRAM[1].EmcTxsrDll = 0x00000200; -SDRAM[1].EmcCfgRsv = 0xff00ff09; -SDRAM[1].EmcMrwExtra = 0x00000000; -SDRAM[1].EmcWarmBootMrw1 = 0x00000000; -SDRAM[1].EmcWarmBootMrw2 = 0x00000000; -SDRAM[1].EmcWarmBootMrw3 = 0x00000000; -SDRAM[1].EmcWarmBootMrwExtra = 0x00000000; -SDRAM[1].EmcWarmBootExtraModeRegWriteEnable = 0x00000000; -SDRAM[1].EmcExtraModeRegWriteEnable = 0x00000000; -SDRAM[1].EmcMrsWaitCnt = 0x0116000c; -SDRAM[1].EmcCmdQ = 0x10004408; -SDRAM[1].EmcMc2EmcQ = 0x06000404; -SDRAM[1].EmcDynSelfRefControl = 0x800028a5; -SDRAM[1].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; -SDRAM[1].EmcDevSelect = 0x00000000; -SDRAM[1].EmcSelDpdCtrl = 0x0004032c; -SDRAM[1].EmcDllXformDqs0 = 0x00000008; -SDRAM[1].EmcDllXformDqs1 = 0x00000008; -SDRAM[1].EmcDllXformDqs2 = 0x00000008; -SDRAM[1].EmcDllXformDqs3 = 0x00000008; -SDRAM[1].EmcDllXformDqs4 = 0x00000008; -SDRAM[1].EmcDllXformDqs5 = 0x00000008; -SDRAM[1].EmcDllXformDqs6 = 0x00000008; -SDRAM[1].EmcDllXformDqs7 = 0x00000008; -SDRAM[1].EmcDllXformQUse0 = 0x00000000; -SDRAM[1].EmcDllXformQUse1 = 0x00000000; -SDRAM[1].EmcDllXformQUse2 = 0x00000000; -SDRAM[1].EmcDllXformQUse3 = 0x00000000; -SDRAM[1].EmcDllXformQUse4 = 0x00000000; -SDRAM[1].EmcDllXformQUse5 = 0x00000000; -SDRAM[1].EmcDllXformQUse6 = 0x00000000; -SDRAM[1].EmcDllXformQUse7 = 0x00000000; -SDRAM[1].EmcDliTrimTxDqs0 = 0x00000000; -SDRAM[1].EmcDliTrimTxDqs1 = 0x00000000; -SDRAM[1].EmcDliTrimTxDqs2 = 0x00000000; -SDRAM[1].EmcDliTrimTxDqs3 = 0x00000000; -SDRAM[1].EmcDliTrimTxDqs4 = 0x00000000; -SDRAM[1].EmcDliTrimTxDqs5 = 0x00000000; -SDRAM[1].EmcDliTrimTxDqs6 = 0x00000000; -SDRAM[1].EmcDliTrimTxDqs7 = 0x00000000; -SDRAM[1].EmcDllXformDq0 = 0x00000008; -SDRAM[1].EmcDllXformDq1 = 0x00000008; -SDRAM[1].EmcDllXformDq2 = 0x00000008; -SDRAM[1].EmcDllXformDq3 = 0x00000008; -SDRAM[1].EmcZcalInterval = 0x00020000; -SDRAM[1].EmcZcalInitDev0 = 0x80000011; -SDRAM[1].EmcZcalInitDev1 = 0x40000011; -SDRAM[1].EmcZcalInitWait = 0x00000001; -SDRAM[1].EmcZcalColdBootEnable = 0x00000001; -SDRAM[1].EmcZcalWarmBootEnable = 0x00000001; -SDRAM[1].EmcMrwLpddr2ZcalWarmBoot = 0x000a00ab; -SDRAM[1].EmcZqCalDdr3WarmBoot = 0x00000011; -SDRAM[1].EmcZcalWarmBootWait = 0x00000001; -SDRAM[1].EmcMrsWarmBootEnable = 0x00000001; -SDRAM[1].EmcMrsExtra = 0x00000b71; -SDRAM[1].EmcWarmBootMrs = 0x00100002; -SDRAM[1].EmcWarmBootEmrs = 0x00000b71; -SDRAM[1].EmcWarmBootEmr2 = 0x00200018; -SDRAM[1].EmcWarmBootEmr3 = 0x00300000; -SDRAM[1].EmcWarmBootMrsExtra = 0x00100002; -SDRAM[1].EmcClkenOverride = 0x00000000; -SDRAM[1].EmcExtraRefreshNum = 0x00000002; -SDRAM[1].EmcClkenOverrideAllWarmBoot = 0x00000000; -SDRAM[1].McClkenOverrideAllWarmBoot = 0x00000000; -SDRAM[1].EmcCfgDigDllPeriodWarmBoot = 0x00000003; -SDRAM[1].PmcVddpSel = 0x00000002; -SDRAM[1].PmcDdrCfg = 0x00000002; -SDRAM[1].PmcIoDpdReq = 0x80800000; -SDRAM[1].PmcENoVttGen = 0x00000000; -SDRAM[1].PmcNoIoPower = 0x00000000; -SDRAM[1].EmcXm2CmdPadCtrl = 0x000002a0; -SDRAM[1].EmcXm2CmdPadCtrl2 = 0x770c0000; -SDRAM[1].EmcXm2DqsPadCtrl = 0x770c1414; -SDRAM[1].EmcXm2DqsPadCtrl2 = 0x0600013d; -SDRAM[1].EmcXm2DqsPadCtrl3 = 0x07000021; -SDRAM[1].EmcXm2DqPadCtrl = 0x770c2990; -SDRAM[1].EmcXm2DqPadCtrl2 = 0x22220000; -SDRAM[1].EmcXm2ClkPadCtrl = 0x77fff884; -SDRAM[1].EmcXm2CompPadCtrl = 0x01f1f508; -SDRAM[1].EmcXm2VttGenPadCtrl = 0x07077404; -SDRAM[1].EmcXm2VttGenPadCtrl2 = 0x54000000; -SDRAM[1].EmcXm2QUsePadCtrl = 0x080001e8; -SDRAM[1].McEmemAdrCfg = 0x00000001; -SDRAM[1].McEmemAdrCfgDev0 = 0x00080303; -SDRAM[1].McEmemAdrCfgDev1 = 0x00080303; -SDRAM[1].McEmemArbCfg = 0x00000014; -SDRAM[1].McEmemArbOutstandingReq = 0xc0000079; -SDRAM[1].McEmemArbTimingRcd = 0x00000003; -SDRAM[1].McEmemArbTimingRp = 0x00000004; -SDRAM[1].McEmemArbTimingRc = 0x00000010; -SDRAM[1].McEmemArbTimingRas = 0x0000000a; -SDRAM[1].McEmemArbTimingFaw = 0x0000000a; -SDRAM[1].McEmemArbTimingRrd = 0x00000001; -SDRAM[1].McEmemArbTimingRap2Pre = 0x00000003; -SDRAM[1].McEmemArbTimingWap2Pre = 0x0000000b; -SDRAM[1].McEmemArbTimingR2R = 0x00000002; -SDRAM[1].McEmemArbTimingW2W = 0x00000002; -SDRAM[1].McEmemArbTimingR2W = 0x00000004; -SDRAM[1].McEmemArbTimingW2R = 0x00000008; -SDRAM[1].McEmemArbDaTurns = 0x08040202; -SDRAM[1].McEmemArbDaCovers = 0x00140c10; -SDRAM[1].McEmemArbMisc0 = 0x70ea1f11; -SDRAM[1].McEmemArbMisc1 = 0x78000000; -SDRAM[1].McEmemArbRing1Throttle = 0x001f0000; -SDRAM[1].McEmemArbOverride = 0x00000080; -SDRAM[1].McEmemArbRsv = 0xff00ff00; -SDRAM[1].McClkenOverride = 0x00000000; - -SDRAM[2].MemoryType = NvBootMemoryType_Ddr3; -SDRAM[2].PllMChargePumpSetupControl = 0x00000008; -SDRAM[2].PllMLoopFilterSetupControl = 0x00000000; -SDRAM[2].PllMInputDivider = 0x0000000c; -SDRAM[2].PllMFeedbackDivider = 0x0000029b; -SDRAM[2].PllMPostDivider = 0x00000000; -SDRAM[2].PllMStableTime = 0x0000012c; -SDRAM[2].EmcClockDivider = 0x00000000; -SDRAM[2].EmcAutoCalInterval = 0x001fffff; -SDRAM[2].EmcAutoCalConfig = 0xa0f10000; -SDRAM[2].EmcAutoCalWait = 0x00000064; -SDRAM[2].EmcPinProgramWait = 0x00000001; -SDRAM[2].EmcRc = 0x0000001f; -SDRAM[2].EmcRfc = 0x00000069; -SDRAM[2].EmcRas = 0x00000016; -SDRAM[2].EmcRp = 0x00000008; -SDRAM[2].EmcR2w = 0x00000005; -SDRAM[2].EmcW2r = 0x0000000c; -SDRAM[2].EmcR2p = 0x00000003; -SDRAM[2].EmcW2p = 0x00000011; -SDRAM[2].EmcRrd = 0x00000002; -SDRAM[2].EmcRdRcd = 0x00000008; -SDRAM[2].EmcWrRcd = 0x00000008; -SDRAM[2].EmcRext = 0x00000001; -SDRAM[2].EmcWdv = 0x00000007; -SDRAM[2].EmcQUseExtra = 0x0000000c; -SDRAM[2].EmcQUse = 0x0000000b; -SDRAM[2].EmcQRst = 0x00000009; -SDRAM[2].EmcQSafe = 0x0000000c; -SDRAM[2].EmcRdv = 0x00000011; -SDRAM[2].EmcRefresh = 0x00001412; -SDRAM[2].EmcBurstRefreshNum = 0x00000000; -SDRAM[2].EmcPdEx2Wr = 0x00000002; -SDRAM[2].EmcPdEx2Rd = 0x0000000e; -SDRAM[2].EmcPChg2Pden = 0x00000001; -SDRAM[2].EmcAct2Pden = 0x00000000; -SDRAM[2].EmcAr2Pden = 0x0000000c; -SDRAM[2].EmcRw2Pden = 0x00000016; -SDRAM[2].EmcTxsr = 0x00000072; -SDRAM[2].EmcTcke = 0x00000005; -SDRAM[2].EmcTfaw = 0x00000015; -SDRAM[2].EmcTrpab = 0x00000000; -SDRAM[2].EmcTClkStable = 0x00000006; -SDRAM[2].EmcTClkStop = 0x00000007; -SDRAM[2].EmcTRefBw = 0x00001453; -SDRAM[2].EmcFbioCfg5 = 0x00005088; -SDRAM[2].EmcFbioCfg6 = 0x00000004; -SDRAM[2].EmcFbioSpare = 0xf8000000; -SDRAM[2].EmcMrsResetDllWait = 0x00000000; -SDRAM[2].EmcMrsResetDll = 0x00000000; -SDRAM[2].EmcMrsDdr2DllReset = 0x00000000; -SDRAM[2].EmcMrs = 0x00000b71; -SDRAM[2].EmcEmrsEmr2 = 0x00200018; -SDRAM[2].EmcEmrsEmr3 = 0x00300000; -SDRAM[2].EmcEmrsDdr2DllEnable = 0x00000000; -SDRAM[2].EmcEmrsDdr2OcdCalib = 0x00000000; -SDRAM[2].EmcEmrs = 0x00100002; -SDRAM[2].EmcMrw1 = 0x00000000; -SDRAM[2].EmcMrw2 = 0x00000000; -SDRAM[2].EmcMrw3 = 0x00000000; -SDRAM[2].EmcMrwResetCommand = 0x00000000; -SDRAM[2].EmcMrwResetNInitWait = 0x00000000; -SDRAM[2].EmcAdrCfg = 0x00000001; -SDRAM[2].McEmemCfg = 0x00000800; -SDRAM[2].EmcCfg2 = 0x000c0099; -SDRAM[2].EmcCfgDigDll = 0xf00b0191; -SDRAM[2].EmcCfgDigDllPeriod = 0x00008000; -SDRAM[2].EmcCfg = 0x23e00000; -SDRAM[2].EmcDbg = 0x01000400; -SDRAM[2].WarmBootWait = 0x00000002; -SDRAM[2].EmcCttTermCtrl = 0x00000802; -SDRAM[2].EmcOdtWrite = 0x00000000; -SDRAM[2].EmcOdtRead = 0x00000000; -SDRAM[2].EmcZcalWaitCnt = 0x00000040; -SDRAM[2].EmcZcalMrwCmd = 0x00000000; -SDRAM[2].EmcDdr2Wait = 0x00000000; -SDRAM[2].PmcDdrPwr = 0x00000003; -SDRAM[2].EmcClockSource = 0x00000000; -SDRAM[2].EmcClockUsePllMUD = 0x00000001; -SDRAM[2].EmcPinExtraWait = 0x00000000; -SDRAM[2].EmcTimingControlWait = 0x00000000; -SDRAM[2].EmcWext = 0x00000000; -SDRAM[2].EmcCtt = 0x00000000; -SDRAM[2].EmcCttDuration = 0x00000000; -SDRAM[2].EmcPreRefreshReqCnt = 0x00000504; -SDRAM[2].EmcTxsrDll = 0x00000200; -SDRAM[2].EmcCfgRsv = 0xff00ff09; -SDRAM[2].EmcMrwExtra = 0x00000000; -SDRAM[2].EmcWarmBootMrw1 = 0x00000000; -SDRAM[2].EmcWarmBootMrw2 = 0x00000000; -SDRAM[2].EmcWarmBootMrw3 = 0x00000000; -SDRAM[2].EmcWarmBootMrwExtra = 0x00000000; -SDRAM[2].EmcWarmBootExtraModeRegWriteEnable = 0x00000000; -SDRAM[2].EmcExtraModeRegWriteEnable = 0x00000000; -SDRAM[2].EmcMrsWaitCnt = 0x0116000c; -SDRAM[2].EmcCmdQ = 0x10004408; -SDRAM[2].EmcMc2EmcQ = 0x06000404; -SDRAM[2].EmcDynSelfRefControl = 0x800028a5; -SDRAM[2].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; -SDRAM[2].EmcDevSelect = 0x00000000; -SDRAM[2].EmcSelDpdCtrl = 0x0004032c; -SDRAM[2].EmcDllXformDqs0 = 0x00000008; -SDRAM[2].EmcDllXformDqs1 = 0x00000008; -SDRAM[2].EmcDllXformDqs2 = 0x00000008; -SDRAM[2].EmcDllXformDqs3 = 0x00000008; -SDRAM[2].EmcDllXformDqs4 = 0x00000008; -SDRAM[2].EmcDllXformDqs5 = 0x00000008; -SDRAM[2].EmcDllXformDqs6 = 0x00000008; -SDRAM[2].EmcDllXformDqs7 = 0x00000008; -SDRAM[2].EmcDllXformQUse0 = 0x00000000; -SDRAM[2].EmcDllXformQUse1 = 0x00000000; -SDRAM[2].EmcDllXformQUse2 = 0x00000000; -SDRAM[2].EmcDllXformQUse3 = 0x00000000; -SDRAM[2].EmcDllXformQUse4 = 0x00000000; -SDRAM[2].EmcDllXformQUse5 = 0x00000000; -SDRAM[2].EmcDllXformQUse6 = 0x00000000; -SDRAM[2].EmcDllXformQUse7 = 0x00000000; -SDRAM[2].EmcDliTrimTxDqs0 = 0x00000000; -SDRAM[2].EmcDliTrimTxDqs1 = 0x00000000; -SDRAM[2].EmcDliTrimTxDqs2 = 0x00000000; -SDRAM[2].EmcDliTrimTxDqs3 = 0x00000000; -SDRAM[2].EmcDliTrimTxDqs4 = 0x00000000; -SDRAM[2].EmcDliTrimTxDqs5 = 0x00000000; -SDRAM[2].EmcDliTrimTxDqs6 = 0x00000000; -SDRAM[2].EmcDliTrimTxDqs7 = 0x00000000; -SDRAM[2].EmcDllXformDq0 = 0x00000008; -SDRAM[2].EmcDllXformDq1 = 0x00000008; -SDRAM[2].EmcDllXformDq2 = 0x00000008; -SDRAM[2].EmcDllXformDq3 = 0x00000008; -SDRAM[2].EmcZcalInterval = 0x00020000; -SDRAM[2].EmcZcalInitDev0 = 0x80000011; -SDRAM[2].EmcZcalInitDev1 = 0x40000011; -SDRAM[2].EmcZcalInitWait = 0x00000001; -SDRAM[2].EmcZcalColdBootEnable = 0x00000001; -SDRAM[2].EmcZcalWarmBootEnable = 0x00000001; -SDRAM[2].EmcMrwLpddr2ZcalWarmBoot = 0x000a00ab; -SDRAM[2].EmcZqCalDdr3WarmBoot = 0x00000011; -SDRAM[2].EmcZcalWarmBootWait = 0x00000001; -SDRAM[2].EmcMrsWarmBootEnable = 0x00000001; -SDRAM[2].EmcMrsExtra = 0x00000b71; -SDRAM[2].EmcWarmBootMrs = 0x00100002; -SDRAM[2].EmcWarmBootEmrs = 0x00000b71; -SDRAM[2].EmcWarmBootEmr2 = 0x00200018; -SDRAM[2].EmcWarmBootEmr3 = 0x00300000; -SDRAM[2].EmcWarmBootMrsExtra = 0x00100002; -SDRAM[2].EmcClkenOverride = 0x00000000; -SDRAM[2].EmcExtraRefreshNum = 0x00000002; -SDRAM[2].EmcClkenOverrideAllWarmBoot = 0x00000000; -SDRAM[2].McClkenOverrideAllWarmBoot = 0x00000000; -SDRAM[2].EmcCfgDigDllPeriodWarmBoot = 0x00000003; -SDRAM[2].PmcVddpSel = 0x00000002; -SDRAM[2].PmcDdrCfg = 0x00000002; -SDRAM[2].PmcIoDpdReq = 0x80800000; -SDRAM[2].PmcENoVttGen = 0x00000000; -SDRAM[2].PmcNoIoPower = 0x00000000; -SDRAM[2].EmcXm2CmdPadCtrl = 0x000002a0; -SDRAM[2].EmcXm2CmdPadCtrl2 = 0x770c0000; -SDRAM[2].EmcXm2DqsPadCtrl = 0x770c1414; -SDRAM[2].EmcXm2DqsPadCtrl2 = 0x0600013d; -SDRAM[2].EmcXm2DqsPadCtrl3 = 0x07000021; -SDRAM[2].EmcXm2DqPadCtrl = 0x770c2990; -SDRAM[2].EmcXm2DqPadCtrl2 = 0x22220000; -SDRAM[2].EmcXm2ClkPadCtrl = 0x77fff884; -SDRAM[2].EmcXm2CompPadCtrl = 0x01f1f508; -SDRAM[2].EmcXm2VttGenPadCtrl = 0x07077404; -SDRAM[2].EmcXm2VttGenPadCtrl2 = 0x54000000; -SDRAM[2].EmcXm2QUsePadCtrl = 0x080001e8; -SDRAM[2].McEmemAdrCfg = 0x00000001; -SDRAM[2].McEmemAdrCfgDev0 = 0x00080303; -SDRAM[2].McEmemAdrCfgDev1 = 0x00080303; -SDRAM[2].McEmemArbCfg = 0x00000014; -SDRAM[2].McEmemArbOutstandingReq = 0xc0000079; -SDRAM[2].McEmemArbTimingRcd = 0x00000003; -SDRAM[2].McEmemArbTimingRp = 0x00000004; -SDRAM[2].McEmemArbTimingRc = 0x00000010; -SDRAM[2].McEmemArbTimingRas = 0x0000000a; -SDRAM[2].McEmemArbTimingFaw = 0x0000000a; -SDRAM[2].McEmemArbTimingRrd = 0x00000001; -SDRAM[2].McEmemArbTimingRap2Pre = 0x00000003; -SDRAM[2].McEmemArbTimingWap2Pre = 0x0000000b; -SDRAM[2].McEmemArbTimingR2R = 0x00000002; -SDRAM[2].McEmemArbTimingW2W = 0x00000002; -SDRAM[2].McEmemArbTimingR2W = 0x00000004; -SDRAM[2].McEmemArbTimingW2R = 0x00000008; -SDRAM[2].McEmemArbDaTurns = 0x08040202; -SDRAM[2].McEmemArbDaCovers = 0x00140c10; -SDRAM[2].McEmemArbMisc0 = 0x70ea1f11; -SDRAM[2].McEmemArbMisc1 = 0x78000000; -SDRAM[2].McEmemArbRing1Throttle = 0x001f0000; -SDRAM[2].McEmemArbOverride = 0x00000080; -SDRAM[2].McEmemArbRsv = 0xff00ff00; -SDRAM[2].McClkenOverride = 0x00000000; - -SDRAM[3].MemoryType = NvBootMemoryType_Ddr3; -SDRAM[3].PllMChargePumpSetupControl = 0x00000008; -SDRAM[3].PllMLoopFilterSetupControl = 0x00000000; -SDRAM[3].PllMInputDivider = 0x0000000c; -SDRAM[3].PllMFeedbackDivider = 0x0000029b; -SDRAM[3].PllMPostDivider = 0x00000000; -SDRAM[3].PllMStableTime = 0x0000012c; -SDRAM[3].EmcClockDivider = 0x00000000; -SDRAM[3].EmcAutoCalInterval = 0x001fffff; -SDRAM[3].EmcAutoCalConfig = 0xa0f10000; -SDRAM[3].EmcAutoCalWait = 0x00000064; -SDRAM[3].EmcPinProgramWait = 0x00000001; -SDRAM[3].EmcRc = 0x0000001f; -SDRAM[3].EmcRfc = 0x00000069; -SDRAM[3].EmcRas = 0x00000016; -SDRAM[3].EmcRp = 0x00000008; -SDRAM[3].EmcR2w = 0x00000005; -SDRAM[3].EmcW2r = 0x0000000c; -SDRAM[3].EmcR2p = 0x00000003; -SDRAM[3].EmcW2p = 0x00000011; -SDRAM[3].EmcRrd = 0x00000002; -SDRAM[3].EmcRdRcd = 0x00000008; -SDRAM[3].EmcWrRcd = 0x00000008; -SDRAM[3].EmcRext = 0x00000001; -SDRAM[3].EmcWdv = 0x00000007; -SDRAM[3].EmcQUseExtra = 0x0000000c; -SDRAM[3].EmcQUse = 0x0000000b; -SDRAM[3].EmcQRst = 0x00000009; -SDRAM[3].EmcQSafe = 0x0000000c; -SDRAM[3].EmcRdv = 0x00000011; -SDRAM[3].EmcRefresh = 0x00001412; -SDRAM[3].EmcBurstRefreshNum = 0x00000000; -SDRAM[3].EmcPdEx2Wr = 0x00000002; -SDRAM[3].EmcPdEx2Rd = 0x0000000e; -SDRAM[3].EmcPChg2Pden = 0x00000001; -SDRAM[3].EmcAct2Pden = 0x00000000; -SDRAM[3].EmcAr2Pden = 0x0000000c; -SDRAM[3].EmcRw2Pden = 0x00000016; -SDRAM[3].EmcTxsr = 0x00000072; -SDRAM[3].EmcTcke = 0x00000005; -SDRAM[3].EmcTfaw = 0x00000015; -SDRAM[3].EmcTrpab = 0x00000000; -SDRAM[3].EmcTClkStable = 0x00000006; -SDRAM[3].EmcTClkStop = 0x00000007; -SDRAM[3].EmcTRefBw = 0x00001453; -SDRAM[3].EmcFbioCfg5 = 0x00005088; -SDRAM[3].EmcFbioCfg6 = 0x00000004; -SDRAM[3].EmcFbioSpare = 0xf8000000; -SDRAM[3].EmcMrsResetDllWait = 0x00000000; -SDRAM[3].EmcMrsResetDll = 0x00000000; -SDRAM[3].EmcMrsDdr2DllReset = 0x00000000; -SDRAM[3].EmcMrs = 0x00000b71; -SDRAM[3].EmcEmrsEmr2 = 0x00200018; -SDRAM[3].EmcEmrsEmr3 = 0x00300000; -SDRAM[3].EmcEmrsDdr2DllEnable = 0x00000000; -SDRAM[3].EmcEmrsDdr2OcdCalib = 0x00000000; -SDRAM[3].EmcEmrs = 0x00100002; -SDRAM[3].EmcMrw1 = 0x00000000; -SDRAM[3].EmcMrw2 = 0x00000000; -SDRAM[3].EmcMrw3 = 0x00000000; -SDRAM[3].EmcMrwResetCommand = 0x00000000; -SDRAM[3].EmcMrwResetNInitWait = 0x00000000; -SDRAM[3].EmcAdrCfg = 0x00000001; -SDRAM[3].McEmemCfg = 0x00000800; -SDRAM[3].EmcCfg2 = 0x000c0099; -SDRAM[3].EmcCfgDigDll = 0xf00b0191; -SDRAM[3].EmcCfgDigDllPeriod = 0x00008000; -SDRAM[3].EmcCfg = 0x23e00000; -SDRAM[3].EmcDbg = 0x01000400; -SDRAM[3].WarmBootWait = 0x00000002; -SDRAM[3].EmcCttTermCtrl = 0x00000802; -SDRAM[3].EmcOdtWrite = 0x00000000; -SDRAM[3].EmcOdtRead = 0x00000000; -SDRAM[3].EmcZcalWaitCnt = 0x00000040; -SDRAM[3].EmcZcalMrwCmd = 0x00000000; -SDRAM[3].EmcDdr2Wait = 0x00000000; -SDRAM[3].PmcDdrPwr = 0x00000003; -SDRAM[3].EmcClockSource = 0x00000000; -SDRAM[3].EmcClockUsePllMUD = 0x00000001; -SDRAM[3].EmcPinExtraWait = 0x00000000; -SDRAM[3].EmcTimingControlWait = 0x00000000; -SDRAM[3].EmcWext = 0x00000000; -SDRAM[3].EmcCtt = 0x00000000; -SDRAM[3].EmcCttDuration = 0x00000000; -SDRAM[3].EmcPreRefreshReqCnt = 0x00000504; -SDRAM[3].EmcTxsrDll = 0x00000200; -SDRAM[3].EmcCfgRsv = 0xff00ff09; -SDRAM[3].EmcMrwExtra = 0x00000000; -SDRAM[3].EmcWarmBootMrw1 = 0x00000000; -SDRAM[3].EmcWarmBootMrw2 = 0x00000000; -SDRAM[3].EmcWarmBootMrw3 = 0x00000000; -SDRAM[3].EmcWarmBootMrwExtra = 0x00000000; -SDRAM[3].EmcWarmBootExtraModeRegWriteEnable = 0x00000000; -SDRAM[3].EmcExtraModeRegWriteEnable = 0x00000000; -SDRAM[3].EmcMrsWaitCnt = 0x0116000c; -SDRAM[3].EmcCmdQ = 0x10004408; -SDRAM[3].EmcMc2EmcQ = 0x06000404; -SDRAM[3].EmcDynSelfRefControl = 0x800028a5; -SDRAM[3].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; -SDRAM[3].EmcDevSelect = 0x00000000; -SDRAM[3].EmcSelDpdCtrl = 0x0004032c; -SDRAM[3].EmcDllXformDqs0 = 0x00000008; -SDRAM[3].EmcDllXformDqs1 = 0x00000008; -SDRAM[3].EmcDllXformDqs2 = 0x00000008; -SDRAM[3].EmcDllXformDqs3 = 0x00000008; -SDRAM[3].EmcDllXformDqs4 = 0x00000008; -SDRAM[3].EmcDllXformDqs5 = 0x00000008; -SDRAM[3].EmcDllXformDqs6 = 0x00000008; -SDRAM[3].EmcDllXformDqs7 = 0x00000008; -SDRAM[3].EmcDllXformQUse0 = 0x00000000; -SDRAM[3].EmcDllXformQUse1 = 0x00000000; -SDRAM[3].EmcDllXformQUse2 = 0x00000000; -SDRAM[3].EmcDllXformQUse3 = 0x00000000; -SDRAM[3].EmcDllXformQUse4 = 0x00000000; -SDRAM[3].EmcDllXformQUse5 = 0x00000000; -SDRAM[3].EmcDllXformQUse6 = 0x00000000; -SDRAM[3].EmcDllXformQUse7 = 0x00000000; -SDRAM[3].EmcDliTrimTxDqs0 = 0x00000000; -SDRAM[3].EmcDliTrimTxDqs1 = 0x00000000; -SDRAM[3].EmcDliTrimTxDqs2 = 0x00000000; -SDRAM[3].EmcDliTrimTxDqs3 = 0x00000000; -SDRAM[3].EmcDliTrimTxDqs4 = 0x00000000; -SDRAM[3].EmcDliTrimTxDqs5 = 0x00000000; -SDRAM[3].EmcDliTrimTxDqs6 = 0x00000000; -SDRAM[3].EmcDliTrimTxDqs7 = 0x00000000; -SDRAM[3].EmcDllXformDq0 = 0x00000008; -SDRAM[3].EmcDllXformDq1 = 0x00000008; -SDRAM[3].EmcDllXformDq2 = 0x00000008; -SDRAM[3].EmcDllXformDq3 = 0x00000008; -SDRAM[3].EmcZcalInterval = 0x00020000; -SDRAM[3].EmcZcalInitDev0 = 0x80000011; -SDRAM[3].EmcZcalInitDev1 = 0x40000011; -SDRAM[3].EmcZcalInitWait = 0x00000001; -SDRAM[3].EmcZcalColdBootEnable = 0x00000001; -SDRAM[3].EmcZcalWarmBootEnable = 0x00000001; -SDRAM[3].EmcMrwLpddr2ZcalWarmBoot = 0x000a00ab; -SDRAM[3].EmcZqCalDdr3WarmBoot = 0x00000011; -SDRAM[3].EmcZcalWarmBootWait = 0x00000001; -SDRAM[3].EmcMrsWarmBootEnable = 0x00000001; -SDRAM[3].EmcMrsExtra = 0x00000b71; -SDRAM[3].EmcWarmBootMrs = 0x00100002; -SDRAM[3].EmcWarmBootEmrs = 0x00000b71; -SDRAM[3].EmcWarmBootEmr2 = 0x00200018; -SDRAM[3].EmcWarmBootEmr3 = 0x00300000; -SDRAM[3].EmcWarmBootMrsExtra = 0x00100002; -SDRAM[3].EmcClkenOverride = 0x00000000; -SDRAM[3].EmcExtraRefreshNum = 0x00000002; -SDRAM[3].EmcClkenOverrideAllWarmBoot = 0x00000000; -SDRAM[3].McClkenOverrideAllWarmBoot = 0x00000000; -SDRAM[3].EmcCfgDigDllPeriodWarmBoot = 0x00000003; -SDRAM[3].PmcVddpSel = 0x00000002; -SDRAM[3].PmcDdrCfg = 0x00000002; -SDRAM[3].PmcIoDpdReq = 0x80800000; -SDRAM[3].PmcENoVttGen = 0x00000000; -SDRAM[3].PmcNoIoPower = 0x00000000; -SDRAM[3].EmcXm2CmdPadCtrl = 0x000002a0; -SDRAM[3].EmcXm2CmdPadCtrl2 = 0x770c0000; -SDRAM[3].EmcXm2DqsPadCtrl = 0x770c1414; -SDRAM[3].EmcXm2DqsPadCtrl2 = 0x0600013d; -SDRAM[3].EmcXm2DqsPadCtrl3 = 0x07000021; -SDRAM[3].EmcXm2DqPadCtrl = 0x770c2990; -SDRAM[3].EmcXm2DqPadCtrl2 = 0x22220000; -SDRAM[3].EmcXm2ClkPadCtrl = 0x77fff884; -SDRAM[3].EmcXm2CompPadCtrl = 0x01f1f508; -SDRAM[3].EmcXm2VttGenPadCtrl = 0x07077404; -SDRAM[3].EmcXm2VttGenPadCtrl2 = 0x54000000; -SDRAM[3].EmcXm2QUsePadCtrl = 0x080001e8; -SDRAM[3].McEmemAdrCfg = 0x00000001; -SDRAM[3].McEmemAdrCfgDev0 = 0x00080303; -SDRAM[3].McEmemAdrCfgDev1 = 0x00080303; -SDRAM[3].McEmemArbCfg = 0x00000014; -SDRAM[3].McEmemArbOutstandingReq = 0xc0000079; -SDRAM[3].McEmemArbTimingRcd = 0x00000003; -SDRAM[3].McEmemArbTimingRp = 0x00000004; -SDRAM[3].McEmemArbTimingRc = 0x00000010; -SDRAM[3].McEmemArbTimingRas = 0x0000000a; -SDRAM[3].McEmemArbTimingFaw = 0x0000000a; -SDRAM[3].McEmemArbTimingRrd = 0x00000001; -SDRAM[3].McEmemArbTimingRap2Pre = 0x00000003; -SDRAM[3].McEmemArbTimingWap2Pre = 0x0000000b; -SDRAM[3].McEmemArbTimingR2R = 0x00000002; -SDRAM[3].McEmemArbTimingW2W = 0x00000002; -SDRAM[3].McEmemArbTimingR2W = 0x00000004; -SDRAM[3].McEmemArbTimingW2R = 0x00000008; -SDRAM[3].McEmemArbDaTurns = 0x08040202; -SDRAM[3].McEmemArbDaCovers = 0x00140c10; -SDRAM[3].McEmemArbMisc0 = 0x70ea1f11; -SDRAM[3].McEmemArbMisc1 = 0x78000000; -SDRAM[3].McEmemArbRing1Throttle = 0x001f0000; -SDRAM[3].McEmemArbOverride = 0x00000080; -SDRAM[3].McEmemArbRsv = 0xff00ff00; -SDRAM[3].McClkenOverride = 0x00000000; diff --git a/cardhu/E1198_Hynix_2GB_H5TC4G83MFR-PBA_375MHz_111122_317_sdmmc4_x8.bct.cfg b/cardhu/E1198_Hynix_2GB_H5TC4G83MFR-PBA_375MHz_111122_317_sdmmc4_x8.bct.cfg deleted file mode 100644 index f4ee3e0..0000000 --- a/cardhu/E1198_Hynix_2GB_H5TC4G83MFR-PBA_375MHz_111122_317_sdmmc4_x8.bct.cfg +++ /dev/null @@ -1,819 +0,0 @@ -# Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. -# -# This software is provided 'as-is', without any express or implied -# warranty. In no event will the authors be held liable for any damages -# arising from the use of this software. -# -# Permission is granted to anyone to use this software for any purpose, -# including commercial applications, and to alter it and redistribute it -# freely, subject to the following restrictions: -# -# 1. The origin of this software must not be misrepresented; you must not -# claim that you wrote the original software. If you use this software -# in a product, an acknowledgment in the product documentation would be -# appreciated but is not required. -# 2. Altered source versions must be plainly marked as such, and must not be -# misrepresented as being the original software. -# 3. This notice may not be removed or altered from any source distribution. - -Version = 0x00030001; -BlockSize = 0x00004000; -PageSize = 0x00000200; -PartitionSize = 0x02000000; -OdmData = 0x800c0000; - -DevType[0] = NvBootDevType_Sdmmc; -DeviceParam[0].SdmmcParams.ClockDivider = 0x00000009; -DeviceParam[0].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_8Bit; -DeviceParam[0].SdmmcParams.MaxPowerClassSupported = 0x00000000; -DeviceParam[0].SdmmcParams.SdController = 0x00000000; - -DevType[1] = NvBootDevType_Sdmmc; -DeviceParam[1].SdmmcParams.ClockDivider = 0x00000009; -DeviceParam[1].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_8Bit; -DeviceParam[1].SdmmcParams.MaxPowerClassSupported = 0x00000000; -DeviceParam[1].SdmmcParams.SdController = 0x00000000; - -DevType[2] = NvBootDevType_Sdmmc; -DeviceParam[2].SdmmcParams.ClockDivider = 0x00000009; -DeviceParam[2].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_8Bit; -DeviceParam[2].SdmmcParams.MaxPowerClassSupported = 0x00000000; -DeviceParam[2].SdmmcParams.SdController = 0x00000000; - -DevType[3] = NvBootDevType_Sdmmc; -DeviceParam[3].SdmmcParams.ClockDivider = 0x00000009; -DeviceParam[3].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_8Bit; -DeviceParam[3].SdmmcParams.MaxPowerClassSupported = 0x00000000; -DeviceParam[3].SdmmcParams.SdController = 0x00000000; - -SDRAM[0].MemoryType = NvBootMemoryType_Ddr3; -SDRAM[0].PllMChargePumpSetupControl = 0x00000008; -SDRAM[0].PllMLoopFilterSetupControl = 0x00000000; -SDRAM[0].PllMInputDivider = 0x0000000c; -SDRAM[0].PllMFeedbackDivider = 0x000002ee; -SDRAM[0].PllMPostDivider = 0x00000000; -SDRAM[0].PllMStableTime = 0x0000012c; -SDRAM[0].EmcClockDivider = 0x00000002; -SDRAM[0].EmcAutoCalInterval = 0x001fffff; -SDRAM[0].EmcAutoCalConfig = 0xa0f10000; -SDRAM[0].EmcAutoCalWait = 0x00000064; -SDRAM[0].EmcPinProgramWait = 0x00000001; -SDRAM[0].EmcRc = 0x00000011; -SDRAM[0].EmcRfc = 0x0000006f; -SDRAM[0].EmcRas = 0x0000000c; -SDRAM[0].EmcRp = 0x00000004; -SDRAM[0].EmcR2w = 0x00000003; -SDRAM[0].EmcW2r = 0x00000008; -SDRAM[0].EmcR2p = 0x00000002; -SDRAM[0].EmcW2p = 0x0000000a; -SDRAM[0].EmcRrd = 0x00000002; -SDRAM[0].EmcRdRcd = 0x00000004; -SDRAM[0].EmcWrRcd = 0x00000004; -SDRAM[0].EmcRext = 0x00000001; -SDRAM[0].EmcWdv = 0x00000004; -SDRAM[0].EmcQUseExtra = 0x00000000; -SDRAM[0].EmcQUse = 0x00000006; -SDRAM[0].EmcQRst = 0x00000004; -SDRAM[0].EmcQSafe = 0x0000000a; -SDRAM[0].EmcRdv = 0x0000000d; -SDRAM[0].EmcRefresh = 0x00000b2d; -SDRAM[0].EmcBurstRefreshNum = 0x00000000; -SDRAM[0].EmcPdEx2Wr = 0x00000001; -SDRAM[0].EmcPdEx2Rd = 0x00000008; -SDRAM[0].EmcPChg2Pden = 0x00000001; -SDRAM[0].EmcAct2Pden = 0x00000000; -SDRAM[0].EmcAr2Pden = 0x00000007; -SDRAM[0].EmcRw2Pden = 0x0000000f; -SDRAM[0].EmcTxsr = 0x00000075; -SDRAM[0].EmcTcke = 0x00000004; -SDRAM[0].EmcTfaw = 0x0000000c; -SDRAM[0].EmcTrpab = 0x00000000; -SDRAM[0].EmcTClkStable = 0x00000004; -SDRAM[0].EmcTClkStop = 0x00000005; -SDRAM[0].EmcTRefBw = 0x00000b6d; -SDRAM[0].EmcFbioCfg5 = 0x00007088; -SDRAM[0].EmcFbioCfg6 = 0x00000006; -SDRAM[0].EmcFbioSpare = 0xd8000000; -SDRAM[0].EmcMrsResetDllWait = 0x00000000; -SDRAM[0].EmcMrsResetDll = 0x00000000; -SDRAM[0].EmcMrsDdr2DllReset = 0x00000000; -SDRAM[0].EmcMrs = 0x80000521; -SDRAM[0].EmcEmrsEmr2 = 0x80200000; -SDRAM[0].EmcEmrsEmr3 = 0x80300000; -SDRAM[0].EmcEmrsDdr2DllEnable = 0x00000000; -SDRAM[0].EmcEmrsDdr2OcdCalib = 0x00000000; -SDRAM[0].EmcEmrs = 0x80100002; -SDRAM[0].EmcMrw1 = 0x00000000; -SDRAM[0].EmcMrw2 = 0x00000000; -SDRAM[0].EmcMrw3 = 0x00000000; -SDRAM[0].EmcMrwResetCommand = 0x00000000; -SDRAM[0].EmcMrwResetNInitWait = 0x00000000; -SDRAM[0].EmcAdrCfg = 0x00000080; -SDRAM[0].McEmemCfg = 0x00000800; -SDRAM[0].EmcCfg2 = 0x000c0099; -SDRAM[0].EmcCfgDigDll = 0x00200084; -SDRAM[0].EmcCfgDigDllPeriod = 0x00008000; -SDRAM[0].EmcCfg = 0x23c00000; -SDRAM[0].EmcDbg = 0x01000400; -SDRAM[0].WarmBootWait = 0x00000002; -SDRAM[0].EmcCttTermCtrl = 0x00000802; -SDRAM[0].EmcOdtWrite = 0x00000000; -SDRAM[0].EmcOdtRead = 0x00000000; -SDRAM[0].EmcZcalWaitCnt = 0x00000040; -SDRAM[0].EmcZcalMrwCmd = 0x80000000; -SDRAM[0].EmcDdr2Wait = 0x00000000; -SDRAM[0].PmcDdrPwr = 0x00000003; -SDRAM[0].EmcClockSource = 0x00000000; -SDRAM[0].EmcClockUsePllMUD = 0x00000000; -SDRAM[0].EmcPinExtraWait = 0x00000000; -SDRAM[0].EmcTimingControlWait = 0x00000000; -SDRAM[0].EmcWext = 0x00000000; -SDRAM[0].EmcCtt = 0x00000000; -SDRAM[0].EmcCttDuration = 0x00000000; -SDRAM[0].EmcPreRefreshReqCnt = 0x000002cb; -SDRAM[0].EmcTxsrDll = 0x00000200; -SDRAM[0].EmcCfgRsv = 0xff00ff89; -SDRAM[0].EmcMrwExtra = 0x00000000; -SDRAM[0].EmcWarmBootMrw1 = 0x00000000; -SDRAM[0].EmcWarmBootMrw2 = 0x00000000; -SDRAM[0].EmcWarmBootMrw3 = 0x00000000; -SDRAM[0].EmcWarmBootMrwExtra = 0x00000000; -SDRAM[0].EmcWarmBootExtraModeRegWriteEnable = 0x00000000; -SDRAM[0].EmcExtraModeRegWriteEnable = 0x00000000; -SDRAM[0].EmcMrsWaitCnt = 0x0150000c; -SDRAM[0].EmcCmdQ = 0x10004408; -SDRAM[0].EmcMc2EmcQ = 0x06000404; -SDRAM[0].EmcDynSelfRefControl = 0x8000174b; -SDRAM[0].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; -SDRAM[0].EmcDevSelect = 0x00000002; -SDRAM[0].EmcSelDpdCtrl = 0x0004032c; -SDRAM[0].EmcDllXformDqs0 = 0x0003c000; -SDRAM[0].EmcDllXformDqs1 = 0x0003c000; -SDRAM[0].EmcDllXformDqs2 = 0x0003c000; -SDRAM[0].EmcDllXformDqs3 = 0x0003c000; -SDRAM[0].EmcDllXformDqs4 = 0x0003c000; -SDRAM[0].EmcDllXformDqs5 = 0x0003c000; -SDRAM[0].EmcDllXformDqs6 = 0x0003c000; -SDRAM[0].EmcDllXformDqs7 = 0x0003c000; -SDRAM[0].EmcDllXformQUse0 = 0x00000000; -SDRAM[0].EmcDllXformQUse1 = 0x00000000; -SDRAM[0].EmcDllXformQUse2 = 0x00000000; -SDRAM[0].EmcDllXformQUse3 = 0x00000000; -SDRAM[0].EmcDllXformQUse4 = 0x00000000; -SDRAM[0].EmcDllXformQUse5 = 0x00000000; -SDRAM[0].EmcDllXformQUse6 = 0x00000000; -SDRAM[0].EmcDllXformQUse7 = 0x00000000; -SDRAM[0].EmcDliTrimTxDqs0 = 0x00000000; -SDRAM[0].EmcDliTrimTxDqs1 = 0x00000000; -SDRAM[0].EmcDliTrimTxDqs2 = 0x00000000; -SDRAM[0].EmcDliTrimTxDqs3 = 0x00000000; -SDRAM[0].EmcDliTrimTxDqs4 = 0x00000000; -SDRAM[0].EmcDliTrimTxDqs5 = 0x00000000; -SDRAM[0].EmcDliTrimTxDqs6 = 0x00000000; -SDRAM[0].EmcDliTrimTxDqs7 = 0x00000000; -SDRAM[0].EmcDllXformDq0 = 0x00040000; -SDRAM[0].EmcDllXformDq1 = 0x00040000; -SDRAM[0].EmcDllXformDq2 = 0x00040000; -SDRAM[0].EmcDllXformDq3 = 0x00040000; -SDRAM[0].EmcZcalInterval = 0x00020000; -SDRAM[0].EmcZcalInitDev0 = 0x80000011; -SDRAM[0].EmcZcalInitDev1 = 0x00000000; -SDRAM[0].EmcZcalInitWait = 0x00000002; -SDRAM[0].EmcZcalColdBootEnable = 0x00000001; -SDRAM[0].EmcZcalWarmBootEnable = 0x00000001; -SDRAM[0].EmcMrwLpddr2ZcalWarmBoot = 0x000a00ab; -SDRAM[0].EmcZqCalDdr3WarmBoot = 0x00000011; -SDRAM[0].EmcZcalWarmBootWait = 0x00000001; -SDRAM[0].EmcMrsWarmBootEnable = 0x00000001; -SDRAM[0].EmcMrsExtra = 0x80000521; -SDRAM[0].EmcWarmBootMrs = 0x80100002; -SDRAM[0].EmcWarmBootEmrs = 0x80000521; -SDRAM[0].EmcWarmBootEmr2 = 0x80200000; -SDRAM[0].EmcWarmBootEmr3 = 0x80300000; -SDRAM[0].EmcWarmBootMrsExtra = 0x80100002; -SDRAM[0].EmcClkenOverride = 0x00000000; -SDRAM[0].EmcExtraRefreshNum = 0x00000002; -SDRAM[0].EmcClkenOverrideAllWarmBoot = 0x00000000; -SDRAM[0].McClkenOverrideAllWarmBoot = 0x00000000; -SDRAM[0].EmcCfgDigDllPeriodWarmBoot = 0x00000003; -SDRAM[0].PmcVddpSel = 0x00000002; -SDRAM[0].PmcDdrCfg = 0x00000002; -SDRAM[0].PmcIoDpdReq = 0x80800000; -SDRAM[0].PmcENoVttGen = 0x00000000; -SDRAM[0].PmcNoIoPower = 0x00000000; -SDRAM[0].EmcXm2CmdPadCtrl = 0x000002a0; -SDRAM[0].EmcXm2CmdPadCtrl2 = 0x770c0000; -SDRAM[0].EmcXm2DqsPadCtrl = 0x770c1414; -SDRAM[0].EmcXm2DqsPadCtrl2 = 0x0800013d; -SDRAM[0].EmcXm2DqsPadCtrl3 = 0x08000021; -SDRAM[0].EmcXm2DqPadCtrl = 0x770c2990; -SDRAM[0].EmcXm2DqPadCtrl2 = 0x00000000; -SDRAM[0].EmcXm2ClkPadCtrl = 0x77fff884; -SDRAM[0].EmcXm2CompPadCtrl = 0x01f1f508; -SDRAM[0].EmcXm2VttGenPadCtrl = 0x05057404; -SDRAM[0].EmcXm2VttGenPadCtrl2 = 0x54000007; -SDRAM[0].EmcXm2QUsePadCtrl = 0x080001e8; -SDRAM[0].McEmemAdrCfg = 0x00000000; -SDRAM[0].McEmemAdrCfgDev0 = 0x00090303; -SDRAM[0].McEmemAdrCfgDev1 = 0x00090303; -SDRAM[0].McEmemArbCfg = 0x0000000b; -SDRAM[0].McEmemArbOutstandingReq = 0xc0000044; -SDRAM[0].McEmemArbTimingRcd = 0x00000001; -SDRAM[0].McEmemArbTimingRp = 0x00000002; -SDRAM[0].McEmemArbTimingRc = 0x00000009; -SDRAM[0].McEmemArbTimingRas = 0x00000005; -SDRAM[0].McEmemArbTimingFaw = 0x00000005; -SDRAM[0].McEmemArbTimingRrd = 0x00000001; -SDRAM[0].McEmemArbTimingRap2Pre = 0x00000002; -SDRAM[0].McEmemArbTimingWap2Pre = 0x00000008; -SDRAM[0].McEmemArbTimingR2R = 0x00000002; -SDRAM[0].McEmemArbTimingW2W = 0x00000002; -SDRAM[0].McEmemArbTimingR2W = 0x00000003; -SDRAM[0].McEmemArbTimingW2R = 0x00000006; -SDRAM[0].McEmemArbDaTurns = 0x06030202; -SDRAM[0].McEmemArbDaCovers = 0x000d0709; -SDRAM[0].McEmemArbMisc0 = 0x7086110a; -SDRAM[0].McEmemArbMisc1 = 0x78000000; -SDRAM[0].McEmemArbRing1Throttle = 0x001f0000; -SDRAM[0].McEmemArbOverride = 0x00000080; -SDRAM[0].McEmemArbRsv = 0xff00ff00; -SDRAM[0].McClkenOverride = 0x00000000; - -SDRAM[1].MemoryType = NvBootMemoryType_Ddr3; -SDRAM[1].PllMChargePumpSetupControl = 0x00000008; -SDRAM[1].PllMLoopFilterSetupControl = 0x00000000; -SDRAM[1].PllMInputDivider = 0x0000000c; -SDRAM[1].PllMFeedbackDivider = 0x000002ee; -SDRAM[1].PllMPostDivider = 0x00000000; -SDRAM[1].PllMStableTime = 0x0000012c; -SDRAM[1].EmcClockDivider = 0x00000002; -SDRAM[1].EmcAutoCalInterval = 0x001fffff; -SDRAM[1].EmcAutoCalConfig = 0xa0f10000; -SDRAM[1].EmcAutoCalWait = 0x00000064; -SDRAM[1].EmcPinProgramWait = 0x00000001; -SDRAM[1].EmcRc = 0x00000011; -SDRAM[1].EmcRfc = 0x0000006f; -SDRAM[1].EmcRas = 0x0000000c; -SDRAM[1].EmcRp = 0x00000004; -SDRAM[1].EmcR2w = 0x00000003; -SDRAM[1].EmcW2r = 0x00000008; -SDRAM[1].EmcR2p = 0x00000002; -SDRAM[1].EmcW2p = 0x0000000a; -SDRAM[1].EmcRrd = 0x00000002; -SDRAM[1].EmcRdRcd = 0x00000004; -SDRAM[1].EmcWrRcd = 0x00000004; -SDRAM[1].EmcRext = 0x00000001; -SDRAM[1].EmcWdv = 0x00000004; -SDRAM[1].EmcQUseExtra = 0x00000000; -SDRAM[1].EmcQUse = 0x00000006; -SDRAM[1].EmcQRst = 0x00000004; -SDRAM[1].EmcQSafe = 0x0000000a; -SDRAM[1].EmcRdv = 0x0000000d; -SDRAM[1].EmcRefresh = 0x00000b2d; -SDRAM[1].EmcBurstRefreshNum = 0x00000000; -SDRAM[1].EmcPdEx2Wr = 0x00000001; -SDRAM[1].EmcPdEx2Rd = 0x00000008; -SDRAM[1].EmcPChg2Pden = 0x00000001; -SDRAM[1].EmcAct2Pden = 0x00000000; -SDRAM[1].EmcAr2Pden = 0x00000007; -SDRAM[1].EmcRw2Pden = 0x0000000f; -SDRAM[1].EmcTxsr = 0x00000075; -SDRAM[1].EmcTcke = 0x00000004; -SDRAM[1].EmcTfaw = 0x0000000c; -SDRAM[1].EmcTrpab = 0x00000000; -SDRAM[1].EmcTClkStable = 0x00000004; -SDRAM[1].EmcTClkStop = 0x00000005; -SDRAM[1].EmcTRefBw = 0x00000b6d; -SDRAM[1].EmcFbioCfg5 = 0x00007088; -SDRAM[1].EmcFbioCfg6 = 0x00000006; -SDRAM[1].EmcFbioSpare = 0xd8000000; -SDRAM[1].EmcMrsResetDllWait = 0x00000000; -SDRAM[1].EmcMrsResetDll = 0x00000000; -SDRAM[1].EmcMrsDdr2DllReset = 0x00000000; -SDRAM[1].EmcMrs = 0x80000521; -SDRAM[1].EmcEmrsEmr2 = 0x80200000; -SDRAM[1].EmcEmrsEmr3 = 0x80300000; -SDRAM[1].EmcEmrsDdr2DllEnable = 0x00000000; -SDRAM[1].EmcEmrsDdr2OcdCalib = 0x00000000; -SDRAM[1].EmcEmrs = 0x80100002; -SDRAM[1].EmcMrw1 = 0x00000000; -SDRAM[1].EmcMrw2 = 0x00000000; -SDRAM[1].EmcMrw3 = 0x00000000; -SDRAM[1].EmcMrwResetCommand = 0x00000000; -SDRAM[1].EmcMrwResetNInitWait = 0x00000000; -SDRAM[1].EmcAdrCfg = 0x00000080; -SDRAM[1].McEmemCfg = 0x00000800; -SDRAM[1].EmcCfg2 = 0x000c0099; -SDRAM[1].EmcCfgDigDll = 0x00200084; -SDRAM[1].EmcCfgDigDllPeriod = 0x00008000; -SDRAM[1].EmcCfg = 0x23c00000; -SDRAM[1].EmcDbg = 0x01000400; -SDRAM[1].WarmBootWait = 0x00000002; -SDRAM[1].EmcCttTermCtrl = 0x00000802; -SDRAM[1].EmcOdtWrite = 0x00000000; -SDRAM[1].EmcOdtRead = 0x00000000; -SDRAM[1].EmcZcalWaitCnt = 0x00000040; -SDRAM[1].EmcZcalMrwCmd = 0x80000000; -SDRAM[1].EmcDdr2Wait = 0x00000000; -SDRAM[1].PmcDdrPwr = 0x00000003; -SDRAM[1].EmcClockSource = 0x00000000; -SDRAM[1].EmcClockUsePllMUD = 0x00000000; -SDRAM[1].EmcPinExtraWait = 0x00000000; -SDRAM[1].EmcTimingControlWait = 0x00000000; -SDRAM[1].EmcWext = 0x00000000; -SDRAM[1].EmcCtt = 0x00000000; -SDRAM[1].EmcCttDuration = 0x00000000; -SDRAM[1].EmcPreRefreshReqCnt = 0x000002cb; -SDRAM[1].EmcTxsrDll = 0x00000200; -SDRAM[1].EmcCfgRsv = 0xff00ff89; -SDRAM[1].EmcMrwExtra = 0x00000000; -SDRAM[1].EmcWarmBootMrw1 = 0x00000000; -SDRAM[1].EmcWarmBootMrw2 = 0x00000000; -SDRAM[1].EmcWarmBootMrw3 = 0x00000000; -SDRAM[1].EmcWarmBootMrwExtra = 0x00000000; -SDRAM[1].EmcWarmBootExtraModeRegWriteEnable = 0x00000000; -SDRAM[1].EmcExtraModeRegWriteEnable = 0x00000000; -SDRAM[1].EmcMrsWaitCnt = 0x0150000c; -SDRAM[1].EmcCmdQ = 0x10004408; -SDRAM[1].EmcMc2EmcQ = 0x06000404; -SDRAM[1].EmcDynSelfRefControl = 0x8000174b; -SDRAM[1].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; -SDRAM[1].EmcDevSelect = 0x00000002; -SDRAM[1].EmcSelDpdCtrl = 0x0004032c; -SDRAM[1].EmcDllXformDqs0 = 0x0003c000; -SDRAM[1].EmcDllXformDqs1 = 0x0003c000; -SDRAM[1].EmcDllXformDqs2 = 0x0003c000; -SDRAM[1].EmcDllXformDqs3 = 0x0003c000; -SDRAM[1].EmcDllXformDqs4 = 0x0003c000; -SDRAM[1].EmcDllXformDqs5 = 0x0003c000; -SDRAM[1].EmcDllXformDqs6 = 0x0003c000; -SDRAM[1].EmcDllXformDqs7 = 0x0003c000; -SDRAM[1].EmcDllXformQUse0 = 0x00000000; -SDRAM[1].EmcDllXformQUse1 = 0x00000000; -SDRAM[1].EmcDllXformQUse2 = 0x00000000; -SDRAM[1].EmcDllXformQUse3 = 0x00000000; -SDRAM[1].EmcDllXformQUse4 = 0x00000000; -SDRAM[1].EmcDllXformQUse5 = 0x00000000; -SDRAM[1].EmcDllXformQUse6 = 0x00000000; -SDRAM[1].EmcDllXformQUse7 = 0x00000000; -SDRAM[1].EmcDliTrimTxDqs0 = 0x00000000; -SDRAM[1].EmcDliTrimTxDqs1 = 0x00000000; -SDRAM[1].EmcDliTrimTxDqs2 = 0x00000000; -SDRAM[1].EmcDliTrimTxDqs3 = 0x00000000; -SDRAM[1].EmcDliTrimTxDqs4 = 0x00000000; -SDRAM[1].EmcDliTrimTxDqs5 = 0x00000000; -SDRAM[1].EmcDliTrimTxDqs6 = 0x00000000; -SDRAM[1].EmcDliTrimTxDqs7 = 0x00000000; -SDRAM[1].EmcDllXformDq0 = 0x00040000; -SDRAM[1].EmcDllXformDq1 = 0x00040000; -SDRAM[1].EmcDllXformDq2 = 0x00040000; -SDRAM[1].EmcDllXformDq3 = 0x00040000; -SDRAM[1].EmcZcalInterval = 0x00020000; -SDRAM[1].EmcZcalInitDev0 = 0x80000011; -SDRAM[1].EmcZcalInitDev1 = 0x00000000; -SDRAM[1].EmcZcalInitWait = 0x00000002; -SDRAM[1].EmcZcalColdBootEnable = 0x00000001; -SDRAM[1].EmcZcalWarmBootEnable = 0x00000001; -SDRAM[1].EmcMrwLpddr2ZcalWarmBoot = 0x000a00ab; -SDRAM[1].EmcZqCalDdr3WarmBoot = 0x00000011; -SDRAM[1].EmcZcalWarmBootWait = 0x00000001; -SDRAM[1].EmcMrsWarmBootEnable = 0x00000001; -SDRAM[1].EmcMrsExtra = 0x80000521; -SDRAM[1].EmcWarmBootMrs = 0x80100002; -SDRAM[1].EmcWarmBootEmrs = 0x80000521; -SDRAM[1].EmcWarmBootEmr2 = 0x80200000; -SDRAM[1].EmcWarmBootEmr3 = 0x80300000; -SDRAM[1].EmcWarmBootMrsExtra = 0x80100002; -SDRAM[1].EmcClkenOverride = 0x00000000; -SDRAM[1].EmcExtraRefreshNum = 0x00000002; -SDRAM[1].EmcClkenOverrideAllWarmBoot = 0x00000000; -SDRAM[1].McClkenOverrideAllWarmBoot = 0x00000000; -SDRAM[1].EmcCfgDigDllPeriodWarmBoot = 0x00000003; -SDRAM[1].PmcVddpSel = 0x00000002; -SDRAM[1].PmcDdrCfg = 0x00000002; -SDRAM[1].PmcIoDpdReq = 0x80800000; -SDRAM[1].PmcENoVttGen = 0x00000000; -SDRAM[1].PmcNoIoPower = 0x00000000; -SDRAM[1].EmcXm2CmdPadCtrl = 0x000002a0; -SDRAM[1].EmcXm2CmdPadCtrl2 = 0x770c0000; -SDRAM[1].EmcXm2DqsPadCtrl = 0x770c1414; -SDRAM[1].EmcXm2DqsPadCtrl2 = 0x0800013d; -SDRAM[1].EmcXm2DqsPadCtrl3 = 0x08000021; -SDRAM[1].EmcXm2DqPadCtrl = 0x770c2990; -SDRAM[1].EmcXm2DqPadCtrl2 = 0x00000000; -SDRAM[1].EmcXm2ClkPadCtrl = 0x77fff884; -SDRAM[1].EmcXm2CompPadCtrl = 0x01f1f508; -SDRAM[1].EmcXm2VttGenPadCtrl = 0x05057404; -SDRAM[1].EmcXm2VttGenPadCtrl2 = 0x54000007; -SDRAM[1].EmcXm2QUsePadCtrl = 0x080001e8; -SDRAM[1].McEmemAdrCfg = 0x00000000; -SDRAM[1].McEmemAdrCfgDev0 = 0x00090303; -SDRAM[1].McEmemAdrCfgDev1 = 0x00090303; -SDRAM[1].McEmemArbCfg = 0x0000000b; -SDRAM[1].McEmemArbOutstandingReq = 0xc0000044; -SDRAM[1].McEmemArbTimingRcd = 0x00000001; -SDRAM[1].McEmemArbTimingRp = 0x00000002; -SDRAM[1].McEmemArbTimingRc = 0x00000009; -SDRAM[1].McEmemArbTimingRas = 0x00000005; -SDRAM[1].McEmemArbTimingFaw = 0x00000005; -SDRAM[1].McEmemArbTimingRrd = 0x00000001; -SDRAM[1].McEmemArbTimingRap2Pre = 0x00000002; -SDRAM[1].McEmemArbTimingWap2Pre = 0x00000008; -SDRAM[1].McEmemArbTimingR2R = 0x00000002; -SDRAM[1].McEmemArbTimingW2W = 0x00000002; -SDRAM[1].McEmemArbTimingR2W = 0x00000003; -SDRAM[1].McEmemArbTimingW2R = 0x00000006; -SDRAM[1].McEmemArbDaTurns = 0x06030202; -SDRAM[1].McEmemArbDaCovers = 0x000d0709; -SDRAM[1].McEmemArbMisc0 = 0x7086110a; -SDRAM[1].McEmemArbMisc1 = 0x78000000; -SDRAM[1].McEmemArbRing1Throttle = 0x001f0000; -SDRAM[1].McEmemArbOverride = 0x00000080; -SDRAM[1].McEmemArbRsv = 0xff00ff00; -SDRAM[1].McClkenOverride = 0x00000000; - -SDRAM[2].MemoryType = NvBootMemoryType_Ddr3; -SDRAM[2].PllMChargePumpSetupControl = 0x00000008; -SDRAM[2].PllMLoopFilterSetupControl = 0x00000000; -SDRAM[2].PllMInputDivider = 0x0000000c; -SDRAM[2].PllMFeedbackDivider = 0x000002ee; -SDRAM[2].PllMPostDivider = 0x00000000; -SDRAM[2].PllMStableTime = 0x0000012c; -SDRAM[2].EmcClockDivider = 0x00000002; -SDRAM[2].EmcAutoCalInterval = 0x001fffff; -SDRAM[2].EmcAutoCalConfig = 0xa0f10000; -SDRAM[2].EmcAutoCalWait = 0x00000064; -SDRAM[2].EmcPinProgramWait = 0x00000001; -SDRAM[2].EmcRc = 0x00000011; -SDRAM[2].EmcRfc = 0x0000006f; -SDRAM[2].EmcRas = 0x0000000c; -SDRAM[2].EmcRp = 0x00000004; -SDRAM[2].EmcR2w = 0x00000003; -SDRAM[2].EmcW2r = 0x00000008; -SDRAM[2].EmcR2p = 0x00000002; -SDRAM[2].EmcW2p = 0x0000000a; -SDRAM[2].EmcRrd = 0x00000002; -SDRAM[2].EmcRdRcd = 0x00000004; -SDRAM[2].EmcWrRcd = 0x00000004; -SDRAM[2].EmcRext = 0x00000001; -SDRAM[2].EmcWdv = 0x00000004; -SDRAM[2].EmcQUseExtra = 0x00000000; -SDRAM[2].EmcQUse = 0x00000006; -SDRAM[2].EmcQRst = 0x00000004; -SDRAM[2].EmcQSafe = 0x0000000a; -SDRAM[2].EmcRdv = 0x0000000d; -SDRAM[2].EmcRefresh = 0x00000b2d; -SDRAM[2].EmcBurstRefreshNum = 0x00000000; -SDRAM[2].EmcPdEx2Wr = 0x00000001; -SDRAM[2].EmcPdEx2Rd = 0x00000008; -SDRAM[2].EmcPChg2Pden = 0x00000001; -SDRAM[2].EmcAct2Pden = 0x00000000; -SDRAM[2].EmcAr2Pden = 0x00000007; -SDRAM[2].EmcRw2Pden = 0x0000000f; -SDRAM[2].EmcTxsr = 0x00000075; -SDRAM[2].EmcTcke = 0x00000004; -SDRAM[2].EmcTfaw = 0x0000000c; -SDRAM[2].EmcTrpab = 0x00000000; -SDRAM[2].EmcTClkStable = 0x00000004; -SDRAM[2].EmcTClkStop = 0x00000005; -SDRAM[2].EmcTRefBw = 0x00000b6d; -SDRAM[2].EmcFbioCfg5 = 0x00007088; -SDRAM[2].EmcFbioCfg6 = 0x00000006; -SDRAM[2].EmcFbioSpare = 0xd8000000; -SDRAM[2].EmcMrsResetDllWait = 0x00000000; -SDRAM[2].EmcMrsResetDll = 0x00000000; -SDRAM[2].EmcMrsDdr2DllReset = 0x00000000; -SDRAM[2].EmcMrs = 0x80000521; -SDRAM[2].EmcEmrsEmr2 = 0x80200000; -SDRAM[2].EmcEmrsEmr3 = 0x80300000; -SDRAM[2].EmcEmrsDdr2DllEnable = 0x00000000; -SDRAM[2].EmcEmrsDdr2OcdCalib = 0x00000000; -SDRAM[2].EmcEmrs = 0x80100002; -SDRAM[2].EmcMrw1 = 0x00000000; -SDRAM[2].EmcMrw2 = 0x00000000; -SDRAM[2].EmcMrw3 = 0x00000000; -SDRAM[2].EmcMrwResetCommand = 0x00000000; -SDRAM[2].EmcMrwResetNInitWait = 0x00000000; -SDRAM[2].EmcAdrCfg = 0x00000080; -SDRAM[2].McEmemCfg = 0x00000800; -SDRAM[2].EmcCfg2 = 0x000c0099; -SDRAM[2].EmcCfgDigDll = 0x00200084; -SDRAM[2].EmcCfgDigDllPeriod = 0x00008000; -SDRAM[2].EmcCfg = 0x23c00000; -SDRAM[2].EmcDbg = 0x01000400; -SDRAM[2].WarmBootWait = 0x00000002; -SDRAM[2].EmcCttTermCtrl = 0x00000802; -SDRAM[2].EmcOdtWrite = 0x00000000; -SDRAM[2].EmcOdtRead = 0x00000000; -SDRAM[2].EmcZcalWaitCnt = 0x00000040; -SDRAM[2].EmcZcalMrwCmd = 0x80000000; -SDRAM[2].EmcDdr2Wait = 0x00000000; -SDRAM[2].PmcDdrPwr = 0x00000003; -SDRAM[2].EmcClockSource = 0x00000000; -SDRAM[2].EmcClockUsePllMUD = 0x00000000; -SDRAM[2].EmcPinExtraWait = 0x00000000; -SDRAM[2].EmcTimingControlWait = 0x00000000; -SDRAM[2].EmcWext = 0x00000000; -SDRAM[2].EmcCtt = 0x00000000; -SDRAM[2].EmcCttDuration = 0x00000000; -SDRAM[2].EmcPreRefreshReqCnt = 0x000002cb; -SDRAM[2].EmcTxsrDll = 0x00000200; -SDRAM[2].EmcCfgRsv = 0xff00ff89; -SDRAM[2].EmcMrwExtra = 0x00000000; -SDRAM[2].EmcWarmBootMrw1 = 0x00000000; -SDRAM[2].EmcWarmBootMrw2 = 0x00000000; -SDRAM[2].EmcWarmBootMrw3 = 0x00000000; -SDRAM[2].EmcWarmBootMrwExtra = 0x00000000; -SDRAM[2].EmcWarmBootExtraModeRegWriteEnable = 0x00000000; -SDRAM[2].EmcExtraModeRegWriteEnable = 0x00000000; -SDRAM[2].EmcMrsWaitCnt = 0x0150000c; -SDRAM[2].EmcCmdQ = 0x10004408; -SDRAM[2].EmcMc2EmcQ = 0x06000404; -SDRAM[2].EmcDynSelfRefControl = 0x8000174b; -SDRAM[2].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; -SDRAM[2].EmcDevSelect = 0x00000002; -SDRAM[2].EmcSelDpdCtrl = 0x0004032c; -SDRAM[2].EmcDllXformDqs0 = 0x0003c000; -SDRAM[2].EmcDllXformDqs1 = 0x0003c000; -SDRAM[2].EmcDllXformDqs2 = 0x0003c000; -SDRAM[2].EmcDllXformDqs3 = 0x0003c000; -SDRAM[2].EmcDllXformDqs4 = 0x0003c000; -SDRAM[2].EmcDllXformDqs5 = 0x0003c000; -SDRAM[2].EmcDllXformDqs6 = 0x0003c000; -SDRAM[2].EmcDllXformDqs7 = 0x0003c000; -SDRAM[2].EmcDllXformQUse0 = 0x00000000; -SDRAM[2].EmcDllXformQUse1 = 0x00000000; -SDRAM[2].EmcDllXformQUse2 = 0x00000000; -SDRAM[2].EmcDllXformQUse3 = 0x00000000; -SDRAM[2].EmcDllXformQUse4 = 0x00000000; -SDRAM[2].EmcDllXformQUse5 = 0x00000000; -SDRAM[2].EmcDllXformQUse6 = 0x00000000; -SDRAM[2].EmcDllXformQUse7 = 0x00000000; -SDRAM[2].EmcDliTrimTxDqs0 = 0x00000000; -SDRAM[2].EmcDliTrimTxDqs1 = 0x00000000; -SDRAM[2].EmcDliTrimTxDqs2 = 0x00000000; -SDRAM[2].EmcDliTrimTxDqs3 = 0x00000000; -SDRAM[2].EmcDliTrimTxDqs4 = 0x00000000; -SDRAM[2].EmcDliTrimTxDqs5 = 0x00000000; -SDRAM[2].EmcDliTrimTxDqs6 = 0x00000000; -SDRAM[2].EmcDliTrimTxDqs7 = 0x00000000; -SDRAM[2].EmcDllXformDq0 = 0x00040000; -SDRAM[2].EmcDllXformDq1 = 0x00040000; -SDRAM[2].EmcDllXformDq2 = 0x00040000; -SDRAM[2].EmcDllXformDq3 = 0x00040000; -SDRAM[2].EmcZcalInterval = 0x00020000; -SDRAM[2].EmcZcalInitDev0 = 0x80000011; -SDRAM[2].EmcZcalInitDev1 = 0x00000000; -SDRAM[2].EmcZcalInitWait = 0x00000002; -SDRAM[2].EmcZcalColdBootEnable = 0x00000001; -SDRAM[2].EmcZcalWarmBootEnable = 0x00000001; -SDRAM[2].EmcMrwLpddr2ZcalWarmBoot = 0x000a00ab; -SDRAM[2].EmcZqCalDdr3WarmBoot = 0x00000011; -SDRAM[2].EmcZcalWarmBootWait = 0x00000001; -SDRAM[2].EmcMrsWarmBootEnable = 0x00000001; -SDRAM[2].EmcMrsExtra = 0x80000521; -SDRAM[2].EmcWarmBootMrs = 0x80100002; -SDRAM[2].EmcWarmBootEmrs = 0x80000521; -SDRAM[2].EmcWarmBootEmr2 = 0x80200000; -SDRAM[2].EmcWarmBootEmr3 = 0x80300000; -SDRAM[2].EmcWarmBootMrsExtra = 0x80100002; -SDRAM[2].EmcClkenOverride = 0x00000000; -SDRAM[2].EmcExtraRefreshNum = 0x00000002; -SDRAM[2].EmcClkenOverrideAllWarmBoot = 0x00000000; -SDRAM[2].McClkenOverrideAllWarmBoot = 0x00000000; -SDRAM[2].EmcCfgDigDllPeriodWarmBoot = 0x00000003; -SDRAM[2].PmcVddpSel = 0x00000002; -SDRAM[2].PmcDdrCfg = 0x00000002; -SDRAM[2].PmcIoDpdReq = 0x80800000; -SDRAM[2].PmcENoVttGen = 0x00000000; -SDRAM[2].PmcNoIoPower = 0x00000000; -SDRAM[2].EmcXm2CmdPadCtrl = 0x000002a0; -SDRAM[2].EmcXm2CmdPadCtrl2 = 0x770c0000; -SDRAM[2].EmcXm2DqsPadCtrl = 0x770c1414; -SDRAM[2].EmcXm2DqsPadCtrl2 = 0x0800013d; -SDRAM[2].EmcXm2DqsPadCtrl3 = 0x08000021; -SDRAM[2].EmcXm2DqPadCtrl = 0x770c2990; -SDRAM[2].EmcXm2DqPadCtrl2 = 0x00000000; -SDRAM[2].EmcXm2ClkPadCtrl = 0x77fff884; -SDRAM[2].EmcXm2CompPadCtrl = 0x01f1f508; -SDRAM[2].EmcXm2VttGenPadCtrl = 0x05057404; -SDRAM[2].EmcXm2VttGenPadCtrl2 = 0x54000007; -SDRAM[2].EmcXm2QUsePadCtrl = 0x080001e8; -SDRAM[2].McEmemAdrCfg = 0x00000000; -SDRAM[2].McEmemAdrCfgDev0 = 0x00090303; -SDRAM[2].McEmemAdrCfgDev1 = 0x00090303; -SDRAM[2].McEmemArbCfg = 0x0000000b; -SDRAM[2].McEmemArbOutstandingReq = 0xc0000044; -SDRAM[2].McEmemArbTimingRcd = 0x00000001; -SDRAM[2].McEmemArbTimingRp = 0x00000002; -SDRAM[2].McEmemArbTimingRc = 0x00000009; -SDRAM[2].McEmemArbTimingRas = 0x00000005; -SDRAM[2].McEmemArbTimingFaw = 0x00000005; -SDRAM[2].McEmemArbTimingRrd = 0x00000001; -SDRAM[2].McEmemArbTimingRap2Pre = 0x00000002; -SDRAM[2].McEmemArbTimingWap2Pre = 0x00000008; -SDRAM[2].McEmemArbTimingR2R = 0x00000002; -SDRAM[2].McEmemArbTimingW2W = 0x00000002; -SDRAM[2].McEmemArbTimingR2W = 0x00000003; -SDRAM[2].McEmemArbTimingW2R = 0x00000006; -SDRAM[2].McEmemArbDaTurns = 0x06030202; -SDRAM[2].McEmemArbDaCovers = 0x000d0709; -SDRAM[2].McEmemArbMisc0 = 0x7086110a; -SDRAM[2].McEmemArbMisc1 = 0x78000000; -SDRAM[2].McEmemArbRing1Throttle = 0x001f0000; -SDRAM[2].McEmemArbOverride = 0x00000080; -SDRAM[2].McEmemArbRsv = 0xff00ff00; -SDRAM[2].McClkenOverride = 0x00000000; - -SDRAM[3].MemoryType = NvBootMemoryType_Ddr3; -SDRAM[3].PllMChargePumpSetupControl = 0x00000008; -SDRAM[3].PllMLoopFilterSetupControl = 0x00000000; -SDRAM[3].PllMInputDivider = 0x0000000c; -SDRAM[3].PllMFeedbackDivider = 0x000002ee; -SDRAM[3].PllMPostDivider = 0x00000000; -SDRAM[3].PllMStableTime = 0x0000012c; -SDRAM[3].EmcClockDivider = 0x00000002; -SDRAM[3].EmcAutoCalInterval = 0x001fffff; -SDRAM[3].EmcAutoCalConfig = 0xa0f10000; -SDRAM[3].EmcAutoCalWait = 0x00000064; -SDRAM[3].EmcPinProgramWait = 0x00000001; -SDRAM[3].EmcRc = 0x00000011; -SDRAM[3].EmcRfc = 0x0000006f; -SDRAM[3].EmcRas = 0x0000000c; -SDRAM[3].EmcRp = 0x00000004; -SDRAM[3].EmcR2w = 0x00000003; -SDRAM[3].EmcW2r = 0x00000008; -SDRAM[3].EmcR2p = 0x00000002; -SDRAM[3].EmcW2p = 0x0000000a; -SDRAM[3].EmcRrd = 0x00000002; -SDRAM[3].EmcRdRcd = 0x00000004; -SDRAM[3].EmcWrRcd = 0x00000004; -SDRAM[3].EmcRext = 0x00000001; -SDRAM[3].EmcWdv = 0x00000004; -SDRAM[3].EmcQUseExtra = 0x00000000; -SDRAM[3].EmcQUse = 0x00000006; -SDRAM[3].EmcQRst = 0x00000004; -SDRAM[3].EmcQSafe = 0x0000000a; -SDRAM[3].EmcRdv = 0x0000000d; -SDRAM[3].EmcRefresh = 0x00000b2d; -SDRAM[3].EmcBurstRefreshNum = 0x00000000; -SDRAM[3].EmcPdEx2Wr = 0x00000001; -SDRAM[3].EmcPdEx2Rd = 0x00000008; -SDRAM[3].EmcPChg2Pden = 0x00000001; -SDRAM[3].EmcAct2Pden = 0x00000000; -SDRAM[3].EmcAr2Pden = 0x00000007; -SDRAM[3].EmcRw2Pden = 0x0000000f; -SDRAM[3].EmcTxsr = 0x00000075; -SDRAM[3].EmcTcke = 0x00000004; -SDRAM[3].EmcTfaw = 0x0000000c; -SDRAM[3].EmcTrpab = 0x00000000; -SDRAM[3].EmcTClkStable = 0x00000004; -SDRAM[3].EmcTClkStop = 0x00000005; -SDRAM[3].EmcTRefBw = 0x00000b6d; -SDRAM[3].EmcFbioCfg5 = 0x00007088; -SDRAM[3].EmcFbioCfg6 = 0x00000006; -SDRAM[3].EmcFbioSpare = 0xd8000000; -SDRAM[3].EmcMrsResetDllWait = 0x00000000; -SDRAM[3].EmcMrsResetDll = 0x00000000; -SDRAM[3].EmcMrsDdr2DllReset = 0x00000000; -SDRAM[3].EmcMrs = 0x80000521; -SDRAM[3].EmcEmrsEmr2 = 0x80200000; -SDRAM[3].EmcEmrsEmr3 = 0x80300000; -SDRAM[3].EmcEmrsDdr2DllEnable = 0x00000000; -SDRAM[3].EmcEmrsDdr2OcdCalib = 0x00000000; -SDRAM[3].EmcEmrs = 0x80100002; -SDRAM[3].EmcMrw1 = 0x00000000; -SDRAM[3].EmcMrw2 = 0x00000000; -SDRAM[3].EmcMrw3 = 0x00000000; -SDRAM[3].EmcMrwResetCommand = 0x00000000; -SDRAM[3].EmcMrwResetNInitWait = 0x00000000; -SDRAM[3].EmcAdrCfg = 0x00000080; -SDRAM[3].McEmemCfg = 0x00000800; -SDRAM[3].EmcCfg2 = 0x000c0099; -SDRAM[3].EmcCfgDigDll = 0x00200084; -SDRAM[3].EmcCfgDigDllPeriod = 0x00008000; -SDRAM[3].EmcCfg = 0x23c00000; -SDRAM[3].EmcDbg = 0x01000400; -SDRAM[3].WarmBootWait = 0x00000002; -SDRAM[3].EmcCttTermCtrl = 0x00000802; -SDRAM[3].EmcOdtWrite = 0x00000000; -SDRAM[3].EmcOdtRead = 0x00000000; -SDRAM[3].EmcZcalWaitCnt = 0x00000040; -SDRAM[3].EmcZcalMrwCmd = 0x80000000; -SDRAM[3].EmcDdr2Wait = 0x00000000; -SDRAM[3].PmcDdrPwr = 0x00000003; -SDRAM[3].EmcClockSource = 0x00000000; -SDRAM[3].EmcClockUsePllMUD = 0x00000000; -SDRAM[3].EmcPinExtraWait = 0x00000000; -SDRAM[3].EmcTimingControlWait = 0x00000000; -SDRAM[3].EmcWext = 0x00000000; -SDRAM[3].EmcCtt = 0x00000000; -SDRAM[3].EmcCttDuration = 0x00000000; -SDRAM[3].EmcPreRefreshReqCnt = 0x000002cb; -SDRAM[3].EmcTxsrDll = 0x00000200; -SDRAM[3].EmcCfgRsv = 0xff00ff89; -SDRAM[3].EmcMrwExtra = 0x00000000; -SDRAM[3].EmcWarmBootMrw1 = 0x00000000; -SDRAM[3].EmcWarmBootMrw2 = 0x00000000; -SDRAM[3].EmcWarmBootMrw3 = 0x00000000; -SDRAM[3].EmcWarmBootMrwExtra = 0x00000000; -SDRAM[3].EmcWarmBootExtraModeRegWriteEnable = 0x00000000; -SDRAM[3].EmcExtraModeRegWriteEnable = 0x00000000; -SDRAM[3].EmcMrsWaitCnt = 0x0150000c; -SDRAM[3].EmcCmdQ = 0x10004408; -SDRAM[3].EmcMc2EmcQ = 0x06000404; -SDRAM[3].EmcDynSelfRefControl = 0x8000174b; -SDRAM[3].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; -SDRAM[3].EmcDevSelect = 0x00000002; -SDRAM[3].EmcSelDpdCtrl = 0x0004032c; -SDRAM[3].EmcDllXformDqs0 = 0x0003c000; -SDRAM[3].EmcDllXformDqs1 = 0x0003c000; -SDRAM[3].EmcDllXformDqs2 = 0x0003c000; -SDRAM[3].EmcDllXformDqs3 = 0x0003c000; -SDRAM[3].EmcDllXformDqs4 = 0x0003c000; -SDRAM[3].EmcDllXformDqs5 = 0x0003c000; -SDRAM[3].EmcDllXformDqs6 = 0x0003c000; -SDRAM[3].EmcDllXformDqs7 = 0x0003c000; -SDRAM[3].EmcDllXformQUse0 = 0x00000000; -SDRAM[3].EmcDllXformQUse1 = 0x00000000; -SDRAM[3].EmcDllXformQUse2 = 0x00000000; -SDRAM[3].EmcDllXformQUse3 = 0x00000000; -SDRAM[3].EmcDllXformQUse4 = 0x00000000; -SDRAM[3].EmcDllXformQUse5 = 0x00000000; -SDRAM[3].EmcDllXformQUse6 = 0x00000000; -SDRAM[3].EmcDllXformQUse7 = 0x00000000; -SDRAM[3].EmcDliTrimTxDqs0 = 0x00000000; -SDRAM[3].EmcDliTrimTxDqs1 = 0x00000000; -SDRAM[3].EmcDliTrimTxDqs2 = 0x00000000; -SDRAM[3].EmcDliTrimTxDqs3 = 0x00000000; -SDRAM[3].EmcDliTrimTxDqs4 = 0x00000000; -SDRAM[3].EmcDliTrimTxDqs5 = 0x00000000; -SDRAM[3].EmcDliTrimTxDqs6 = 0x00000000; -SDRAM[3].EmcDliTrimTxDqs7 = 0x00000000; -SDRAM[3].EmcDllXformDq0 = 0x00040000; -SDRAM[3].EmcDllXformDq1 = 0x00040000; -SDRAM[3].EmcDllXformDq2 = 0x00040000; -SDRAM[3].EmcDllXformDq3 = 0x00040000; -SDRAM[3].EmcZcalInterval = 0x00020000; -SDRAM[3].EmcZcalInitDev0 = 0x80000011; -SDRAM[3].EmcZcalInitDev1 = 0x00000000; -SDRAM[3].EmcZcalInitWait = 0x00000002; -SDRAM[3].EmcZcalColdBootEnable = 0x00000001; -SDRAM[3].EmcZcalWarmBootEnable = 0x00000001; -SDRAM[3].EmcMrwLpddr2ZcalWarmBoot = 0x000a00ab; -SDRAM[3].EmcZqCalDdr3WarmBoot = 0x00000011; -SDRAM[3].EmcZcalWarmBootWait = 0x00000001; -SDRAM[3].EmcMrsWarmBootEnable = 0x00000001; -SDRAM[3].EmcMrsExtra = 0x80000521; -SDRAM[3].EmcWarmBootMrs = 0x80100002; -SDRAM[3].EmcWarmBootEmrs = 0x80000521; -SDRAM[3].EmcWarmBootEmr2 = 0x80200000; -SDRAM[3].EmcWarmBootEmr3 = 0x80300000; -SDRAM[3].EmcWarmBootMrsExtra = 0x80100002; -SDRAM[3].EmcClkenOverride = 0x00000000; -SDRAM[3].EmcExtraRefreshNum = 0x00000002; -SDRAM[3].EmcClkenOverrideAllWarmBoot = 0x00000000; -SDRAM[3].McClkenOverrideAllWarmBoot = 0x00000000; -SDRAM[3].EmcCfgDigDllPeriodWarmBoot = 0x00000003; -SDRAM[3].PmcVddpSel = 0x00000002; -SDRAM[3].PmcDdrCfg = 0x00000002; -SDRAM[3].PmcIoDpdReq = 0x80800000; -SDRAM[3].PmcENoVttGen = 0x00000000; -SDRAM[3].PmcNoIoPower = 0x00000000; -SDRAM[3].EmcXm2CmdPadCtrl = 0x000002a0; -SDRAM[3].EmcXm2CmdPadCtrl2 = 0x770c0000; -SDRAM[3].EmcXm2DqsPadCtrl = 0x770c1414; -SDRAM[3].EmcXm2DqsPadCtrl2 = 0x0800013d; -SDRAM[3].EmcXm2DqsPadCtrl3 = 0x08000021; -SDRAM[3].EmcXm2DqPadCtrl = 0x770c2990; -SDRAM[3].EmcXm2DqPadCtrl2 = 0x00000000; -SDRAM[3].EmcXm2ClkPadCtrl = 0x77fff884; -SDRAM[3].EmcXm2CompPadCtrl = 0x01f1f508; -SDRAM[3].EmcXm2VttGenPadCtrl = 0x05057404; -SDRAM[3].EmcXm2VttGenPadCtrl2 = 0x54000007; -SDRAM[3].EmcXm2QUsePadCtrl = 0x080001e8; -SDRAM[3].McEmemAdrCfg = 0x00000000; -SDRAM[3].McEmemAdrCfgDev0 = 0x00090303; -SDRAM[3].McEmemAdrCfgDev1 = 0x00090303; -SDRAM[3].McEmemArbCfg = 0x0000000b; -SDRAM[3].McEmemArbOutstandingReq = 0xc0000044; -SDRAM[3].McEmemArbTimingRcd = 0x00000001; -SDRAM[3].McEmemArbTimingRp = 0x00000002; -SDRAM[3].McEmemArbTimingRc = 0x00000009; -SDRAM[3].McEmemArbTimingRas = 0x00000005; -SDRAM[3].McEmemArbTimingFaw = 0x00000005; -SDRAM[3].McEmemArbTimingRrd = 0x00000001; -SDRAM[3].McEmemArbTimingRap2Pre = 0x00000002; -SDRAM[3].McEmemArbTimingWap2Pre = 0x00000008; -SDRAM[3].McEmemArbTimingR2R = 0x00000002; -SDRAM[3].McEmemArbTimingW2W = 0x00000002; -SDRAM[3].McEmemArbTimingR2W = 0x00000003; -SDRAM[3].McEmemArbTimingW2R = 0x00000006; -SDRAM[3].McEmemArbDaTurns = 0x06030202; -SDRAM[3].McEmemArbDaCovers = 0x000d0709; -SDRAM[3].McEmemArbMisc0 = 0x7086110a; -SDRAM[3].McEmemArbMisc1 = 0x78000000; -SDRAM[3].McEmemArbRing1Throttle = 0x001f0000; -SDRAM[3].McEmemArbOverride = 0x00000080; -SDRAM[3].McEmemArbRsv = 0xff00ff00; -SDRAM[3].McClkenOverride = 0x00000000; diff --git a/cardhu/README.txt b/cardhu/README.txt deleted file mode 100644 index 17f17ae..0000000 --- a/cardhu/README.txt +++ /dev/null @@ -1,49 +0,0 @@ -How to identify your Cardhu -=========================== - -Cardhu exists in two forms: - -1) A form-factor device, fully enclosed in plastics, which thus looks like - a production tablet. Note that it is possible for a "door" to have been - removed from the rear plastic cover of the device. - - Devices of this type should have a sticker, attached to the outer plastics, - of the form 940-81290-1001-000. The 3rd component of that number ("1001" in - the example) indicates the SKU of the device. Use this SKU to determine - which BCT to use. - - The SKU uniquely determines the revision and configuration of the main - board in the device. The following table describes the mapping: - - SKU implies: Board Revision RAM size - ==== ============== ======== - 1000 A04 2 GB - 1001 A04 1 GB - 1003 A05 2 GB - 1005 A05 2 GB - -2) An engineering device, with all internal circuit boards fully exposed, - which can have 1" metal stand-offs screwed into the chassis for support. - - Devices of this type should have a sticker, attached to the main circuit - board, of the form 600-81291-1000-002. The final component of that number - ("002" in the example) indicates the revision of the board. 002 means A02, - 004 means A04, 005 means A05, etc. - - For reference, these engineering devices are known as SKU 4000. - - These boards may contain either 1 GB or 2 GB of RAM. The exposed side of - the main board will always contain 4 chips that are the first GB or RAM. - The rear side of the board may contain 4 additional chips that are the - second GB of RAM. Carefully check the rear of the board to determine your - device's RAM size. - -Selecting a BCT for Cardhu -========================== - -Once you know your board revision and RAM size, you may select the appropriate -BCT to use. The cbootimage configuration files *.img.cfg in this directory are -named based on the board revision and RAM size they apply to. Similarly, when -the build script generates flashable *.img files, those are also named based -on the board revision and RAM size they apply to. Select the appropriate image -based on the image file name. diff --git a/cardhu/build.sh b/cardhu/build.sh deleted file mode 100755 index fbd5f62..0000000 --- a/cardhu/build.sh +++ /dev/null @@ -1,37 +0,0 @@ -#!/bin/sh - -# Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. -# -# This software is provided 'as-is', without any express or implied -# warranty. In no event will the authors be held liable for any damages -# arising from the use of this software. -# -# Permission is granted to anyone to use this software for any purpose, -# including commercial applications, and to alter it and redistribute it -# freely, subject to the following restrictions: -# -# 1. The origin of this software must not be misrepresented; you must not -# claim that you wrote the original software. If you use this software -# in a product, an acknowledgment in the product documentation would be -# appreciated but is not required. -# 2. Altered source versions must be plainly marked as such, and must not be -# misrepresented as being the original software. -# 3. This notice may not be removed or altered from any source distribution. - -set -e -set -x - -cbootimage -t30 -gbct \ - E1186_Hynix_1GB_H5TC2G83BFR-PBA_375MHz_111114_317_sdmmc4_x8.bct.cfg \ - E1186_Hynix_1GB_H5TC2G83BFR-PBA_375MHz_111114_317_sdmmc4_x8.bct -cbootimage -t30 cardhu-a02-a04-1gb-emmc.img.cfg cardhu-a02-a04-1gb-emmc.img - -cbootimage -t30 -gbct \ - E1198_Hynix_2GB_H5TC2G83BFR-PBA_667MHz_111121_317_sdmmc4_x8.bct.cfg \ - E1198_Hynix_2GB_H5TC2G83BFR-PBA_667MHz_111121_317_sdmmc4_x8.bct -cbootimage -t30 cardhu-a02-a04-2gb-emmc.img.cfg cardhu-a02-a04-2gb-emmc.img - -cbootimage -t30 -gbct \ - E1198_Hynix_2GB_H5TC4G83MFR-PBA_375MHz_111122_317_sdmmc4_x8.bct.cfg \ - E1198_Hynix_2GB_H5TC4G83MFR-PBA_375MHz_111122_317_sdmmc4_x8.bct -cbootimage -t30 cardhu-a05-2gb-emmc.img.cfg cardhu-a05-2gb-emmc.img diff --git a/cardhu/cardhu-a02-a04-1gb-emmc.img.cfg b/cardhu/cardhu-a02-a04-1gb-emmc.img.cfg deleted file mode 100644 index e12af42..0000000 --- a/cardhu/cardhu-a02-a04-1gb-emmc.img.cfg +++ /dev/null @@ -1,22 +0,0 @@ -# Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. -# -# This software is provided 'as-is', without any express or implied -# warranty. In no event will the authors be held liable for any damages -# arising from the use of this software. -# -# Permission is granted to anyone to use this software for any purpose, -# including commercial applications, and to alter it and redistribute it -# freely, subject to the following restrictions: -# -# 1. The origin of this software must not be misrepresented; you must not -# claim that you wrote the original software. If you use this software -# in a product, an acknowledgment in the product documentation would be -# appreciated but is not required. -# 2. Altered source versions must be plainly marked as such, and must not be -# misrepresented as being the original software. -# 3. This notice may not be removed or altered from any source distribution. - -Version = 0x00020001; -Bctcopy = 1; -Bctfile = E1186_Hynix_1GB_H5TC2G83BFR-PBA_375MHz_111114_317_sdmmc4_x8.bct; -BootLoader = u-boot.bin,0x80108000,0x80108000,Complete; diff --git a/cardhu/cardhu-a02-a04-2gb-emmc.img.cfg b/cardhu/cardhu-a02-a04-2gb-emmc.img.cfg deleted file mode 100644 index 5aeffc3..0000000 --- a/cardhu/cardhu-a02-a04-2gb-emmc.img.cfg +++ /dev/null @@ -1,22 +0,0 @@ -# Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. -# -# This software is provided 'as-is', without any express or implied -# warranty. In no event will the authors be held liable for any damages -# arising from the use of this software. -# -# Permission is granted to anyone to use this software for any purpose, -# including commercial applications, and to alter it and redistribute it -# freely, subject to the following restrictions: -# -# 1. The origin of this software must not be misrepresented; you must not -# claim that you wrote the original software. If you use this software -# in a product, an acknowledgment in the product documentation would be -# appreciated but is not required. -# 2. Altered source versions must be plainly marked as such, and must not be -# misrepresented as being the original software. -# 3. This notice may not be removed or altered from any source distribution. - -Version = 0x00020001; -Bctcopy = 1; -Bctfile = E1198_Hynix_2GB_H5TC2G83BFR-PBA_667MHz_111121_317_sdmmc4_x8.bct; -BootLoader = u-boot.bin,0x80108000,0x80108000,Complete; diff --git a/cardhu/cardhu-a05-2gb-emmc.img.cfg b/cardhu/cardhu-a05-2gb-emmc.img.cfg deleted file mode 100644 index 996c4c7..0000000 --- a/cardhu/cardhu-a05-2gb-emmc.img.cfg +++ /dev/null @@ -1,22 +0,0 @@ -# Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. -# -# This software is provided 'as-is', without any express or implied -# warranty. In no event will the authors be held liable for any damages -# arising from the use of this software. -# -# Permission is granted to anyone to use this software for any purpose, -# including commercial applications, and to alter it and redistribute it -# freely, subject to the following restrictions: -# -# 1. The origin of this software must not be misrepresented; you must not -# claim that you wrote the original software. If you use this software -# in a product, an acknowledgment in the product documentation would be -# appreciated but is not required. -# 2. Altered source versions must be plainly marked as such, and must not be -# misrepresented as being the original software. -# 3. This notice may not be removed or altered from any source distribution. - -Version = 0x00020001; -Bctcopy = 1; -Bctfile = E1198_Hynix_2GB_H5TC4G83MFR-PBA_375MHz_111122_317_sdmmc4_x8.bct; -BootLoader = u-boot.bin,0x80108000,0x80108000,Complete; diff --git a/dalmore/E1611_Hynix_2GB_H5TC4G63AFR-RDA_792MHz_r403_v03.bct.cfg b/dalmore/E1611_Hynix_2GB_H5TC4G63AFR-RDA_792MHz_r403_v03.bct.cfg deleted file mode 100644 index 29512ee..0000000 --- a/dalmore/E1611_Hynix_2GB_H5TC4G63AFR-RDA_792MHz_r403_v03.bct.cfg +++ /dev/null @@ -1,1273 +0,0 @@ -# Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. -# -# This software is provided 'as-is', without any express or implied -# warranty. In no event will the authors be held liable for any damages -# arising from the use of this software. -# -# Permission is granted to anyone to use this software for any purpose, -# including commercial applications, and to alter it and redistribute it -# freely, subject to the following restrictions: -# -# 1. The origin of this software must not be misrepresented; you must not -# claim that you wrote the original software. If you use this software -# in a product, an acknowledgment in the product documentation would be -# appreciated but is not required. -# 2. Altered source versions must be plainly marked as such, and must not be -# misrepresented as being the original software. -# 3. This notice may not be removed or altered from any source distribution. - -Version = 0x00350001; -BlockSize = 0x00004000; -PageSize = 0x00000200; -PartitionSize = 0x01000000; -OdmData = 0x800d8000; - -DevType[0] = NvBootDevType_Sdmmc; -DeviceParam[0].SdmmcParams.ClockDivider = 0x00000009; -DeviceParam[0].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_8Bit; -DeviceParam[0].SdmmcParams.MaxPowerClassSupported = 0x00000000; -DeviceParam[0].SdmmcParams.MultiPageSupport = 0x00000000; - -SDRAM[0].MemoryType = NvBootMemoryType_Ddr3; -SDRAM[0].PllMInputDivider = 0x00000001; -SDRAM[0].PllMFeedbackDivider = 0x00000042; -SDRAM[0].PllMStableTime = 0x0000012c; -SDRAM[0].PllMSetupControl = 0x00000000; -SDRAM[0].PllMSelectDiv2 = 0x00000000; -SDRAM[0].PllMPDLshiftPh45 = 0x00000000; -SDRAM[0].PllMPDLshiftPh90 = 0x00000000; -SDRAM[0].PllMPDLshiftPh135 = 0x00000000; -SDRAM[0].PllMKCP = 0x00000000; -SDRAM[0].PllMKVCO = 0x00000000; -SDRAM[0].EmcBctSpare0 = 0x00000bad; -SDRAM[0].EmcClockSource = 0x80000000; -SDRAM[0].EmcAutoCalInterval = 0x001fffff; -SDRAM[0].EmcAutoCalConfig = 0xa0f10f0f; -SDRAM[0].EmcAutoCalConfig2 = 0x00000000; -SDRAM[0].EmcAutoCalConfig3 = 0x00000000; -SDRAM[0].EmcAutoCalWait = 0x00000064; -SDRAM[0].EmcAdrCfg = 0x00000000; -SDRAM[0].EmcPinProgramWait = 0x00000001; -SDRAM[0].EmcPinExtraWait = 0x00000000; -SDRAM[0].EmcTimingControlWait = 0x00000001; -SDRAM[0].EmcRc = 0x00000024; -SDRAM[0].EmcRfc = 0x000000cd; -SDRAM[0].EmcRfcSlr = 0x00000000; -SDRAM[0].EmcRas = 0x00000019; -SDRAM[0].EmcRp = 0x0000000a; -SDRAM[0].EmcR2r = 0x00000000; -SDRAM[0].EmcW2w = 0x00000000; -SDRAM[0].EmcR2w = 0x00000009; -SDRAM[0].EmcW2r = 0x0000000d; -SDRAM[0].EmcR2p = 0x00000004; -SDRAM[0].EmcW2p = 0x00000013; -SDRAM[0].EmcRdRcd = 0x0000000a; -SDRAM[0].EmcWrRcd = 0x0000000a; -SDRAM[0].EmcRrd = 0x00000003; -SDRAM[0].EmcRext = 0x00000001; -SDRAM[0].EmcWext = 0x00000000; -SDRAM[0].EmcWdv = 0x00000006; -SDRAM[0].EmcWdvMask = 0x00000006; -SDRAM[0].EmcQUse = 0x0000000b; -SDRAM[0].EmcIbdly = 0x0000000b; -SDRAM[0].EmcEInput = 0x00000008; -SDRAM[0].EmcEInputDuration = 0x00000006; -SDRAM[0].EmcPutermExtra = 0x000d000a; -SDRAM[0].EmcCdbCntl1 = 0x00000000; -SDRAM[0].EmcCdbCntl2 = 0x00000000; -SDRAM[0].EmcQRst = 0x00000008; -SDRAM[0].EmcQSafe = 0x0000000d; -SDRAM[0].EmcRdv = 0x00000014; -SDRAM[0].EmcRdvMask = 0x00000014; -SDRAM[0].EmcCtt = 0x00000000; -SDRAM[0].EmcCttDuration = 0x00000000; -SDRAM[0].EmcRefresh = 0x000017e4; -SDRAM[0].EmcBurstRefreshNum = 0x00000000; -SDRAM[0].EmcPreRefreshReqCnt = 0x000005f9; -SDRAM[0].EmcPdEx2Wr = 0x00000003; -SDRAM[0].EmcPdEx2Rd = 0x00000012; -SDRAM[0].EmcPChg2Pden = 0x00000001; -SDRAM[0].EmcAct2Pden = 0x00000000; -SDRAM[0].EmcAr2Pden = 0x000000c6; -SDRAM[0].EmcRw2Pden = 0x00000018; -SDRAM[0].EmcTxsr = 0x000000d6; -SDRAM[0].EmcTxsrDll = 0x00000200; -SDRAM[0].EmcTcke = 0x00000005; -SDRAM[0].EmcTckesr = 0x00000005; -SDRAM[0].EmcTpd = 0x00000005; -SDRAM[0].EmcTfaw = 0x00000020; -SDRAM[0].EmcTrpab = 0x00000000; -SDRAM[0].EmcTClkStable = 0x00000007; -SDRAM[0].EmcTClkStop = 0x00000008; -SDRAM[0].EmcTRefBw = 0x00001825; -SDRAM[0].EmcQUseExtra = 0x0000000a; -SDRAM[0].EmcFbioCfg5 = 0x0000ba88; -SDRAM[0].EmcFbioCfg6 = 0x00000006; -SDRAM[0].EmcFbioSpare = 0x02000000; -SDRAM[0].EmcCfgRsv = 0xff00ff00; -SDRAM[0].EmcMrs = 0x80000d71; -SDRAM[0].EmcEmrs = 0x80100002; -SDRAM[0].EmcEmrs2 = 0x80200418; -SDRAM[0].EmcEmrs3 = 0x80300000; -SDRAM[0].EmcMrw1 = 0x00000000; -SDRAM[0].EmcMrw2 = 0x00000000; -SDRAM[0].EmcMrw3 = 0x00000000; -SDRAM[0].EmcMrw4 = 0x00000000; -SDRAM[0].EmcMrwExtra = 0x00000000; -SDRAM[0].EmcWarmBootMrwExtra = 0x00000000; -SDRAM[0].EmcWarmBootExtraModeRegWriteEnable = 0x00000000; -SDRAM[0].EmcExtraModeRegWriteEnable = 0x00000000; -SDRAM[0].EmcMrwResetCommand = 0x00000000; -SDRAM[0].EmcMrwResetNInitWait = 0x00000000; -SDRAM[0].EmcMrsWaitCnt = 0x00f8000f; -SDRAM[0].EmcMrsWaitCnt2 = 0x00f8000f; -SDRAM[0].EmcCfg = 0x53200000; -SDRAM[0].EmcCfg2 = 0x008008c1; -SDRAM[0].EmcDbg = 0x01000400; -SDRAM[0].EmcCmdQ = 0x10004408; -SDRAM[0].EmcMc2EmcQ = 0x06000404; -SDRAM[0].EmcDynSelfRefControl = 0x80003018; -SDRAM[0].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; -SDRAM[0].EmcCfgDigDll = 0xf0070191; -SDRAM[0].EmcCfgDigDllPeriod = 0x00008000; -SDRAM[0].EmcDevSelect = 0x00000002; -SDRAM[0].EmcSelDpdCtrl = 0x00040000; -SDRAM[0].EmcDllXformDqs0 = 0x00000008; -SDRAM[0].EmcDllXformDqs1 = 0x00000008; -SDRAM[0].EmcDllXformDqs2 = 0x00000008; -SDRAM[0].EmcDllXformDqs3 = 0x00000008; -SDRAM[0].EmcDllXformDqs4 = 0x00000008; -SDRAM[0].EmcDllXformDqs5 = 0x00000008; -SDRAM[0].EmcDllXformDqs6 = 0x00000008; -SDRAM[0].EmcDllXformDqs7 = 0x00000008; -SDRAM[0].EmcDllXformQUse0 = 0x00000000; -SDRAM[0].EmcDllXformQUse1 = 0x00000000; -SDRAM[0].EmcDllXformQUse2 = 0x00000000; -SDRAM[0].EmcDllXformQUse3 = 0x00000000; -SDRAM[0].EmcDllXformQUse4 = 0x00000000; -SDRAM[0].EmcDllXformQUse5 = 0x00000000; -SDRAM[0].EmcDllXformQUse6 = 0x00000000; -SDRAM[0].EmcDllXformQUse7 = 0x00000000; -SDRAM[0].EmcDllXformAddr0 = 0x00000008; -SDRAM[0].EmcDllXformAddr1 = 0x00000000; -SDRAM[0].EmcDllXformAddr2 = 0x00000000; -SDRAM[0].EmcDliTrimTxDqs0 = 0x00000000; -SDRAM[0].EmcDliTrimTxDqs1 = 0x00000000; -SDRAM[0].EmcDliTrimTxDqs2 = 0x00000000; -SDRAM[0].EmcDliTrimTxDqs3 = 0x00000000; -SDRAM[0].EmcDliTrimTxDqs4 = 0x00000000; -SDRAM[0].EmcDliTrimTxDqs5 = 0x00000000; -SDRAM[0].EmcDliTrimTxDqs6 = 0x00000000; -SDRAM[0].EmcDliTrimTxDqs7 = 0x00000000; -SDRAM[0].EmcDllXformDq0 = 0x0000000A; -SDRAM[0].EmcDllXformDq1 = 0x0000000A; -SDRAM[0].EmcDllXformDq2 = 0x0000000A; -SDRAM[0].EmcDllXformDq3 = 0x0000000A; -SDRAM[0].WarmBootWait = 0x00000002; -SDRAM[0].EmcCttTermCtrl = 0x00000802; -SDRAM[0].EmcOdtWrite = 0x80000020; -SDRAM[0].EmcOdtRead = 0x00000000; -SDRAM[0].EmcZcalInterval = 0x00020000; -SDRAM[0].EmcZcalWaitCnt = 0x00000042; -SDRAM[0].EmcZcalMrwCmd = 0x80000000; -SDRAM[0].EmcMrsResetDll = 0x00000000; -SDRAM[0].EmcZcalInitDev0 = 0x80000011; -SDRAM[0].EmcZcalInitDev1 = 0x00000000; -SDRAM[0].EmcZcalInitWait = 0x00000001; -SDRAM[0].EmcZcalWarmColdBootEnables = 0x00000003; -SDRAM[0].EmcMrwLpddr2ZcalWarmBoot = 0x000a00ab; -SDRAM[0].EmcZqCalDdr3WarmBoot = 0x00000011; -SDRAM[0].EmcZcalWarmBootWait = 0x00000001; -SDRAM[0].EmcMrsWarmBootEnable = 0x00000001; -SDRAM[0].EmcMrsResetDllWait = 0x00000000; -SDRAM[0].EmcMrsExtra = 0x80000d05; -SDRAM[0].EmcWarmBootMrsExtra = 0x80100002; -SDRAM[0].EmcEmrsDdr2DllEnable = 0x00000000; -SDRAM[0].EmcMrsDdr2DllReset = 0x00000000; -SDRAM[0].EmcEmrsDdr2OcdCalib = 0x00000000; -SDRAM[0].EmcDdr2Wait = 0x00000000; -SDRAM[0].EmcClkenOverride = 0x00000000; -SDRAM[0].EmcExtraRefreshNum = 0x00000002; -SDRAM[0].EmcClkenOverrideAllWarmBoot = 0x00000000; -SDRAM[0].McClkenOverrideAllWarmBoot = 0x00000000; -SDRAM[0].EmcCfgDigDllPeriodWarmBoot = 0x00000003; -SDRAM[0].PmcVddpSel = 0x00000002; -SDRAM[0].PmcDdrPwr = 0x00000003; -SDRAM[0].PmcDdrCfg = 0x00000092; -SDRAM[0].PmcIoDpdReq = 0x80800000; -SDRAM[0].PmcIoDpd2Req = 0x00000000; -SDRAM[0].PmcRegShort = 0x00000000; -SDRAM[0].PmcENoVttGen = 0x00000000; -SDRAM[0].PmcNoIoPower = 0x00000000; -SDRAM[0].EmcXm2CmdPadCtrl = 0x001112a0; -SDRAM[0].EmcXm2CmdPadCtrl2 = 0x770c0000; -SDRAM[0].EmcXm2CmdPadCtrl3 = 0x050c0000; -SDRAM[0].EmcXm2CmdPadCtrl4 = 0x00000000; -SDRAM[0].EmcXm2DqsPadCtrl = 0x770c1414; -SDRAM[0].EmcXm2DqsPadCtrl2 = 0x0000013d; -SDRAM[0].EmcXm2DqsPadCtrl3 = 0x10410400; -SDRAM[0].EmcXm2DqsPadCtrl4 = 0x00249249; -SDRAM[0].EmcXm2DqPadCtrl = 0x770c2990; -SDRAM[0].EmcXm2DqPadCtrl2 = 0x00000000; -SDRAM[0].EmcXm2ClkPadCtrl = 0x77ffc085; -SDRAM[0].EmcXm2ClkPadCtrl2 = 0x00000b0b; -SDRAM[0].EmcXm2CompPadCtrl = 0x81f1f508; -SDRAM[0].EmcXm2VttGenPadCtrl = 0x07076604; -SDRAM[0].EmcXm2VttGenPadCtrl2 = 0x00000000; -SDRAM[0].EmcAcpdControl = 0x00000000; -SDRAM[0].EmcSwizzleRank0ByteCfg = 0x00000087; -SDRAM[0].EmcSwizzleRank0Byte0 = 0x53614207; -SDRAM[0].EmcSwizzleRank0Byte1 = 0x26043715; -SDRAM[0].EmcSwizzleRank0Byte2 = 0x40517236; -SDRAM[0].EmcSwizzleRank0Byte3 = 0x45370612; -SDRAM[0].EmcSwizzleRank1ByteCfg = 0x00000087; -SDRAM[0].EmcSwizzleRank1Byte0 = 0x53614207; -SDRAM[0].EmcSwizzleRank1Byte1 = 0x26043715; -SDRAM[0].EmcSwizzleRank1Byte2 = 0x40517236; -SDRAM[0].EmcSwizzleRank1Byte3 = 0x45370612; -SDRAM[0].EmcAddrSwizzleStack1a = 0x0396071a; -SDRAM[0].EmcAddrSwizzleStack1b = 0x000425b8; -SDRAM[0].EmcAddrSwizzleStack2a = 0x07412306; -SDRAM[0].EmcAddrSwizzleStack2b = 0x00000598; -SDRAM[0].EmcAddrSwizzleStack3 = 0x00534012; -SDRAM[0].EmcDsrVttgenDrv = 0x0000003f; -SDRAM[0].EmcTxdsrvttgen = 0x00000000; -SDRAM[0].McEmemAdrCfg = 0x00000000; -SDRAM[0].McEmemAdrCfgDev0 = 0x00080303; -SDRAM[0].McEmemAdrCfgDev1 = 0x00080303; -SDRAM[0].McEmemAdrCfgChannelMask = 0x00000640; -SDRAM[0].McEmemAdrCfgChannelMaskPropagationCount = 0x00000008; -SDRAM[0].McEmemAdrCfgBankMask0 = 0x69248003; -SDRAM[0].McEmemAdrCfgBankMask1 = 0x24928000; -SDRAM[0].McEmemAdrCfgBankMask2 = 0x92c94c00; -SDRAM[0].McEmemCfg = 0x00000800; -SDRAM[0].McEmemArbCfg = 0x0e00000b; -SDRAM[0].McEmemArbOutstandingReq = 0x80000190; -SDRAM[0].McEmemArbTimingRcd = 0x00000004; -SDRAM[0].McEmemArbTimingRp = 0x00000005; -SDRAM[0].McEmemArbTimingRc = 0x00000013; -SDRAM[0].McEmemArbTimingRas = 0x0000000c; -SDRAM[0].McEmemArbTimingFaw = 0x0000000f; -SDRAM[0].McEmemArbTimingRrd = 0x00000002; -SDRAM[0].McEmemArbTimingRap2Pre = 0x00000003; -SDRAM[0].McEmemArbTimingWap2Pre = 0x0000000c; -SDRAM[0].McEmemArbTimingR2R = 0x00000002; -SDRAM[0].McEmemArbTimingW2W = 0x00000002; -SDRAM[0].McEmemArbTimingR2W = 0x00000006; -SDRAM[0].McEmemArbTimingW2R = 0x00000008; -SDRAM[0].McEmemArbDaTurns = 0x08060202; -SDRAM[0].McEmemArbDaCovers = 0x00170e13; -SDRAM[0].McEmemArbMisc0 = 0x734c2414; -SDRAM[0].McEmemArbMisc1 = 0x78000000; -SDRAM[0].McEmemArbRing1Throttle = 0x001f0000; -SDRAM[0].McEmemArbOverride = 0x00000083; -SDRAM[0].McEmemArbRsv = 0xff00ff00; -SDRAM[0].McClkenOverride = 0x00000000; -SDRAM[0].McEmcRegMode = 0x00000002; -SDRAM[0].McVideoProtectBom = 0xfff00000; -SDRAM[0].McVideoProtectSizeMb = 0x00000000; -SDRAM[0].McVideoProtectVprOverride = 0x009a4752; -SDRAM[0].McSecCarveoutBom = 0xfff00000; -SDRAM[0].McSecCarveoutSizeMb = 0x00000000; -SDRAM[0].McVideoProtectWriteAccess = 0x00000000; -SDRAM[0].McSecCarveoutProtectWriteAccess = 0x00000000; -SDRAM[0].EmcCaTrainingEnable = 0x00000000; -SDRAM[0].EmcCaTrainingTimingCntl1 = 0x1f7df7df; -SDRAM[0].EmcCaTrainingTimingCntl2 = 0x0000001f; -SDRAM[0].SwizzleRankByteEncode = 0x000022aa; -SDRAM[0].BootRomPatchControl = 0x00000000; -SDRAM[0].BootRomPatchData = 0x00000000; -SDRAM[0].Ch1EmcDllXformDqs0 = 0x00000008; -SDRAM[0].Ch1EmcDllXformDqs1 = 0x00000008; -SDRAM[0].Ch1EmcDllXformDqs2 = 0x00000008; -SDRAM[0].Ch1EmcDllXformDqs3 = 0x00000008; -SDRAM[0].Ch1EmcDllXformDqs4 = 0x00000008; -SDRAM[0].Ch1EmcDllXformDqs5 = 0x00000008; -SDRAM[0].Ch1EmcDllXformDqs6 = 0x00000008; -SDRAM[0].Ch1EmcDllXformDqs7 = 0x00000008; -SDRAM[0].Ch1EmcDllXformQUse0 = 0x00000000; -SDRAM[0].Ch1EmcDllXformQUse1 = 0x00000000; -SDRAM[0].Ch1EmcDllXformQUse2 = 0x00000000; -SDRAM[0].Ch1EmcDllXformQUse3 = 0x00000000; -SDRAM[0].Ch1EmcDllXformQUse4 = 0x00000000; -SDRAM[0].Ch1EmcDllXformQUse5 = 0x00000000; -SDRAM[0].Ch1EmcDllXformQUse6 = 0x00000000; -SDRAM[0].Ch1EmcDllXformQUse7 = 0x00000000; -SDRAM[0].Ch1EmcDliTrimTxDqs0 = 0x00000000; -SDRAM[0].Ch1EmcDliTrimTxDqs1 = 0x00000000; -SDRAM[0].Ch1EmcDliTrimTxDqs2 = 0x00000000; -SDRAM[0].Ch1EmcDliTrimTxDqs3 = 0x00000000; -SDRAM[0].Ch1EmcDliTrimTxDqs4 = 0x00000000; -SDRAM[0].Ch1EmcDliTrimTxDqs5 = 0x00000000; -SDRAM[0].Ch1EmcDliTrimTxDqs6 = 0x00000000; -SDRAM[0].Ch1EmcDliTrimTxDqs7 = 0x00000000; -SDRAM[0].Ch1EmcDllXformDq0 = 0x0000000A; -SDRAM[0].Ch1EmcDllXformDq1 = 0x0000000A; -SDRAM[0].Ch1EmcDllXformDq2 = 0x0000000A; -SDRAM[0].Ch1EmcDllXformDq3 = 0x0000000A; -SDRAM[0].Ch1EmcSwizzleRank0ByteCfg = 0x000000d2; -SDRAM[0].Ch1EmcSwizzleRank0Byte0 = 0x51430267; -SDRAM[0].Ch1EmcSwizzleRank0Byte1 = 0x13072465; -SDRAM[0].Ch1EmcSwizzleRank0Byte2 = 0x72605314; -SDRAM[0].Ch1EmcSwizzleRank0Byte3 = 0x54073162; -SDRAM[0].Ch1EmcSwizzleRank1ByteCfg = 0x000000d2; -SDRAM[0].Ch1EmcSwizzleRank1Byte0 = 0x51430267; -SDRAM[0].Ch1EmcSwizzleRank1Byte1 = 0x13072465; -SDRAM[0].Ch1EmcSwizzleRank1Byte2 = 0x72605314; -SDRAM[0].Ch1EmcSwizzleRank1Byte3 = 0x54073162; -SDRAM[0].Ch1EmcAddrSwizzleStack1a = 0x79320a61; -SDRAM[0].Ch1EmcAddrSwizzleStack1b = 0x000b8450; -SDRAM[0].Ch1EmcAddrSwizzleStack2a = 0x07623014; -SDRAM[0].Ch1EmcAddrSwizzleStack2b = 0x00000589; -SDRAM[0].Ch1EmcAddrSwizzleStack3 = 0x00530124; -SDRAM[0].Ch1EmcAutoCalConfig = 0xa8f10f0f; -SDRAM[0].Ch1EmcAutoCalConfig2 = 0x00000000; -SDRAM[0].Ch1EmcAutoCalConfig3 = 0x00000000; -SDRAM[0].Ch1EmcCdbCntl1 = 0x00000000; -SDRAM[0].Ch1EmcDllXformAddr0 = 0x00000008; -SDRAM[0].Ch1EmcDllXformAddr1 = 0x00000000; -SDRAM[0].Ch1EmcDllXformAddr2 = 0x00000000; -SDRAM[0].Ch1EmcFbioSpare = 0x02000000; -SDRAM[0].Ch1EmcXm2ClkPadCtrl = 0x77ffc085; -SDRAM[0].Ch1EmcXm2ClkPadCtrl2 = 0x00000b0b; -SDRAM[0].Ch1EmcXm2CmdPadCtrl2 = 0x770c0000; -SDRAM[0].Ch1EmcXm2CmdPadCtrl3 = 0x050c0000; -SDRAM[0].Ch1EmcXm2CmdPadCtrl4 = 0x00000000; -SDRAM[0].Ch1EmcXm2DqPadCtrl = 0x770c2990; -SDRAM[0].Ch1EmcXm2DqPadCtrl2 = 0x00000000; -SDRAM[0].Ch1EmcXm2DqsPadCtrl = 0x770c1515; -SDRAM[0].Ch1EmcXm2DqsPadCtrl3 = 0x10410400; -SDRAM[0].Ch1EmcXm2DqsPadCtrl4 = 0x00249249; - -SDRAM[1].MemoryType = NvBootMemoryType_Ddr3; -SDRAM[1].PllMInputDivider = 0x00000001; -SDRAM[1].PllMFeedbackDivider = 0x00000042; -SDRAM[1].PllMStableTime = 0x0000012c; -SDRAM[1].PllMSetupControl = 0x00000000; -SDRAM[1].PllMSelectDiv2 = 0x00000000; -SDRAM[1].PllMPDLshiftPh45 = 0x00000000; -SDRAM[1].PllMPDLshiftPh90 = 0x00000000; -SDRAM[1].PllMPDLshiftPh135 = 0x00000000; -SDRAM[1].PllMKCP = 0x00000000; -SDRAM[1].PllMKVCO = 0x00000000; -SDRAM[1].EmcBctSpare0 = 0x00000bad; -SDRAM[1].EmcClockSource = 0x80000000; -SDRAM[1].EmcAutoCalInterval = 0x001fffff; -SDRAM[1].EmcAutoCalConfig = 0xa0f10f0f; -SDRAM[1].EmcAutoCalConfig2 = 0x00000000; -SDRAM[1].EmcAutoCalConfig3 = 0x00000000; -SDRAM[1].EmcAutoCalWait = 0x00000064; -SDRAM[1].EmcAdrCfg = 0x00000000; -SDRAM[1].EmcPinProgramWait = 0x00000001; -SDRAM[1].EmcPinExtraWait = 0x00000000; -SDRAM[1].EmcTimingControlWait = 0x00000001; -SDRAM[1].EmcRc = 0x00000024; -SDRAM[1].EmcRfc = 0x000000cd; -SDRAM[1].EmcRfcSlr = 0x00000000; -SDRAM[1].EmcRas = 0x00000019; -SDRAM[1].EmcRp = 0x0000000a; -SDRAM[1].EmcR2r = 0x00000000; -SDRAM[1].EmcW2w = 0x00000000; -SDRAM[1].EmcR2w = 0x00000009; -SDRAM[1].EmcW2r = 0x0000000d; -SDRAM[1].EmcR2p = 0x00000004; -SDRAM[1].EmcW2p = 0x00000013; -SDRAM[1].EmcRdRcd = 0x0000000a; -SDRAM[1].EmcWrRcd = 0x0000000a; -SDRAM[1].EmcRrd = 0x00000003; -SDRAM[1].EmcRext = 0x00000001; -SDRAM[1].EmcWext = 0x00000000; -SDRAM[1].EmcWdv = 0x00000006; -SDRAM[1].EmcWdvMask = 0x00000006; -SDRAM[1].EmcQUse = 0x0000000b; -SDRAM[1].EmcIbdly = 0x0000000b; -SDRAM[1].EmcEInput = 0x00000008; -SDRAM[1].EmcEInputDuration = 0x00000006; -SDRAM[1].EmcPutermExtra = 0x000d000a; -SDRAM[1].EmcCdbCntl1 = 0x00000000; -SDRAM[1].EmcCdbCntl2 = 0x00000000; -SDRAM[1].EmcQRst = 0x00000008; -SDRAM[1].EmcQSafe = 0x0000000d; -SDRAM[1].EmcRdv = 0x00000014; -SDRAM[1].EmcRdvMask = 0x00000014; -SDRAM[1].EmcCtt = 0x00000000; -SDRAM[1].EmcCttDuration = 0x00000000; -SDRAM[1].EmcRefresh = 0x000017e4; -SDRAM[1].EmcBurstRefreshNum = 0x00000000; -SDRAM[1].EmcPreRefreshReqCnt = 0x000005f9; -SDRAM[1].EmcPdEx2Wr = 0x00000003; -SDRAM[1].EmcPdEx2Rd = 0x00000012; -SDRAM[1].EmcPChg2Pden = 0x00000001; -SDRAM[1].EmcAct2Pden = 0x00000000; -SDRAM[1].EmcAr2Pden = 0x000000c6; -SDRAM[1].EmcRw2Pden = 0x00000018; -SDRAM[1].EmcTxsr = 0x000000d6; -SDRAM[1].EmcTxsrDll = 0x00000200; -SDRAM[1].EmcTcke = 0x00000005; -SDRAM[1].EmcTckesr = 0x00000005; -SDRAM[1].EmcTpd = 0x00000005; -SDRAM[1].EmcTfaw = 0x00000020; -SDRAM[1].EmcTrpab = 0x00000000; -SDRAM[1].EmcTClkStable = 0x00000007; -SDRAM[1].EmcTClkStop = 0x00000008; -SDRAM[1].EmcTRefBw = 0x00001825; -SDRAM[1].EmcQUseExtra = 0x0000000a; -SDRAM[1].EmcFbioCfg5 = 0x0000ba88; -SDRAM[1].EmcFbioCfg6 = 0x00000006; -SDRAM[1].EmcFbioSpare = 0x02000000; -SDRAM[1].EmcCfgRsv = 0xff00ff00; -SDRAM[1].EmcMrs = 0x80000d71; -SDRAM[1].EmcEmrs = 0x80100002; -SDRAM[1].EmcEmrs2 = 0x80200418; -SDRAM[1].EmcEmrs3 = 0x80300000; -SDRAM[1].EmcMrw1 = 0x00000000; -SDRAM[1].EmcMrw2 = 0x00000000; -SDRAM[1].EmcMrw3 = 0x00000000; -SDRAM[1].EmcMrw4 = 0x00000000; -SDRAM[1].EmcMrwExtra = 0x00000000; -SDRAM[1].EmcWarmBootMrwExtra = 0x00000000; -SDRAM[1].EmcWarmBootExtraModeRegWriteEnable = 0x00000000; -SDRAM[1].EmcExtraModeRegWriteEnable = 0x00000000; -SDRAM[1].EmcMrwResetCommand = 0x00000000; -SDRAM[1].EmcMrwResetNInitWait = 0x00000000; -SDRAM[1].EmcMrsWaitCnt = 0x00f8000f; -SDRAM[1].EmcMrsWaitCnt2 = 0x00f8000f; -SDRAM[1].EmcCfg = 0x53200000; -SDRAM[1].EmcCfg2 = 0x008008c1; -SDRAM[1].EmcDbg = 0x01000400; -SDRAM[1].EmcCmdQ = 0x10004408; -SDRAM[1].EmcMc2EmcQ = 0x06000404; -SDRAM[1].EmcDynSelfRefControl = 0x80003018; -SDRAM[1].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; -SDRAM[1].EmcCfgDigDll = 0xf0070191; -SDRAM[1].EmcCfgDigDllPeriod = 0x00008000; -SDRAM[1].EmcDevSelect = 0x00000002; -SDRAM[1].EmcSelDpdCtrl = 0x00040000; -SDRAM[1].EmcDllXformDqs0 = 0x00000008; -SDRAM[1].EmcDllXformDqs1 = 0x00000008; -SDRAM[1].EmcDllXformDqs2 = 0x00000008; -SDRAM[1].EmcDllXformDqs3 = 0x00000008; -SDRAM[1].EmcDllXformDqs4 = 0x00000008; -SDRAM[1].EmcDllXformDqs5 = 0x00000008; -SDRAM[1].EmcDllXformDqs6 = 0x00000008; -SDRAM[1].EmcDllXformDqs7 = 0x00000008; -SDRAM[1].EmcDllXformQUse0 = 0x00000000; -SDRAM[1].EmcDllXformQUse1 = 0x00000000; -SDRAM[1].EmcDllXformQUse2 = 0x00000000; -SDRAM[1].EmcDllXformQUse3 = 0x00000000; -SDRAM[1].EmcDllXformQUse4 = 0x00000000; -SDRAM[1].EmcDllXformQUse5 = 0x00000000; -SDRAM[1].EmcDllXformQUse6 = 0x00000000; -SDRAM[1].EmcDllXformQUse7 = 0x00000000; -SDRAM[1].EmcDllXformAddr0 = 0x00000008; -SDRAM[1].EmcDllXformAddr1 = 0x00000000; -SDRAM[1].EmcDllXformAddr2 = 0x00000000; -SDRAM[1].EmcDliTrimTxDqs0 = 0x00000000; -SDRAM[1].EmcDliTrimTxDqs1 = 0x00000000; -SDRAM[1].EmcDliTrimTxDqs2 = 0x00000000; -SDRAM[1].EmcDliTrimTxDqs3 = 0x00000000; -SDRAM[1].EmcDliTrimTxDqs4 = 0x00000000; -SDRAM[1].EmcDliTrimTxDqs5 = 0x00000000; -SDRAM[1].EmcDliTrimTxDqs6 = 0x00000000; -SDRAM[1].EmcDliTrimTxDqs7 = 0x00000000; -SDRAM[1].EmcDllXformDq0 = 0x0000000A; -SDRAM[1].EmcDllXformDq1 = 0x0000000A; -SDRAM[1].EmcDllXformDq2 = 0x0000000A; -SDRAM[1].EmcDllXformDq3 = 0x0000000A; -SDRAM[1].WarmBootWait = 0x00000002; -SDRAM[1].EmcCttTermCtrl = 0x00000802; -SDRAM[1].EmcOdtWrite = 0x80000020; -SDRAM[1].EmcOdtRead = 0x00000000; -SDRAM[1].EmcZcalInterval = 0x00020000; -SDRAM[1].EmcZcalWaitCnt = 0x00000042; -SDRAM[1].EmcZcalMrwCmd = 0x80000000; -SDRAM[1].EmcMrsResetDll = 0x00000000; -SDRAM[1].EmcZcalInitDev0 = 0x80000011; -SDRAM[1].EmcZcalInitDev1 = 0x00000000; -SDRAM[1].EmcZcalInitWait = 0x00000001; -SDRAM[1].EmcZcalWarmColdBootEnables = 0x00000003; -SDRAM[1].EmcMrwLpddr2ZcalWarmBoot = 0x000a00ab; -SDRAM[1].EmcZqCalDdr3WarmBoot = 0x00000011; -SDRAM[1].EmcZcalWarmBootWait = 0x00000001; -SDRAM[1].EmcMrsWarmBootEnable = 0x00000001; -SDRAM[1].EmcMrsResetDllWait = 0x00000000; -SDRAM[1].EmcMrsExtra = 0x80000d05; -SDRAM[1].EmcWarmBootMrsExtra = 0x80100002; -SDRAM[1].EmcEmrsDdr2DllEnable = 0x00000000; -SDRAM[1].EmcMrsDdr2DllReset = 0x00000000; -SDRAM[1].EmcEmrsDdr2OcdCalib = 0x00000000; -SDRAM[1].EmcDdr2Wait = 0x00000000; -SDRAM[1].EmcClkenOverride = 0x00000000; -SDRAM[1].EmcExtraRefreshNum = 0x00000002; -SDRAM[1].EmcClkenOverrideAllWarmBoot = 0x00000000; -SDRAM[1].McClkenOverrideAllWarmBoot = 0x00000000; -SDRAM[1].EmcCfgDigDllPeriodWarmBoot = 0x00000003; -SDRAM[1].PmcVddpSel = 0x00000002; -SDRAM[1].PmcDdrPwr = 0x00000003; -SDRAM[1].PmcDdrCfg = 0x00000092; -SDRAM[1].PmcIoDpdReq = 0x80800000; -SDRAM[1].PmcIoDpd2Req = 0x00000000; -SDRAM[1].PmcRegShort = 0x00000000; -SDRAM[1].PmcENoVttGen = 0x00000000; -SDRAM[1].PmcNoIoPower = 0x00000000; -SDRAM[1].EmcXm2CmdPadCtrl = 0x001112a0; -SDRAM[1].EmcXm2CmdPadCtrl2 = 0x770c0000; -SDRAM[1].EmcXm2CmdPadCtrl3 = 0x050c0000; -SDRAM[1].EmcXm2CmdPadCtrl4 = 0x00000000; -SDRAM[1].EmcXm2DqsPadCtrl = 0x770c1414; -SDRAM[1].EmcXm2DqsPadCtrl2 = 0x0000013d; -SDRAM[1].EmcXm2DqsPadCtrl3 = 0x10410400; -SDRAM[1].EmcXm2DqsPadCtrl4 = 0x00249249; -SDRAM[1].EmcXm2DqPadCtrl = 0x770c2990; -SDRAM[1].EmcXm2DqPadCtrl2 = 0x00000000; -SDRAM[1].EmcXm2ClkPadCtrl = 0x77ffc085; -SDRAM[1].EmcXm2ClkPadCtrl2 = 0x00000b0b; -SDRAM[1].EmcXm2CompPadCtrl = 0x81f1f508; -SDRAM[1].EmcXm2VttGenPadCtrl = 0x07076604; -SDRAM[1].EmcXm2VttGenPadCtrl2 = 0x00000000; -SDRAM[1].EmcAcpdControl = 0x00000000; -SDRAM[1].EmcSwizzleRank0ByteCfg = 0x00000087; -SDRAM[1].EmcSwizzleRank0Byte0 = 0x53614207; -SDRAM[1].EmcSwizzleRank0Byte1 = 0x26043715; -SDRAM[1].EmcSwizzleRank0Byte2 = 0x40517236; -SDRAM[1].EmcSwizzleRank0Byte3 = 0x45370612; -SDRAM[1].EmcSwizzleRank1ByteCfg = 0x00000087; -SDRAM[1].EmcSwizzleRank1Byte0 = 0x53614207; -SDRAM[1].EmcSwizzleRank1Byte1 = 0x26043715; -SDRAM[1].EmcSwizzleRank1Byte2 = 0x40517236; -SDRAM[1].EmcSwizzleRank1Byte3 = 0x45370612; -SDRAM[1].EmcAddrSwizzleStack1a = 0x0396071a; -SDRAM[1].EmcAddrSwizzleStack1b = 0x000425b8; -SDRAM[1].EmcAddrSwizzleStack2a = 0x07412306; -SDRAM[1].EmcAddrSwizzleStack2b = 0x00000598; -SDRAM[1].EmcAddrSwizzleStack3 = 0x00534012; -SDRAM[1].EmcDsrVttgenDrv = 0x0000003f; -SDRAM[1].EmcTxdsrvttgen = 0x00000000; -SDRAM[1].McEmemAdrCfg = 0x00000000; -SDRAM[1].McEmemAdrCfgDev0 = 0x00080303; -SDRAM[1].McEmemAdrCfgDev1 = 0x00080303; -SDRAM[1].McEmemAdrCfgChannelMask = 0x00000640; -SDRAM[1].McEmemAdrCfgChannelMaskPropagationCount = 0x00000008; -SDRAM[1].McEmemAdrCfgBankMask0 = 0x69248003; -SDRAM[1].McEmemAdrCfgBankMask1 = 0x24928000; -SDRAM[1].McEmemAdrCfgBankMask2 = 0x92c94c00; -SDRAM[1].McEmemCfg = 0x00000800; -SDRAM[1].McEmemArbCfg = 0x0e00000b; -SDRAM[1].McEmemArbOutstandingReq = 0x80000190; -SDRAM[1].McEmemArbTimingRcd = 0x00000004; -SDRAM[1].McEmemArbTimingRp = 0x00000005; -SDRAM[1].McEmemArbTimingRc = 0x00000013; -SDRAM[1].McEmemArbTimingRas = 0x0000000c; -SDRAM[1].McEmemArbTimingFaw = 0x0000000f; -SDRAM[1].McEmemArbTimingRrd = 0x00000002; -SDRAM[1].McEmemArbTimingRap2Pre = 0x00000003; -SDRAM[1].McEmemArbTimingWap2Pre = 0x0000000c; -SDRAM[1].McEmemArbTimingR2R = 0x00000002; -SDRAM[1].McEmemArbTimingW2W = 0x00000002; -SDRAM[1].McEmemArbTimingR2W = 0x00000006; -SDRAM[1].McEmemArbTimingW2R = 0x00000008; -SDRAM[1].McEmemArbDaTurns = 0x08060202; -SDRAM[1].McEmemArbDaCovers = 0x00170e13; -SDRAM[1].McEmemArbMisc0 = 0x734c2414; -SDRAM[1].McEmemArbMisc1 = 0x78000000; -SDRAM[1].McEmemArbRing1Throttle = 0x001f0000; -SDRAM[1].McEmemArbOverride = 0x00000083; -SDRAM[1].McEmemArbRsv = 0xff00ff00; -SDRAM[1].McClkenOverride = 0x00000000; -SDRAM[1].McEmcRegMode = 0x00000002; -SDRAM[1].McVideoProtectBom = 0xfff00000; -SDRAM[1].McVideoProtectSizeMb = 0x00000000; -SDRAM[1].McVideoProtectVprOverride = 0x009a4752; -SDRAM[1].McSecCarveoutBom = 0xfff00000; -SDRAM[1].McSecCarveoutSizeMb = 0x00000000; -SDRAM[1].McVideoProtectWriteAccess = 0x00000000; -SDRAM[1].McSecCarveoutProtectWriteAccess = 0x00000000; -SDRAM[1].EmcCaTrainingEnable = 0x00000000; -SDRAM[1].EmcCaTrainingTimingCntl1 = 0x1f7df7df; -SDRAM[1].EmcCaTrainingTimingCntl2 = 0x0000001f; -SDRAM[1].SwizzleRankByteEncode = 0x000022aa; -SDRAM[1].BootRomPatchControl = 0x00000000; -SDRAM[1].BootRomPatchData = 0x00000000; -SDRAM[1].Ch1EmcDllXformDqs0 = 0x00000008; -SDRAM[1].Ch1EmcDllXformDqs1 = 0x00000008; -SDRAM[1].Ch1EmcDllXformDqs2 = 0x00000008; -SDRAM[1].Ch1EmcDllXformDqs3 = 0x00000008; -SDRAM[1].Ch1EmcDllXformDqs4 = 0x00000008; -SDRAM[1].Ch1EmcDllXformDqs5 = 0x00000008; -SDRAM[1].Ch1EmcDllXformDqs6 = 0x00000008; -SDRAM[1].Ch1EmcDllXformDqs7 = 0x00000008; -SDRAM[1].Ch1EmcDllXformQUse0 = 0x00000000; -SDRAM[1].Ch1EmcDllXformQUse1 = 0x00000000; -SDRAM[1].Ch1EmcDllXformQUse2 = 0x00000000; -SDRAM[1].Ch1EmcDllXformQUse3 = 0x00000000; -SDRAM[1].Ch1EmcDllXformQUse4 = 0x00000000; -SDRAM[1].Ch1EmcDllXformQUse5 = 0x00000000; -SDRAM[1].Ch1EmcDllXformQUse6 = 0x00000000; -SDRAM[1].Ch1EmcDllXformQUse7 = 0x00000000; -SDRAM[1].Ch1EmcDliTrimTxDqs0 = 0x00000000; -SDRAM[1].Ch1EmcDliTrimTxDqs1 = 0x00000000; -SDRAM[1].Ch1EmcDliTrimTxDqs2 = 0x00000000; -SDRAM[1].Ch1EmcDliTrimTxDqs3 = 0x00000000; -SDRAM[1].Ch1EmcDliTrimTxDqs4 = 0x00000000; -SDRAM[1].Ch1EmcDliTrimTxDqs5 = 0x00000000; -SDRAM[1].Ch1EmcDliTrimTxDqs6 = 0x00000000; -SDRAM[1].Ch1EmcDliTrimTxDqs7 = 0x00000000; -SDRAM[1].Ch1EmcDllXformDq0 = 0x0000000A; -SDRAM[1].Ch1EmcDllXformDq1 = 0x0000000A; -SDRAM[1].Ch1EmcDllXformDq2 = 0x0000000A; -SDRAM[1].Ch1EmcDllXformDq3 = 0x0000000A; -SDRAM[1].Ch1EmcSwizzleRank0ByteCfg = 0x000000d2; -SDRAM[1].Ch1EmcSwizzleRank0Byte0 = 0x51430267; -SDRAM[1].Ch1EmcSwizzleRank0Byte1 = 0x13072465; -SDRAM[1].Ch1EmcSwizzleRank0Byte2 = 0x72605314; -SDRAM[1].Ch1EmcSwizzleRank0Byte3 = 0x54073162; -SDRAM[1].Ch1EmcSwizzleRank1ByteCfg = 0x000000d2; -SDRAM[1].Ch1EmcSwizzleRank1Byte0 = 0x51430267; -SDRAM[1].Ch1EmcSwizzleRank1Byte1 = 0x13072465; -SDRAM[1].Ch1EmcSwizzleRank1Byte2 = 0x72605314; -SDRAM[1].Ch1EmcSwizzleRank1Byte3 = 0x54073162; -SDRAM[1].Ch1EmcAddrSwizzleStack1a = 0x79320a61; -SDRAM[1].Ch1EmcAddrSwizzleStack1b = 0x000b8450; -SDRAM[1].Ch1EmcAddrSwizzleStack2a = 0x07623014; -SDRAM[1].Ch1EmcAddrSwizzleStack2b = 0x00000589; -SDRAM[1].Ch1EmcAddrSwizzleStack3 = 0x00530124; -SDRAM[1].Ch1EmcAutoCalConfig = 0xa8f10f0f; -SDRAM[1].Ch1EmcAutoCalConfig2 = 0x00000000; -SDRAM[1].Ch1EmcAutoCalConfig3 = 0x00000000; -SDRAM[1].Ch1EmcCdbCntl1 = 0x00000000; -SDRAM[1].Ch1EmcDllXformAddr0 = 0x00000008; -SDRAM[1].Ch1EmcDllXformAddr1 = 0x00000000; -SDRAM[1].Ch1EmcDllXformAddr2 = 0x00000000; -SDRAM[1].Ch1EmcFbioSpare = 0x02000000; -SDRAM[1].Ch1EmcXm2ClkPadCtrl = 0x77ffc085; -SDRAM[1].Ch1EmcXm2ClkPadCtrl2 = 0x00000b0b; -SDRAM[1].Ch1EmcXm2CmdPadCtrl2 = 0x770c0000; -SDRAM[1].Ch1EmcXm2CmdPadCtrl3 = 0x050c0000; -SDRAM[1].Ch1EmcXm2CmdPadCtrl4 = 0x00000000; -SDRAM[1].Ch1EmcXm2DqPadCtrl = 0x770c2990; -SDRAM[1].Ch1EmcXm2DqPadCtrl2 = 0x00000000; -SDRAM[1].Ch1EmcXm2DqsPadCtrl = 0x770c1515; -SDRAM[1].Ch1EmcXm2DqsPadCtrl3 = 0x10410400; -SDRAM[1].Ch1EmcXm2DqsPadCtrl4 = 0x00249249; - -SDRAM[2].MemoryType = NvBootMemoryType_Ddr3; -SDRAM[2].PllMInputDivider = 0x00000001; -SDRAM[2].PllMFeedbackDivider = 0x00000042; -SDRAM[2].PllMStableTime = 0x0000012c; -SDRAM[2].PllMSetupControl = 0x00000000; -SDRAM[2].PllMSelectDiv2 = 0x00000000; -SDRAM[2].PllMPDLshiftPh45 = 0x00000000; -SDRAM[2].PllMPDLshiftPh90 = 0x00000000; -SDRAM[2].PllMPDLshiftPh135 = 0x00000000; -SDRAM[2].PllMKCP = 0x00000000; -SDRAM[2].PllMKVCO = 0x00000000; -SDRAM[2].EmcBctSpare0 = 0x00000bad; -SDRAM[2].EmcClockSource = 0x80000000; -SDRAM[2].EmcAutoCalInterval = 0x001fffff; -SDRAM[2].EmcAutoCalConfig = 0xa0f10f0f; -SDRAM[2].EmcAutoCalConfig2 = 0x00000000; -SDRAM[2].EmcAutoCalConfig3 = 0x00000000; -SDRAM[2].EmcAutoCalWait = 0x00000064; -SDRAM[2].EmcAdrCfg = 0x00000000; -SDRAM[2].EmcPinProgramWait = 0x00000001; -SDRAM[2].EmcPinExtraWait = 0x00000000; -SDRAM[2].EmcTimingControlWait = 0x00000001; -SDRAM[2].EmcRc = 0x00000024; -SDRAM[2].EmcRfc = 0x000000cd; -SDRAM[2].EmcRfcSlr = 0x00000000; -SDRAM[2].EmcRas = 0x00000019; -SDRAM[2].EmcRp = 0x0000000a; -SDRAM[2].EmcR2r = 0x00000000; -SDRAM[2].EmcW2w = 0x00000000; -SDRAM[2].EmcR2w = 0x00000009; -SDRAM[2].EmcW2r = 0x0000000d; -SDRAM[2].EmcR2p = 0x00000004; -SDRAM[2].EmcW2p = 0x00000013; -SDRAM[2].EmcRdRcd = 0x0000000a; -SDRAM[2].EmcWrRcd = 0x0000000a; -SDRAM[2].EmcRrd = 0x00000003; -SDRAM[2].EmcRext = 0x00000001; -SDRAM[2].EmcWext = 0x00000000; -SDRAM[2].EmcWdv = 0x00000006; -SDRAM[2].EmcWdvMask = 0x00000006; -SDRAM[2].EmcQUse = 0x0000000b; -SDRAM[2].EmcIbdly = 0x0000000b; -SDRAM[2].EmcEInput = 0x00000008; -SDRAM[2].EmcEInputDuration = 0x00000006; -SDRAM[2].EmcPutermExtra = 0x000d000a; -SDRAM[2].EmcCdbCntl1 = 0x00000000; -SDRAM[2].EmcCdbCntl2 = 0x00000000; -SDRAM[2].EmcQRst = 0x00000008; -SDRAM[2].EmcQSafe = 0x0000000d; -SDRAM[2].EmcRdv = 0x00000014; -SDRAM[2].EmcRdvMask = 0x00000014; -SDRAM[2].EmcCtt = 0x00000000; -SDRAM[2].EmcCttDuration = 0x00000000; -SDRAM[2].EmcRefresh = 0x000017e4; -SDRAM[2].EmcBurstRefreshNum = 0x00000000; -SDRAM[2].EmcPreRefreshReqCnt = 0x000005f9; -SDRAM[2].EmcPdEx2Wr = 0x00000003; -SDRAM[2].EmcPdEx2Rd = 0x00000012; -SDRAM[2].EmcPChg2Pden = 0x00000001; -SDRAM[2].EmcAct2Pden = 0x00000000; -SDRAM[2].EmcAr2Pden = 0x000000c6; -SDRAM[2].EmcRw2Pden = 0x00000018; -SDRAM[2].EmcTxsr = 0x000000d6; -SDRAM[2].EmcTxsrDll = 0x00000200; -SDRAM[2].EmcTcke = 0x00000005; -SDRAM[2].EmcTckesr = 0x00000005; -SDRAM[2].EmcTpd = 0x00000005; -SDRAM[2].EmcTfaw = 0x00000020; -SDRAM[2].EmcTrpab = 0x00000000; -SDRAM[2].EmcTClkStable = 0x00000007; -SDRAM[2].EmcTClkStop = 0x00000008; -SDRAM[2].EmcTRefBw = 0x00001825; -SDRAM[2].EmcQUseExtra = 0x0000000a; -SDRAM[2].EmcFbioCfg5 = 0x0000ba88; -SDRAM[2].EmcFbioCfg6 = 0x00000006; -SDRAM[2].EmcFbioSpare = 0x02000000; -SDRAM[2].EmcCfgRsv = 0xff00ff00; -SDRAM[2].EmcMrs = 0x80000d71; -SDRAM[2].EmcEmrs = 0x80100002; -SDRAM[2].EmcEmrs2 = 0x80200418; -SDRAM[2].EmcEmrs3 = 0x80300000; -SDRAM[2].EmcMrw1 = 0x00000000; -SDRAM[2].EmcMrw2 = 0x00000000; -SDRAM[2].EmcMrw3 = 0x00000000; -SDRAM[2].EmcMrw4 = 0x00000000; -SDRAM[2].EmcMrwExtra = 0x00000000; -SDRAM[2].EmcWarmBootMrwExtra = 0x00000000; -SDRAM[2].EmcWarmBootExtraModeRegWriteEnable = 0x00000000; -SDRAM[2].EmcExtraModeRegWriteEnable = 0x00000000; -SDRAM[2].EmcMrwResetCommand = 0x00000000; -SDRAM[2].EmcMrwResetNInitWait = 0x00000000; -SDRAM[2].EmcMrsWaitCnt = 0x00f8000f; -SDRAM[2].EmcMrsWaitCnt2 = 0x00f8000f; -SDRAM[2].EmcCfg = 0x53200000; -SDRAM[2].EmcCfg2 = 0x008008c1; -SDRAM[2].EmcDbg = 0x01000400; -SDRAM[2].EmcCmdQ = 0x10004408; -SDRAM[2].EmcMc2EmcQ = 0x06000404; -SDRAM[2].EmcDynSelfRefControl = 0x80003018; -SDRAM[2].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; -SDRAM[2].EmcCfgDigDll = 0xf0070191; -SDRAM[2].EmcCfgDigDllPeriod = 0x00008000; -SDRAM[2].EmcDevSelect = 0x00000002; -SDRAM[2].EmcSelDpdCtrl = 0x00040000; -SDRAM[2].EmcDllXformDqs0 = 0x00000008; -SDRAM[2].EmcDllXformDqs1 = 0x00000008; -SDRAM[2].EmcDllXformDqs2 = 0x00000008; -SDRAM[2].EmcDllXformDqs3 = 0x00000008; -SDRAM[2].EmcDllXformDqs4 = 0x00000008; -SDRAM[2].EmcDllXformDqs5 = 0x00000008; -SDRAM[2].EmcDllXformDqs6 = 0x00000008; -SDRAM[2].EmcDllXformDqs7 = 0x00000008; -SDRAM[2].EmcDllXformQUse0 = 0x00000000; -SDRAM[2].EmcDllXformQUse1 = 0x00000000; -SDRAM[2].EmcDllXformQUse2 = 0x00000000; -SDRAM[2].EmcDllXformQUse3 = 0x00000000; -SDRAM[2].EmcDllXformQUse4 = 0x00000000; -SDRAM[2].EmcDllXformQUse5 = 0x00000000; -SDRAM[2].EmcDllXformQUse6 = 0x00000000; -SDRAM[2].EmcDllXformQUse7 = 0x00000000; -SDRAM[2].EmcDllXformAddr0 = 0x00000008; -SDRAM[2].EmcDllXformAddr1 = 0x00000000; -SDRAM[2].EmcDllXformAddr2 = 0x00000000; -SDRAM[2].EmcDliTrimTxDqs0 = 0x00000000; -SDRAM[2].EmcDliTrimTxDqs1 = 0x00000000; -SDRAM[2].EmcDliTrimTxDqs2 = 0x00000000; -SDRAM[2].EmcDliTrimTxDqs3 = 0x00000000; -SDRAM[2].EmcDliTrimTxDqs4 = 0x00000000; -SDRAM[2].EmcDliTrimTxDqs5 = 0x00000000; -SDRAM[2].EmcDliTrimTxDqs6 = 0x00000000; -SDRAM[2].EmcDliTrimTxDqs7 = 0x00000000; -SDRAM[2].EmcDllXformDq0 = 0x0000000A; -SDRAM[2].EmcDllXformDq1 = 0x0000000A; -SDRAM[2].EmcDllXformDq2 = 0x0000000A; -SDRAM[2].EmcDllXformDq3 = 0x0000000A; -SDRAM[2].WarmBootWait = 0x00000002; -SDRAM[2].EmcCttTermCtrl = 0x00000802; -SDRAM[2].EmcOdtWrite = 0x80000020; -SDRAM[2].EmcOdtRead = 0x00000000; -SDRAM[2].EmcZcalInterval = 0x00020000; -SDRAM[2].EmcZcalWaitCnt = 0x00000042; -SDRAM[2].EmcZcalMrwCmd = 0x80000000; -SDRAM[2].EmcMrsResetDll = 0x00000000; -SDRAM[2].EmcZcalInitDev0 = 0x80000011; -SDRAM[2].EmcZcalInitDev1 = 0x00000000; -SDRAM[2].EmcZcalInitWait = 0x00000001; -SDRAM[2].EmcZcalWarmColdBootEnables = 0x00000003; -SDRAM[2].EmcMrwLpddr2ZcalWarmBoot = 0x000a00ab; -SDRAM[2].EmcZqCalDdr3WarmBoot = 0x00000011; -SDRAM[2].EmcZcalWarmBootWait = 0x00000001; -SDRAM[2].EmcMrsWarmBootEnable = 0x00000001; -SDRAM[2].EmcMrsResetDllWait = 0x00000000; -SDRAM[2].EmcMrsExtra = 0x80000d05; -SDRAM[2].EmcWarmBootMrsExtra = 0x80100002; -SDRAM[2].EmcEmrsDdr2DllEnable = 0x00000000; -SDRAM[2].EmcMrsDdr2DllReset = 0x00000000; -SDRAM[2].EmcEmrsDdr2OcdCalib = 0x00000000; -SDRAM[2].EmcDdr2Wait = 0x00000000; -SDRAM[2].EmcClkenOverride = 0x00000000; -SDRAM[2].EmcExtraRefreshNum = 0x00000002; -SDRAM[2].EmcClkenOverrideAllWarmBoot = 0x00000000; -SDRAM[2].McClkenOverrideAllWarmBoot = 0x00000000; -SDRAM[2].EmcCfgDigDllPeriodWarmBoot = 0x00000003; -SDRAM[2].PmcVddpSel = 0x00000002; -SDRAM[2].PmcDdrPwr = 0x00000003; -SDRAM[2].PmcDdrCfg = 0x00000092; -SDRAM[2].PmcIoDpdReq = 0x80800000; -SDRAM[2].PmcIoDpd2Req = 0x00000000; -SDRAM[2].PmcRegShort = 0x00000000; -SDRAM[2].PmcENoVttGen = 0x00000000; -SDRAM[2].PmcNoIoPower = 0x00000000; -SDRAM[2].EmcXm2CmdPadCtrl = 0x001112a0; -SDRAM[2].EmcXm2CmdPadCtrl2 = 0x770c0000; -SDRAM[2].EmcXm2CmdPadCtrl3 = 0x050c0000; -SDRAM[2].EmcXm2CmdPadCtrl4 = 0x00000000; -SDRAM[2].EmcXm2DqsPadCtrl = 0x770c1414; -SDRAM[2].EmcXm2DqsPadCtrl2 = 0x0000013d; -SDRAM[2].EmcXm2DqsPadCtrl3 = 0x10410400; -SDRAM[2].EmcXm2DqsPadCtrl4 = 0x00249249; -SDRAM[2].EmcXm2DqPadCtrl = 0x770c2990; -SDRAM[2].EmcXm2DqPadCtrl2 = 0x00000000; -SDRAM[2].EmcXm2ClkPadCtrl = 0x77ffc085; -SDRAM[2].EmcXm2ClkPadCtrl2 = 0x00000b0b; -SDRAM[2].EmcXm2CompPadCtrl = 0x81f1f508; -SDRAM[2].EmcXm2VttGenPadCtrl = 0x07076604; -SDRAM[2].EmcXm2VttGenPadCtrl2 = 0x00000000; -SDRAM[2].EmcAcpdControl = 0x00000000; -SDRAM[2].EmcSwizzleRank0ByteCfg = 0x00000087; -SDRAM[2].EmcSwizzleRank0Byte0 = 0x53614207; -SDRAM[2].EmcSwizzleRank0Byte1 = 0x26043715; -SDRAM[2].EmcSwizzleRank0Byte2 = 0x40517236; -SDRAM[2].EmcSwizzleRank0Byte3 = 0x45370612; -SDRAM[2].EmcSwizzleRank1ByteCfg = 0x00000087; -SDRAM[2].EmcSwizzleRank1Byte0 = 0x53614207; -SDRAM[2].EmcSwizzleRank1Byte1 = 0x26043715; -SDRAM[2].EmcSwizzleRank1Byte2 = 0x40517236; -SDRAM[2].EmcSwizzleRank1Byte3 = 0x45370612; -SDRAM[2].EmcAddrSwizzleStack1a = 0x0396071a; -SDRAM[2].EmcAddrSwizzleStack1b = 0x000425b8; -SDRAM[2].EmcAddrSwizzleStack2a = 0x07412306; -SDRAM[2].EmcAddrSwizzleStack2b = 0x00000598; -SDRAM[2].EmcAddrSwizzleStack3 = 0x00534012; -SDRAM[2].EmcDsrVttgenDrv = 0x0000003f; -SDRAM[2].EmcTxdsrvttgen = 0x00000000; -SDRAM[2].McEmemAdrCfg = 0x00000000; -SDRAM[2].McEmemAdrCfgDev0 = 0x00080303; -SDRAM[2].McEmemAdrCfgDev1 = 0x00080303; -SDRAM[2].McEmemAdrCfgChannelMask = 0x00000640; -SDRAM[2].McEmemAdrCfgChannelMaskPropagationCount = 0x00000008; -SDRAM[2].McEmemAdrCfgBankMask0 = 0x69248003; -SDRAM[2].McEmemAdrCfgBankMask1 = 0x24928000; -SDRAM[2].McEmemAdrCfgBankMask2 = 0x92c94c00; -SDRAM[2].McEmemCfg = 0x00000800; -SDRAM[2].McEmemArbCfg = 0x0e00000b; -SDRAM[2].McEmemArbOutstandingReq = 0x80000190; -SDRAM[2].McEmemArbTimingRcd = 0x00000004; -SDRAM[2].McEmemArbTimingRp = 0x00000005; -SDRAM[2].McEmemArbTimingRc = 0x00000013; -SDRAM[2].McEmemArbTimingRas = 0x0000000c; -SDRAM[2].McEmemArbTimingFaw = 0x0000000f; -SDRAM[2].McEmemArbTimingRrd = 0x00000002; -SDRAM[2].McEmemArbTimingRap2Pre = 0x00000003; -SDRAM[2].McEmemArbTimingWap2Pre = 0x0000000c; -SDRAM[2].McEmemArbTimingR2R = 0x00000002; -SDRAM[2].McEmemArbTimingW2W = 0x00000002; -SDRAM[2].McEmemArbTimingR2W = 0x00000006; -SDRAM[2].McEmemArbTimingW2R = 0x00000008; -SDRAM[2].McEmemArbDaTurns = 0x08060202; -SDRAM[2].McEmemArbDaCovers = 0x00170e13; -SDRAM[2].McEmemArbMisc0 = 0x734c2414; -SDRAM[2].McEmemArbMisc1 = 0x78000000; -SDRAM[2].McEmemArbRing1Throttle = 0x001f0000; -SDRAM[2].McEmemArbOverride = 0x00000083; -SDRAM[2].McEmemArbRsv = 0xff00ff00; -SDRAM[2].McClkenOverride = 0x00000000; -SDRAM[2].McEmcRegMode = 0x00000002; -SDRAM[2].McVideoProtectBom = 0xfff00000; -SDRAM[2].McVideoProtectSizeMb = 0x00000000; -SDRAM[2].McVideoProtectVprOverride = 0x009a4752; -SDRAM[2].McSecCarveoutBom = 0xfff00000; -SDRAM[2].McSecCarveoutSizeMb = 0x00000000; -SDRAM[2].McVideoProtectWriteAccess = 0x00000000; -SDRAM[2].McSecCarveoutProtectWriteAccess = 0x00000000; -SDRAM[2].EmcCaTrainingEnable = 0x00000000; -SDRAM[2].EmcCaTrainingTimingCntl1 = 0x1f7df7df; -SDRAM[2].EmcCaTrainingTimingCntl2 = 0x0000001f; -SDRAM[2].SwizzleRankByteEncode = 0x000022aa; -SDRAM[2].BootRomPatchControl = 0x00000000; -SDRAM[2].BootRomPatchData = 0x00000000; -SDRAM[2].Ch1EmcDllXformDqs0 = 0x00000008; -SDRAM[2].Ch1EmcDllXformDqs1 = 0x00000008; -SDRAM[2].Ch1EmcDllXformDqs2 = 0x00000008; -SDRAM[2].Ch1EmcDllXformDqs3 = 0x00000008; -SDRAM[2].Ch1EmcDllXformDqs4 = 0x00000008; -SDRAM[2].Ch1EmcDllXformDqs5 = 0x00000008; -SDRAM[2].Ch1EmcDllXformDqs6 = 0x00000008; -SDRAM[2].Ch1EmcDllXformDqs7 = 0x00000008; -SDRAM[2].Ch1EmcDllXformQUse0 = 0x00000000; -SDRAM[2].Ch1EmcDllXformQUse1 = 0x00000000; -SDRAM[2].Ch1EmcDllXformQUse2 = 0x00000000; -SDRAM[2].Ch1EmcDllXformQUse3 = 0x00000000; -SDRAM[2].Ch1EmcDllXformQUse4 = 0x00000000; -SDRAM[2].Ch1EmcDllXformQUse5 = 0x00000000; -SDRAM[2].Ch1EmcDllXformQUse6 = 0x00000000; -SDRAM[2].Ch1EmcDllXformQUse7 = 0x00000000; -SDRAM[2].Ch1EmcDliTrimTxDqs0 = 0x00000000; -SDRAM[2].Ch1EmcDliTrimTxDqs1 = 0x00000000; -SDRAM[2].Ch1EmcDliTrimTxDqs2 = 0x00000000; -SDRAM[2].Ch1EmcDliTrimTxDqs3 = 0x00000000; -SDRAM[2].Ch1EmcDliTrimTxDqs4 = 0x00000000; -SDRAM[2].Ch1EmcDliTrimTxDqs5 = 0x00000000; -SDRAM[2].Ch1EmcDliTrimTxDqs6 = 0x00000000; -SDRAM[2].Ch1EmcDliTrimTxDqs7 = 0x00000000; -SDRAM[2].Ch1EmcDllXformDq0 = 0x0000000A; -SDRAM[2].Ch1EmcDllXformDq1 = 0x0000000A; -SDRAM[2].Ch1EmcDllXformDq2 = 0x0000000A; -SDRAM[2].Ch1EmcDllXformDq3 = 0x0000000A; -SDRAM[2].Ch1EmcSwizzleRank0ByteCfg = 0x000000d2; -SDRAM[2].Ch1EmcSwizzleRank0Byte0 = 0x51430267; -SDRAM[2].Ch1EmcSwizzleRank0Byte1 = 0x13072465; -SDRAM[2].Ch1EmcSwizzleRank0Byte2 = 0x72605314; -SDRAM[2].Ch1EmcSwizzleRank0Byte3 = 0x54073162; -SDRAM[2].Ch1EmcSwizzleRank1ByteCfg = 0x000000d2; -SDRAM[2].Ch1EmcSwizzleRank1Byte0 = 0x51430267; -SDRAM[2].Ch1EmcSwizzleRank1Byte1 = 0x13072465; -SDRAM[2].Ch1EmcSwizzleRank1Byte2 = 0x72605314; -SDRAM[2].Ch1EmcSwizzleRank1Byte3 = 0x54073162; -SDRAM[2].Ch1EmcAddrSwizzleStack1a = 0x79320a61; -SDRAM[2].Ch1EmcAddrSwizzleStack1b = 0x000b8450; -SDRAM[2].Ch1EmcAddrSwizzleStack2a = 0x07623014; -SDRAM[2].Ch1EmcAddrSwizzleStack2b = 0x00000589; -SDRAM[2].Ch1EmcAddrSwizzleStack3 = 0x00530124; -SDRAM[2].Ch1EmcAutoCalConfig = 0xa8f10f0f; -SDRAM[2].Ch1EmcAutoCalConfig2 = 0x00000000; -SDRAM[2].Ch1EmcAutoCalConfig3 = 0x00000000; -SDRAM[2].Ch1EmcCdbCntl1 = 0x00000000; -SDRAM[2].Ch1EmcDllXformAddr0 = 0x00000008; -SDRAM[2].Ch1EmcDllXformAddr1 = 0x00000000; -SDRAM[2].Ch1EmcDllXformAddr2 = 0x00000000; -SDRAM[2].Ch1EmcFbioSpare = 0x02000000; -SDRAM[2].Ch1EmcXm2ClkPadCtrl = 0x77ffc085; -SDRAM[2].Ch1EmcXm2ClkPadCtrl2 = 0x00000b0b; -SDRAM[2].Ch1EmcXm2CmdPadCtrl2 = 0x770c0000; -SDRAM[2].Ch1EmcXm2CmdPadCtrl3 = 0x050c0000; -SDRAM[2].Ch1EmcXm2CmdPadCtrl4 = 0x00000000; -SDRAM[2].Ch1EmcXm2DqPadCtrl = 0x770c2990; -SDRAM[2].Ch1EmcXm2DqPadCtrl2 = 0x00000000; -SDRAM[2].Ch1EmcXm2DqsPadCtrl = 0x770c1515; -SDRAM[2].Ch1EmcXm2DqsPadCtrl3 = 0x10410400; -SDRAM[2].Ch1EmcXm2DqsPadCtrl4 = 0x00249249; - -SDRAM[3].MemoryType = NvBootMemoryType_Ddr3; -SDRAM[3].PllMInputDivider = 0x00000001; -SDRAM[3].PllMFeedbackDivider = 0x00000042; -SDRAM[3].PllMStableTime = 0x0000012c; -SDRAM[3].PllMSetupControl = 0x00000000; -SDRAM[3].PllMSelectDiv2 = 0x00000000; -SDRAM[3].PllMPDLshiftPh45 = 0x00000000; -SDRAM[3].PllMPDLshiftPh90 = 0x00000000; -SDRAM[3].PllMPDLshiftPh135 = 0x00000000; -SDRAM[3].PllMKCP = 0x00000000; -SDRAM[3].PllMKVCO = 0x00000000; -SDRAM[3].EmcBctSpare0 = 0x00000bad; -SDRAM[3].EmcClockSource = 0x80000000; -SDRAM[3].EmcAutoCalInterval = 0x001fffff; -SDRAM[3].EmcAutoCalConfig = 0xa0f10f0f; -SDRAM[3].EmcAutoCalConfig2 = 0x00000000; -SDRAM[3].EmcAutoCalConfig3 = 0x00000000; -SDRAM[3].EmcAutoCalWait = 0x00000064; -SDRAM[3].EmcAdrCfg = 0x00000000; -SDRAM[3].EmcPinProgramWait = 0x00000001; -SDRAM[3].EmcPinExtraWait = 0x00000000; -SDRAM[3].EmcTimingControlWait = 0x00000001; -SDRAM[3].EmcRc = 0x00000024; -SDRAM[3].EmcRfc = 0x000000cd; -SDRAM[3].EmcRfcSlr = 0x00000000; -SDRAM[3].EmcRas = 0x00000019; -SDRAM[3].EmcRp = 0x0000000a; -SDRAM[3].EmcR2r = 0x00000000; -SDRAM[3].EmcW2w = 0x00000000; -SDRAM[3].EmcR2w = 0x00000009; -SDRAM[3].EmcW2r = 0x0000000d; -SDRAM[3].EmcR2p = 0x00000004; -SDRAM[3].EmcW2p = 0x00000013; -SDRAM[3].EmcRdRcd = 0x0000000a; -SDRAM[3].EmcWrRcd = 0x0000000a; -SDRAM[3].EmcRrd = 0x00000003; -SDRAM[3].EmcRext = 0x00000001; -SDRAM[3].EmcWext = 0x00000000; -SDRAM[3].EmcWdv = 0x00000006; -SDRAM[3].EmcWdvMask = 0x00000006; -SDRAM[3].EmcQUse = 0x0000000b; -SDRAM[3].EmcIbdly = 0x0000000b; -SDRAM[3].EmcEInput = 0x00000008; -SDRAM[3].EmcEInputDuration = 0x00000006; -SDRAM[3].EmcPutermExtra = 0x000d000a; -SDRAM[3].EmcCdbCntl1 = 0x00000000; -SDRAM[3].EmcCdbCntl2 = 0x00000000; -SDRAM[3].EmcQRst = 0x00000008; -SDRAM[3].EmcQSafe = 0x0000000d; -SDRAM[3].EmcRdv = 0x00000014; -SDRAM[3].EmcRdvMask = 0x00000014; -SDRAM[3].EmcCtt = 0x00000000; -SDRAM[3].EmcCttDuration = 0x00000000; -SDRAM[3].EmcRefresh = 0x000017e4; -SDRAM[3].EmcBurstRefreshNum = 0x00000000; -SDRAM[3].EmcPreRefreshReqCnt = 0x000005f9; -SDRAM[3].EmcPdEx2Wr = 0x00000003; -SDRAM[3].EmcPdEx2Rd = 0x00000012; -SDRAM[3].EmcPChg2Pden = 0x00000001; -SDRAM[3].EmcAct2Pden = 0x00000000; -SDRAM[3].EmcAr2Pden = 0x000000c6; -SDRAM[3].EmcRw2Pden = 0x00000018; -SDRAM[3].EmcTxsr = 0x000000d6; -SDRAM[3].EmcTxsrDll = 0x00000200; -SDRAM[3].EmcTcke = 0x00000005; -SDRAM[3].EmcTckesr = 0x00000005; -SDRAM[3].EmcTpd = 0x00000005; -SDRAM[3].EmcTfaw = 0x00000020; -SDRAM[3].EmcTrpab = 0x00000000; -SDRAM[3].EmcTClkStable = 0x00000007; -SDRAM[3].EmcTClkStop = 0x00000008; -SDRAM[3].EmcTRefBw = 0x00001825; -SDRAM[3].EmcQUseExtra = 0x0000000a; -SDRAM[3].EmcFbioCfg5 = 0x0000ba88; -SDRAM[3].EmcFbioCfg6 = 0x00000006; -SDRAM[3].EmcFbioSpare = 0x02000000; -SDRAM[3].EmcCfgRsv = 0xff00ff00; -SDRAM[3].EmcMrs = 0x80000d71; -SDRAM[3].EmcEmrs = 0x80100002; -SDRAM[3].EmcEmrs2 = 0x80200418; -SDRAM[3].EmcEmrs3 = 0x80300000; -SDRAM[3].EmcMrw1 = 0x00000000; -SDRAM[3].EmcMrw2 = 0x00000000; -SDRAM[3].EmcMrw3 = 0x00000000; -SDRAM[3].EmcMrw4 = 0x00000000; -SDRAM[3].EmcMrwExtra = 0x00000000; -SDRAM[3].EmcWarmBootMrwExtra = 0x00000000; -SDRAM[3].EmcWarmBootExtraModeRegWriteEnable = 0x00000000; -SDRAM[3].EmcExtraModeRegWriteEnable = 0x00000000; -SDRAM[3].EmcMrwResetCommand = 0x00000000; -SDRAM[3].EmcMrwResetNInitWait = 0x00000000; -SDRAM[3].EmcMrsWaitCnt = 0x00f8000f; -SDRAM[3].EmcMrsWaitCnt2 = 0x00f8000f; -SDRAM[3].EmcCfg = 0x53200000; -SDRAM[3].EmcCfg2 = 0x008008c1; -SDRAM[3].EmcDbg = 0x01000400; -SDRAM[3].EmcCmdQ = 0x10004408; -SDRAM[3].EmcMc2EmcQ = 0x06000404; -SDRAM[3].EmcDynSelfRefControl = 0x80003018; -SDRAM[3].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; -SDRAM[3].EmcCfgDigDll = 0xf0070191; -SDRAM[3].EmcCfgDigDllPeriod = 0x00008000; -SDRAM[3].EmcDevSelect = 0x00000002; -SDRAM[3].EmcSelDpdCtrl = 0x00040000; -SDRAM[3].EmcDllXformDqs0 = 0x00000008; -SDRAM[3].EmcDllXformDqs1 = 0x00000008; -SDRAM[3].EmcDllXformDqs2 = 0x00000008; -SDRAM[3].EmcDllXformDqs3 = 0x00000008; -SDRAM[3].EmcDllXformDqs4 = 0x00000008; -SDRAM[3].EmcDllXformDqs5 = 0x00000008; -SDRAM[3].EmcDllXformDqs6 = 0x00000008; -SDRAM[3].EmcDllXformDqs7 = 0x00000008; -SDRAM[3].EmcDllXformQUse0 = 0x00000000; -SDRAM[3].EmcDllXformQUse1 = 0x00000000; -SDRAM[3].EmcDllXformQUse2 = 0x00000000; -SDRAM[3].EmcDllXformQUse3 = 0x00000000; -SDRAM[3].EmcDllXformQUse4 = 0x00000000; -SDRAM[3].EmcDllXformQUse5 = 0x00000000; -SDRAM[3].EmcDllXformQUse6 = 0x00000000; -SDRAM[3].EmcDllXformQUse7 = 0x00000000; -SDRAM[3].EmcDllXformAddr0 = 0x00000008; -SDRAM[3].EmcDllXformAddr1 = 0x00000000; -SDRAM[3].EmcDllXformAddr2 = 0x00000000; -SDRAM[3].EmcDliTrimTxDqs0 = 0x00000000; -SDRAM[3].EmcDliTrimTxDqs1 = 0x00000000; -SDRAM[3].EmcDliTrimTxDqs2 = 0x00000000; -SDRAM[3].EmcDliTrimTxDqs3 = 0x00000000; -SDRAM[3].EmcDliTrimTxDqs4 = 0x00000000; -SDRAM[3].EmcDliTrimTxDqs5 = 0x00000000; -SDRAM[3].EmcDliTrimTxDqs6 = 0x00000000; -SDRAM[3].EmcDliTrimTxDqs7 = 0x00000000; -SDRAM[3].EmcDllXformDq0 = 0x0000000A; -SDRAM[3].EmcDllXformDq1 = 0x0000000A; -SDRAM[3].EmcDllXformDq2 = 0x0000000A; -SDRAM[3].EmcDllXformDq3 = 0x0000000A; -SDRAM[3].WarmBootWait = 0x00000002; -SDRAM[3].EmcCttTermCtrl = 0x00000802; -SDRAM[3].EmcOdtWrite = 0x80000020; -SDRAM[3].EmcOdtRead = 0x00000000; -SDRAM[3].EmcZcalInterval = 0x00020000; -SDRAM[3].EmcZcalWaitCnt = 0x00000042; -SDRAM[3].EmcZcalMrwCmd = 0x80000000; -SDRAM[3].EmcMrsResetDll = 0x00000000; -SDRAM[3].EmcZcalInitDev0 = 0x80000011; -SDRAM[3].EmcZcalInitDev1 = 0x00000000; -SDRAM[3].EmcZcalInitWait = 0x00000001; -SDRAM[3].EmcZcalWarmColdBootEnables = 0x00000003; -SDRAM[3].EmcMrwLpddr2ZcalWarmBoot = 0x000a00ab; -SDRAM[3].EmcZqCalDdr3WarmBoot = 0x00000011; -SDRAM[3].EmcZcalWarmBootWait = 0x00000001; -SDRAM[3].EmcMrsWarmBootEnable = 0x00000001; -SDRAM[3].EmcMrsResetDllWait = 0x00000000; -SDRAM[3].EmcMrsExtra = 0x80000d05; -SDRAM[3].EmcWarmBootMrsExtra = 0x80100002; -SDRAM[3].EmcEmrsDdr2DllEnable = 0x00000000; -SDRAM[3].EmcMrsDdr2DllReset = 0x00000000; -SDRAM[3].EmcEmrsDdr2OcdCalib = 0x00000000; -SDRAM[3].EmcDdr2Wait = 0x00000000; -SDRAM[3].EmcClkenOverride = 0x00000000; -SDRAM[3].EmcExtraRefreshNum = 0x00000002; -SDRAM[3].EmcClkenOverrideAllWarmBoot = 0x00000000; -SDRAM[3].McClkenOverrideAllWarmBoot = 0x00000000; -SDRAM[3].EmcCfgDigDllPeriodWarmBoot = 0x00000003; -SDRAM[3].PmcVddpSel = 0x00000002; -SDRAM[3].PmcDdrPwr = 0x00000003; -SDRAM[3].PmcDdrCfg = 0x00000092; -SDRAM[3].PmcIoDpdReq = 0x80800000; -SDRAM[3].PmcIoDpd2Req = 0x00000000; -SDRAM[3].PmcRegShort = 0x00000000; -SDRAM[3].PmcENoVttGen = 0x00000000; -SDRAM[3].PmcNoIoPower = 0x00000000; -SDRAM[3].EmcXm2CmdPadCtrl = 0x001112a0; -SDRAM[3].EmcXm2CmdPadCtrl2 = 0x770c0000; -SDRAM[3].EmcXm2CmdPadCtrl3 = 0x050c0000; -SDRAM[3].EmcXm2CmdPadCtrl4 = 0x00000000; -SDRAM[3].EmcXm2DqsPadCtrl = 0x770c1414; -SDRAM[3].EmcXm2DqsPadCtrl2 = 0x0000013d; -SDRAM[3].EmcXm2DqsPadCtrl3 = 0x10410400; -SDRAM[3].EmcXm2DqsPadCtrl4 = 0x00249249; -SDRAM[3].EmcXm2DqPadCtrl = 0x770c2990; -SDRAM[3].EmcXm2DqPadCtrl2 = 0x00000000; -SDRAM[3].EmcXm2ClkPadCtrl = 0x77ffc085; -SDRAM[3].EmcXm2ClkPadCtrl2 = 0x00000b0b; -SDRAM[3].EmcXm2CompPadCtrl = 0x81f1f508; -SDRAM[3].EmcXm2VttGenPadCtrl = 0x07076604; -SDRAM[3].EmcXm2VttGenPadCtrl2 = 0x00000000; -SDRAM[3].EmcAcpdControl = 0x00000000; -SDRAM[3].EmcSwizzleRank0ByteCfg = 0x00000087; -SDRAM[3].EmcSwizzleRank0Byte0 = 0x53614207; -SDRAM[3].EmcSwizzleRank0Byte1 = 0x26043715; -SDRAM[3].EmcSwizzleRank0Byte2 = 0x40517236; -SDRAM[3].EmcSwizzleRank0Byte3 = 0x45370612; -SDRAM[3].EmcSwizzleRank1ByteCfg = 0x00000087; -SDRAM[3].EmcSwizzleRank1Byte0 = 0x53614207; -SDRAM[3].EmcSwizzleRank1Byte1 = 0x26043715; -SDRAM[3].EmcSwizzleRank1Byte2 = 0x40517236; -SDRAM[3].EmcSwizzleRank1Byte3 = 0x45370612; -SDRAM[3].EmcAddrSwizzleStack1a = 0x0396071a; -SDRAM[3].EmcAddrSwizzleStack1b = 0x000425b8; -SDRAM[3].EmcAddrSwizzleStack2a = 0x07412306; -SDRAM[3].EmcAddrSwizzleStack2b = 0x00000598; -SDRAM[3].EmcAddrSwizzleStack3 = 0x00534012; -SDRAM[3].EmcDsrVttgenDrv = 0x0000003f; -SDRAM[3].EmcTxdsrvttgen = 0x00000000; -SDRAM[3].McEmemAdrCfg = 0x00000000; -SDRAM[3].McEmemAdrCfgDev0 = 0x00080303; -SDRAM[3].McEmemAdrCfgDev1 = 0x00080303; -SDRAM[3].McEmemAdrCfgChannelMask = 0x00000640; -SDRAM[3].McEmemAdrCfgChannelMaskPropagationCount = 0x00000008; -SDRAM[3].McEmemAdrCfgBankMask0 = 0x69248003; -SDRAM[3].McEmemAdrCfgBankMask1 = 0x24928000; -SDRAM[3].McEmemAdrCfgBankMask2 = 0x92c94c00; -SDRAM[3].McEmemCfg = 0x00000800; -SDRAM[3].McEmemArbCfg = 0x0e00000b; -SDRAM[3].McEmemArbOutstandingReq = 0x80000190; -SDRAM[3].McEmemArbTimingRcd = 0x00000004; -SDRAM[3].McEmemArbTimingRp = 0x00000005; -SDRAM[3].McEmemArbTimingRc = 0x00000013; -SDRAM[3].McEmemArbTimingRas = 0x0000000c; -SDRAM[3].McEmemArbTimingFaw = 0x0000000f; -SDRAM[3].McEmemArbTimingRrd = 0x00000002; -SDRAM[3].McEmemArbTimingRap2Pre = 0x00000003; -SDRAM[3].McEmemArbTimingWap2Pre = 0x0000000c; -SDRAM[3].McEmemArbTimingR2R = 0x00000002; -SDRAM[3].McEmemArbTimingW2W = 0x00000002; -SDRAM[3].McEmemArbTimingR2W = 0x00000006; -SDRAM[3].McEmemArbTimingW2R = 0x00000008; -SDRAM[3].McEmemArbDaTurns = 0x08060202; -SDRAM[3].McEmemArbDaCovers = 0x00170e13; -SDRAM[3].McEmemArbMisc0 = 0x734c2414; -SDRAM[3].McEmemArbMisc1 = 0x78000000; -SDRAM[3].McEmemArbRing1Throttle = 0x001f0000; -SDRAM[3].McEmemArbOverride = 0x00000083; -SDRAM[3].McEmemArbRsv = 0xff00ff00; -SDRAM[3].McClkenOverride = 0x00000000; -SDRAM[3].McEmcRegMode = 0x00000002; -SDRAM[3].McVideoProtectBom = 0xfff00000; -SDRAM[3].McVideoProtectSizeMb = 0x00000000; -SDRAM[3].McVideoProtectVprOverride = 0x009a4752; -SDRAM[3].McSecCarveoutBom = 0xfff00000; -SDRAM[3].McSecCarveoutSizeMb = 0x00000000; -SDRAM[3].McVideoProtectWriteAccess = 0x00000000; -SDRAM[3].McSecCarveoutProtectWriteAccess = 0x00000000; -SDRAM[3].EmcCaTrainingEnable = 0x00000000; -SDRAM[3].EmcCaTrainingTimingCntl1 = 0x1f7df7df; -SDRAM[3].EmcCaTrainingTimingCntl2 = 0x0000001f; -SDRAM[3].SwizzleRankByteEncode = 0x000022aa; -SDRAM[3].BootRomPatchControl = 0x00000000; -SDRAM[3].BootRomPatchData = 0x00000000; -SDRAM[3].Ch1EmcDllXformDqs0 = 0x00000008; -SDRAM[3].Ch1EmcDllXformDqs1 = 0x00000008; -SDRAM[3].Ch1EmcDllXformDqs2 = 0x00000008; -SDRAM[3].Ch1EmcDllXformDqs3 = 0x00000008; -SDRAM[3].Ch1EmcDllXformDqs4 = 0x00000008; -SDRAM[3].Ch1EmcDllXformDqs5 = 0x00000008; -SDRAM[3].Ch1EmcDllXformDqs6 = 0x00000008; -SDRAM[3].Ch1EmcDllXformDqs7 = 0x00000008; -SDRAM[3].Ch1EmcDllXformQUse0 = 0x00000000; -SDRAM[3].Ch1EmcDllXformQUse1 = 0x00000000; -SDRAM[3].Ch1EmcDllXformQUse2 = 0x00000000; -SDRAM[3].Ch1EmcDllXformQUse3 = 0x00000000; -SDRAM[3].Ch1EmcDllXformQUse4 = 0x00000000; -SDRAM[3].Ch1EmcDllXformQUse5 = 0x00000000; -SDRAM[3].Ch1EmcDllXformQUse6 = 0x00000000; -SDRAM[3].Ch1EmcDllXformQUse7 = 0x00000000; -SDRAM[3].Ch1EmcDliTrimTxDqs0 = 0x00000000; -SDRAM[3].Ch1EmcDliTrimTxDqs1 = 0x00000000; -SDRAM[3].Ch1EmcDliTrimTxDqs2 = 0x00000000; -SDRAM[3].Ch1EmcDliTrimTxDqs3 = 0x00000000; -SDRAM[3].Ch1EmcDliTrimTxDqs4 = 0x00000000; -SDRAM[3].Ch1EmcDliTrimTxDqs5 = 0x00000000; -SDRAM[3].Ch1EmcDliTrimTxDqs6 = 0x00000000; -SDRAM[3].Ch1EmcDliTrimTxDqs7 = 0x00000000; -SDRAM[3].Ch1EmcDllXformDq0 = 0x0000000A; -SDRAM[3].Ch1EmcDllXformDq1 = 0x0000000A; -SDRAM[3].Ch1EmcDllXformDq2 = 0x0000000A; -SDRAM[3].Ch1EmcDllXformDq3 = 0x0000000A; -SDRAM[3].Ch1EmcSwizzleRank0ByteCfg = 0x000000d2; -SDRAM[3].Ch1EmcSwizzleRank0Byte0 = 0x51430267; -SDRAM[3].Ch1EmcSwizzleRank0Byte1 = 0x13072465; -SDRAM[3].Ch1EmcSwizzleRank0Byte2 = 0x72605314; -SDRAM[3].Ch1EmcSwizzleRank0Byte3 = 0x54073162; -SDRAM[3].Ch1EmcSwizzleRank1ByteCfg = 0x000000d2; -SDRAM[3].Ch1EmcSwizzleRank1Byte0 = 0x51430267; -SDRAM[3].Ch1EmcSwizzleRank1Byte1 = 0x13072465; -SDRAM[3].Ch1EmcSwizzleRank1Byte2 = 0x72605314; -SDRAM[3].Ch1EmcSwizzleRank1Byte3 = 0x54073162; -SDRAM[3].Ch1EmcAddrSwizzleStack1a = 0x79320a61; -SDRAM[3].Ch1EmcAddrSwizzleStack1b = 0x000b8450; -SDRAM[3].Ch1EmcAddrSwizzleStack2a = 0x07623014; -SDRAM[3].Ch1EmcAddrSwizzleStack2b = 0x00000589; -SDRAM[3].Ch1EmcAddrSwizzleStack3 = 0x00530124; -SDRAM[3].Ch1EmcAutoCalConfig = 0xa8f10f0f; -SDRAM[3].Ch1EmcAutoCalConfig2 = 0x00000000; -SDRAM[3].Ch1EmcAutoCalConfig3 = 0x00000000; -SDRAM[3].Ch1EmcCdbCntl1 = 0x00000000; -SDRAM[3].Ch1EmcDllXformAddr0 = 0x00000008; -SDRAM[3].Ch1EmcDllXformAddr1 = 0x00000000; -SDRAM[3].Ch1EmcDllXformAddr2 = 0x00000000; -SDRAM[3].Ch1EmcFbioSpare = 0x02000000; -SDRAM[3].Ch1EmcXm2ClkPadCtrl = 0x77ffc085; -SDRAM[3].Ch1EmcXm2ClkPadCtrl2 = 0x00000b0b; -SDRAM[3].Ch1EmcXm2CmdPadCtrl2 = 0x770c0000; -SDRAM[3].Ch1EmcXm2CmdPadCtrl3 = 0x050c0000; -SDRAM[3].Ch1EmcXm2CmdPadCtrl4 = 0x00000000; -SDRAM[3].Ch1EmcXm2DqPadCtrl = 0x770c2990; -SDRAM[3].Ch1EmcXm2DqPadCtrl2 = 0x00000000; -SDRAM[3].Ch1EmcXm2DqsPadCtrl = 0x770c1515; -SDRAM[3].Ch1EmcXm2DqsPadCtrl3 = 0x10410400; -SDRAM[3].Ch1EmcXm2DqsPadCtrl4 = 0x00249249; diff --git a/dalmore/E1611_Hynix_2GB_H5TC4G63AFR-RDA_792Mhz_r403_v2.bct.cfg b/dalmore/E1611_Hynix_2GB_H5TC4G63AFR-RDA_792Mhz_r403_v2.bct.cfg deleted file mode 100644 index 3127181..0000000 --- a/dalmore/E1611_Hynix_2GB_H5TC4G63AFR-RDA_792Mhz_r403_v2.bct.cfg +++ /dev/null @@ -1,1273 +0,0 @@ -# Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. -# -# This software is provided 'as-is', without any express or implied -# warranty. In no event will the authors be held liable for any damages -# arising from the use of this software. -# -# Permission is granted to anyone to use this software for any purpose, -# including commercial applications, and to alter it and redistribute it -# freely, subject to the following restrictions: -# -# 1. The origin of this software must not be misrepresented; you must not -# claim that you wrote the original software. If you use this software -# in a product, an acknowledgment in the product documentation would be -# appreciated but is not required. -# 2. Altered source versions must be plainly marked as such, and must not be -# misrepresented as being the original software. -# 3. This notice may not be removed or altered from any source distribution. - -Version = 0x00350001; -BlockSize = 0x00004000; -PageSize = 0x00000200; -PartitionSize = 0x01000000; -OdmData = 0x800d8000; - -DevType[0] = NvBootDevType_Sdmmc; -DeviceParam[0].SdmmcParams.ClockDivider = 0x00000009; -DeviceParam[0].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_8Bit; -DeviceParam[0].SdmmcParams.MaxPowerClassSupported = 0x00000000; -DeviceParam[0].SdmmcParams.MultiPageSupport = 0x00000000; - -SDRAM[0].MemoryType = NvBootMemoryType_Ddr3; -SDRAM[0].PllMInputDivider = 0x00000001; -SDRAM[0].PllMFeedbackDivider = 0x00000042; -SDRAM[0].PllMStableTime = 0x0000012c; -SDRAM[0].PllMSetupControl = 0x00000000; -SDRAM[0].PllMSelectDiv2 = 0x00000000; -SDRAM[0].PllMPDLshiftPh45 = 0x00000000; -SDRAM[0].PllMPDLshiftPh90 = 0x00000000; -SDRAM[0].PllMPDLshiftPh135 = 0x00000000; -SDRAM[0].PllMKCP = 0x00000000; -SDRAM[0].PllMKVCO = 0x00000000; -SDRAM[0].EmcBctSpare0 = 0x00000bad; -SDRAM[0].EmcClockSource = 0x80000000; -SDRAM[0].EmcAutoCalInterval = 0x001fffff; -SDRAM[0].EmcAutoCalConfig = 0xa0f10f0f; -SDRAM[0].EmcAutoCalConfig2 = 0x00000000; -SDRAM[0].EmcAutoCalConfig3 = 0x00000000; -SDRAM[0].EmcAutoCalWait = 0x00000064; -SDRAM[0].EmcAdrCfg = 0x00000000; -SDRAM[0].EmcPinProgramWait = 0x00000001; -SDRAM[0].EmcPinExtraWait = 0x00000000; -SDRAM[0].EmcTimingControlWait = 0x00000001; -SDRAM[0].EmcRc = 0x00000024; -SDRAM[0].EmcRfc = 0x000000cd; -SDRAM[0].EmcRfcSlr = 0x00000000; -SDRAM[0].EmcRas = 0x00000019; -SDRAM[0].EmcRp = 0x0000000a; -SDRAM[0].EmcR2r = 0x00000000; -SDRAM[0].EmcW2w = 0x00000000; -SDRAM[0].EmcR2w = 0x00000009; -SDRAM[0].EmcW2r = 0x0000000d; -SDRAM[0].EmcR2p = 0x00000004; -SDRAM[0].EmcW2p = 0x00000013; -SDRAM[0].EmcRdRcd = 0x0000000a; -SDRAM[0].EmcWrRcd = 0x0000000a; -SDRAM[0].EmcRrd = 0x00000003; -SDRAM[0].EmcRext = 0x00000001; -SDRAM[0].EmcWext = 0x00000000; -SDRAM[0].EmcWdv = 0x00000006; -SDRAM[0].EmcWdvMask = 0x00000006; -SDRAM[0].EmcQUse = 0x0000000b; -SDRAM[0].EmcIbdly = 0x0000000b; -SDRAM[0].EmcEInput = 0x00000008; -SDRAM[0].EmcEInputDuration = 0x00000006; -SDRAM[0].EmcPutermExtra = 0x000d000a; -SDRAM[0].EmcCdbCntl1 = 0x00000000; -SDRAM[0].EmcCdbCntl2 = 0x00000000; -SDRAM[0].EmcQRst = 0x00000008; -SDRAM[0].EmcQSafe = 0x0000000d; -SDRAM[0].EmcRdv = 0x00000014; -SDRAM[0].EmcRdvMask = 0x00000014; -SDRAM[0].EmcCtt = 0x00000000; -SDRAM[0].EmcCttDuration = 0x00000000; -SDRAM[0].EmcRefresh = 0x000017e4; -SDRAM[0].EmcBurstRefreshNum = 0x00000000; -SDRAM[0].EmcPreRefreshReqCnt = 0x000005f9; -SDRAM[0].EmcPdEx2Wr = 0x00000003; -SDRAM[0].EmcPdEx2Rd = 0x00000012; -SDRAM[0].EmcPChg2Pden = 0x00000001; -SDRAM[0].EmcAct2Pden = 0x00000000; -SDRAM[0].EmcAr2Pden = 0x000000c6; -SDRAM[0].EmcRw2Pden = 0x00000018; -SDRAM[0].EmcTxsr = 0x000000d6; -SDRAM[0].EmcTxsrDll = 0x00000200; -SDRAM[0].EmcTcke = 0x00000005; -SDRAM[0].EmcTckesr = 0x00000005; -SDRAM[0].EmcTpd = 0x00000005; -SDRAM[0].EmcTfaw = 0x00000020; -SDRAM[0].EmcTrpab = 0x00000000; -SDRAM[0].EmcTClkStable = 0x00000007; -SDRAM[0].EmcTClkStop = 0x00000008; -SDRAM[0].EmcTRefBw = 0x00001825; -SDRAM[0].EmcQUseExtra = 0x0000000a; -SDRAM[0].EmcFbioCfg5 = 0x0000ba88; -SDRAM[0].EmcFbioCfg6 = 0x00000006; -SDRAM[0].EmcFbioSpare = 0x02000000; -SDRAM[0].EmcCfgRsv = 0xff00ff00; -SDRAM[0].EmcMrs = 0x80000d71; -SDRAM[0].EmcEmrs = 0x80100002; -SDRAM[0].EmcEmrs2 = 0x80200218; -SDRAM[0].EmcEmrs3 = 0x80300000; -SDRAM[0].EmcMrw1 = 0x00000000; -SDRAM[0].EmcMrw2 = 0x00000000; -SDRAM[0].EmcMrw3 = 0x00000000; -SDRAM[0].EmcMrw4 = 0x00000000; -SDRAM[0].EmcMrwExtra = 0x00000000; -SDRAM[0].EmcWarmBootMrwExtra = 0x00000000; -SDRAM[0].EmcWarmBootExtraModeRegWriteEnable = 0x00000000; -SDRAM[0].EmcExtraModeRegWriteEnable = 0x00000000; -SDRAM[0].EmcMrwResetCommand = 0x00000000; -SDRAM[0].EmcMrwResetNInitWait = 0x00000000; -SDRAM[0].EmcMrsWaitCnt = 0x00f8000f; -SDRAM[0].EmcMrsWaitCnt2 = 0x00f8000f; -SDRAM[0].EmcCfg = 0x73000000; -SDRAM[0].EmcCfg2 = 0x008008c1; -SDRAM[0].EmcDbg = 0x01000400; -SDRAM[0].EmcCmdQ = 0x10004408; -SDRAM[0].EmcMc2EmcQ = 0x06000404; -SDRAM[0].EmcDynSelfRefControl = 0x80003018; -SDRAM[0].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; -SDRAM[0].EmcCfgDigDll = 0xf0070191; -SDRAM[0].EmcCfgDigDllPeriod = 0x00008000; -SDRAM[0].EmcDevSelect = 0x00000002; -SDRAM[0].EmcSelDpdCtrl = 0x00040000; -SDRAM[0].EmcDllXformDqs0 = 0x0000000A; -SDRAM[0].EmcDllXformDqs1 = 0x0000000A; -SDRAM[0].EmcDllXformDqs2 = 0x0000000A; -SDRAM[0].EmcDllXformDqs3 = 0x0000000A; -SDRAM[0].EmcDllXformDqs4 = 0x0000000A; -SDRAM[0].EmcDllXformDqs5 = 0x0000000A; -SDRAM[0].EmcDllXformDqs6 = 0x0000000A; -SDRAM[0].EmcDllXformDqs7 = 0x0000000A; -SDRAM[0].EmcDllXformQUse0 = 0x00000000; -SDRAM[0].EmcDllXformQUse1 = 0x00000000; -SDRAM[0].EmcDllXformQUse2 = 0x00000000; -SDRAM[0].EmcDllXformQUse3 = 0x00000000; -SDRAM[0].EmcDllXformQUse4 = 0x00000000; -SDRAM[0].EmcDllXformQUse5 = 0x00000000; -SDRAM[0].EmcDllXformQUse6 = 0x00000000; -SDRAM[0].EmcDllXformQUse7 = 0x00000000; -SDRAM[0].EmcDllXformAddr0 = 0x0000000D; -SDRAM[0].EmcDllXformAddr1 = 0x0000000D; -SDRAM[0].EmcDllXformAddr2 = 0x0000000D; -SDRAM[0].EmcDliTrimTxDqs0 = 0x00000000; -SDRAM[0].EmcDliTrimTxDqs1 = 0x00000000; -SDRAM[0].EmcDliTrimTxDqs2 = 0x00000000; -SDRAM[0].EmcDliTrimTxDqs3 = 0x00000000; -SDRAM[0].EmcDliTrimTxDqs4 = 0x00000000; -SDRAM[0].EmcDliTrimTxDqs5 = 0x00000000; -SDRAM[0].EmcDliTrimTxDqs6 = 0x00000000; -SDRAM[0].EmcDliTrimTxDqs7 = 0x00000000; -SDRAM[0].EmcDllXformDq0 = 0x0000000A; -SDRAM[0].EmcDllXformDq1 = 0x0000000A; -SDRAM[0].EmcDllXformDq2 = 0x0000000A; -SDRAM[0].EmcDllXformDq3 = 0x0000000A; -SDRAM[0].WarmBootWait = 0x00000002; -SDRAM[0].EmcCttTermCtrl = 0x00000802; -SDRAM[0].EmcOdtWrite = 0x80000020; -SDRAM[0].EmcOdtRead = 0x00000000; -SDRAM[0].EmcZcalInterval = 0x00020000; -SDRAM[0].EmcZcalWaitCnt = 0x00000042; -SDRAM[0].EmcZcalMrwCmd = 0x80000000; -SDRAM[0].EmcMrsResetDll = 0x00000000; -SDRAM[0].EmcZcalInitDev0 = 0x80000011; -SDRAM[0].EmcZcalInitDev1 = 0x00000000; -SDRAM[0].EmcZcalInitWait = 0x00000001; -SDRAM[0].EmcZcalWarmColdBootEnables = 0x00000003; -SDRAM[0].EmcMrwLpddr2ZcalWarmBoot = 0x000a00ab; -SDRAM[0].EmcZqCalDdr3WarmBoot = 0x00000011; -SDRAM[0].EmcZcalWarmBootWait = 0x00000001; -SDRAM[0].EmcMrsWarmBootEnable = 0x00000001; -SDRAM[0].EmcMrsResetDllWait = 0x00000000; -SDRAM[0].EmcMrsExtra = 0x80000d05; -SDRAM[0].EmcWarmBootMrsExtra = 0x80100002; -SDRAM[0].EmcEmrsDdr2DllEnable = 0x00000000; -SDRAM[0].EmcMrsDdr2DllReset = 0x00000000; -SDRAM[0].EmcEmrsDdr2OcdCalib = 0x00000000; -SDRAM[0].EmcDdr2Wait = 0x00000000; -SDRAM[0].EmcClkenOverride = 0x00000000; -SDRAM[0].EmcExtraRefreshNum = 0x00000002; -SDRAM[0].EmcClkenOverrideAllWarmBoot = 0x00000000; -SDRAM[0].McClkenOverrideAllWarmBoot = 0x00000000; -SDRAM[0].EmcCfgDigDllPeriodWarmBoot = 0x00000003; -SDRAM[0].PmcVddpSel = 0x00000002; -SDRAM[0].PmcDdrPwr = 0x00000003; -SDRAM[0].PmcDdrCfg = 0x00000092; -SDRAM[0].PmcIoDpdReq = 0x80800000; -SDRAM[0].PmcIoDpd2Req = 0x00000000; -SDRAM[0].PmcRegShort = 0x00000000; -SDRAM[0].PmcENoVttGen = 0x00000000; -SDRAM[0].PmcNoIoPower = 0x00000000; -SDRAM[0].EmcXm2CmdPadCtrl = 0x001112a0; -SDRAM[0].EmcXm2CmdPadCtrl2 = 0x770c0000; -SDRAM[0].EmcXm2CmdPadCtrl3 = 0x050c0000; -SDRAM[0].EmcXm2CmdPadCtrl4 = 0x00000000; -SDRAM[0].EmcXm2DqsPadCtrl = 0x770c1414; -SDRAM[0].EmcXm2DqsPadCtrl2 = 0x0000013d; -SDRAM[0].EmcXm2DqsPadCtrl3 = 0x10410400; -SDRAM[0].EmcXm2DqsPadCtrl4 = 0x00249249; -SDRAM[0].EmcXm2DqPadCtrl = 0x770c2990; -SDRAM[0].EmcXm2DqPadCtrl2 = 0x00000000; -SDRAM[0].EmcXm2ClkPadCtrl = 0x77ffc084; -SDRAM[0].EmcXm2ClkPadCtrl2 = 0x00000b0b; -SDRAM[0].EmcXm2CompPadCtrl = 0x81f1f508; -SDRAM[0].EmcXm2VttGenPadCtrl = 0x07077704; -SDRAM[0].EmcXm2VttGenPadCtrl2 = 0x00000000; -SDRAM[0].EmcAcpdControl = 0x00000000; -SDRAM[0].EmcSwizzleRank0ByteCfg = 0x00000087; -SDRAM[0].EmcSwizzleRank0Byte0 = 0x53614207; -SDRAM[0].EmcSwizzleRank0Byte1 = 0x26043715; -SDRAM[0].EmcSwizzleRank0Byte2 = 0x40517236; -SDRAM[0].EmcSwizzleRank0Byte3 = 0x45370612; -SDRAM[0].EmcSwizzleRank1ByteCfg = 0x00000087; -SDRAM[0].EmcSwizzleRank1Byte0 = 0x53614207; -SDRAM[0].EmcSwizzleRank1Byte1 = 0x26043715; -SDRAM[0].EmcSwizzleRank1Byte2 = 0x40517236; -SDRAM[0].EmcSwizzleRank1Byte3 = 0x45370612; -SDRAM[0].EmcAddrSwizzleStack1a = 0x0396071a; -SDRAM[0].EmcAddrSwizzleStack1b = 0x000425b8; -SDRAM[0].EmcAddrSwizzleStack2a = 0x07412306; -SDRAM[0].EmcAddrSwizzleStack2b = 0x00000598; -SDRAM[0].EmcAddrSwizzleStack3 = 0x00534012; -SDRAM[0].EmcDsrVttgenDrv = 0x0000003f; -SDRAM[0].EmcTxdsrvttgen = 0x00000000; -SDRAM[0].McEmemAdrCfg = 0x00000000; -SDRAM[0].McEmemAdrCfgDev0 = 0x00080303; -SDRAM[0].McEmemAdrCfgDev1 = 0x00080303; -SDRAM[0].McEmemAdrCfgChannelMask = 0x00000640; -SDRAM[0].McEmemAdrCfgChannelMaskPropagationCount = 0x00000008; -SDRAM[0].McEmemAdrCfgBankMask0 = 0x69248003; -SDRAM[0].McEmemAdrCfgBankMask1 = 0x24928000; -SDRAM[0].McEmemAdrCfgBankMask2 = 0x92c94c00; -SDRAM[0].McEmemCfg = 0x00000800; -SDRAM[0].McEmemArbCfg = 0x0e00000b; -SDRAM[0].McEmemArbOutstandingReq = 0x80000190; -SDRAM[0].McEmemArbTimingRcd = 0x00000004; -SDRAM[0].McEmemArbTimingRp = 0x00000005; -SDRAM[0].McEmemArbTimingRc = 0x00000013; -SDRAM[0].McEmemArbTimingRas = 0x0000000c; -SDRAM[0].McEmemArbTimingFaw = 0x0000000f; -SDRAM[0].McEmemArbTimingRrd = 0x00000002; -SDRAM[0].McEmemArbTimingRap2Pre = 0x00000003; -SDRAM[0].McEmemArbTimingWap2Pre = 0x0000000c; -SDRAM[0].McEmemArbTimingR2R = 0x00000002; -SDRAM[0].McEmemArbTimingW2W = 0x00000002; -SDRAM[0].McEmemArbTimingR2W = 0x00000006; -SDRAM[0].McEmemArbTimingW2R = 0x00000008; -SDRAM[0].McEmemArbDaTurns = 0x08060202; -SDRAM[0].McEmemArbDaCovers = 0x00170e13; -SDRAM[0].McEmemArbMisc0 = 0x734c2414; -SDRAM[0].McEmemArbMisc1 = 0x78000000; -SDRAM[0].McEmemArbRing1Throttle = 0x001f0000; -SDRAM[0].McEmemArbOverride = 0x00000083; -SDRAM[0].McEmemArbRsv = 0xff00ff00; -SDRAM[0].McClkenOverride = 0x00000000; -SDRAM[0].McEmcRegMode = 0x00000002; -SDRAM[0].McVideoProtectBom = 0xfff00000; -SDRAM[0].McVideoProtectSizeMb = 0x00000000; -SDRAM[0].McVideoProtectVprOverride = 0x009a4752; -SDRAM[0].McSecCarveoutBom = 0xfff00000; -SDRAM[0].McSecCarveoutSizeMb = 0x00000000; -SDRAM[0].McVideoProtectWriteAccess = 0x00000000; -SDRAM[0].McSecCarveoutProtectWriteAccess = 0x00000000; -SDRAM[0].EmcCaTrainingEnable = 0x00000000; -SDRAM[0].EmcCaTrainingTimingCntl1 = 0x1f7df7df; -SDRAM[0].EmcCaTrainingTimingCntl2 = 0x0000001f; -SDRAM[0].SwizzleRankByteEncode = 0x000022aa; -SDRAM[0].BootRomPatchControl = 0x00000000; -SDRAM[0].BootRomPatchData = 0x00000000; -SDRAM[0].Ch1EmcDllXformDqs0 = 0x0000000A; -SDRAM[0].Ch1EmcDllXformDqs1 = 0x0000000A; -SDRAM[0].Ch1EmcDllXformDqs2 = 0x0000000A; -SDRAM[0].Ch1EmcDllXformDqs3 = 0x0000000A; -SDRAM[0].Ch1EmcDllXformDqs4 = 0x0000000A; -SDRAM[0].Ch1EmcDllXformDqs5 = 0x0000000A; -SDRAM[0].Ch1EmcDllXformDqs6 = 0x0000000A; -SDRAM[0].Ch1EmcDllXformDqs7 = 0x0000000A; -SDRAM[0].Ch1EmcDllXformQUse0 = 0x00000000; -SDRAM[0].Ch1EmcDllXformQUse1 = 0x00000000; -SDRAM[0].Ch1EmcDllXformQUse2 = 0x00000000; -SDRAM[0].Ch1EmcDllXformQUse3 = 0x00000000; -SDRAM[0].Ch1EmcDllXformQUse4 = 0x00000000; -SDRAM[0].Ch1EmcDllXformQUse5 = 0x00000000; -SDRAM[0].Ch1EmcDllXformQUse6 = 0x00000000; -SDRAM[0].Ch1EmcDllXformQUse7 = 0x00000000; -SDRAM[0].Ch1EmcDliTrimTxDqs0 = 0x00000000; -SDRAM[0].Ch1EmcDliTrimTxDqs1 = 0x00000000; -SDRAM[0].Ch1EmcDliTrimTxDqs2 = 0x00000000; -SDRAM[0].Ch1EmcDliTrimTxDqs3 = 0x00000000; -SDRAM[0].Ch1EmcDliTrimTxDqs4 = 0x00000000; -SDRAM[0].Ch1EmcDliTrimTxDqs5 = 0x00000000; -SDRAM[0].Ch1EmcDliTrimTxDqs6 = 0x00000000; -SDRAM[0].Ch1EmcDliTrimTxDqs7 = 0x00000000; -SDRAM[0].Ch1EmcDllXformDq0 = 0x0000000A; -SDRAM[0].Ch1EmcDllXformDq1 = 0x0000000A; -SDRAM[0].Ch1EmcDllXformDq2 = 0x0000000A; -SDRAM[0].Ch1EmcDllXformDq3 = 0x0000000A; -SDRAM[0].Ch1EmcSwizzleRank0ByteCfg = 0x000000d2; -SDRAM[0].Ch1EmcSwizzleRank0Byte0 = 0x51430267; -SDRAM[0].Ch1EmcSwizzleRank0Byte1 = 0x13072465; -SDRAM[0].Ch1EmcSwizzleRank0Byte2 = 0x72605314; -SDRAM[0].Ch1EmcSwizzleRank0Byte3 = 0x54073162; -SDRAM[0].Ch1EmcSwizzleRank1ByteCfg = 0x000000d2; -SDRAM[0].Ch1EmcSwizzleRank1Byte0 = 0x51430267; -SDRAM[0].Ch1EmcSwizzleRank1Byte1 = 0x13072465; -SDRAM[0].Ch1EmcSwizzleRank1Byte2 = 0x72605314; -SDRAM[0].Ch1EmcSwizzleRank1Byte3 = 0x54073162; -SDRAM[0].Ch1EmcAddrSwizzleStack1a = 0x79320a61; -SDRAM[0].Ch1EmcAddrSwizzleStack1b = 0x000b8450; -SDRAM[0].Ch1EmcAddrSwizzleStack2a = 0x07623014; -SDRAM[0].Ch1EmcAddrSwizzleStack2b = 0x00000589; -SDRAM[0].Ch1EmcAddrSwizzleStack3 = 0x00530124; -SDRAM[0].Ch1EmcAutoCalConfig = 0xa8f10f0f; -SDRAM[0].Ch1EmcAutoCalConfig2 = 0x00000000; -SDRAM[0].Ch1EmcAutoCalConfig3 = 0x00000000; -SDRAM[0].Ch1EmcCdbCntl1 = 0x00000000; -SDRAM[0].Ch1EmcDllXformAddr0 = 0x0000000D; -SDRAM[0].Ch1EmcDllXformAddr1 = 0x0000000D; -SDRAM[0].Ch1EmcDllXformAddr2 = 0x0000000D; -SDRAM[0].Ch1EmcFbioSpare = 0x02000000; -SDRAM[0].Ch1EmcXm2ClkPadCtrl = 0x77ffc084; -SDRAM[0].Ch1EmcXm2ClkPadCtrl2 = 0x00000b0b; -SDRAM[0].Ch1EmcXm2CmdPadCtrl2 = 0x770c0000; -SDRAM[0].Ch1EmcXm2CmdPadCtrl3 = 0x050c0000; -SDRAM[0].Ch1EmcXm2CmdPadCtrl4 = 0x00000000; -SDRAM[0].Ch1EmcXm2DqPadCtrl = 0x770c2990; -SDRAM[0].Ch1EmcXm2DqPadCtrl2 = 0x00000000; -SDRAM[0].Ch1EmcXm2DqsPadCtrl = 0x770c1515; -SDRAM[0].Ch1EmcXm2DqsPadCtrl3 = 0x10410400; -SDRAM[0].Ch1EmcXm2DqsPadCtrl4 = 0x00249249; - -SDRAM[1].MemoryType = NvBootMemoryType_Ddr3; -SDRAM[1].PllMInputDivider = 0x00000001; -SDRAM[1].PllMFeedbackDivider = 0x00000042; -SDRAM[1].PllMStableTime = 0x0000012c; -SDRAM[1].PllMSetupControl = 0x00000000; -SDRAM[1].PllMSelectDiv2 = 0x00000000; -SDRAM[1].PllMPDLshiftPh45 = 0x00000000; -SDRAM[1].PllMPDLshiftPh90 = 0x00000000; -SDRAM[1].PllMPDLshiftPh135 = 0x00000000; -SDRAM[1].PllMKCP = 0x00000000; -SDRAM[1].PllMKVCO = 0x00000000; -SDRAM[1].EmcBctSpare0 = 0x00000bad; -SDRAM[1].EmcClockSource = 0x80000000; -SDRAM[1].EmcAutoCalInterval = 0x001fffff; -SDRAM[1].EmcAutoCalConfig = 0xa0f10f0f; -SDRAM[1].EmcAutoCalConfig2 = 0x00000000; -SDRAM[1].EmcAutoCalConfig3 = 0x00000000; -SDRAM[1].EmcAutoCalWait = 0x00000064; -SDRAM[1].EmcAdrCfg = 0x00000000; -SDRAM[1].EmcPinProgramWait = 0x00000001; -SDRAM[1].EmcPinExtraWait = 0x00000000; -SDRAM[1].EmcTimingControlWait = 0x00000001; -SDRAM[1].EmcRc = 0x00000024; -SDRAM[1].EmcRfc = 0x000000cd; -SDRAM[1].EmcRfcSlr = 0x00000000; -SDRAM[1].EmcRas = 0x00000019; -SDRAM[1].EmcRp = 0x0000000a; -SDRAM[1].EmcR2r = 0x00000000; -SDRAM[1].EmcW2w = 0x00000000; -SDRAM[1].EmcR2w = 0x00000009; -SDRAM[1].EmcW2r = 0x0000000d; -SDRAM[1].EmcR2p = 0x00000004; -SDRAM[1].EmcW2p = 0x00000013; -SDRAM[1].EmcRdRcd = 0x0000000a; -SDRAM[1].EmcWrRcd = 0x0000000a; -SDRAM[1].EmcRrd = 0x00000003; -SDRAM[1].EmcRext = 0x00000001; -SDRAM[1].EmcWext = 0x00000000; -SDRAM[1].EmcWdv = 0x00000006; -SDRAM[1].EmcWdvMask = 0x00000006; -SDRAM[1].EmcQUse = 0x0000000b; -SDRAM[1].EmcIbdly = 0x0000000b; -SDRAM[1].EmcEInput = 0x00000008; -SDRAM[1].EmcEInputDuration = 0x00000006; -SDRAM[1].EmcPutermExtra = 0x000d000a; -SDRAM[1].EmcCdbCntl1 = 0x00000000; -SDRAM[1].EmcCdbCntl2 = 0x00000000; -SDRAM[1].EmcQRst = 0x00000008; -SDRAM[1].EmcQSafe = 0x0000000d; -SDRAM[1].EmcRdv = 0x00000014; -SDRAM[1].EmcRdvMask = 0x00000014; -SDRAM[1].EmcCtt = 0x00000000; -SDRAM[1].EmcCttDuration = 0x00000000; -SDRAM[1].EmcRefresh = 0x000017e4; -SDRAM[1].EmcBurstRefreshNum = 0x00000000; -SDRAM[1].EmcPreRefreshReqCnt = 0x000005f9; -SDRAM[1].EmcPdEx2Wr = 0x00000003; -SDRAM[1].EmcPdEx2Rd = 0x00000012; -SDRAM[1].EmcPChg2Pden = 0x00000001; -SDRAM[1].EmcAct2Pden = 0x00000000; -SDRAM[1].EmcAr2Pden = 0x000000c6; -SDRAM[1].EmcRw2Pden = 0x00000018; -SDRAM[1].EmcTxsr = 0x000000d6; -SDRAM[1].EmcTxsrDll = 0x00000200; -SDRAM[1].EmcTcke = 0x00000005; -SDRAM[1].EmcTckesr = 0x00000005; -SDRAM[1].EmcTpd = 0x00000005; -SDRAM[1].EmcTfaw = 0x00000020; -SDRAM[1].EmcTrpab = 0x00000000; -SDRAM[1].EmcTClkStable = 0x00000007; -SDRAM[1].EmcTClkStop = 0x00000008; -SDRAM[1].EmcTRefBw = 0x00001825; -SDRAM[1].EmcQUseExtra = 0x0000000a; -SDRAM[1].EmcFbioCfg5 = 0x0000ba88; -SDRAM[1].EmcFbioCfg6 = 0x00000006; -SDRAM[1].EmcFbioSpare = 0x02000000; -SDRAM[1].EmcCfgRsv = 0xff00ff00; -SDRAM[1].EmcMrs = 0x80000d71; -SDRAM[1].EmcEmrs = 0x80100002; -SDRAM[1].EmcEmrs2 = 0x80200218; -SDRAM[1].EmcEmrs3 = 0x80300000; -SDRAM[1].EmcMrw1 = 0x00000000; -SDRAM[1].EmcMrw2 = 0x00000000; -SDRAM[1].EmcMrw3 = 0x00000000; -SDRAM[1].EmcMrw4 = 0x00000000; -SDRAM[1].EmcMrwExtra = 0x00000000; -SDRAM[1].EmcWarmBootMrwExtra = 0x00000000; -SDRAM[1].EmcWarmBootExtraModeRegWriteEnable = 0x00000000; -SDRAM[1].EmcExtraModeRegWriteEnable = 0x00000000; -SDRAM[1].EmcMrwResetCommand = 0x00000000; -SDRAM[1].EmcMrwResetNInitWait = 0x00000000; -SDRAM[1].EmcMrsWaitCnt = 0x00f8000f; -SDRAM[1].EmcMrsWaitCnt2 = 0x00f8000f; -SDRAM[1].EmcCfg = 0x73000000; -SDRAM[1].EmcCfg2 = 0x008008c1; -SDRAM[1].EmcDbg = 0x01000400; -SDRAM[1].EmcCmdQ = 0x10004408; -SDRAM[1].EmcMc2EmcQ = 0x06000404; -SDRAM[1].EmcDynSelfRefControl = 0x80003018; -SDRAM[1].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; -SDRAM[1].EmcCfgDigDll = 0xf0070191; -SDRAM[1].EmcCfgDigDllPeriod = 0x00008000; -SDRAM[1].EmcDevSelect = 0x00000002; -SDRAM[1].EmcSelDpdCtrl = 0x00040000; -SDRAM[1].EmcDllXformDqs0 = 0x0000000A; -SDRAM[1].EmcDllXformDqs1 = 0x0000000A; -SDRAM[1].EmcDllXformDqs2 = 0x0000000A; -SDRAM[1].EmcDllXformDqs3 = 0x0000000A; -SDRAM[1].EmcDllXformDqs4 = 0x0000000A; -SDRAM[1].EmcDllXformDqs5 = 0x0000000A; -SDRAM[1].EmcDllXformDqs6 = 0x0000000A; -SDRAM[1].EmcDllXformDqs7 = 0x0000000A; -SDRAM[1].EmcDllXformQUse0 = 0x00000000; -SDRAM[1].EmcDllXformQUse1 = 0x00000000; -SDRAM[1].EmcDllXformQUse2 = 0x00000000; -SDRAM[1].EmcDllXformQUse3 = 0x00000000; -SDRAM[1].EmcDllXformQUse4 = 0x00000000; -SDRAM[1].EmcDllXformQUse5 = 0x00000000; -SDRAM[1].EmcDllXformQUse6 = 0x00000000; -SDRAM[1].EmcDllXformQUse7 = 0x00000000; -SDRAM[1].EmcDllXformAddr0 = 0x0000000D; -SDRAM[1].EmcDllXformAddr1 = 0x0000000D; -SDRAM[1].EmcDllXformAddr2 = 0x0000000D; -SDRAM[1].EmcDliTrimTxDqs0 = 0x00000000; -SDRAM[1].EmcDliTrimTxDqs1 = 0x00000000; -SDRAM[1].EmcDliTrimTxDqs2 = 0x00000000; -SDRAM[1].EmcDliTrimTxDqs3 = 0x00000000; -SDRAM[1].EmcDliTrimTxDqs4 = 0x00000000; -SDRAM[1].EmcDliTrimTxDqs5 = 0x00000000; -SDRAM[1].EmcDliTrimTxDqs6 = 0x00000000; -SDRAM[1].EmcDliTrimTxDqs7 = 0x00000000; -SDRAM[1].EmcDllXformDq0 = 0x0000000A; -SDRAM[1].EmcDllXformDq1 = 0x0000000A; -SDRAM[1].EmcDllXformDq2 = 0x0000000A; -SDRAM[1].EmcDllXformDq3 = 0x0000000A; -SDRAM[1].WarmBootWait = 0x00000002; -SDRAM[1].EmcCttTermCtrl = 0x00000802; -SDRAM[1].EmcOdtWrite = 0x80000020; -SDRAM[1].EmcOdtRead = 0x00000000; -SDRAM[1].EmcZcalInterval = 0x00020000; -SDRAM[1].EmcZcalWaitCnt = 0x00000042; -SDRAM[1].EmcZcalMrwCmd = 0x80000000; -SDRAM[1].EmcMrsResetDll = 0x00000000; -SDRAM[1].EmcZcalInitDev0 = 0x80000011; -SDRAM[1].EmcZcalInitDev1 = 0x00000000; -SDRAM[1].EmcZcalInitWait = 0x00000001; -SDRAM[1].EmcZcalWarmColdBootEnables = 0x00000003; -SDRAM[1].EmcMrwLpddr2ZcalWarmBoot = 0x000a00ab; -SDRAM[1].EmcZqCalDdr3WarmBoot = 0x00000011; -SDRAM[1].EmcZcalWarmBootWait = 0x00000001; -SDRAM[1].EmcMrsWarmBootEnable = 0x00000001; -SDRAM[1].EmcMrsResetDllWait = 0x00000000; -SDRAM[1].EmcMrsExtra = 0x80000d05; -SDRAM[1].EmcWarmBootMrsExtra = 0x80100002; -SDRAM[1].EmcEmrsDdr2DllEnable = 0x00000000; -SDRAM[1].EmcMrsDdr2DllReset = 0x00000000; -SDRAM[1].EmcEmrsDdr2OcdCalib = 0x00000000; -SDRAM[1].EmcDdr2Wait = 0x00000000; -SDRAM[1].EmcClkenOverride = 0x00000000; -SDRAM[1].EmcExtraRefreshNum = 0x00000002; -SDRAM[1].EmcClkenOverrideAllWarmBoot = 0x00000000; -SDRAM[1].McClkenOverrideAllWarmBoot = 0x00000000; -SDRAM[1].EmcCfgDigDllPeriodWarmBoot = 0x00000003; -SDRAM[1].PmcVddpSel = 0x00000002; -SDRAM[1].PmcDdrPwr = 0x00000003; -SDRAM[1].PmcDdrCfg = 0x00000092; -SDRAM[1].PmcIoDpdReq = 0x80800000; -SDRAM[1].PmcIoDpd2Req = 0x00000000; -SDRAM[1].PmcRegShort = 0x00000000; -SDRAM[1].PmcENoVttGen = 0x00000000; -SDRAM[1].PmcNoIoPower = 0x00000000; -SDRAM[1].EmcXm2CmdPadCtrl = 0x001112a0; -SDRAM[1].EmcXm2CmdPadCtrl2 = 0x770c0000; -SDRAM[1].EmcXm2CmdPadCtrl3 = 0x050c0000; -SDRAM[1].EmcXm2CmdPadCtrl4 = 0x00000000; -SDRAM[1].EmcXm2DqsPadCtrl = 0x770c1414; -SDRAM[1].EmcXm2DqsPadCtrl2 = 0x0000013d; -SDRAM[1].EmcXm2DqsPadCtrl3 = 0x10410400; -SDRAM[1].EmcXm2DqsPadCtrl4 = 0x00249249; -SDRAM[1].EmcXm2DqPadCtrl = 0x770c2990; -SDRAM[1].EmcXm2DqPadCtrl2 = 0x00000000; -SDRAM[1].EmcXm2ClkPadCtrl = 0x77ffc084; -SDRAM[1].EmcXm2ClkPadCtrl2 = 0x00000b0b; -SDRAM[1].EmcXm2CompPadCtrl = 0x81f1f508; -SDRAM[1].EmcXm2VttGenPadCtrl = 0x07077704; -SDRAM[1].EmcXm2VttGenPadCtrl2 = 0x00000000; -SDRAM[1].EmcAcpdControl = 0x00000000; -SDRAM[1].EmcSwizzleRank0ByteCfg = 0x00000087; -SDRAM[1].EmcSwizzleRank0Byte0 = 0x53614207; -SDRAM[1].EmcSwizzleRank0Byte1 = 0x26043715; -SDRAM[1].EmcSwizzleRank0Byte2 = 0x40517236; -SDRAM[1].EmcSwizzleRank0Byte3 = 0x45370612; -SDRAM[1].EmcSwizzleRank1ByteCfg = 0x00000087; -SDRAM[1].EmcSwizzleRank1Byte0 = 0x53614207; -SDRAM[1].EmcSwizzleRank1Byte1 = 0x26043715; -SDRAM[1].EmcSwizzleRank1Byte2 = 0x40517236; -SDRAM[1].EmcSwizzleRank1Byte3 = 0x45370612; -SDRAM[1].EmcAddrSwizzleStack1a = 0x0396071a; -SDRAM[1].EmcAddrSwizzleStack1b = 0x000425b8; -SDRAM[1].EmcAddrSwizzleStack2a = 0x07412306; -SDRAM[1].EmcAddrSwizzleStack2b = 0x00000598; -SDRAM[1].EmcAddrSwizzleStack3 = 0x00534012; -SDRAM[1].EmcDsrVttgenDrv = 0x0000003f; -SDRAM[1].EmcTxdsrvttgen = 0x00000000; -SDRAM[1].McEmemAdrCfg = 0x00000000; -SDRAM[1].McEmemAdrCfgDev0 = 0x00080303; -SDRAM[1].McEmemAdrCfgDev1 = 0x00080303; -SDRAM[1].McEmemAdrCfgChannelMask = 0x00000640; -SDRAM[1].McEmemAdrCfgChannelMaskPropagationCount = 0x00000008; -SDRAM[1].McEmemAdrCfgBankMask0 = 0x69248003; -SDRAM[1].McEmemAdrCfgBankMask1 = 0x24928000; -SDRAM[1].McEmemAdrCfgBankMask2 = 0x92c94c00; -SDRAM[1].McEmemCfg = 0x00000800; -SDRAM[1].McEmemArbCfg = 0x0e00000b; -SDRAM[1].McEmemArbOutstandingReq = 0x80000190; -SDRAM[1].McEmemArbTimingRcd = 0x00000004; -SDRAM[1].McEmemArbTimingRp = 0x00000005; -SDRAM[1].McEmemArbTimingRc = 0x00000013; -SDRAM[1].McEmemArbTimingRas = 0x0000000c; -SDRAM[1].McEmemArbTimingFaw = 0x0000000f; -SDRAM[1].McEmemArbTimingRrd = 0x00000002; -SDRAM[1].McEmemArbTimingRap2Pre = 0x00000003; -SDRAM[1].McEmemArbTimingWap2Pre = 0x0000000c; -SDRAM[1].McEmemArbTimingR2R = 0x00000002; -SDRAM[1].McEmemArbTimingW2W = 0x00000002; -SDRAM[1].McEmemArbTimingR2W = 0x00000006; -SDRAM[1].McEmemArbTimingW2R = 0x00000008; -SDRAM[1].McEmemArbDaTurns = 0x08060202; -SDRAM[1].McEmemArbDaCovers = 0x00170e13; -SDRAM[1].McEmemArbMisc0 = 0x734c2414; -SDRAM[1].McEmemArbMisc1 = 0x78000000; -SDRAM[1].McEmemArbRing1Throttle = 0x001f0000; -SDRAM[1].McEmemArbOverride = 0x00000083; -SDRAM[1].McEmemArbRsv = 0xff00ff00; -SDRAM[1].McClkenOverride = 0x00000000; -SDRAM[1].McEmcRegMode = 0x00000002; -SDRAM[1].McVideoProtectBom = 0xfff00000; -SDRAM[1].McVideoProtectSizeMb = 0x00000000; -SDRAM[1].McVideoProtectVprOverride = 0x009a4752; -SDRAM[1].McSecCarveoutBom = 0xfff00000; -SDRAM[1].McSecCarveoutSizeMb = 0x00000000; -SDRAM[1].McVideoProtectWriteAccess = 0x00000000; -SDRAM[1].McSecCarveoutProtectWriteAccess = 0x00000000; -SDRAM[1].EmcCaTrainingEnable = 0x00000000; -SDRAM[1].EmcCaTrainingTimingCntl1 = 0x1f7df7df; -SDRAM[1].EmcCaTrainingTimingCntl2 = 0x0000001f; -SDRAM[1].SwizzleRankByteEncode = 0x000022aa; -SDRAM[1].BootRomPatchControl = 0x00000000; -SDRAM[1].BootRomPatchData = 0x00000000; -SDRAM[1].Ch1EmcDllXformDqs0 = 0x0000000A; -SDRAM[1].Ch1EmcDllXformDqs1 = 0x0000000A; -SDRAM[1].Ch1EmcDllXformDqs2 = 0x0000000A; -SDRAM[1].Ch1EmcDllXformDqs3 = 0x0000000A; -SDRAM[1].Ch1EmcDllXformDqs4 = 0x0000000A; -SDRAM[1].Ch1EmcDllXformDqs5 = 0x0000000A; -SDRAM[1].Ch1EmcDllXformDqs6 = 0x0000000A; -SDRAM[1].Ch1EmcDllXformDqs7 = 0x0000000A; -SDRAM[1].Ch1EmcDllXformQUse0 = 0x00000000; -SDRAM[1].Ch1EmcDllXformQUse1 = 0x00000000; -SDRAM[1].Ch1EmcDllXformQUse2 = 0x00000000; -SDRAM[1].Ch1EmcDllXformQUse3 = 0x00000000; -SDRAM[1].Ch1EmcDllXformQUse4 = 0x00000000; -SDRAM[1].Ch1EmcDllXformQUse5 = 0x00000000; -SDRAM[1].Ch1EmcDllXformQUse6 = 0x00000000; -SDRAM[1].Ch1EmcDllXformQUse7 = 0x00000000; -SDRAM[1].Ch1EmcDliTrimTxDqs0 = 0x00000000; -SDRAM[1].Ch1EmcDliTrimTxDqs1 = 0x00000000; -SDRAM[1].Ch1EmcDliTrimTxDqs2 = 0x00000000; -SDRAM[1].Ch1EmcDliTrimTxDqs3 = 0x00000000; -SDRAM[1].Ch1EmcDliTrimTxDqs4 = 0x00000000; -SDRAM[1].Ch1EmcDliTrimTxDqs5 = 0x00000000; -SDRAM[1].Ch1EmcDliTrimTxDqs6 = 0x00000000; -SDRAM[1].Ch1EmcDliTrimTxDqs7 = 0x00000000; -SDRAM[1].Ch1EmcDllXformDq0 = 0x0000000A; -SDRAM[1].Ch1EmcDllXformDq1 = 0x0000000A; -SDRAM[1].Ch1EmcDllXformDq2 = 0x0000000A; -SDRAM[1].Ch1EmcDllXformDq3 = 0x0000000A; -SDRAM[1].Ch1EmcSwizzleRank0ByteCfg = 0x000000d2; -SDRAM[1].Ch1EmcSwizzleRank0Byte0 = 0x51430267; -SDRAM[1].Ch1EmcSwizzleRank0Byte1 = 0x13072465; -SDRAM[1].Ch1EmcSwizzleRank0Byte2 = 0x72605314; -SDRAM[1].Ch1EmcSwizzleRank0Byte3 = 0x54073162; -SDRAM[1].Ch1EmcSwizzleRank1ByteCfg = 0x000000d2; -SDRAM[1].Ch1EmcSwizzleRank1Byte0 = 0x51430267; -SDRAM[1].Ch1EmcSwizzleRank1Byte1 = 0x13072465; -SDRAM[1].Ch1EmcSwizzleRank1Byte2 = 0x72605314; -SDRAM[1].Ch1EmcSwizzleRank1Byte3 = 0x54073162; -SDRAM[1].Ch1EmcAddrSwizzleStack1a = 0x79320a61; -SDRAM[1].Ch1EmcAddrSwizzleStack1b = 0x000b8450; -SDRAM[1].Ch1EmcAddrSwizzleStack2a = 0x07623014; -SDRAM[1].Ch1EmcAddrSwizzleStack2b = 0x00000589; -SDRAM[1].Ch1EmcAddrSwizzleStack3 = 0x00530124; -SDRAM[1].Ch1EmcAutoCalConfig = 0xa8f10f0f; -SDRAM[1].Ch1EmcAutoCalConfig2 = 0x00000000; -SDRAM[1].Ch1EmcAutoCalConfig3 = 0x00000000; -SDRAM[1].Ch1EmcCdbCntl1 = 0x00000000; -SDRAM[1].Ch1EmcDllXformAddr0 = 0x0000000D; -SDRAM[1].Ch1EmcDllXformAddr1 = 0x0000000D; -SDRAM[1].Ch1EmcDllXformAddr2 = 0x0000000D; -SDRAM[1].Ch1EmcFbioSpare = 0x02000000; -SDRAM[1].Ch1EmcXm2ClkPadCtrl = 0x77ffc084; -SDRAM[1].Ch1EmcXm2ClkPadCtrl2 = 0x00000b0b; -SDRAM[1].Ch1EmcXm2CmdPadCtrl2 = 0x770c0000; -SDRAM[1].Ch1EmcXm2CmdPadCtrl3 = 0x050c0000; -SDRAM[1].Ch1EmcXm2CmdPadCtrl4 = 0x00000000; -SDRAM[1].Ch1EmcXm2DqPadCtrl = 0x770c2990; -SDRAM[1].Ch1EmcXm2DqPadCtrl2 = 0x00000000; -SDRAM[1].Ch1EmcXm2DqsPadCtrl = 0x770c1515; -SDRAM[1].Ch1EmcXm2DqsPadCtrl3 = 0x10410400; -SDRAM[1].Ch1EmcXm2DqsPadCtrl4 = 0x00249249; - -SDRAM[2].MemoryType = NvBootMemoryType_Ddr3; -SDRAM[2].PllMInputDivider = 0x00000001; -SDRAM[2].PllMFeedbackDivider = 0x00000042; -SDRAM[2].PllMStableTime = 0x0000012c; -SDRAM[2].PllMSetupControl = 0x00000000; -SDRAM[2].PllMSelectDiv2 = 0x00000000; -SDRAM[2].PllMPDLshiftPh45 = 0x00000000; -SDRAM[2].PllMPDLshiftPh90 = 0x00000000; -SDRAM[2].PllMPDLshiftPh135 = 0x00000000; -SDRAM[2].PllMKCP = 0x00000000; -SDRAM[2].PllMKVCO = 0x00000000; -SDRAM[2].EmcBctSpare0 = 0x00000bad; -SDRAM[2].EmcClockSource = 0x80000000; -SDRAM[2].EmcAutoCalInterval = 0x001fffff; -SDRAM[2].EmcAutoCalConfig = 0xa0f10f0f; -SDRAM[2].EmcAutoCalConfig2 = 0x00000000; -SDRAM[2].EmcAutoCalConfig3 = 0x00000000; -SDRAM[2].EmcAutoCalWait = 0x00000064; -SDRAM[2].EmcAdrCfg = 0x00000000; -SDRAM[2].EmcPinProgramWait = 0x00000001; -SDRAM[2].EmcPinExtraWait = 0x00000000; -SDRAM[2].EmcTimingControlWait = 0x00000001; -SDRAM[2].EmcRc = 0x00000024; -SDRAM[2].EmcRfc = 0x000000cd; -SDRAM[2].EmcRfcSlr = 0x00000000; -SDRAM[2].EmcRas = 0x00000019; -SDRAM[2].EmcRp = 0x0000000a; -SDRAM[2].EmcR2r = 0x00000000; -SDRAM[2].EmcW2w = 0x00000000; -SDRAM[2].EmcR2w = 0x00000009; -SDRAM[2].EmcW2r = 0x0000000d; -SDRAM[2].EmcR2p = 0x00000004; -SDRAM[2].EmcW2p = 0x00000013; -SDRAM[2].EmcRdRcd = 0x0000000a; -SDRAM[2].EmcWrRcd = 0x0000000a; -SDRAM[2].EmcRrd = 0x00000003; -SDRAM[2].EmcRext = 0x00000001; -SDRAM[2].EmcWext = 0x00000000; -SDRAM[2].EmcWdv = 0x00000006; -SDRAM[2].EmcWdvMask = 0x00000006; -SDRAM[2].EmcQUse = 0x0000000b; -SDRAM[2].EmcIbdly = 0x0000000b; -SDRAM[2].EmcEInput = 0x00000008; -SDRAM[2].EmcEInputDuration = 0x00000006; -SDRAM[2].EmcPutermExtra = 0x000d000a; -SDRAM[2].EmcCdbCntl1 = 0x00000000; -SDRAM[2].EmcCdbCntl2 = 0x00000000; -SDRAM[2].EmcQRst = 0x00000008; -SDRAM[2].EmcQSafe = 0x0000000d; -SDRAM[2].EmcRdv = 0x00000014; -SDRAM[2].EmcRdvMask = 0x00000014; -SDRAM[2].EmcCtt = 0x00000000; -SDRAM[2].EmcCttDuration = 0x00000000; -SDRAM[2].EmcRefresh = 0x000017e4; -SDRAM[2].EmcBurstRefreshNum = 0x00000000; -SDRAM[2].EmcPreRefreshReqCnt = 0x000005f9; -SDRAM[2].EmcPdEx2Wr = 0x00000003; -SDRAM[2].EmcPdEx2Rd = 0x00000012; -SDRAM[2].EmcPChg2Pden = 0x00000001; -SDRAM[2].EmcAct2Pden = 0x00000000; -SDRAM[2].EmcAr2Pden = 0x000000c6; -SDRAM[2].EmcRw2Pden = 0x00000018; -SDRAM[2].EmcTxsr = 0x000000d6; -SDRAM[2].EmcTxsrDll = 0x00000200; -SDRAM[2].EmcTcke = 0x00000005; -SDRAM[2].EmcTckesr = 0x00000005; -SDRAM[2].EmcTpd = 0x00000005; -SDRAM[2].EmcTfaw = 0x00000020; -SDRAM[2].EmcTrpab = 0x00000000; -SDRAM[2].EmcTClkStable = 0x00000007; -SDRAM[2].EmcTClkStop = 0x00000008; -SDRAM[2].EmcTRefBw = 0x00001825; -SDRAM[2].EmcQUseExtra = 0x0000000a; -SDRAM[2].EmcFbioCfg5 = 0x0000ba88; -SDRAM[2].EmcFbioCfg6 = 0x00000006; -SDRAM[2].EmcFbioSpare = 0x02000000; -SDRAM[2].EmcCfgRsv = 0xff00ff00; -SDRAM[2].EmcMrs = 0x80000d71; -SDRAM[2].EmcEmrs = 0x80100002; -SDRAM[2].EmcEmrs2 = 0x80200218; -SDRAM[2].EmcEmrs3 = 0x80300000; -SDRAM[2].EmcMrw1 = 0x00000000; -SDRAM[2].EmcMrw2 = 0x00000000; -SDRAM[2].EmcMrw3 = 0x00000000; -SDRAM[2].EmcMrw4 = 0x00000000; -SDRAM[2].EmcMrwExtra = 0x00000000; -SDRAM[2].EmcWarmBootMrwExtra = 0x00000000; -SDRAM[2].EmcWarmBootExtraModeRegWriteEnable = 0x00000000; -SDRAM[2].EmcExtraModeRegWriteEnable = 0x00000000; -SDRAM[2].EmcMrwResetCommand = 0x00000000; -SDRAM[2].EmcMrwResetNInitWait = 0x00000000; -SDRAM[2].EmcMrsWaitCnt = 0x00f8000f; -SDRAM[2].EmcMrsWaitCnt2 = 0x00f8000f; -SDRAM[2].EmcCfg = 0x73000000; -SDRAM[2].EmcCfg2 = 0x008008c1; -SDRAM[2].EmcDbg = 0x01000400; -SDRAM[2].EmcCmdQ = 0x10004408; -SDRAM[2].EmcMc2EmcQ = 0x06000404; -SDRAM[2].EmcDynSelfRefControl = 0x80003018; -SDRAM[2].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; -SDRAM[2].EmcCfgDigDll = 0xf0070191; -SDRAM[2].EmcCfgDigDllPeriod = 0x00008000; -SDRAM[2].EmcDevSelect = 0x00000002; -SDRAM[2].EmcSelDpdCtrl = 0x00040000; -SDRAM[2].EmcDllXformDqs0 = 0x0000000A; -SDRAM[2].EmcDllXformDqs1 = 0x0000000A; -SDRAM[2].EmcDllXformDqs2 = 0x0000000A; -SDRAM[2].EmcDllXformDqs3 = 0x0000000A; -SDRAM[2].EmcDllXformDqs4 = 0x0000000A; -SDRAM[2].EmcDllXformDqs5 = 0x0000000A; -SDRAM[2].EmcDllXformDqs6 = 0x0000000A; -SDRAM[2].EmcDllXformDqs7 = 0x0000000A; -SDRAM[2].EmcDllXformQUse0 = 0x00000000; -SDRAM[2].EmcDllXformQUse1 = 0x00000000; -SDRAM[2].EmcDllXformQUse2 = 0x00000000; -SDRAM[2].EmcDllXformQUse3 = 0x00000000; -SDRAM[2].EmcDllXformQUse4 = 0x00000000; -SDRAM[2].EmcDllXformQUse5 = 0x00000000; -SDRAM[2].EmcDllXformQUse6 = 0x00000000; -SDRAM[2].EmcDllXformQUse7 = 0x00000000; -SDRAM[2].EmcDllXformAddr0 = 0x0000000D; -SDRAM[2].EmcDllXformAddr1 = 0x0000000D; -SDRAM[2].EmcDllXformAddr2 = 0x0000000D; -SDRAM[2].EmcDliTrimTxDqs0 = 0x00000000; -SDRAM[2].EmcDliTrimTxDqs1 = 0x00000000; -SDRAM[2].EmcDliTrimTxDqs2 = 0x00000000; -SDRAM[2].EmcDliTrimTxDqs3 = 0x00000000; -SDRAM[2].EmcDliTrimTxDqs4 = 0x00000000; -SDRAM[2].EmcDliTrimTxDqs5 = 0x00000000; -SDRAM[2].EmcDliTrimTxDqs6 = 0x00000000; -SDRAM[2].EmcDliTrimTxDqs7 = 0x00000000; -SDRAM[2].EmcDllXformDq0 = 0x0000000A; -SDRAM[2].EmcDllXformDq1 = 0x0000000A; -SDRAM[2].EmcDllXformDq2 = 0x0000000A; -SDRAM[2].EmcDllXformDq3 = 0x0000000A; -SDRAM[2].WarmBootWait = 0x00000002; -SDRAM[2].EmcCttTermCtrl = 0x00000802; -SDRAM[2].EmcOdtWrite = 0x80000020; -SDRAM[2].EmcOdtRead = 0x00000000; -SDRAM[2].EmcZcalInterval = 0x00020000; -SDRAM[2].EmcZcalWaitCnt = 0x00000042; -SDRAM[2].EmcZcalMrwCmd = 0x80000000; -SDRAM[2].EmcMrsResetDll = 0x00000000; -SDRAM[2].EmcZcalInitDev0 = 0x80000011; -SDRAM[2].EmcZcalInitDev1 = 0x00000000; -SDRAM[2].EmcZcalInitWait = 0x00000001; -SDRAM[2].EmcZcalWarmColdBootEnables = 0x00000003; -SDRAM[2].EmcMrwLpddr2ZcalWarmBoot = 0x000a00ab; -SDRAM[2].EmcZqCalDdr3WarmBoot = 0x00000011; -SDRAM[2].EmcZcalWarmBootWait = 0x00000001; -SDRAM[2].EmcMrsWarmBootEnable = 0x00000001; -SDRAM[2].EmcMrsResetDllWait = 0x00000000; -SDRAM[2].EmcMrsExtra = 0x80000d05; -SDRAM[2].EmcWarmBootMrsExtra = 0x80100002; -SDRAM[2].EmcEmrsDdr2DllEnable = 0x00000000; -SDRAM[2].EmcMrsDdr2DllReset = 0x00000000; -SDRAM[2].EmcEmrsDdr2OcdCalib = 0x00000000; -SDRAM[2].EmcDdr2Wait = 0x00000000; -SDRAM[2].EmcClkenOverride = 0x00000000; -SDRAM[2].EmcExtraRefreshNum = 0x00000002; -SDRAM[2].EmcClkenOverrideAllWarmBoot = 0x00000000; -SDRAM[2].McClkenOverrideAllWarmBoot = 0x00000000; -SDRAM[2].EmcCfgDigDllPeriodWarmBoot = 0x00000003; -SDRAM[2].PmcVddpSel = 0x00000002; -SDRAM[2].PmcDdrPwr = 0x00000003; -SDRAM[2].PmcDdrCfg = 0x00000092; -SDRAM[2].PmcIoDpdReq = 0x80800000; -SDRAM[2].PmcIoDpd2Req = 0x00000000; -SDRAM[2].PmcRegShort = 0x00000000; -SDRAM[2].PmcENoVttGen = 0x00000000; -SDRAM[2].PmcNoIoPower = 0x00000000; -SDRAM[2].EmcXm2CmdPadCtrl = 0x001112a0; -SDRAM[2].EmcXm2CmdPadCtrl2 = 0x770c0000; -SDRAM[2].EmcXm2CmdPadCtrl3 = 0x050c0000; -SDRAM[2].EmcXm2CmdPadCtrl4 = 0x00000000; -SDRAM[2].EmcXm2DqsPadCtrl = 0x770c1414; -SDRAM[2].EmcXm2DqsPadCtrl2 = 0x0000013d; -SDRAM[2].EmcXm2DqsPadCtrl3 = 0x10410400; -SDRAM[2].EmcXm2DqsPadCtrl4 = 0x00249249; -SDRAM[2].EmcXm2DqPadCtrl = 0x770c2990; -SDRAM[2].EmcXm2DqPadCtrl2 = 0x00000000; -SDRAM[2].EmcXm2ClkPadCtrl = 0x77ffc084; -SDRAM[2].EmcXm2ClkPadCtrl2 = 0x00000b0b; -SDRAM[2].EmcXm2CompPadCtrl = 0x81f1f508; -SDRAM[2].EmcXm2VttGenPadCtrl = 0x07077704; -SDRAM[2].EmcXm2VttGenPadCtrl2 = 0x00000000; -SDRAM[2].EmcAcpdControl = 0x00000000; -SDRAM[2].EmcSwizzleRank0ByteCfg = 0x00000087; -SDRAM[2].EmcSwizzleRank0Byte0 = 0x53614207; -SDRAM[2].EmcSwizzleRank0Byte1 = 0x26043715; -SDRAM[2].EmcSwizzleRank0Byte2 = 0x40517236; -SDRAM[2].EmcSwizzleRank0Byte3 = 0x45370612; -SDRAM[2].EmcSwizzleRank1ByteCfg = 0x00000087; -SDRAM[2].EmcSwizzleRank1Byte0 = 0x53614207; -SDRAM[2].EmcSwizzleRank1Byte1 = 0x26043715; -SDRAM[2].EmcSwizzleRank1Byte2 = 0x40517236; -SDRAM[2].EmcSwizzleRank1Byte3 = 0x45370612; -SDRAM[2].EmcAddrSwizzleStack1a = 0x0396071a; -SDRAM[2].EmcAddrSwizzleStack1b = 0x000425b8; -SDRAM[2].EmcAddrSwizzleStack2a = 0x07412306; -SDRAM[2].EmcAddrSwizzleStack2b = 0x00000598; -SDRAM[2].EmcAddrSwizzleStack3 = 0x00534012; -SDRAM[2].EmcDsrVttgenDrv = 0x0000003f; -SDRAM[2].EmcTxdsrvttgen = 0x00000000; -SDRAM[2].McEmemAdrCfg = 0x00000000; -SDRAM[2].McEmemAdrCfgDev0 = 0x00080303; -SDRAM[2].McEmemAdrCfgDev1 = 0x00080303; -SDRAM[2].McEmemAdrCfgChannelMask = 0x00000640; -SDRAM[2].McEmemAdrCfgChannelMaskPropagationCount = 0x00000008; -SDRAM[2].McEmemAdrCfgBankMask0 = 0x69248003; -SDRAM[2].McEmemAdrCfgBankMask1 = 0x24928000; -SDRAM[2].McEmemAdrCfgBankMask2 = 0x92c94c00; -SDRAM[2].McEmemCfg = 0x00000800; -SDRAM[2].McEmemArbCfg = 0x0e00000b; -SDRAM[2].McEmemArbOutstandingReq = 0x80000190; -SDRAM[2].McEmemArbTimingRcd = 0x00000004; -SDRAM[2].McEmemArbTimingRp = 0x00000005; -SDRAM[2].McEmemArbTimingRc = 0x00000013; -SDRAM[2].McEmemArbTimingRas = 0x0000000c; -SDRAM[2].McEmemArbTimingFaw = 0x0000000f; -SDRAM[2].McEmemArbTimingRrd = 0x00000002; -SDRAM[2].McEmemArbTimingRap2Pre = 0x00000003; -SDRAM[2].McEmemArbTimingWap2Pre = 0x0000000c; -SDRAM[2].McEmemArbTimingR2R = 0x00000002; -SDRAM[2].McEmemArbTimingW2W = 0x00000002; -SDRAM[2].McEmemArbTimingR2W = 0x00000006; -SDRAM[2].McEmemArbTimingW2R = 0x00000008; -SDRAM[2].McEmemArbDaTurns = 0x08060202; -SDRAM[2].McEmemArbDaCovers = 0x00170e13; -SDRAM[2].McEmemArbMisc0 = 0x734c2414; -SDRAM[2].McEmemArbMisc1 = 0x78000000; -SDRAM[2].McEmemArbRing1Throttle = 0x001f0000; -SDRAM[2].McEmemArbOverride = 0x00000083; -SDRAM[2].McEmemArbRsv = 0xff00ff00; -SDRAM[2].McClkenOverride = 0x00000000; -SDRAM[2].McEmcRegMode = 0x00000002; -SDRAM[2].McVideoProtectBom = 0xfff00000; -SDRAM[2].McVideoProtectSizeMb = 0x00000000; -SDRAM[2].McVideoProtectVprOverride = 0x009a4752; -SDRAM[2].McSecCarveoutBom = 0xfff00000; -SDRAM[2].McSecCarveoutSizeMb = 0x00000000; -SDRAM[2].McVideoProtectWriteAccess = 0x00000000; -SDRAM[2].McSecCarveoutProtectWriteAccess = 0x00000000; -SDRAM[2].EmcCaTrainingEnable = 0x00000000; -SDRAM[2].EmcCaTrainingTimingCntl1 = 0x1f7df7df; -SDRAM[2].EmcCaTrainingTimingCntl2 = 0x0000001f; -SDRAM[2].SwizzleRankByteEncode = 0x000022aa; -SDRAM[2].BootRomPatchControl = 0x00000000; -SDRAM[2].BootRomPatchData = 0x00000000; -SDRAM[2].Ch1EmcDllXformDqs0 = 0x0000000A; -SDRAM[2].Ch1EmcDllXformDqs1 = 0x0000000A; -SDRAM[2].Ch1EmcDllXformDqs2 = 0x0000000A; -SDRAM[2].Ch1EmcDllXformDqs3 = 0x0000000A; -SDRAM[2].Ch1EmcDllXformDqs4 = 0x0000000A; -SDRAM[2].Ch1EmcDllXformDqs5 = 0x0000000A; -SDRAM[2].Ch1EmcDllXformDqs6 = 0x0000000A; -SDRAM[2].Ch1EmcDllXformDqs7 = 0x0000000A; -SDRAM[2].Ch1EmcDllXformQUse0 = 0x00000000; -SDRAM[2].Ch1EmcDllXformQUse1 = 0x00000000; -SDRAM[2].Ch1EmcDllXformQUse2 = 0x00000000; -SDRAM[2].Ch1EmcDllXformQUse3 = 0x00000000; -SDRAM[2].Ch1EmcDllXformQUse4 = 0x00000000; -SDRAM[2].Ch1EmcDllXformQUse5 = 0x00000000; -SDRAM[2].Ch1EmcDllXformQUse6 = 0x00000000; -SDRAM[2].Ch1EmcDllXformQUse7 = 0x00000000; -SDRAM[2].Ch1EmcDliTrimTxDqs0 = 0x00000000; -SDRAM[2].Ch1EmcDliTrimTxDqs1 = 0x00000000; -SDRAM[2].Ch1EmcDliTrimTxDqs2 = 0x00000000; -SDRAM[2].Ch1EmcDliTrimTxDqs3 = 0x00000000; -SDRAM[2].Ch1EmcDliTrimTxDqs4 = 0x00000000; -SDRAM[2].Ch1EmcDliTrimTxDqs5 = 0x00000000; -SDRAM[2].Ch1EmcDliTrimTxDqs6 = 0x00000000; -SDRAM[2].Ch1EmcDliTrimTxDqs7 = 0x00000000; -SDRAM[2].Ch1EmcDllXformDq0 = 0x0000000A; -SDRAM[2].Ch1EmcDllXformDq1 = 0x0000000A; -SDRAM[2].Ch1EmcDllXformDq2 = 0x0000000A; -SDRAM[2].Ch1EmcDllXformDq3 = 0x0000000A; -SDRAM[2].Ch1EmcSwizzleRank0ByteCfg = 0x000000d2; -SDRAM[2].Ch1EmcSwizzleRank0Byte0 = 0x51430267; -SDRAM[2].Ch1EmcSwizzleRank0Byte1 = 0x13072465; -SDRAM[2].Ch1EmcSwizzleRank0Byte2 = 0x72605314; -SDRAM[2].Ch1EmcSwizzleRank0Byte3 = 0x54073162; -SDRAM[2].Ch1EmcSwizzleRank1ByteCfg = 0x000000d2; -SDRAM[2].Ch1EmcSwizzleRank1Byte0 = 0x51430267; -SDRAM[2].Ch1EmcSwizzleRank1Byte1 = 0x13072465; -SDRAM[2].Ch1EmcSwizzleRank1Byte2 = 0x72605314; -SDRAM[2].Ch1EmcSwizzleRank1Byte3 = 0x54073162; -SDRAM[2].Ch1EmcAddrSwizzleStack1a = 0x79320a61; -SDRAM[2].Ch1EmcAddrSwizzleStack1b = 0x000b8450; -SDRAM[2].Ch1EmcAddrSwizzleStack2a = 0x07623014; -SDRAM[2].Ch1EmcAddrSwizzleStack2b = 0x00000589; -SDRAM[2].Ch1EmcAddrSwizzleStack3 = 0x00530124; -SDRAM[2].Ch1EmcAutoCalConfig = 0xa8f10f0f; -SDRAM[2].Ch1EmcAutoCalConfig2 = 0x00000000; -SDRAM[2].Ch1EmcAutoCalConfig3 = 0x00000000; -SDRAM[2].Ch1EmcCdbCntl1 = 0x00000000; -SDRAM[2].Ch1EmcDllXformAddr0 = 0x0000000D; -SDRAM[2].Ch1EmcDllXformAddr1 = 0x0000000D; -SDRAM[2].Ch1EmcDllXformAddr2 = 0x0000000D; -SDRAM[2].Ch1EmcFbioSpare = 0x02000000; -SDRAM[2].Ch1EmcXm2ClkPadCtrl = 0x77ffc084; -SDRAM[2].Ch1EmcXm2ClkPadCtrl2 = 0x00000b0b; -SDRAM[2].Ch1EmcXm2CmdPadCtrl2 = 0x770c0000; -SDRAM[2].Ch1EmcXm2CmdPadCtrl3 = 0x050c0000; -SDRAM[2].Ch1EmcXm2CmdPadCtrl4 = 0x00000000; -SDRAM[2].Ch1EmcXm2DqPadCtrl = 0x770c2990; -SDRAM[2].Ch1EmcXm2DqPadCtrl2 = 0x00000000; -SDRAM[2].Ch1EmcXm2DqsPadCtrl = 0x770c1515; -SDRAM[2].Ch1EmcXm2DqsPadCtrl3 = 0x10410400; -SDRAM[2].Ch1EmcXm2DqsPadCtrl4 = 0x00249249; - -SDRAM[3].MemoryType = NvBootMemoryType_Ddr3; -SDRAM[3].PllMInputDivider = 0x00000001; -SDRAM[3].PllMFeedbackDivider = 0x00000042; -SDRAM[3].PllMStableTime = 0x0000012c; -SDRAM[3].PllMSetupControl = 0x00000000; -SDRAM[3].PllMSelectDiv2 = 0x00000000; -SDRAM[3].PllMPDLshiftPh45 = 0x00000000; -SDRAM[3].PllMPDLshiftPh90 = 0x00000000; -SDRAM[3].PllMPDLshiftPh135 = 0x00000000; -SDRAM[3].PllMKCP = 0x00000000; -SDRAM[3].PllMKVCO = 0x00000000; -SDRAM[3].EmcBctSpare0 = 0x00000bad; -SDRAM[3].EmcClockSource = 0x80000000; -SDRAM[3].EmcAutoCalInterval = 0x001fffff; -SDRAM[3].EmcAutoCalConfig = 0xa0f10f0f; -SDRAM[3].EmcAutoCalConfig2 = 0x00000000; -SDRAM[3].EmcAutoCalConfig3 = 0x00000000; -SDRAM[3].EmcAutoCalWait = 0x00000064; -SDRAM[3].EmcAdrCfg = 0x00000000; -SDRAM[3].EmcPinProgramWait = 0x00000001; -SDRAM[3].EmcPinExtraWait = 0x00000000; -SDRAM[3].EmcTimingControlWait = 0x00000001; -SDRAM[3].EmcRc = 0x00000024; -SDRAM[3].EmcRfc = 0x000000cd; -SDRAM[3].EmcRfcSlr = 0x00000000; -SDRAM[3].EmcRas = 0x00000019; -SDRAM[3].EmcRp = 0x0000000a; -SDRAM[3].EmcR2r = 0x00000000; -SDRAM[3].EmcW2w = 0x00000000; -SDRAM[3].EmcR2w = 0x00000009; -SDRAM[3].EmcW2r = 0x0000000d; -SDRAM[3].EmcR2p = 0x00000004; -SDRAM[3].EmcW2p = 0x00000013; -SDRAM[3].EmcRdRcd = 0x0000000a; -SDRAM[3].EmcWrRcd = 0x0000000a; -SDRAM[3].EmcRrd = 0x00000003; -SDRAM[3].EmcRext = 0x00000001; -SDRAM[3].EmcWext = 0x00000000; -SDRAM[3].EmcWdv = 0x00000006; -SDRAM[3].EmcWdvMask = 0x00000006; -SDRAM[3].EmcQUse = 0x0000000b; -SDRAM[3].EmcIbdly = 0x0000000b; -SDRAM[3].EmcEInput = 0x00000008; -SDRAM[3].EmcEInputDuration = 0x00000006; -SDRAM[3].EmcPutermExtra = 0x000d000a; -SDRAM[3].EmcCdbCntl1 = 0x00000000; -SDRAM[3].EmcCdbCntl2 = 0x00000000; -SDRAM[3].EmcQRst = 0x00000008; -SDRAM[3].EmcQSafe = 0x0000000d; -SDRAM[3].EmcRdv = 0x00000014; -SDRAM[3].EmcRdvMask = 0x00000014; -SDRAM[3].EmcCtt = 0x00000000; -SDRAM[3].EmcCttDuration = 0x00000000; -SDRAM[3].EmcRefresh = 0x000017e4; -SDRAM[3].EmcBurstRefreshNum = 0x00000000; -SDRAM[3].EmcPreRefreshReqCnt = 0x000005f9; -SDRAM[3].EmcPdEx2Wr = 0x00000003; -SDRAM[3].EmcPdEx2Rd = 0x00000012; -SDRAM[3].EmcPChg2Pden = 0x00000001; -SDRAM[3].EmcAct2Pden = 0x00000000; -SDRAM[3].EmcAr2Pden = 0x000000c6; -SDRAM[3].EmcRw2Pden = 0x00000018; -SDRAM[3].EmcTxsr = 0x000000d6; -SDRAM[3].EmcTxsrDll = 0x00000200; -SDRAM[3].EmcTcke = 0x00000005; -SDRAM[3].EmcTckesr = 0x00000005; -SDRAM[3].EmcTpd = 0x00000005; -SDRAM[3].EmcTfaw = 0x00000020; -SDRAM[3].EmcTrpab = 0x00000000; -SDRAM[3].EmcTClkStable = 0x00000007; -SDRAM[3].EmcTClkStop = 0x00000008; -SDRAM[3].EmcTRefBw = 0x00001825; -SDRAM[3].EmcQUseExtra = 0x0000000a; -SDRAM[3].EmcFbioCfg5 = 0x0000ba88; -SDRAM[3].EmcFbioCfg6 = 0x00000006; -SDRAM[3].EmcFbioSpare = 0x02000000; -SDRAM[3].EmcCfgRsv = 0xff00ff00; -SDRAM[3].EmcMrs = 0x80000d71; -SDRAM[3].EmcEmrs = 0x80100002; -SDRAM[3].EmcEmrs2 = 0x80200218; -SDRAM[3].EmcEmrs3 = 0x80300000; -SDRAM[3].EmcMrw1 = 0x00000000; -SDRAM[3].EmcMrw2 = 0x00000000; -SDRAM[3].EmcMrw3 = 0x00000000; -SDRAM[3].EmcMrw4 = 0x00000000; -SDRAM[3].EmcMrwExtra = 0x00000000; -SDRAM[3].EmcWarmBootMrwExtra = 0x00000000; -SDRAM[3].EmcWarmBootExtraModeRegWriteEnable = 0x00000000; -SDRAM[3].EmcExtraModeRegWriteEnable = 0x00000000; -SDRAM[3].EmcMrwResetCommand = 0x00000000; -SDRAM[3].EmcMrwResetNInitWait = 0x00000000; -SDRAM[3].EmcMrsWaitCnt = 0x00f8000f; -SDRAM[3].EmcMrsWaitCnt2 = 0x00f8000f; -SDRAM[3].EmcCfg = 0x73000000; -SDRAM[3].EmcCfg2 = 0x008008c1; -SDRAM[3].EmcDbg = 0x01000400; -SDRAM[3].EmcCmdQ = 0x10004408; -SDRAM[3].EmcMc2EmcQ = 0x06000404; -SDRAM[3].EmcDynSelfRefControl = 0x80003018; -SDRAM[3].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; -SDRAM[3].EmcCfgDigDll = 0xf0070191; -SDRAM[3].EmcCfgDigDllPeriod = 0x00008000; -SDRAM[3].EmcDevSelect = 0x00000002; -SDRAM[3].EmcSelDpdCtrl = 0x00040000; -SDRAM[3].EmcDllXformDqs0 = 0x0000000A; -SDRAM[3].EmcDllXformDqs1 = 0x0000000A; -SDRAM[3].EmcDllXformDqs2 = 0x0000000A; -SDRAM[3].EmcDllXformDqs3 = 0x0000000A; -SDRAM[3].EmcDllXformDqs4 = 0x0000000A; -SDRAM[3].EmcDllXformDqs5 = 0x0000000A; -SDRAM[3].EmcDllXformDqs6 = 0x0000000A; -SDRAM[3].EmcDllXformDqs7 = 0x0000000A; -SDRAM[3].EmcDllXformQUse0 = 0x00000000; -SDRAM[3].EmcDllXformQUse1 = 0x00000000; -SDRAM[3].EmcDllXformQUse2 = 0x00000000; -SDRAM[3].EmcDllXformQUse3 = 0x00000000; -SDRAM[3].EmcDllXformQUse4 = 0x00000000; -SDRAM[3].EmcDllXformQUse5 = 0x00000000; -SDRAM[3].EmcDllXformQUse6 = 0x00000000; -SDRAM[3].EmcDllXformQUse7 = 0x00000000; -SDRAM[3].EmcDllXformAddr0 = 0x0000000D; -SDRAM[3].EmcDllXformAddr1 = 0x0000000D; -SDRAM[3].EmcDllXformAddr2 = 0x0000000D; -SDRAM[3].EmcDliTrimTxDqs0 = 0x00000000; -SDRAM[3].EmcDliTrimTxDqs1 = 0x00000000; -SDRAM[3].EmcDliTrimTxDqs2 = 0x00000000; -SDRAM[3].EmcDliTrimTxDqs3 = 0x00000000; -SDRAM[3].EmcDliTrimTxDqs4 = 0x00000000; -SDRAM[3].EmcDliTrimTxDqs5 = 0x00000000; -SDRAM[3].EmcDliTrimTxDqs6 = 0x00000000; -SDRAM[3].EmcDliTrimTxDqs7 = 0x00000000; -SDRAM[3].EmcDllXformDq0 = 0x0000000A; -SDRAM[3].EmcDllXformDq1 = 0x0000000A; -SDRAM[3].EmcDllXformDq2 = 0x0000000A; -SDRAM[3].EmcDllXformDq3 = 0x0000000A; -SDRAM[3].WarmBootWait = 0x00000002; -SDRAM[3].EmcCttTermCtrl = 0x00000802; -SDRAM[3].EmcOdtWrite = 0x80000020; -SDRAM[3].EmcOdtRead = 0x00000000; -SDRAM[3].EmcZcalInterval = 0x00020000; -SDRAM[3].EmcZcalWaitCnt = 0x00000042; -SDRAM[3].EmcZcalMrwCmd = 0x80000000; -SDRAM[3].EmcMrsResetDll = 0x00000000; -SDRAM[3].EmcZcalInitDev0 = 0x80000011; -SDRAM[3].EmcZcalInitDev1 = 0x00000000; -SDRAM[3].EmcZcalInitWait = 0x00000001; -SDRAM[3].EmcZcalWarmColdBootEnables = 0x00000003; -SDRAM[3].EmcMrwLpddr2ZcalWarmBoot = 0x000a00ab; -SDRAM[3].EmcZqCalDdr3WarmBoot = 0x00000011; -SDRAM[3].EmcZcalWarmBootWait = 0x00000001; -SDRAM[3].EmcMrsWarmBootEnable = 0x00000001; -SDRAM[3].EmcMrsResetDllWait = 0x00000000; -SDRAM[3].EmcMrsExtra = 0x80000d05; -SDRAM[3].EmcWarmBootMrsExtra = 0x80100002; -SDRAM[3].EmcEmrsDdr2DllEnable = 0x00000000; -SDRAM[3].EmcMrsDdr2DllReset = 0x00000000; -SDRAM[3].EmcEmrsDdr2OcdCalib = 0x00000000; -SDRAM[3].EmcDdr2Wait = 0x00000000; -SDRAM[3].EmcClkenOverride = 0x00000000; -SDRAM[3].EmcExtraRefreshNum = 0x00000002; -SDRAM[3].EmcClkenOverrideAllWarmBoot = 0x00000000; -SDRAM[3].McClkenOverrideAllWarmBoot = 0x00000000; -SDRAM[3].EmcCfgDigDllPeriodWarmBoot = 0x00000003; -SDRAM[3].PmcVddpSel = 0x00000002; -SDRAM[3].PmcDdrPwr = 0x00000003; -SDRAM[3].PmcDdrCfg = 0x00000092; -SDRAM[3].PmcIoDpdReq = 0x80800000; -SDRAM[3].PmcIoDpd2Req = 0x00000000; -SDRAM[3].PmcRegShort = 0x00000000; -SDRAM[3].PmcENoVttGen = 0x00000000; -SDRAM[3].PmcNoIoPower = 0x00000000; -SDRAM[3].EmcXm2CmdPadCtrl = 0x001112a0; -SDRAM[3].EmcXm2CmdPadCtrl2 = 0x770c0000; -SDRAM[3].EmcXm2CmdPadCtrl3 = 0x050c0000; -SDRAM[3].EmcXm2CmdPadCtrl4 = 0x00000000; -SDRAM[3].EmcXm2DqsPadCtrl = 0x770c1414; -SDRAM[3].EmcXm2DqsPadCtrl2 = 0x0000013d; -SDRAM[3].EmcXm2DqsPadCtrl3 = 0x10410400; -SDRAM[3].EmcXm2DqsPadCtrl4 = 0x00249249; -SDRAM[3].EmcXm2DqPadCtrl = 0x770c2990; -SDRAM[3].EmcXm2DqPadCtrl2 = 0x00000000; -SDRAM[3].EmcXm2ClkPadCtrl = 0x77ffc084; -SDRAM[3].EmcXm2ClkPadCtrl2 = 0x00000b0b; -SDRAM[3].EmcXm2CompPadCtrl = 0x81f1f508; -SDRAM[3].EmcXm2VttGenPadCtrl = 0x07077704; -SDRAM[3].EmcXm2VttGenPadCtrl2 = 0x00000000; -SDRAM[3].EmcAcpdControl = 0x00000000; -SDRAM[3].EmcSwizzleRank0ByteCfg = 0x00000087; -SDRAM[3].EmcSwizzleRank0Byte0 = 0x53614207; -SDRAM[3].EmcSwizzleRank0Byte1 = 0x26043715; -SDRAM[3].EmcSwizzleRank0Byte2 = 0x40517236; -SDRAM[3].EmcSwizzleRank0Byte3 = 0x45370612; -SDRAM[3].EmcSwizzleRank1ByteCfg = 0x00000087; -SDRAM[3].EmcSwizzleRank1Byte0 = 0x53614207; -SDRAM[3].EmcSwizzleRank1Byte1 = 0x26043715; -SDRAM[3].EmcSwizzleRank1Byte2 = 0x40517236; -SDRAM[3].EmcSwizzleRank1Byte3 = 0x45370612; -SDRAM[3].EmcAddrSwizzleStack1a = 0x0396071a; -SDRAM[3].EmcAddrSwizzleStack1b = 0x000425b8; -SDRAM[3].EmcAddrSwizzleStack2a = 0x07412306; -SDRAM[3].EmcAddrSwizzleStack2b = 0x00000598; -SDRAM[3].EmcAddrSwizzleStack3 = 0x00534012; -SDRAM[3].EmcDsrVttgenDrv = 0x0000003f; -SDRAM[3].EmcTxdsrvttgen = 0x00000000; -SDRAM[3].McEmemAdrCfg = 0x00000000; -SDRAM[3].McEmemAdrCfgDev0 = 0x00080303; -SDRAM[3].McEmemAdrCfgDev1 = 0x00080303; -SDRAM[3].McEmemAdrCfgChannelMask = 0x00000640; -SDRAM[3].McEmemAdrCfgChannelMaskPropagationCount = 0x00000008; -SDRAM[3].McEmemAdrCfgBankMask0 = 0x69248003; -SDRAM[3].McEmemAdrCfgBankMask1 = 0x24928000; -SDRAM[3].McEmemAdrCfgBankMask2 = 0x92c94c00; -SDRAM[3].McEmemCfg = 0x00000800; -SDRAM[3].McEmemArbCfg = 0x0e00000b; -SDRAM[3].McEmemArbOutstandingReq = 0x80000190; -SDRAM[3].McEmemArbTimingRcd = 0x00000004; -SDRAM[3].McEmemArbTimingRp = 0x00000005; -SDRAM[3].McEmemArbTimingRc = 0x00000013; -SDRAM[3].McEmemArbTimingRas = 0x0000000c; -SDRAM[3].McEmemArbTimingFaw = 0x0000000f; -SDRAM[3].McEmemArbTimingRrd = 0x00000002; -SDRAM[3].McEmemArbTimingRap2Pre = 0x00000003; -SDRAM[3].McEmemArbTimingWap2Pre = 0x0000000c; -SDRAM[3].McEmemArbTimingR2R = 0x00000002; -SDRAM[3].McEmemArbTimingW2W = 0x00000002; -SDRAM[3].McEmemArbTimingR2W = 0x00000006; -SDRAM[3].McEmemArbTimingW2R = 0x00000008; -SDRAM[3].McEmemArbDaTurns = 0x08060202; -SDRAM[3].McEmemArbDaCovers = 0x00170e13; -SDRAM[3].McEmemArbMisc0 = 0x734c2414; -SDRAM[3].McEmemArbMisc1 = 0x78000000; -SDRAM[3].McEmemArbRing1Throttle = 0x001f0000; -SDRAM[3].McEmemArbOverride = 0x00000083; -SDRAM[3].McEmemArbRsv = 0xff00ff00; -SDRAM[3].McClkenOverride = 0x00000000; -SDRAM[3].McEmcRegMode = 0x00000002; -SDRAM[3].McVideoProtectBom = 0xfff00000; -SDRAM[3].McVideoProtectSizeMb = 0x00000000; -SDRAM[3].McVideoProtectVprOverride = 0x009a4752; -SDRAM[3].McSecCarveoutBom = 0xfff00000; -SDRAM[3].McSecCarveoutSizeMb = 0x00000000; -SDRAM[3].McVideoProtectWriteAccess = 0x00000000; -SDRAM[3].McSecCarveoutProtectWriteAccess = 0x00000000; -SDRAM[3].EmcCaTrainingEnable = 0x00000000; -SDRAM[3].EmcCaTrainingTimingCntl1 = 0x1f7df7df; -SDRAM[3].EmcCaTrainingTimingCntl2 = 0x0000001f; -SDRAM[3].SwizzleRankByteEncode = 0x000022aa; -SDRAM[3].BootRomPatchControl = 0x00000000; -SDRAM[3].BootRomPatchData = 0x00000000; -SDRAM[3].Ch1EmcDllXformDqs0 = 0x0000000A; -SDRAM[3].Ch1EmcDllXformDqs1 = 0x0000000A; -SDRAM[3].Ch1EmcDllXformDqs2 = 0x0000000A; -SDRAM[3].Ch1EmcDllXformDqs3 = 0x0000000A; -SDRAM[3].Ch1EmcDllXformDqs4 = 0x0000000A; -SDRAM[3].Ch1EmcDllXformDqs5 = 0x0000000A; -SDRAM[3].Ch1EmcDllXformDqs6 = 0x0000000A; -SDRAM[3].Ch1EmcDllXformDqs7 = 0x0000000A; -SDRAM[3].Ch1EmcDllXformQUse0 = 0x00000000; -SDRAM[3].Ch1EmcDllXformQUse1 = 0x00000000; -SDRAM[3].Ch1EmcDllXformQUse2 = 0x00000000; -SDRAM[3].Ch1EmcDllXformQUse3 = 0x00000000; -SDRAM[3].Ch1EmcDllXformQUse4 = 0x00000000; -SDRAM[3].Ch1EmcDllXformQUse5 = 0x00000000; -SDRAM[3].Ch1EmcDllXformQUse6 = 0x00000000; -SDRAM[3].Ch1EmcDllXformQUse7 = 0x00000000; -SDRAM[3].Ch1EmcDliTrimTxDqs0 = 0x00000000; -SDRAM[3].Ch1EmcDliTrimTxDqs1 = 0x00000000; -SDRAM[3].Ch1EmcDliTrimTxDqs2 = 0x00000000; -SDRAM[3].Ch1EmcDliTrimTxDqs3 = 0x00000000; -SDRAM[3].Ch1EmcDliTrimTxDqs4 = 0x00000000; -SDRAM[3].Ch1EmcDliTrimTxDqs5 = 0x00000000; -SDRAM[3].Ch1EmcDliTrimTxDqs6 = 0x00000000; -SDRAM[3].Ch1EmcDliTrimTxDqs7 = 0x00000000; -SDRAM[3].Ch1EmcDllXformDq0 = 0x0000000A; -SDRAM[3].Ch1EmcDllXformDq1 = 0x0000000A; -SDRAM[3].Ch1EmcDllXformDq2 = 0x0000000A; -SDRAM[3].Ch1EmcDllXformDq3 = 0x0000000A; -SDRAM[3].Ch1EmcSwizzleRank0ByteCfg = 0x000000d2; -SDRAM[3].Ch1EmcSwizzleRank0Byte0 = 0x51430267; -SDRAM[3].Ch1EmcSwizzleRank0Byte1 = 0x13072465; -SDRAM[3].Ch1EmcSwizzleRank0Byte2 = 0x72605314; -SDRAM[3].Ch1EmcSwizzleRank0Byte3 = 0x54073162; -SDRAM[3].Ch1EmcSwizzleRank1ByteCfg = 0x000000d2; -SDRAM[3].Ch1EmcSwizzleRank1Byte0 = 0x51430267; -SDRAM[3].Ch1EmcSwizzleRank1Byte1 = 0x13072465; -SDRAM[3].Ch1EmcSwizzleRank1Byte2 = 0x72605314; -SDRAM[3].Ch1EmcSwizzleRank1Byte3 = 0x54073162; -SDRAM[3].Ch1EmcAddrSwizzleStack1a = 0x79320a61; -SDRAM[3].Ch1EmcAddrSwizzleStack1b = 0x000b8450; -SDRAM[3].Ch1EmcAddrSwizzleStack2a = 0x07623014; -SDRAM[3].Ch1EmcAddrSwizzleStack2b = 0x00000589; -SDRAM[3].Ch1EmcAddrSwizzleStack3 = 0x00530124; -SDRAM[3].Ch1EmcAutoCalConfig = 0xa8f10f0f; -SDRAM[3].Ch1EmcAutoCalConfig2 = 0x00000000; -SDRAM[3].Ch1EmcAutoCalConfig3 = 0x00000000; -SDRAM[3].Ch1EmcCdbCntl1 = 0x00000000; -SDRAM[3].Ch1EmcDllXformAddr0 = 0x0000000D; -SDRAM[3].Ch1EmcDllXformAddr1 = 0x0000000D; -SDRAM[3].Ch1EmcDllXformAddr2 = 0x0000000D; -SDRAM[3].Ch1EmcFbioSpare = 0x02000000; -SDRAM[3].Ch1EmcXm2ClkPadCtrl = 0x77ffc084; -SDRAM[3].Ch1EmcXm2ClkPadCtrl2 = 0x00000b0b; -SDRAM[3].Ch1EmcXm2CmdPadCtrl2 = 0x770c0000; -SDRAM[3].Ch1EmcXm2CmdPadCtrl3 = 0x050c0000; -SDRAM[3].Ch1EmcXm2CmdPadCtrl4 = 0x00000000; -SDRAM[3].Ch1EmcXm2DqPadCtrl = 0x770c2990; -SDRAM[3].Ch1EmcXm2DqPadCtrl2 = 0x00000000; -SDRAM[3].Ch1EmcXm2DqsPadCtrl = 0x770c1515; -SDRAM[3].Ch1EmcXm2DqsPadCtrl3 = 0x10410400; -SDRAM[3].Ch1EmcXm2DqsPadCtrl4 = 0x00249249; diff --git a/dalmore/E1611_Hynix_2GB_H5TC4G63MFR-PBA_792Mhz_r403_v05.bct.cfg b/dalmore/E1611_Hynix_2GB_H5TC4G63MFR-PBA_792Mhz_r403_v05.bct.cfg deleted file mode 100644 index ebce4be..0000000 --- a/dalmore/E1611_Hynix_2GB_H5TC4G63MFR-PBA_792Mhz_r403_v05.bct.cfg +++ /dev/null @@ -1,1273 +0,0 @@ -# Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. -# -# This software is provided 'as-is', without any express or implied -# warranty. In no event will the authors be held liable for any damages -# arising from the use of this software. -# -# Permission is granted to anyone to use this software for any purpose, -# including commercial applications, and to alter it and redistribute it -# freely, subject to the following restrictions: -# -# 1. The origin of this software must not be misrepresented; you must not -# claim that you wrote the original software. If you use this software -# in a product, an acknowledgment in the product documentation would be -# appreciated but is not required. -# 2. Altered source versions must be plainly marked as such, and must not be -# misrepresented as being the original software. -# 3. This notice may not be removed or altered from any source distribution. - -Version = 0x00350001; -BlockSize = 0x00004000; -PageSize = 0x00000200; -PartitionSize = 0x01000000; -OdmData = 0x800d8000; - -DevType[0] = NvBootDevType_Sdmmc; -DeviceParam[0].SdmmcParams.ClockDivider = 0x00000009; -DeviceParam[0].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_8Bit; -DeviceParam[0].SdmmcParams.MaxPowerClassSupported = 0x00000000; -DeviceParam[0].SdmmcParams.MultiPageSupport = 0x00000000; - -SDRAM[0].MemoryType = NvBootMemoryType_Ddr3; -SDRAM[0].PllMInputDivider = 0x00000001; -SDRAM[0].PllMFeedbackDivider = 0x00000042; -SDRAM[0].PllMStableTime = 0x0000012c; -SDRAM[0].PllMSetupControl = 0x00000000; -SDRAM[0].PllMSelectDiv2 = 0x00000000; -SDRAM[0].PllMPDLshiftPh45 = 0x00000000; -SDRAM[0].PllMPDLshiftPh90 = 0x00000000; -SDRAM[0].PllMPDLshiftPh135 = 0x00000000; -SDRAM[0].PllMKCP = 0x00000000; -SDRAM[0].PllMKVCO = 0x00000000; -SDRAM[0].EmcBctSpare0 = 0x00000bad; -SDRAM[0].EmcClockSource = 0x80000000; -SDRAM[0].EmcAutoCalInterval = 0x001fffff; -SDRAM[0].EmcAutoCalConfig = 0xa0f10f0f; -SDRAM[0].EmcAutoCalConfig2 = 0x00000000; -SDRAM[0].EmcAutoCalConfig3 = 0x00000000; -SDRAM[0].EmcAutoCalWait = 0x00000064; -SDRAM[0].EmcAdrCfg = 0x00000000; -SDRAM[0].EmcPinProgramWait = 0x00000001; -SDRAM[0].EmcPinExtraWait = 0x00000000; -SDRAM[0].EmcTimingControlWait = 0x00000001; -SDRAM[0].EmcRc = 0x00000024; -SDRAM[0].EmcRfc = 0x000000cd; -SDRAM[0].EmcRfcSlr = 0x00000000; -SDRAM[0].EmcRas = 0x00000019; -SDRAM[0].EmcRp = 0x0000000a; -SDRAM[0].EmcR2r = 0x00000000; -SDRAM[0].EmcW2w = 0x00000000; -SDRAM[0].EmcR2w = 0x00000009; -SDRAM[0].EmcW2r = 0x0000000d; -SDRAM[0].EmcR2p = 0x00000004; -SDRAM[0].EmcW2p = 0x00000013; -SDRAM[0].EmcRdRcd = 0x0000000a; -SDRAM[0].EmcWrRcd = 0x0000000a; -SDRAM[0].EmcRrd = 0x00000003; -SDRAM[0].EmcRext = 0x00000001; -SDRAM[0].EmcWext = 0x00000000; -SDRAM[0].EmcWdv = 0x00000006; -SDRAM[0].EmcWdvMask = 0x00000006; -SDRAM[0].EmcQUse = 0x0000000b; -SDRAM[0].EmcIbdly = 0x0000000b; -SDRAM[0].EmcEInput = 0x00000008; -SDRAM[0].EmcEInputDuration = 0x00000006; -SDRAM[0].EmcPutermExtra = 0x000d000a; -SDRAM[0].EmcCdbCntl1 = 0x00000000; -SDRAM[0].EmcCdbCntl2 = 0x00000000; -SDRAM[0].EmcQRst = 0x00000008; -SDRAM[0].EmcQSafe = 0x0000000d; -SDRAM[0].EmcRdv = 0x00000014; -SDRAM[0].EmcRdvMask = 0x00000014; -SDRAM[0].EmcCtt = 0x00000000; -SDRAM[0].EmcCttDuration = 0x00000000; -SDRAM[0].EmcRefresh = 0x000017e4; -SDRAM[0].EmcBurstRefreshNum = 0x00000000; -SDRAM[0].EmcPreRefreshReqCnt = 0x000005f9; -SDRAM[0].EmcPdEx2Wr = 0x00000003; -SDRAM[0].EmcPdEx2Rd = 0x00000012; -SDRAM[0].EmcPChg2Pden = 0x00000001; -SDRAM[0].EmcAct2Pden = 0x00000000; -SDRAM[0].EmcAr2Pden = 0x000000c6; -SDRAM[0].EmcRw2Pden = 0x00000018; -SDRAM[0].EmcTxsr = 0x000000d6; -SDRAM[0].EmcTxsrDll = 0x00000200; -SDRAM[0].EmcTcke = 0x00000005; -SDRAM[0].EmcTckesr = 0x00000005; -SDRAM[0].EmcTpd = 0x00000005; -SDRAM[0].EmcTfaw = 0x00000020; -SDRAM[0].EmcTrpab = 0x00000000; -SDRAM[0].EmcTClkStable = 0x00000007; -SDRAM[0].EmcTClkStop = 0x00000008; -SDRAM[0].EmcTRefBw = 0x00001825; -SDRAM[0].EmcQUseExtra = 0x0000000a; -SDRAM[0].EmcFbioCfg5 = 0x0000ba88; -SDRAM[0].EmcFbioCfg6 = 0x00000006; -SDRAM[0].EmcFbioSpare = 0x02000000; -SDRAM[0].EmcCfgRsv = 0xff00ff00; -SDRAM[0].EmcMrs = 0x80000d71; -SDRAM[0].EmcEmrs = 0x80100002; -SDRAM[0].EmcEmrs2 = 0x80200218; -SDRAM[0].EmcEmrs3 = 0x80300000; -SDRAM[0].EmcMrw1 = 0x00000000; -SDRAM[0].EmcMrw2 = 0x00000000; -SDRAM[0].EmcMrw3 = 0x00000000; -SDRAM[0].EmcMrw4 = 0x00000000; -SDRAM[0].EmcMrwExtra = 0x00000000; -SDRAM[0].EmcWarmBootMrwExtra = 0x00000000; -SDRAM[0].EmcWarmBootExtraModeRegWriteEnable = 0x00000000; -SDRAM[0].EmcExtraModeRegWriteEnable = 0x00000000; -SDRAM[0].EmcMrwResetCommand = 0x00000000; -SDRAM[0].EmcMrwResetNInitWait = 0x00000000; -SDRAM[0].EmcMrsWaitCnt = 0x00f8000f; -SDRAM[0].EmcMrsWaitCnt2 = 0x00f8000f; -SDRAM[0].EmcCfg = 0x73000000; -SDRAM[0].EmcCfg2 = 0x008008c1; -SDRAM[0].EmcDbg = 0x01000400; -SDRAM[0].EmcCmdQ = 0x10004408; -SDRAM[0].EmcMc2EmcQ = 0x06000404; -SDRAM[0].EmcDynSelfRefControl = 0x80003018; -SDRAM[0].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; -SDRAM[0].EmcCfgDigDll = 0xf0070191; -SDRAM[0].EmcCfgDigDllPeriod = 0x00008000; -SDRAM[0].EmcDevSelect = 0x00000002; -SDRAM[0].EmcSelDpdCtrl = 0x00040000; -SDRAM[0].EmcDllXformDqs0 = 0x00000008; -SDRAM[0].EmcDllXformDqs1 = 0x00000008; -SDRAM[0].EmcDllXformDqs2 = 0x00000008; -SDRAM[0].EmcDllXformDqs3 = 0x00000008; -SDRAM[0].EmcDllXformDqs4 = 0x00000008; -SDRAM[0].EmcDllXformDqs5 = 0x00000008; -SDRAM[0].EmcDllXformDqs6 = 0x00000008; -SDRAM[0].EmcDllXformDqs7 = 0x00000008; -SDRAM[0].EmcDllXformQUse0 = 0x00000000; -SDRAM[0].EmcDllXformQUse1 = 0x00000000; -SDRAM[0].EmcDllXformQUse2 = 0x00000000; -SDRAM[0].EmcDllXformQUse3 = 0x00000000; -SDRAM[0].EmcDllXformQUse4 = 0x00000000; -SDRAM[0].EmcDllXformQUse5 = 0x00000000; -SDRAM[0].EmcDllXformQUse6 = 0x00000000; -SDRAM[0].EmcDllXformQUse7 = 0x00000000; -SDRAM[0].EmcDllXformAddr0 = 0x007FC00D; -SDRAM[0].EmcDllXformAddr1 = 0x007FC00D; -SDRAM[0].EmcDllXformAddr2 = 0x007FC00D; -SDRAM[0].EmcDliTrimTxDqs0 = 0x00000000; -SDRAM[0].EmcDliTrimTxDqs1 = 0x00000000; -SDRAM[0].EmcDliTrimTxDqs2 = 0x00000000; -SDRAM[0].EmcDliTrimTxDqs3 = 0x00000000; -SDRAM[0].EmcDliTrimTxDqs4 = 0x00000000; -SDRAM[0].EmcDliTrimTxDqs5 = 0x00000000; -SDRAM[0].EmcDliTrimTxDqs6 = 0x00000000; -SDRAM[0].EmcDliTrimTxDqs7 = 0x00000000; -SDRAM[0].EmcDllXformDq0 = 0x007FC00A; -SDRAM[0].EmcDllXformDq1 = 0x007FC00A; -SDRAM[0].EmcDllXformDq2 = 0x007FC00A; -SDRAM[0].EmcDllXformDq3 = 0x007FC00A; -SDRAM[0].WarmBootWait = 0x00000002; -SDRAM[0].EmcCttTermCtrl = 0x00000802; -SDRAM[0].EmcOdtWrite = 0x80000020; -SDRAM[0].EmcOdtRead = 0x00000000; -SDRAM[0].EmcZcalInterval = 0x00020000; -SDRAM[0].EmcZcalWaitCnt = 0x00000042; -SDRAM[0].EmcZcalMrwCmd = 0x80000000; -SDRAM[0].EmcMrsResetDll = 0x00000000; -SDRAM[0].EmcZcalInitDev0 = 0x80000011; -SDRAM[0].EmcZcalInitDev1 = 0x00000000; -SDRAM[0].EmcZcalInitWait = 0x00000001; -SDRAM[0].EmcZcalWarmColdBootEnables = 0x00000003; -SDRAM[0].EmcMrwLpddr2ZcalWarmBoot = 0x000a00ab; -SDRAM[0].EmcZqCalDdr3WarmBoot = 0x00000011; -SDRAM[0].EmcZcalWarmBootWait = 0x00000001; -SDRAM[0].EmcMrsWarmBootEnable = 0x00000001; -SDRAM[0].EmcMrsResetDllWait = 0x00000000; -SDRAM[0].EmcMrsExtra = 0x80000d05; -SDRAM[0].EmcWarmBootMrsExtra = 0x80100002; -SDRAM[0].EmcEmrsDdr2DllEnable = 0x00000000; -SDRAM[0].EmcMrsDdr2DllReset = 0x00000000; -SDRAM[0].EmcEmrsDdr2OcdCalib = 0x00000000; -SDRAM[0].EmcDdr2Wait = 0x00000000; -SDRAM[0].EmcClkenOverride = 0x00000000; -SDRAM[0].EmcExtraRefreshNum = 0x00000002; -SDRAM[0].EmcClkenOverrideAllWarmBoot = 0x00000000; -SDRAM[0].McClkenOverrideAllWarmBoot = 0x00000000; -SDRAM[0].EmcCfgDigDllPeriodWarmBoot = 0x00000003; -SDRAM[0].PmcVddpSel = 0x00000002; -SDRAM[0].PmcDdrPwr = 0x00000003; -SDRAM[0].PmcDdrCfg = 0x00000092; -SDRAM[0].PmcIoDpdReq = 0x80800000; -SDRAM[0].PmcIoDpd2Req = 0x00000000; -SDRAM[0].PmcRegShort = 0x00000000; -SDRAM[0].PmcENoVttGen = 0x00000000; -SDRAM[0].PmcNoIoPower = 0x00000000; -SDRAM[0].EmcXm2CmdPadCtrl = 0x001112a0; -SDRAM[0].EmcXm2CmdPadCtrl2 = 0x770c0000; -SDRAM[0].EmcXm2CmdPadCtrl3 = 0x050c0000; -SDRAM[0].EmcXm2CmdPadCtrl4 = 0x00000000; -SDRAM[0].EmcXm2DqsPadCtrl = 0x770c1414; -SDRAM[0].EmcXm2DqsPadCtrl2 = 0x0000013d; -SDRAM[0].EmcXm2DqsPadCtrl3 = 0x10410400; -SDRAM[0].EmcXm2DqsPadCtrl4 = 0x00249249; -SDRAM[0].EmcXm2DqPadCtrl = 0x770c2990; -SDRAM[0].EmcXm2DqPadCtrl2 = 0x00000000; -SDRAM[0].EmcXm2ClkPadCtrl = 0x77ffc084; -SDRAM[0].EmcXm2ClkPadCtrl2 = 0x00000b0b; -SDRAM[0].EmcXm2CompPadCtrl = 0x81f1f508; -SDRAM[0].EmcXm2VttGenPadCtrl = 0x07076604; -SDRAM[0].EmcXm2VttGenPadCtrl2 = 0x00000000; -SDRAM[0].EmcAcpdControl = 0x00000000; -SDRAM[0].EmcSwizzleRank0ByteCfg = 0x00000087; -SDRAM[0].EmcSwizzleRank0Byte0 = 0x53614207; -SDRAM[0].EmcSwizzleRank0Byte1 = 0x26043715; -SDRAM[0].EmcSwizzleRank0Byte2 = 0x40517236; -SDRAM[0].EmcSwizzleRank0Byte3 = 0x45370612; -SDRAM[0].EmcSwizzleRank1ByteCfg = 0x00000087; -SDRAM[0].EmcSwizzleRank1Byte0 = 0x53614207; -SDRAM[0].EmcSwizzleRank1Byte1 = 0x26043715; -SDRAM[0].EmcSwizzleRank1Byte2 = 0x40517236; -SDRAM[0].EmcSwizzleRank1Byte3 = 0x45370612; -SDRAM[0].EmcAddrSwizzleStack1a = 0x0396071a; -SDRAM[0].EmcAddrSwizzleStack1b = 0x000425b8; -SDRAM[0].EmcAddrSwizzleStack2a = 0x07412306; -SDRAM[0].EmcAddrSwizzleStack2b = 0x00000598; -SDRAM[0].EmcAddrSwizzleStack3 = 0x00534012; -SDRAM[0].EmcDsrVttgenDrv = 0x0000003f; -SDRAM[0].EmcTxdsrvttgen = 0x00000000; -SDRAM[0].McEmemAdrCfg = 0x00000000; -SDRAM[0].McEmemAdrCfgDev0 = 0x00080303; -SDRAM[0].McEmemAdrCfgDev1 = 0x00080303; -SDRAM[0].McEmemAdrCfgChannelMask = 0x00000640; -SDRAM[0].McEmemAdrCfgChannelMaskPropagationCount = 0x00000008; -SDRAM[0].McEmemAdrCfgBankMask0 = 0x69248003; -SDRAM[0].McEmemAdrCfgBankMask1 = 0x24928000; -SDRAM[0].McEmemAdrCfgBankMask2 = 0x92c94c00; -SDRAM[0].McEmemCfg = 0x00000800; -SDRAM[0].McEmemArbCfg = 0x0e00000b; -SDRAM[0].McEmemArbOutstandingReq = 0x80000190; -SDRAM[0].McEmemArbTimingRcd = 0x00000004; -SDRAM[0].McEmemArbTimingRp = 0x00000005; -SDRAM[0].McEmemArbTimingRc = 0x00000013; -SDRAM[0].McEmemArbTimingRas = 0x0000000c; -SDRAM[0].McEmemArbTimingFaw = 0x0000000f; -SDRAM[0].McEmemArbTimingRrd = 0x00000002; -SDRAM[0].McEmemArbTimingRap2Pre = 0x00000003; -SDRAM[0].McEmemArbTimingWap2Pre = 0x0000000c; -SDRAM[0].McEmemArbTimingR2R = 0x00000002; -SDRAM[0].McEmemArbTimingW2W = 0x00000002; -SDRAM[0].McEmemArbTimingR2W = 0x00000006; -SDRAM[0].McEmemArbTimingW2R = 0x00000008; -SDRAM[0].McEmemArbDaTurns = 0x08060202; -SDRAM[0].McEmemArbDaCovers = 0x00170e13; -SDRAM[0].McEmemArbMisc0 = 0x734c2414; -SDRAM[0].McEmemArbMisc1 = 0x78000000; -SDRAM[0].McEmemArbRing1Throttle = 0x001f0000; -SDRAM[0].McEmemArbOverride = 0x00000083; -SDRAM[0].McEmemArbRsv = 0xff00ff00; -SDRAM[0].McClkenOverride = 0x00000000; -SDRAM[0].McEmcRegMode = 0x00000002; -SDRAM[0].McVideoProtectBom = 0xfff00000; -SDRAM[0].McVideoProtectSizeMb = 0x00000000; -SDRAM[0].McVideoProtectVprOverride = 0x009a4752; -SDRAM[0].McSecCarveoutBom = 0xfff00000; -SDRAM[0].McSecCarveoutSizeMb = 0x00000000; -SDRAM[0].McVideoProtectWriteAccess = 0x00000000; -SDRAM[0].McSecCarveoutProtectWriteAccess = 0x00000000; -SDRAM[0].EmcCaTrainingEnable = 0x00000000; -SDRAM[0].EmcCaTrainingTimingCntl1 = 0x1f7df7df; -SDRAM[0].EmcCaTrainingTimingCntl2 = 0x0000001f; -SDRAM[0].SwizzleRankByteEncode = 0x000022aa; -SDRAM[0].BootRomPatchControl = 0x00000000; -SDRAM[0].BootRomPatchData = 0x00000000; -SDRAM[0].Ch1EmcDllXformDqs0 = 0x00000008; -SDRAM[0].Ch1EmcDllXformDqs1 = 0x00000008; -SDRAM[0].Ch1EmcDllXformDqs2 = 0x00000008; -SDRAM[0].Ch1EmcDllXformDqs3 = 0x00000008; -SDRAM[0].Ch1EmcDllXformDqs4 = 0x00000008; -SDRAM[0].Ch1EmcDllXformDqs5 = 0x00000008; -SDRAM[0].Ch1EmcDllXformDqs6 = 0x00000008; -SDRAM[0].Ch1EmcDllXformDqs7 = 0x00000008; -SDRAM[0].Ch1EmcDllXformQUse0 = 0x00000000; -SDRAM[0].Ch1EmcDllXformQUse1 = 0x00000000; -SDRAM[0].Ch1EmcDllXformQUse2 = 0x00000000; -SDRAM[0].Ch1EmcDllXformQUse3 = 0x00000000; -SDRAM[0].Ch1EmcDllXformQUse4 = 0x00000000; -SDRAM[0].Ch1EmcDllXformQUse5 = 0x00000000; -SDRAM[0].Ch1EmcDllXformQUse6 = 0x00000000; -SDRAM[0].Ch1EmcDllXformQUse7 = 0x00000000; -SDRAM[0].Ch1EmcDliTrimTxDqs0 = 0x00000000; -SDRAM[0].Ch1EmcDliTrimTxDqs1 = 0x00000000; -SDRAM[0].Ch1EmcDliTrimTxDqs2 = 0x00000000; -SDRAM[0].Ch1EmcDliTrimTxDqs3 = 0x00000000; -SDRAM[0].Ch1EmcDliTrimTxDqs4 = 0x00000000; -SDRAM[0].Ch1EmcDliTrimTxDqs5 = 0x00000000; -SDRAM[0].Ch1EmcDliTrimTxDqs6 = 0x00000000; -SDRAM[0].Ch1EmcDliTrimTxDqs7 = 0x00000000; -SDRAM[0].Ch1EmcDllXformDq0 = 0x007FC00A; -SDRAM[0].Ch1EmcDllXformDq1 = 0x007FC00A; -SDRAM[0].Ch1EmcDllXformDq2 = 0x007FC00A; -SDRAM[0].Ch1EmcDllXformDq3 = 0x007FC00A; -SDRAM[0].Ch1EmcSwizzleRank0ByteCfg = 0x000000d2; -SDRAM[0].Ch1EmcSwizzleRank0Byte0 = 0x51430267; -SDRAM[0].Ch1EmcSwizzleRank0Byte1 = 0x13072465; -SDRAM[0].Ch1EmcSwizzleRank0Byte2 = 0x72605314; -SDRAM[0].Ch1EmcSwizzleRank0Byte3 = 0x54073162; -SDRAM[0].Ch1EmcSwizzleRank1ByteCfg = 0x000000d2; -SDRAM[0].Ch1EmcSwizzleRank1Byte0 = 0x51430267; -SDRAM[0].Ch1EmcSwizzleRank1Byte1 = 0x13072465; -SDRAM[0].Ch1EmcSwizzleRank1Byte2 = 0x72605314; -SDRAM[0].Ch1EmcSwizzleRank1Byte3 = 0x54073162; -SDRAM[0].Ch1EmcAddrSwizzleStack1a = 0x79320a61; -SDRAM[0].Ch1EmcAddrSwizzleStack1b = 0x000b8450; -SDRAM[0].Ch1EmcAddrSwizzleStack2a = 0x07623014; -SDRAM[0].Ch1EmcAddrSwizzleStack2b = 0x00000589; -SDRAM[0].Ch1EmcAddrSwizzleStack3 = 0x00530124; -SDRAM[0].Ch1EmcAutoCalConfig = 0xa8f10f0f; -SDRAM[0].Ch1EmcAutoCalConfig2 = 0x00000000; -SDRAM[0].Ch1EmcAutoCalConfig3 = 0x00000000; -SDRAM[0].Ch1EmcCdbCntl1 = 0x00000000; -SDRAM[0].Ch1EmcDllXformAddr0 = 0x007FC00D; -SDRAM[0].Ch1EmcDllXformAddr1 = 0x007FC00D; -SDRAM[0].Ch1EmcDllXformAddr2 = 0x007FC00D; -SDRAM[0].Ch1EmcFbioSpare = 0x02000000; -SDRAM[0].Ch1EmcXm2ClkPadCtrl = 0x77ffc084; -SDRAM[0].Ch1EmcXm2ClkPadCtrl2 = 0x00000b0b; -SDRAM[0].Ch1EmcXm2CmdPadCtrl2 = 0x770c0000; -SDRAM[0].Ch1EmcXm2CmdPadCtrl3 = 0x050c0000; -SDRAM[0].Ch1EmcXm2CmdPadCtrl4 = 0x00000000; -SDRAM[0].Ch1EmcXm2DqPadCtrl = 0x770c2990; -SDRAM[0].Ch1EmcXm2DqPadCtrl2 = 0x00000000; -SDRAM[0].Ch1EmcXm2DqsPadCtrl = 0x770c1515; -SDRAM[0].Ch1EmcXm2DqsPadCtrl3 = 0x10410400; -SDRAM[0].Ch1EmcXm2DqsPadCtrl4 = 0x00249249; - -SDRAM[1].MemoryType = NvBootMemoryType_Ddr3; -SDRAM[1].PllMInputDivider = 0x00000001; -SDRAM[1].PllMFeedbackDivider = 0x00000042; -SDRAM[1].PllMStableTime = 0x0000012c; -SDRAM[1].PllMSetupControl = 0x00000000; -SDRAM[1].PllMSelectDiv2 = 0x00000000; -SDRAM[1].PllMPDLshiftPh45 = 0x00000000; -SDRAM[1].PllMPDLshiftPh90 = 0x00000000; -SDRAM[1].PllMPDLshiftPh135 = 0x00000000; -SDRAM[1].PllMKCP = 0x00000000; -SDRAM[1].PllMKVCO = 0x00000000; -SDRAM[1].EmcBctSpare0 = 0x00000bad; -SDRAM[1].EmcClockSource = 0x80000000; -SDRAM[1].EmcAutoCalInterval = 0x001fffff; -SDRAM[1].EmcAutoCalConfig = 0xa0f10f0f; -SDRAM[1].EmcAutoCalConfig2 = 0x00000000; -SDRAM[1].EmcAutoCalConfig3 = 0x00000000; -SDRAM[1].EmcAutoCalWait = 0x00000064; -SDRAM[1].EmcAdrCfg = 0x00000000; -SDRAM[1].EmcPinProgramWait = 0x00000001; -SDRAM[1].EmcPinExtraWait = 0x00000000; -SDRAM[1].EmcTimingControlWait = 0x00000001; -SDRAM[1].EmcRc = 0x00000024; -SDRAM[1].EmcRfc = 0x000000cd; -SDRAM[1].EmcRfcSlr = 0x00000000; -SDRAM[1].EmcRas = 0x00000019; -SDRAM[1].EmcRp = 0x0000000a; -SDRAM[1].EmcR2r = 0x00000000; -SDRAM[1].EmcW2w = 0x00000000; -SDRAM[1].EmcR2w = 0x00000009; -SDRAM[1].EmcW2r = 0x0000000d; -SDRAM[1].EmcR2p = 0x00000004; -SDRAM[1].EmcW2p = 0x00000013; -SDRAM[1].EmcRdRcd = 0x0000000a; -SDRAM[1].EmcWrRcd = 0x0000000a; -SDRAM[1].EmcRrd = 0x00000003; -SDRAM[1].EmcRext = 0x00000001; -SDRAM[1].EmcWext = 0x00000000; -SDRAM[1].EmcWdv = 0x00000006; -SDRAM[1].EmcWdvMask = 0x00000006; -SDRAM[1].EmcQUse = 0x0000000b; -SDRAM[1].EmcIbdly = 0x0000000b; -SDRAM[1].EmcEInput = 0x00000008; -SDRAM[1].EmcEInputDuration = 0x00000006; -SDRAM[1].EmcPutermExtra = 0x000d000a; -SDRAM[1].EmcCdbCntl1 = 0x00000000; -SDRAM[1].EmcCdbCntl2 = 0x00000000; -SDRAM[1].EmcQRst = 0x00000008; -SDRAM[1].EmcQSafe = 0x0000000d; -SDRAM[1].EmcRdv = 0x00000014; -SDRAM[1].EmcRdvMask = 0x00000014; -SDRAM[1].EmcCtt = 0x00000000; -SDRAM[1].EmcCttDuration = 0x00000000; -SDRAM[1].EmcRefresh = 0x000017e4; -SDRAM[1].EmcBurstRefreshNum = 0x00000000; -SDRAM[1].EmcPreRefreshReqCnt = 0x000005f9; -SDRAM[1].EmcPdEx2Wr = 0x00000003; -SDRAM[1].EmcPdEx2Rd = 0x00000012; -SDRAM[1].EmcPChg2Pden = 0x00000001; -SDRAM[1].EmcAct2Pden = 0x00000000; -SDRAM[1].EmcAr2Pden = 0x000000c6; -SDRAM[1].EmcRw2Pden = 0x00000018; -SDRAM[1].EmcTxsr = 0x000000d6; -SDRAM[1].EmcTxsrDll = 0x00000200; -SDRAM[1].EmcTcke = 0x00000005; -SDRAM[1].EmcTckesr = 0x00000005; -SDRAM[1].EmcTpd = 0x00000005; -SDRAM[1].EmcTfaw = 0x00000020; -SDRAM[1].EmcTrpab = 0x00000000; -SDRAM[1].EmcTClkStable = 0x00000007; -SDRAM[1].EmcTClkStop = 0x00000008; -SDRAM[1].EmcTRefBw = 0x00001825; -SDRAM[1].EmcQUseExtra = 0x0000000a; -SDRAM[1].EmcFbioCfg5 = 0x0000ba88; -SDRAM[1].EmcFbioCfg6 = 0x00000006; -SDRAM[1].EmcFbioSpare = 0x02000000; -SDRAM[1].EmcCfgRsv = 0xff00ff00; -SDRAM[1].EmcMrs = 0x80000d71; -SDRAM[1].EmcEmrs = 0x80100002; -SDRAM[1].EmcEmrs2 = 0x80200218; -SDRAM[1].EmcEmrs3 = 0x80300000; -SDRAM[1].EmcMrw1 = 0x00000000; -SDRAM[1].EmcMrw2 = 0x00000000; -SDRAM[1].EmcMrw3 = 0x00000000; -SDRAM[1].EmcMrw4 = 0x00000000; -SDRAM[1].EmcMrwExtra = 0x00000000; -SDRAM[1].EmcWarmBootMrwExtra = 0x00000000; -SDRAM[1].EmcWarmBootExtraModeRegWriteEnable = 0x00000000; -SDRAM[1].EmcExtraModeRegWriteEnable = 0x00000000; -SDRAM[1].EmcMrwResetCommand = 0x00000000; -SDRAM[1].EmcMrwResetNInitWait = 0x00000000; -SDRAM[1].EmcMrsWaitCnt = 0x00f8000f; -SDRAM[1].EmcMrsWaitCnt2 = 0x00f8000f; -SDRAM[1].EmcCfg = 0x73000000; -SDRAM[1].EmcCfg2 = 0x008008c1; -SDRAM[1].EmcDbg = 0x01000400; -SDRAM[1].EmcCmdQ = 0x10004408; -SDRAM[1].EmcMc2EmcQ = 0x06000404; -SDRAM[1].EmcDynSelfRefControl = 0x80003018; -SDRAM[1].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; -SDRAM[1].EmcCfgDigDll = 0xf0070191; -SDRAM[1].EmcCfgDigDllPeriod = 0x00008000; -SDRAM[1].EmcDevSelect = 0x00000002; -SDRAM[1].EmcSelDpdCtrl = 0x00040000; -SDRAM[1].EmcDllXformDqs0 = 0x00000008; -SDRAM[1].EmcDllXformDqs1 = 0x00000008; -SDRAM[1].EmcDllXformDqs2 = 0x00000008; -SDRAM[1].EmcDllXformDqs3 = 0x00000008; -SDRAM[1].EmcDllXformDqs4 = 0x00000008; -SDRAM[1].EmcDllXformDqs5 = 0x00000008; -SDRAM[1].EmcDllXformDqs6 = 0x00000008; -SDRAM[1].EmcDllXformDqs7 = 0x00000008; -SDRAM[1].EmcDllXformQUse0 = 0x00000000; -SDRAM[1].EmcDllXformQUse1 = 0x00000000; -SDRAM[1].EmcDllXformQUse2 = 0x00000000; -SDRAM[1].EmcDllXformQUse3 = 0x00000000; -SDRAM[1].EmcDllXformQUse4 = 0x00000000; -SDRAM[1].EmcDllXformQUse5 = 0x00000000; -SDRAM[1].EmcDllXformQUse6 = 0x00000000; -SDRAM[1].EmcDllXformQUse7 = 0x00000000; -SDRAM[1].EmcDllXformAddr0 = 0x007FC00D; -SDRAM[1].EmcDllXformAddr1 = 0x007FC00D; -SDRAM[1].EmcDllXformAddr2 = 0x007FC00D; -SDRAM[1].EmcDliTrimTxDqs0 = 0x00000000; -SDRAM[1].EmcDliTrimTxDqs1 = 0x00000000; -SDRAM[1].EmcDliTrimTxDqs2 = 0x00000000; -SDRAM[1].EmcDliTrimTxDqs3 = 0x00000000; -SDRAM[1].EmcDliTrimTxDqs4 = 0x00000000; -SDRAM[1].EmcDliTrimTxDqs5 = 0x00000000; -SDRAM[1].EmcDliTrimTxDqs6 = 0x00000000; -SDRAM[1].EmcDliTrimTxDqs7 = 0x00000000; -SDRAM[1].EmcDllXformDq0 = 0x007FC00A; -SDRAM[1].EmcDllXformDq1 = 0x007FC00A; -SDRAM[1].EmcDllXformDq2 = 0x007FC00A; -SDRAM[1].EmcDllXformDq3 = 0x007FC00A; -SDRAM[1].WarmBootWait = 0x00000002; -SDRAM[1].EmcCttTermCtrl = 0x00000802; -SDRAM[1].EmcOdtWrite = 0x80000020; -SDRAM[1].EmcOdtRead = 0x00000000; -SDRAM[1].EmcZcalInterval = 0x00020000; -SDRAM[1].EmcZcalWaitCnt = 0x00000042; -SDRAM[1].EmcZcalMrwCmd = 0x80000000; -SDRAM[1].EmcMrsResetDll = 0x00000000; -SDRAM[1].EmcZcalInitDev0 = 0x80000011; -SDRAM[1].EmcZcalInitDev1 = 0x00000000; -SDRAM[1].EmcZcalInitWait = 0x00000001; -SDRAM[1].EmcZcalWarmColdBootEnables = 0x00000003; -SDRAM[1].EmcMrwLpddr2ZcalWarmBoot = 0x000a00ab; -SDRAM[1].EmcZqCalDdr3WarmBoot = 0x00000011; -SDRAM[1].EmcZcalWarmBootWait = 0x00000001; -SDRAM[1].EmcMrsWarmBootEnable = 0x00000001; -SDRAM[1].EmcMrsResetDllWait = 0x00000000; -SDRAM[1].EmcMrsExtra = 0x80000d05; -SDRAM[1].EmcWarmBootMrsExtra = 0x80100002; -SDRAM[1].EmcEmrsDdr2DllEnable = 0x00000000; -SDRAM[1].EmcMrsDdr2DllReset = 0x00000000; -SDRAM[1].EmcEmrsDdr2OcdCalib = 0x00000000; -SDRAM[1].EmcDdr2Wait = 0x00000000; -SDRAM[1].EmcClkenOverride = 0x00000000; -SDRAM[1].EmcExtraRefreshNum = 0x00000002; -SDRAM[1].EmcClkenOverrideAllWarmBoot = 0x00000000; -SDRAM[1].McClkenOverrideAllWarmBoot = 0x00000000; -SDRAM[1].EmcCfgDigDllPeriodWarmBoot = 0x00000003; -SDRAM[1].PmcVddpSel = 0x00000002; -SDRAM[1].PmcDdrPwr = 0x00000003; -SDRAM[1].PmcDdrCfg = 0x00000092; -SDRAM[1].PmcIoDpdReq = 0x80800000; -SDRAM[1].PmcIoDpd2Req = 0x00000000; -SDRAM[1].PmcRegShort = 0x00000000; -SDRAM[1].PmcENoVttGen = 0x00000000; -SDRAM[1].PmcNoIoPower = 0x00000000; -SDRAM[1].EmcXm2CmdPadCtrl = 0x001112a0; -SDRAM[1].EmcXm2CmdPadCtrl2 = 0x770c0000; -SDRAM[1].EmcXm2CmdPadCtrl3 = 0x050c0000; -SDRAM[1].EmcXm2CmdPadCtrl4 = 0x00000000; -SDRAM[1].EmcXm2DqsPadCtrl = 0x770c1414; -SDRAM[1].EmcXm2DqsPadCtrl2 = 0x0000013d; -SDRAM[1].EmcXm2DqsPadCtrl3 = 0x10410400; -SDRAM[1].EmcXm2DqsPadCtrl4 = 0x00249249; -SDRAM[1].EmcXm2DqPadCtrl = 0x770c2990; -SDRAM[1].EmcXm2DqPadCtrl2 = 0x00000000; -SDRAM[1].EmcXm2ClkPadCtrl = 0x77ffc084; -SDRAM[1].EmcXm2ClkPadCtrl2 = 0x00000b0b; -SDRAM[1].EmcXm2CompPadCtrl = 0x81f1f508; -SDRAM[1].EmcXm2VttGenPadCtrl = 0x07076604; -SDRAM[1].EmcXm2VttGenPadCtrl2 = 0x00000000; -SDRAM[1].EmcAcpdControl = 0x00000000; -SDRAM[1].EmcSwizzleRank0ByteCfg = 0x00000087; -SDRAM[1].EmcSwizzleRank0Byte0 = 0x53614207; -SDRAM[1].EmcSwizzleRank0Byte1 = 0x26043715; -SDRAM[1].EmcSwizzleRank0Byte2 = 0x40517236; -SDRAM[1].EmcSwizzleRank0Byte3 = 0x45370612; -SDRAM[1].EmcSwizzleRank1ByteCfg = 0x00000087; -SDRAM[1].EmcSwizzleRank1Byte0 = 0x53614207; -SDRAM[1].EmcSwizzleRank1Byte1 = 0x26043715; -SDRAM[1].EmcSwizzleRank1Byte2 = 0x40517236; -SDRAM[1].EmcSwizzleRank1Byte3 = 0x45370612; -SDRAM[1].EmcAddrSwizzleStack1a = 0x0396071a; -SDRAM[1].EmcAddrSwizzleStack1b = 0x000425b8; -SDRAM[1].EmcAddrSwizzleStack2a = 0x07412306; -SDRAM[1].EmcAddrSwizzleStack2b = 0x00000598; -SDRAM[1].EmcAddrSwizzleStack3 = 0x00534012; -SDRAM[1].EmcDsrVttgenDrv = 0x0000003f; -SDRAM[1].EmcTxdsrvttgen = 0x00000000; -SDRAM[1].McEmemAdrCfg = 0x00000000; -SDRAM[1].McEmemAdrCfgDev0 = 0x00080303; -SDRAM[1].McEmemAdrCfgDev1 = 0x00080303; -SDRAM[1].McEmemAdrCfgChannelMask = 0x00000640; -SDRAM[1].McEmemAdrCfgChannelMaskPropagationCount = 0x00000008; -SDRAM[1].McEmemAdrCfgBankMask0 = 0x69248003; -SDRAM[1].McEmemAdrCfgBankMask1 = 0x24928000; -SDRAM[1].McEmemAdrCfgBankMask2 = 0x92c94c00; -SDRAM[1].McEmemCfg = 0x00000800; -SDRAM[1].McEmemArbCfg = 0x0e00000b; -SDRAM[1].McEmemArbOutstandingReq = 0x80000190; -SDRAM[1].McEmemArbTimingRcd = 0x00000004; -SDRAM[1].McEmemArbTimingRp = 0x00000005; -SDRAM[1].McEmemArbTimingRc = 0x00000013; -SDRAM[1].McEmemArbTimingRas = 0x0000000c; -SDRAM[1].McEmemArbTimingFaw = 0x0000000f; -SDRAM[1].McEmemArbTimingRrd = 0x00000002; -SDRAM[1].McEmemArbTimingRap2Pre = 0x00000003; -SDRAM[1].McEmemArbTimingWap2Pre = 0x0000000c; -SDRAM[1].McEmemArbTimingR2R = 0x00000002; -SDRAM[1].McEmemArbTimingW2W = 0x00000002; -SDRAM[1].McEmemArbTimingR2W = 0x00000006; -SDRAM[1].McEmemArbTimingW2R = 0x00000008; -SDRAM[1].McEmemArbDaTurns = 0x08060202; -SDRAM[1].McEmemArbDaCovers = 0x00170e13; -SDRAM[1].McEmemArbMisc0 = 0x734c2414; -SDRAM[1].McEmemArbMisc1 = 0x78000000; -SDRAM[1].McEmemArbRing1Throttle = 0x001f0000; -SDRAM[1].McEmemArbOverride = 0x00000083; -SDRAM[1].McEmemArbRsv = 0xff00ff00; -SDRAM[1].McClkenOverride = 0x00000000; -SDRAM[1].McEmcRegMode = 0x00000002; -SDRAM[1].McVideoProtectBom = 0xfff00000; -SDRAM[1].McVideoProtectSizeMb = 0x00000000; -SDRAM[1].McVideoProtectVprOverride = 0x009a4752; -SDRAM[1].McSecCarveoutBom = 0xfff00000; -SDRAM[1].McSecCarveoutSizeMb = 0x00000000; -SDRAM[1].McVideoProtectWriteAccess = 0x00000000; -SDRAM[1].McSecCarveoutProtectWriteAccess = 0x00000000; -SDRAM[1].EmcCaTrainingEnable = 0x00000000; -SDRAM[1].EmcCaTrainingTimingCntl1 = 0x1f7df7df; -SDRAM[1].EmcCaTrainingTimingCntl2 = 0x0000001f; -SDRAM[1].SwizzleRankByteEncode = 0x000022aa; -SDRAM[1].BootRomPatchControl = 0x00000000; -SDRAM[1].BootRomPatchData = 0x00000000; -SDRAM[1].Ch1EmcDllXformDqs0 = 0x00000008; -SDRAM[1].Ch1EmcDllXformDqs1 = 0x00000008; -SDRAM[1].Ch1EmcDllXformDqs2 = 0x00000008; -SDRAM[1].Ch1EmcDllXformDqs3 = 0x00000008; -SDRAM[1].Ch1EmcDllXformDqs4 = 0x00000008; -SDRAM[1].Ch1EmcDllXformDqs5 = 0x00000008; -SDRAM[1].Ch1EmcDllXformDqs6 = 0x00000008; -SDRAM[1].Ch1EmcDllXformDqs7 = 0x00000008; -SDRAM[1].Ch1EmcDllXformQUse0 = 0x00000000; -SDRAM[1].Ch1EmcDllXformQUse1 = 0x00000000; -SDRAM[1].Ch1EmcDllXformQUse2 = 0x00000000; -SDRAM[1].Ch1EmcDllXformQUse3 = 0x00000000; -SDRAM[1].Ch1EmcDllXformQUse4 = 0x00000000; -SDRAM[1].Ch1EmcDllXformQUse5 = 0x00000000; -SDRAM[1].Ch1EmcDllXformQUse6 = 0x00000000; -SDRAM[1].Ch1EmcDllXformQUse7 = 0x00000000; -SDRAM[1].Ch1EmcDliTrimTxDqs0 = 0x00000000; -SDRAM[1].Ch1EmcDliTrimTxDqs1 = 0x00000000; -SDRAM[1].Ch1EmcDliTrimTxDqs2 = 0x00000000; -SDRAM[1].Ch1EmcDliTrimTxDqs3 = 0x00000000; -SDRAM[1].Ch1EmcDliTrimTxDqs4 = 0x00000000; -SDRAM[1].Ch1EmcDliTrimTxDqs5 = 0x00000000; -SDRAM[1].Ch1EmcDliTrimTxDqs6 = 0x00000000; -SDRAM[1].Ch1EmcDliTrimTxDqs7 = 0x00000000; -SDRAM[1].Ch1EmcDllXformDq0 = 0x007FC00A; -SDRAM[1].Ch1EmcDllXformDq1 = 0x007FC00A; -SDRAM[1].Ch1EmcDllXformDq2 = 0x007FC00A; -SDRAM[1].Ch1EmcDllXformDq3 = 0x007FC00A; -SDRAM[1].Ch1EmcSwizzleRank0ByteCfg = 0x000000d2; -SDRAM[1].Ch1EmcSwizzleRank0Byte0 = 0x51430267; -SDRAM[1].Ch1EmcSwizzleRank0Byte1 = 0x13072465; -SDRAM[1].Ch1EmcSwizzleRank0Byte2 = 0x72605314; -SDRAM[1].Ch1EmcSwizzleRank0Byte3 = 0x54073162; -SDRAM[1].Ch1EmcSwizzleRank1ByteCfg = 0x000000d2; -SDRAM[1].Ch1EmcSwizzleRank1Byte0 = 0x51430267; -SDRAM[1].Ch1EmcSwizzleRank1Byte1 = 0x13072465; -SDRAM[1].Ch1EmcSwizzleRank1Byte2 = 0x72605314; -SDRAM[1].Ch1EmcSwizzleRank1Byte3 = 0x54073162; -SDRAM[1].Ch1EmcAddrSwizzleStack1a = 0x79320a61; -SDRAM[1].Ch1EmcAddrSwizzleStack1b = 0x000b8450; -SDRAM[1].Ch1EmcAddrSwizzleStack2a = 0x07623014; -SDRAM[1].Ch1EmcAddrSwizzleStack2b = 0x00000589; -SDRAM[1].Ch1EmcAddrSwizzleStack3 = 0x00530124; -SDRAM[1].Ch1EmcAutoCalConfig = 0xa8f10f0f; -SDRAM[1].Ch1EmcAutoCalConfig2 = 0x00000000; -SDRAM[1].Ch1EmcAutoCalConfig3 = 0x00000000; -SDRAM[1].Ch1EmcCdbCntl1 = 0x00000000; -SDRAM[1].Ch1EmcDllXformAddr0 = 0x007FC00D; -SDRAM[1].Ch1EmcDllXformAddr1 = 0x007FC00D; -SDRAM[1].Ch1EmcDllXformAddr2 = 0x007FC00D; -SDRAM[1].Ch1EmcFbioSpare = 0x02000000; -SDRAM[1].Ch1EmcXm2ClkPadCtrl = 0x77ffc084; -SDRAM[1].Ch1EmcXm2ClkPadCtrl2 = 0x00000b0b; -SDRAM[1].Ch1EmcXm2CmdPadCtrl2 = 0x770c0000; -SDRAM[1].Ch1EmcXm2CmdPadCtrl3 = 0x050c0000; -SDRAM[1].Ch1EmcXm2CmdPadCtrl4 = 0x00000000; -SDRAM[1].Ch1EmcXm2DqPadCtrl = 0x770c2990; -SDRAM[1].Ch1EmcXm2DqPadCtrl2 = 0x00000000; -SDRAM[1].Ch1EmcXm2DqsPadCtrl = 0x770c1515; -SDRAM[1].Ch1EmcXm2DqsPadCtrl3 = 0x10410400; -SDRAM[1].Ch1EmcXm2DqsPadCtrl4 = 0x00249249; - -SDRAM[2].MemoryType = NvBootMemoryType_Ddr3; -SDRAM[2].PllMInputDivider = 0x00000001; -SDRAM[2].PllMFeedbackDivider = 0x00000042; -SDRAM[2].PllMStableTime = 0x0000012c; -SDRAM[2].PllMSetupControl = 0x00000000; -SDRAM[2].PllMSelectDiv2 = 0x00000000; -SDRAM[2].PllMPDLshiftPh45 = 0x00000000; -SDRAM[2].PllMPDLshiftPh90 = 0x00000000; -SDRAM[2].PllMPDLshiftPh135 = 0x00000000; -SDRAM[2].PllMKCP = 0x00000000; -SDRAM[2].PllMKVCO = 0x00000000; -SDRAM[2].EmcBctSpare0 = 0x00000bad; -SDRAM[2].EmcClockSource = 0x80000000; -SDRAM[2].EmcAutoCalInterval = 0x001fffff; -SDRAM[2].EmcAutoCalConfig = 0xa0f10f0f; -SDRAM[2].EmcAutoCalConfig2 = 0x00000000; -SDRAM[2].EmcAutoCalConfig3 = 0x00000000; -SDRAM[2].EmcAutoCalWait = 0x00000064; -SDRAM[2].EmcAdrCfg = 0x00000000; -SDRAM[2].EmcPinProgramWait = 0x00000001; -SDRAM[2].EmcPinExtraWait = 0x00000000; -SDRAM[2].EmcTimingControlWait = 0x00000001; -SDRAM[2].EmcRc = 0x00000024; -SDRAM[2].EmcRfc = 0x000000cd; -SDRAM[2].EmcRfcSlr = 0x00000000; -SDRAM[2].EmcRas = 0x00000019; -SDRAM[2].EmcRp = 0x0000000a; -SDRAM[2].EmcR2r = 0x00000000; -SDRAM[2].EmcW2w = 0x00000000; -SDRAM[2].EmcR2w = 0x00000009; -SDRAM[2].EmcW2r = 0x0000000d; -SDRAM[2].EmcR2p = 0x00000004; -SDRAM[2].EmcW2p = 0x00000013; -SDRAM[2].EmcRdRcd = 0x0000000a; -SDRAM[2].EmcWrRcd = 0x0000000a; -SDRAM[2].EmcRrd = 0x00000003; -SDRAM[2].EmcRext = 0x00000001; -SDRAM[2].EmcWext = 0x00000000; -SDRAM[2].EmcWdv = 0x00000006; -SDRAM[2].EmcWdvMask = 0x00000006; -SDRAM[2].EmcQUse = 0x0000000b; -SDRAM[2].EmcIbdly = 0x0000000b; -SDRAM[2].EmcEInput = 0x00000008; -SDRAM[2].EmcEInputDuration = 0x00000006; -SDRAM[2].EmcPutermExtra = 0x000d000a; -SDRAM[2].EmcCdbCntl1 = 0x00000000; -SDRAM[2].EmcCdbCntl2 = 0x00000000; -SDRAM[2].EmcQRst = 0x00000008; -SDRAM[2].EmcQSafe = 0x0000000d; -SDRAM[2].EmcRdv = 0x00000014; -SDRAM[2].EmcRdvMask = 0x00000014; -SDRAM[2].EmcCtt = 0x00000000; -SDRAM[2].EmcCttDuration = 0x00000000; -SDRAM[2].EmcRefresh = 0x000017e4; -SDRAM[2].EmcBurstRefreshNum = 0x00000000; -SDRAM[2].EmcPreRefreshReqCnt = 0x000005f9; -SDRAM[2].EmcPdEx2Wr = 0x00000003; -SDRAM[2].EmcPdEx2Rd = 0x00000012; -SDRAM[2].EmcPChg2Pden = 0x00000001; -SDRAM[2].EmcAct2Pden = 0x00000000; -SDRAM[2].EmcAr2Pden = 0x000000c6; -SDRAM[2].EmcRw2Pden = 0x00000018; -SDRAM[2].EmcTxsr = 0x000000d6; -SDRAM[2].EmcTxsrDll = 0x00000200; -SDRAM[2].EmcTcke = 0x00000005; -SDRAM[2].EmcTckesr = 0x00000005; -SDRAM[2].EmcTpd = 0x00000005; -SDRAM[2].EmcTfaw = 0x00000020; -SDRAM[2].EmcTrpab = 0x00000000; -SDRAM[2].EmcTClkStable = 0x00000007; -SDRAM[2].EmcTClkStop = 0x00000008; -SDRAM[2].EmcTRefBw = 0x00001825; -SDRAM[2].EmcQUseExtra = 0x0000000a; -SDRAM[2].EmcFbioCfg5 = 0x0000ba88; -SDRAM[2].EmcFbioCfg6 = 0x00000006; -SDRAM[2].EmcFbioSpare = 0x02000000; -SDRAM[2].EmcCfgRsv = 0xff00ff00; -SDRAM[2].EmcMrs = 0x80000d71; -SDRAM[2].EmcEmrs = 0x80100002; -SDRAM[2].EmcEmrs2 = 0x80200218; -SDRAM[2].EmcEmrs3 = 0x80300000; -SDRAM[2].EmcMrw1 = 0x00000000; -SDRAM[2].EmcMrw2 = 0x00000000; -SDRAM[2].EmcMrw3 = 0x00000000; -SDRAM[2].EmcMrw4 = 0x00000000; -SDRAM[2].EmcMrwExtra = 0x00000000; -SDRAM[2].EmcWarmBootMrwExtra = 0x00000000; -SDRAM[2].EmcWarmBootExtraModeRegWriteEnable = 0x00000000; -SDRAM[2].EmcExtraModeRegWriteEnable = 0x00000000; -SDRAM[2].EmcMrwResetCommand = 0x00000000; -SDRAM[2].EmcMrwResetNInitWait = 0x00000000; -SDRAM[2].EmcMrsWaitCnt = 0x00f8000f; -SDRAM[2].EmcMrsWaitCnt2 = 0x00f8000f; -SDRAM[2].EmcCfg = 0x73000000; -SDRAM[2].EmcCfg2 = 0x008008c1; -SDRAM[2].EmcDbg = 0x01000400; -SDRAM[2].EmcCmdQ = 0x10004408; -SDRAM[2].EmcMc2EmcQ = 0x06000404; -SDRAM[2].EmcDynSelfRefControl = 0x80003018; -SDRAM[2].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; -SDRAM[2].EmcCfgDigDll = 0xf0070191; -SDRAM[2].EmcCfgDigDllPeriod = 0x00008000; -SDRAM[2].EmcDevSelect = 0x00000002; -SDRAM[2].EmcSelDpdCtrl = 0x00040000; -SDRAM[2].EmcDllXformDqs0 = 0x00000008; -SDRAM[2].EmcDllXformDqs1 = 0x00000008; -SDRAM[2].EmcDllXformDqs2 = 0x00000008; -SDRAM[2].EmcDllXformDqs3 = 0x00000008; -SDRAM[2].EmcDllXformDqs4 = 0x00000008; -SDRAM[2].EmcDllXformDqs5 = 0x00000008; -SDRAM[2].EmcDllXformDqs6 = 0x00000008; -SDRAM[2].EmcDllXformDqs7 = 0x00000008; -SDRAM[2].EmcDllXformQUse0 = 0x00000000; -SDRAM[2].EmcDllXformQUse1 = 0x00000000; -SDRAM[2].EmcDllXformQUse2 = 0x00000000; -SDRAM[2].EmcDllXformQUse3 = 0x00000000; -SDRAM[2].EmcDllXformQUse4 = 0x00000000; -SDRAM[2].EmcDllXformQUse5 = 0x00000000; -SDRAM[2].EmcDllXformQUse6 = 0x00000000; -SDRAM[2].EmcDllXformQUse7 = 0x00000000; -SDRAM[2].EmcDllXformAddr0 = 0x007FC00D; -SDRAM[2].EmcDllXformAddr1 = 0x007FC00D; -SDRAM[2].EmcDllXformAddr2 = 0x007FC00D; -SDRAM[2].EmcDliTrimTxDqs0 = 0x00000000; -SDRAM[2].EmcDliTrimTxDqs1 = 0x00000000; -SDRAM[2].EmcDliTrimTxDqs2 = 0x00000000; -SDRAM[2].EmcDliTrimTxDqs3 = 0x00000000; -SDRAM[2].EmcDliTrimTxDqs4 = 0x00000000; -SDRAM[2].EmcDliTrimTxDqs5 = 0x00000000; -SDRAM[2].EmcDliTrimTxDqs6 = 0x00000000; -SDRAM[2].EmcDliTrimTxDqs7 = 0x00000000; -SDRAM[2].EmcDllXformDq0 = 0x007FC00A; -SDRAM[2].EmcDllXformDq1 = 0x007FC00A; -SDRAM[2].EmcDllXformDq2 = 0x007FC00A; -SDRAM[2].EmcDllXformDq3 = 0x007FC00A; -SDRAM[2].WarmBootWait = 0x00000002; -SDRAM[2].EmcCttTermCtrl = 0x00000802; -SDRAM[2].EmcOdtWrite = 0x80000020; -SDRAM[2].EmcOdtRead = 0x00000000; -SDRAM[2].EmcZcalInterval = 0x00020000; -SDRAM[2].EmcZcalWaitCnt = 0x00000042; -SDRAM[2].EmcZcalMrwCmd = 0x80000000; -SDRAM[2].EmcMrsResetDll = 0x00000000; -SDRAM[2].EmcZcalInitDev0 = 0x80000011; -SDRAM[2].EmcZcalInitDev1 = 0x00000000; -SDRAM[2].EmcZcalInitWait = 0x00000001; -SDRAM[2].EmcZcalWarmColdBootEnables = 0x00000003; -SDRAM[2].EmcMrwLpddr2ZcalWarmBoot = 0x000a00ab; -SDRAM[2].EmcZqCalDdr3WarmBoot = 0x00000011; -SDRAM[2].EmcZcalWarmBootWait = 0x00000001; -SDRAM[2].EmcMrsWarmBootEnable = 0x00000001; -SDRAM[2].EmcMrsResetDllWait = 0x00000000; -SDRAM[2].EmcMrsExtra = 0x80000d05; -SDRAM[2].EmcWarmBootMrsExtra = 0x80100002; -SDRAM[2].EmcEmrsDdr2DllEnable = 0x00000000; -SDRAM[2].EmcMrsDdr2DllReset = 0x00000000; -SDRAM[2].EmcEmrsDdr2OcdCalib = 0x00000000; -SDRAM[2].EmcDdr2Wait = 0x00000000; -SDRAM[2].EmcClkenOverride = 0x00000000; -SDRAM[2].EmcExtraRefreshNum = 0x00000002; -SDRAM[2].EmcClkenOverrideAllWarmBoot = 0x00000000; -SDRAM[2].McClkenOverrideAllWarmBoot = 0x00000000; -SDRAM[2].EmcCfgDigDllPeriodWarmBoot = 0x00000003; -SDRAM[2].PmcVddpSel = 0x00000002; -SDRAM[2].PmcDdrPwr = 0x00000003; -SDRAM[2].PmcDdrCfg = 0x00000092; -SDRAM[2].PmcIoDpdReq = 0x80800000; -SDRAM[2].PmcIoDpd2Req = 0x00000000; -SDRAM[2].PmcRegShort = 0x00000000; -SDRAM[2].PmcENoVttGen = 0x00000000; -SDRAM[2].PmcNoIoPower = 0x00000000; -SDRAM[2].EmcXm2CmdPadCtrl = 0x001112a0; -SDRAM[2].EmcXm2CmdPadCtrl2 = 0x770c0000; -SDRAM[2].EmcXm2CmdPadCtrl3 = 0x050c0000; -SDRAM[2].EmcXm2CmdPadCtrl4 = 0x00000000; -SDRAM[2].EmcXm2DqsPadCtrl = 0x770c1414; -SDRAM[2].EmcXm2DqsPadCtrl2 = 0x0000013d; -SDRAM[2].EmcXm2DqsPadCtrl3 = 0x10410400; -SDRAM[2].EmcXm2DqsPadCtrl4 = 0x00249249; -SDRAM[2].EmcXm2DqPadCtrl = 0x770c2990; -SDRAM[2].EmcXm2DqPadCtrl2 = 0x00000000; -SDRAM[2].EmcXm2ClkPadCtrl = 0x77ffc084; -SDRAM[2].EmcXm2ClkPadCtrl2 = 0x00000b0b; -SDRAM[2].EmcXm2CompPadCtrl = 0x81f1f508; -SDRAM[2].EmcXm2VttGenPadCtrl = 0x07076604; -SDRAM[2].EmcXm2VttGenPadCtrl2 = 0x00000000; -SDRAM[2].EmcAcpdControl = 0x00000000; -SDRAM[2].EmcSwizzleRank0ByteCfg = 0x00000087; -SDRAM[2].EmcSwizzleRank0Byte0 = 0x53614207; -SDRAM[2].EmcSwizzleRank0Byte1 = 0x26043715; -SDRAM[2].EmcSwizzleRank0Byte2 = 0x40517236; -SDRAM[2].EmcSwizzleRank0Byte3 = 0x45370612; -SDRAM[2].EmcSwizzleRank1ByteCfg = 0x00000087; -SDRAM[2].EmcSwizzleRank1Byte0 = 0x53614207; -SDRAM[2].EmcSwizzleRank1Byte1 = 0x26043715; -SDRAM[2].EmcSwizzleRank1Byte2 = 0x40517236; -SDRAM[2].EmcSwizzleRank1Byte3 = 0x45370612; -SDRAM[2].EmcAddrSwizzleStack1a = 0x0396071a; -SDRAM[2].EmcAddrSwizzleStack1b = 0x000425b8; -SDRAM[2].EmcAddrSwizzleStack2a = 0x07412306; -SDRAM[2].EmcAddrSwizzleStack2b = 0x00000598; -SDRAM[2].EmcAddrSwizzleStack3 = 0x00534012; -SDRAM[2].EmcDsrVttgenDrv = 0x0000003f; -SDRAM[2].EmcTxdsrvttgen = 0x00000000; -SDRAM[2].McEmemAdrCfg = 0x00000000; -SDRAM[2].McEmemAdrCfgDev0 = 0x00080303; -SDRAM[2].McEmemAdrCfgDev1 = 0x00080303; -SDRAM[2].McEmemAdrCfgChannelMask = 0x00000640; -SDRAM[2].McEmemAdrCfgChannelMaskPropagationCount = 0x00000008; -SDRAM[2].McEmemAdrCfgBankMask0 = 0x69248003; -SDRAM[2].McEmemAdrCfgBankMask1 = 0x24928000; -SDRAM[2].McEmemAdrCfgBankMask2 = 0x92c94c00; -SDRAM[2].McEmemCfg = 0x00000800; -SDRAM[2].McEmemArbCfg = 0x0e00000b; -SDRAM[2].McEmemArbOutstandingReq = 0x80000190; -SDRAM[2].McEmemArbTimingRcd = 0x00000004; -SDRAM[2].McEmemArbTimingRp = 0x00000005; -SDRAM[2].McEmemArbTimingRc = 0x00000013; -SDRAM[2].McEmemArbTimingRas = 0x0000000c; -SDRAM[2].McEmemArbTimingFaw = 0x0000000f; -SDRAM[2].McEmemArbTimingRrd = 0x00000002; -SDRAM[2].McEmemArbTimingRap2Pre = 0x00000003; -SDRAM[2].McEmemArbTimingWap2Pre = 0x0000000c; -SDRAM[2].McEmemArbTimingR2R = 0x00000002; -SDRAM[2].McEmemArbTimingW2W = 0x00000002; -SDRAM[2].McEmemArbTimingR2W = 0x00000006; -SDRAM[2].McEmemArbTimingW2R = 0x00000008; -SDRAM[2].McEmemArbDaTurns = 0x08060202; -SDRAM[2].McEmemArbDaCovers = 0x00170e13; -SDRAM[2].McEmemArbMisc0 = 0x734c2414; -SDRAM[2].McEmemArbMisc1 = 0x78000000; -SDRAM[2].McEmemArbRing1Throttle = 0x001f0000; -SDRAM[2].McEmemArbOverride = 0x00000083; -SDRAM[2].McEmemArbRsv = 0xff00ff00; -SDRAM[2].McClkenOverride = 0x00000000; -SDRAM[2].McEmcRegMode = 0x00000002; -SDRAM[2].McVideoProtectBom = 0xfff00000; -SDRAM[2].McVideoProtectSizeMb = 0x00000000; -SDRAM[2].McVideoProtectVprOverride = 0x009a4752; -SDRAM[2].McSecCarveoutBom = 0xfff00000; -SDRAM[2].McSecCarveoutSizeMb = 0x00000000; -SDRAM[2].McVideoProtectWriteAccess = 0x00000000; -SDRAM[2].McSecCarveoutProtectWriteAccess = 0x00000000; -SDRAM[2].EmcCaTrainingEnable = 0x00000000; -SDRAM[2].EmcCaTrainingTimingCntl1 = 0x1f7df7df; -SDRAM[2].EmcCaTrainingTimingCntl2 = 0x0000001f; -SDRAM[2].SwizzleRankByteEncode = 0x000022aa; -SDRAM[2].BootRomPatchControl = 0x00000000; -SDRAM[2].BootRomPatchData = 0x00000000; -SDRAM[2].Ch1EmcDllXformDqs0 = 0x00000008; -SDRAM[2].Ch1EmcDllXformDqs1 = 0x00000008; -SDRAM[2].Ch1EmcDllXformDqs2 = 0x00000008; -SDRAM[2].Ch1EmcDllXformDqs3 = 0x00000008; -SDRAM[2].Ch1EmcDllXformDqs4 = 0x00000008; -SDRAM[2].Ch1EmcDllXformDqs5 = 0x00000008; -SDRAM[2].Ch1EmcDllXformDqs6 = 0x00000008; -SDRAM[2].Ch1EmcDllXformDqs7 = 0x00000008; -SDRAM[2].Ch1EmcDllXformQUse0 = 0x00000000; -SDRAM[2].Ch1EmcDllXformQUse1 = 0x00000000; -SDRAM[2].Ch1EmcDllXformQUse2 = 0x00000000; -SDRAM[2].Ch1EmcDllXformQUse3 = 0x00000000; -SDRAM[2].Ch1EmcDllXformQUse4 = 0x00000000; -SDRAM[2].Ch1EmcDllXformQUse5 = 0x00000000; -SDRAM[2].Ch1EmcDllXformQUse6 = 0x00000000; -SDRAM[2].Ch1EmcDllXformQUse7 = 0x00000000; -SDRAM[2].Ch1EmcDliTrimTxDqs0 = 0x00000000; -SDRAM[2].Ch1EmcDliTrimTxDqs1 = 0x00000000; -SDRAM[2].Ch1EmcDliTrimTxDqs2 = 0x00000000; -SDRAM[2].Ch1EmcDliTrimTxDqs3 = 0x00000000; -SDRAM[2].Ch1EmcDliTrimTxDqs4 = 0x00000000; -SDRAM[2].Ch1EmcDliTrimTxDqs5 = 0x00000000; -SDRAM[2].Ch1EmcDliTrimTxDqs6 = 0x00000000; -SDRAM[2].Ch1EmcDliTrimTxDqs7 = 0x00000000; -SDRAM[2].Ch1EmcDllXformDq0 = 0x007FC00A; -SDRAM[2].Ch1EmcDllXformDq1 = 0x007FC00A; -SDRAM[2].Ch1EmcDllXformDq2 = 0x007FC00A; -SDRAM[2].Ch1EmcDllXformDq3 = 0x007FC00A; -SDRAM[2].Ch1EmcSwizzleRank0ByteCfg = 0x000000d2; -SDRAM[2].Ch1EmcSwizzleRank0Byte0 = 0x51430267; -SDRAM[2].Ch1EmcSwizzleRank0Byte1 = 0x13072465; -SDRAM[2].Ch1EmcSwizzleRank0Byte2 = 0x72605314; -SDRAM[2].Ch1EmcSwizzleRank0Byte3 = 0x54073162; -SDRAM[2].Ch1EmcSwizzleRank1ByteCfg = 0x000000d2; -SDRAM[2].Ch1EmcSwizzleRank1Byte0 = 0x51430267; -SDRAM[2].Ch1EmcSwizzleRank1Byte1 = 0x13072465; -SDRAM[2].Ch1EmcSwizzleRank1Byte2 = 0x72605314; -SDRAM[2].Ch1EmcSwizzleRank1Byte3 = 0x54073162; -SDRAM[2].Ch1EmcAddrSwizzleStack1a = 0x79320a61; -SDRAM[2].Ch1EmcAddrSwizzleStack1b = 0x000b8450; -SDRAM[2].Ch1EmcAddrSwizzleStack2a = 0x07623014; -SDRAM[2].Ch1EmcAddrSwizzleStack2b = 0x00000589; -SDRAM[2].Ch1EmcAddrSwizzleStack3 = 0x00530124; -SDRAM[2].Ch1EmcAutoCalConfig = 0xa8f10f0f; -SDRAM[2].Ch1EmcAutoCalConfig2 = 0x00000000; -SDRAM[2].Ch1EmcAutoCalConfig3 = 0x00000000; -SDRAM[2].Ch1EmcCdbCntl1 = 0x00000000; -SDRAM[2].Ch1EmcDllXformAddr0 = 0x007FC00D; -SDRAM[2].Ch1EmcDllXformAddr1 = 0x007FC00D; -SDRAM[2].Ch1EmcDllXformAddr2 = 0x007FC00D; -SDRAM[2].Ch1EmcFbioSpare = 0x02000000; -SDRAM[2].Ch1EmcXm2ClkPadCtrl = 0x77ffc084; -SDRAM[2].Ch1EmcXm2ClkPadCtrl2 = 0x00000b0b; -SDRAM[2].Ch1EmcXm2CmdPadCtrl2 = 0x770c0000; -SDRAM[2].Ch1EmcXm2CmdPadCtrl3 = 0x050c0000; -SDRAM[2].Ch1EmcXm2CmdPadCtrl4 = 0x00000000; -SDRAM[2].Ch1EmcXm2DqPadCtrl = 0x770c2990; -SDRAM[2].Ch1EmcXm2DqPadCtrl2 = 0x00000000; -SDRAM[2].Ch1EmcXm2DqsPadCtrl = 0x770c1515; -SDRAM[2].Ch1EmcXm2DqsPadCtrl3 = 0x10410400; -SDRAM[2].Ch1EmcXm2DqsPadCtrl4 = 0x00249249; - -SDRAM[3].MemoryType = NvBootMemoryType_Ddr3; -SDRAM[3].PllMInputDivider = 0x00000001; -SDRAM[3].PllMFeedbackDivider = 0x00000042; -SDRAM[3].PllMStableTime = 0x0000012c; -SDRAM[3].PllMSetupControl = 0x00000000; -SDRAM[3].PllMSelectDiv2 = 0x00000000; -SDRAM[3].PllMPDLshiftPh45 = 0x00000000; -SDRAM[3].PllMPDLshiftPh90 = 0x00000000; -SDRAM[3].PllMPDLshiftPh135 = 0x00000000; -SDRAM[3].PllMKCP = 0x00000000; -SDRAM[3].PllMKVCO = 0x00000000; -SDRAM[3].EmcBctSpare0 = 0x00000bad; -SDRAM[3].EmcClockSource = 0x80000000; -SDRAM[3].EmcAutoCalInterval = 0x001fffff; -SDRAM[3].EmcAutoCalConfig = 0xa0f10f0f; -SDRAM[3].EmcAutoCalConfig2 = 0x00000000; -SDRAM[3].EmcAutoCalConfig3 = 0x00000000; -SDRAM[3].EmcAutoCalWait = 0x00000064; -SDRAM[3].EmcAdrCfg = 0x00000000; -SDRAM[3].EmcPinProgramWait = 0x00000001; -SDRAM[3].EmcPinExtraWait = 0x00000000; -SDRAM[3].EmcTimingControlWait = 0x00000001; -SDRAM[3].EmcRc = 0x00000024; -SDRAM[3].EmcRfc = 0x000000cd; -SDRAM[3].EmcRfcSlr = 0x00000000; -SDRAM[3].EmcRas = 0x00000019; -SDRAM[3].EmcRp = 0x0000000a; -SDRAM[3].EmcR2r = 0x00000000; -SDRAM[3].EmcW2w = 0x00000000; -SDRAM[3].EmcR2w = 0x00000009; -SDRAM[3].EmcW2r = 0x0000000d; -SDRAM[3].EmcR2p = 0x00000004; -SDRAM[3].EmcW2p = 0x00000013; -SDRAM[3].EmcRdRcd = 0x0000000a; -SDRAM[3].EmcWrRcd = 0x0000000a; -SDRAM[3].EmcRrd = 0x00000003; -SDRAM[3].EmcRext = 0x00000001; -SDRAM[3].EmcWext = 0x00000000; -SDRAM[3].EmcWdv = 0x00000006; -SDRAM[3].EmcWdvMask = 0x00000006; -SDRAM[3].EmcQUse = 0x0000000b; -SDRAM[3].EmcIbdly = 0x0000000b; -SDRAM[3].EmcEInput = 0x00000008; -SDRAM[3].EmcEInputDuration = 0x00000006; -SDRAM[3].EmcPutermExtra = 0x000d000a; -SDRAM[3].EmcCdbCntl1 = 0x00000000; -SDRAM[3].EmcCdbCntl2 = 0x00000000; -SDRAM[3].EmcQRst = 0x00000008; -SDRAM[3].EmcQSafe = 0x0000000d; -SDRAM[3].EmcRdv = 0x00000014; -SDRAM[3].EmcRdvMask = 0x00000014; -SDRAM[3].EmcCtt = 0x00000000; -SDRAM[3].EmcCttDuration = 0x00000000; -SDRAM[3].EmcRefresh = 0x000017e4; -SDRAM[3].EmcBurstRefreshNum = 0x00000000; -SDRAM[3].EmcPreRefreshReqCnt = 0x000005f9; -SDRAM[3].EmcPdEx2Wr = 0x00000003; -SDRAM[3].EmcPdEx2Rd = 0x00000012; -SDRAM[3].EmcPChg2Pden = 0x00000001; -SDRAM[3].EmcAct2Pden = 0x00000000; -SDRAM[3].EmcAr2Pden = 0x000000c6; -SDRAM[3].EmcRw2Pden = 0x00000018; -SDRAM[3].EmcTxsr = 0x000000d6; -SDRAM[3].EmcTxsrDll = 0x00000200; -SDRAM[3].EmcTcke = 0x00000005; -SDRAM[3].EmcTckesr = 0x00000005; -SDRAM[3].EmcTpd = 0x00000005; -SDRAM[3].EmcTfaw = 0x00000020; -SDRAM[3].EmcTrpab = 0x00000000; -SDRAM[3].EmcTClkStable = 0x00000007; -SDRAM[3].EmcTClkStop = 0x00000008; -SDRAM[3].EmcTRefBw = 0x00001825; -SDRAM[3].EmcQUseExtra = 0x0000000a; -SDRAM[3].EmcFbioCfg5 = 0x0000ba88; -SDRAM[3].EmcFbioCfg6 = 0x00000006; -SDRAM[3].EmcFbioSpare = 0x02000000; -SDRAM[3].EmcCfgRsv = 0xff00ff00; -SDRAM[3].EmcMrs = 0x80000d71; -SDRAM[3].EmcEmrs = 0x80100002; -SDRAM[3].EmcEmrs2 = 0x80200218; -SDRAM[3].EmcEmrs3 = 0x80300000; -SDRAM[3].EmcMrw1 = 0x00000000; -SDRAM[3].EmcMrw2 = 0x00000000; -SDRAM[3].EmcMrw3 = 0x00000000; -SDRAM[3].EmcMrw4 = 0x00000000; -SDRAM[3].EmcMrwExtra = 0x00000000; -SDRAM[3].EmcWarmBootMrwExtra = 0x00000000; -SDRAM[3].EmcWarmBootExtraModeRegWriteEnable = 0x00000000; -SDRAM[3].EmcExtraModeRegWriteEnable = 0x00000000; -SDRAM[3].EmcMrwResetCommand = 0x00000000; -SDRAM[3].EmcMrwResetNInitWait = 0x00000000; -SDRAM[3].EmcMrsWaitCnt = 0x00f8000f; -SDRAM[3].EmcMrsWaitCnt2 = 0x00f8000f; -SDRAM[3].EmcCfg = 0x73000000; -SDRAM[3].EmcCfg2 = 0x008008c1; -SDRAM[3].EmcDbg = 0x01000400; -SDRAM[3].EmcCmdQ = 0x10004408; -SDRAM[3].EmcMc2EmcQ = 0x06000404; -SDRAM[3].EmcDynSelfRefControl = 0x80003018; -SDRAM[3].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; -SDRAM[3].EmcCfgDigDll = 0xf0070191; -SDRAM[3].EmcCfgDigDllPeriod = 0x00008000; -SDRAM[3].EmcDevSelect = 0x00000002; -SDRAM[3].EmcSelDpdCtrl = 0x00040000; -SDRAM[3].EmcDllXformDqs0 = 0x00000008; -SDRAM[3].EmcDllXformDqs1 = 0x00000008; -SDRAM[3].EmcDllXformDqs2 = 0x00000008; -SDRAM[3].EmcDllXformDqs3 = 0x00000008; -SDRAM[3].EmcDllXformDqs4 = 0x00000008; -SDRAM[3].EmcDllXformDqs5 = 0x00000008; -SDRAM[3].EmcDllXformDqs6 = 0x00000008; -SDRAM[3].EmcDllXformDqs7 = 0x00000008; -SDRAM[3].EmcDllXformQUse0 = 0x00000000; -SDRAM[3].EmcDllXformQUse1 = 0x00000000; -SDRAM[3].EmcDllXformQUse2 = 0x00000000; -SDRAM[3].EmcDllXformQUse3 = 0x00000000; -SDRAM[3].EmcDllXformQUse4 = 0x00000000; -SDRAM[3].EmcDllXformQUse5 = 0x00000000; -SDRAM[3].EmcDllXformQUse6 = 0x00000000; -SDRAM[3].EmcDllXformQUse7 = 0x00000000; -SDRAM[3].EmcDllXformAddr0 = 0x007FC00D; -SDRAM[3].EmcDllXformAddr1 = 0x007FC00D; -SDRAM[3].EmcDllXformAddr2 = 0x007FC00D; -SDRAM[3].EmcDliTrimTxDqs0 = 0x00000000; -SDRAM[3].EmcDliTrimTxDqs1 = 0x00000000; -SDRAM[3].EmcDliTrimTxDqs2 = 0x00000000; -SDRAM[3].EmcDliTrimTxDqs3 = 0x00000000; -SDRAM[3].EmcDliTrimTxDqs4 = 0x00000000; -SDRAM[3].EmcDliTrimTxDqs5 = 0x00000000; -SDRAM[3].EmcDliTrimTxDqs6 = 0x00000000; -SDRAM[3].EmcDliTrimTxDqs7 = 0x00000000; -SDRAM[3].EmcDllXformDq0 = 0x007FC00A; -SDRAM[3].EmcDllXformDq1 = 0x007FC00A; -SDRAM[3].EmcDllXformDq2 = 0x007FC00A; -SDRAM[3].EmcDllXformDq3 = 0x007FC00A; -SDRAM[3].WarmBootWait = 0x00000002; -SDRAM[3].EmcCttTermCtrl = 0x00000802; -SDRAM[3].EmcOdtWrite = 0x80000020; -SDRAM[3].EmcOdtRead = 0x00000000; -SDRAM[3].EmcZcalInterval = 0x00020000; -SDRAM[3].EmcZcalWaitCnt = 0x00000042; -SDRAM[3].EmcZcalMrwCmd = 0x80000000; -SDRAM[3].EmcMrsResetDll = 0x00000000; -SDRAM[3].EmcZcalInitDev0 = 0x80000011; -SDRAM[3].EmcZcalInitDev1 = 0x00000000; -SDRAM[3].EmcZcalInitWait = 0x00000001; -SDRAM[3].EmcZcalWarmColdBootEnables = 0x00000003; -SDRAM[3].EmcMrwLpddr2ZcalWarmBoot = 0x000a00ab; -SDRAM[3].EmcZqCalDdr3WarmBoot = 0x00000011; -SDRAM[3].EmcZcalWarmBootWait = 0x00000001; -SDRAM[3].EmcMrsWarmBootEnable = 0x00000001; -SDRAM[3].EmcMrsResetDllWait = 0x00000000; -SDRAM[3].EmcMrsExtra = 0x80000d05; -SDRAM[3].EmcWarmBootMrsExtra = 0x80100002; -SDRAM[3].EmcEmrsDdr2DllEnable = 0x00000000; -SDRAM[3].EmcMrsDdr2DllReset = 0x00000000; -SDRAM[3].EmcEmrsDdr2OcdCalib = 0x00000000; -SDRAM[3].EmcDdr2Wait = 0x00000000; -SDRAM[3].EmcClkenOverride = 0x00000000; -SDRAM[3].EmcExtraRefreshNum = 0x00000002; -SDRAM[3].EmcClkenOverrideAllWarmBoot = 0x00000000; -SDRAM[3].McClkenOverrideAllWarmBoot = 0x00000000; -SDRAM[3].EmcCfgDigDllPeriodWarmBoot = 0x00000003; -SDRAM[3].PmcVddpSel = 0x00000002; -SDRAM[3].PmcDdrPwr = 0x00000003; -SDRAM[3].PmcDdrCfg = 0x00000092; -SDRAM[3].PmcIoDpdReq = 0x80800000; -SDRAM[3].PmcIoDpd2Req = 0x00000000; -SDRAM[3].PmcRegShort = 0x00000000; -SDRAM[3].PmcENoVttGen = 0x00000000; -SDRAM[3].PmcNoIoPower = 0x00000000; -SDRAM[3].EmcXm2CmdPadCtrl = 0x001112a0; -SDRAM[3].EmcXm2CmdPadCtrl2 = 0x770c0000; -SDRAM[3].EmcXm2CmdPadCtrl3 = 0x050c0000; -SDRAM[3].EmcXm2CmdPadCtrl4 = 0x00000000; -SDRAM[3].EmcXm2DqsPadCtrl = 0x770c1414; -SDRAM[3].EmcXm2DqsPadCtrl2 = 0x0000013d; -SDRAM[3].EmcXm2DqsPadCtrl3 = 0x10410400; -SDRAM[3].EmcXm2DqsPadCtrl4 = 0x00249249; -SDRAM[3].EmcXm2DqPadCtrl = 0x770c2990; -SDRAM[3].EmcXm2DqPadCtrl2 = 0x00000000; -SDRAM[3].EmcXm2ClkPadCtrl = 0x77ffc084; -SDRAM[3].EmcXm2ClkPadCtrl2 = 0x00000b0b; -SDRAM[3].EmcXm2CompPadCtrl = 0x81f1f508; -SDRAM[3].EmcXm2VttGenPadCtrl = 0x07076604; -SDRAM[3].EmcXm2VttGenPadCtrl2 = 0x00000000; -SDRAM[3].EmcAcpdControl = 0x00000000; -SDRAM[3].EmcSwizzleRank0ByteCfg = 0x00000087; -SDRAM[3].EmcSwizzleRank0Byte0 = 0x53614207; -SDRAM[3].EmcSwizzleRank0Byte1 = 0x26043715; -SDRAM[3].EmcSwizzleRank0Byte2 = 0x40517236; -SDRAM[3].EmcSwizzleRank0Byte3 = 0x45370612; -SDRAM[3].EmcSwizzleRank1ByteCfg = 0x00000087; -SDRAM[3].EmcSwizzleRank1Byte0 = 0x53614207; -SDRAM[3].EmcSwizzleRank1Byte1 = 0x26043715; -SDRAM[3].EmcSwizzleRank1Byte2 = 0x40517236; -SDRAM[3].EmcSwizzleRank1Byte3 = 0x45370612; -SDRAM[3].EmcAddrSwizzleStack1a = 0x0396071a; -SDRAM[3].EmcAddrSwizzleStack1b = 0x000425b8; -SDRAM[3].EmcAddrSwizzleStack2a = 0x07412306; -SDRAM[3].EmcAddrSwizzleStack2b = 0x00000598; -SDRAM[3].EmcAddrSwizzleStack3 = 0x00534012; -SDRAM[3].EmcDsrVttgenDrv = 0x0000003f; -SDRAM[3].EmcTxdsrvttgen = 0x00000000; -SDRAM[3].McEmemAdrCfg = 0x00000000; -SDRAM[3].McEmemAdrCfgDev0 = 0x00080303; -SDRAM[3].McEmemAdrCfgDev1 = 0x00080303; -SDRAM[3].McEmemAdrCfgChannelMask = 0x00000640; -SDRAM[3].McEmemAdrCfgChannelMaskPropagationCount = 0x00000008; -SDRAM[3].McEmemAdrCfgBankMask0 = 0x69248003; -SDRAM[3].McEmemAdrCfgBankMask1 = 0x24928000; -SDRAM[3].McEmemAdrCfgBankMask2 = 0x92c94c00; -SDRAM[3].McEmemCfg = 0x00000800; -SDRAM[3].McEmemArbCfg = 0x0e00000b; -SDRAM[3].McEmemArbOutstandingReq = 0x80000190; -SDRAM[3].McEmemArbTimingRcd = 0x00000004; -SDRAM[3].McEmemArbTimingRp = 0x00000005; -SDRAM[3].McEmemArbTimingRc = 0x00000013; -SDRAM[3].McEmemArbTimingRas = 0x0000000c; -SDRAM[3].McEmemArbTimingFaw = 0x0000000f; -SDRAM[3].McEmemArbTimingRrd = 0x00000002; -SDRAM[3].McEmemArbTimingRap2Pre = 0x00000003; -SDRAM[3].McEmemArbTimingWap2Pre = 0x0000000c; -SDRAM[3].McEmemArbTimingR2R = 0x00000002; -SDRAM[3].McEmemArbTimingW2W = 0x00000002; -SDRAM[3].McEmemArbTimingR2W = 0x00000006; -SDRAM[3].McEmemArbTimingW2R = 0x00000008; -SDRAM[3].McEmemArbDaTurns = 0x08060202; -SDRAM[3].McEmemArbDaCovers = 0x00170e13; -SDRAM[3].McEmemArbMisc0 = 0x734c2414; -SDRAM[3].McEmemArbMisc1 = 0x78000000; -SDRAM[3].McEmemArbRing1Throttle = 0x001f0000; -SDRAM[3].McEmemArbOverride = 0x00000083; -SDRAM[3].McEmemArbRsv = 0xff00ff00; -SDRAM[3].McClkenOverride = 0x00000000; -SDRAM[3].McEmcRegMode = 0x00000002; -SDRAM[3].McVideoProtectBom = 0xfff00000; -SDRAM[3].McVideoProtectSizeMb = 0x00000000; -SDRAM[3].McVideoProtectVprOverride = 0x009a4752; -SDRAM[3].McSecCarveoutBom = 0xfff00000; -SDRAM[3].McSecCarveoutSizeMb = 0x00000000; -SDRAM[3].McVideoProtectWriteAccess = 0x00000000; -SDRAM[3].McSecCarveoutProtectWriteAccess = 0x00000000; -SDRAM[3].EmcCaTrainingEnable = 0x00000000; -SDRAM[3].EmcCaTrainingTimingCntl1 = 0x1f7df7df; -SDRAM[3].EmcCaTrainingTimingCntl2 = 0x0000001f; -SDRAM[3].SwizzleRankByteEncode = 0x000022aa; -SDRAM[3].BootRomPatchControl = 0x00000000; -SDRAM[3].BootRomPatchData = 0x00000000; -SDRAM[3].Ch1EmcDllXformDqs0 = 0x00000008; -SDRAM[3].Ch1EmcDllXformDqs1 = 0x00000008; -SDRAM[3].Ch1EmcDllXformDqs2 = 0x00000008; -SDRAM[3].Ch1EmcDllXformDqs3 = 0x00000008; -SDRAM[3].Ch1EmcDllXformDqs4 = 0x00000008; -SDRAM[3].Ch1EmcDllXformDqs5 = 0x00000008; -SDRAM[3].Ch1EmcDllXformDqs6 = 0x00000008; -SDRAM[3].Ch1EmcDllXformDqs7 = 0x00000008; -SDRAM[3].Ch1EmcDllXformQUse0 = 0x00000000; -SDRAM[3].Ch1EmcDllXformQUse1 = 0x00000000; -SDRAM[3].Ch1EmcDllXformQUse2 = 0x00000000; -SDRAM[3].Ch1EmcDllXformQUse3 = 0x00000000; -SDRAM[3].Ch1EmcDllXformQUse4 = 0x00000000; -SDRAM[3].Ch1EmcDllXformQUse5 = 0x00000000; -SDRAM[3].Ch1EmcDllXformQUse6 = 0x00000000; -SDRAM[3].Ch1EmcDllXformQUse7 = 0x00000000; -SDRAM[3].Ch1EmcDliTrimTxDqs0 = 0x00000000; -SDRAM[3].Ch1EmcDliTrimTxDqs1 = 0x00000000; -SDRAM[3].Ch1EmcDliTrimTxDqs2 = 0x00000000; -SDRAM[3].Ch1EmcDliTrimTxDqs3 = 0x00000000; -SDRAM[3].Ch1EmcDliTrimTxDqs4 = 0x00000000; -SDRAM[3].Ch1EmcDliTrimTxDqs5 = 0x00000000; -SDRAM[3].Ch1EmcDliTrimTxDqs6 = 0x00000000; -SDRAM[3].Ch1EmcDliTrimTxDqs7 = 0x00000000; -SDRAM[3].Ch1EmcDllXformDq0 = 0x007FC00A; -SDRAM[3].Ch1EmcDllXformDq1 = 0x007FC00A; -SDRAM[3].Ch1EmcDllXformDq2 = 0x007FC00A; -SDRAM[3].Ch1EmcDllXformDq3 = 0x007FC00A; -SDRAM[3].Ch1EmcSwizzleRank0ByteCfg = 0x000000d2; -SDRAM[3].Ch1EmcSwizzleRank0Byte0 = 0x51430267; -SDRAM[3].Ch1EmcSwizzleRank0Byte1 = 0x13072465; -SDRAM[3].Ch1EmcSwizzleRank0Byte2 = 0x72605314; -SDRAM[3].Ch1EmcSwizzleRank0Byte3 = 0x54073162; -SDRAM[3].Ch1EmcSwizzleRank1ByteCfg = 0x000000d2; -SDRAM[3].Ch1EmcSwizzleRank1Byte0 = 0x51430267; -SDRAM[3].Ch1EmcSwizzleRank1Byte1 = 0x13072465; -SDRAM[3].Ch1EmcSwizzleRank1Byte2 = 0x72605314; -SDRAM[3].Ch1EmcSwizzleRank1Byte3 = 0x54073162; -SDRAM[3].Ch1EmcAddrSwizzleStack1a = 0x79320a61; -SDRAM[3].Ch1EmcAddrSwizzleStack1b = 0x000b8450; -SDRAM[3].Ch1EmcAddrSwizzleStack2a = 0x07623014; -SDRAM[3].Ch1EmcAddrSwizzleStack2b = 0x00000589; -SDRAM[3].Ch1EmcAddrSwizzleStack3 = 0x00530124; -SDRAM[3].Ch1EmcAutoCalConfig = 0xa8f10f0f; -SDRAM[3].Ch1EmcAutoCalConfig2 = 0x00000000; -SDRAM[3].Ch1EmcAutoCalConfig3 = 0x00000000; -SDRAM[3].Ch1EmcCdbCntl1 = 0x00000000; -SDRAM[3].Ch1EmcDllXformAddr0 = 0x007FC00D; -SDRAM[3].Ch1EmcDllXformAddr1 = 0x007FC00D; -SDRAM[3].Ch1EmcDllXformAddr2 = 0x007FC00D; -SDRAM[3].Ch1EmcFbioSpare = 0x02000000; -SDRAM[3].Ch1EmcXm2ClkPadCtrl = 0x77ffc084; -SDRAM[3].Ch1EmcXm2ClkPadCtrl2 = 0x00000b0b; -SDRAM[3].Ch1EmcXm2CmdPadCtrl2 = 0x770c0000; -SDRAM[3].Ch1EmcXm2CmdPadCtrl3 = 0x050c0000; -SDRAM[3].Ch1EmcXm2CmdPadCtrl4 = 0x00000000; -SDRAM[3].Ch1EmcXm2DqPadCtrl = 0x770c2990; -SDRAM[3].Ch1EmcXm2DqPadCtrl2 = 0x00000000; -SDRAM[3].Ch1EmcXm2DqsPadCtrl = 0x770c1515; -SDRAM[3].Ch1EmcXm2DqsPadCtrl3 = 0x10410400; -SDRAM[3].Ch1EmcXm2DqsPadCtrl4 = 0x00249249; diff --git a/dalmore/README.txt b/dalmore/README.txt deleted file mode 100644 index b7d8ff8..0000000 --- a/dalmore/README.txt +++ /dev/null @@ -1,7 +0,0 @@ -Three different BCTs exist for Dalmore. To determine which to use, please -determine your SoC SKU (T40X or T40S), and SDRAM frequency (1866MHz, or -1600MHz). - -The image filenames (*.img.cfg) are named based on which SoC SKU and SDRAM -frequency they support. You can look inside these files, at the Bctfile line, -to determine which BCT to use for each configuration. diff --git a/dalmore/build.sh b/dalmore/build.sh deleted file mode 100755 index bac5651..0000000 --- a/dalmore/build.sh +++ /dev/null @@ -1,37 +0,0 @@ -#!/bin/sh - -# Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. -# -# This software is provided 'as-is', without any express or implied -# warranty. In no event will the authors be held liable for any damages -# arising from the use of this software. -# -# Permission is granted to anyone to use this software for any purpose, -# including commercial applications, and to alter it and redistribute it -# freely, subject to the following restrictions: -# -# 1. The origin of this software must not be misrepresented; you must not -# claim that you wrote the original software. If you use this software -# in a product, an acknowledgment in the product documentation would be -# appreciated but is not required. -# 2. Altered source versions must be plainly marked as such, and must not be -# misrepresented as being the original software. -# 3. This notice may not be removed or altered from any source distribution. - -set -e -set -x - -cbootimage -t114 -gbct \ - E1611_Hynix_2GB_H5TC4G63AFR-RDA_792MHz_r403_v03.bct.cfg \ - E1611_Hynix_2GB_H5TC4G63AFR-RDA_792MHz_r403_v03.bct -cbootimage -t114 dalmore-t40x-1866.img.cfg dalmore-t40x-1866.img - -cbootimage -t114 -gbct \ - E1611_Hynix_2GB_H5TC4G63AFR-RDA_792Mhz_r403_v2.bct.cfg \ - E1611_Hynix_2GB_H5TC4G63AFR-RDA_792Mhz_r403_v2.bct -cbootimage -t114 dalmore-t40s-1866.img.cfg dalmore-t40s-1866.img - -cbootimage -t114 -gbct \ - E1611_Hynix_2GB_H5TC4G63MFR-PBA_792Mhz_r403_v05.bct.cfg \ - E1611_Hynix_2GB_H5TC4G63MFR-PBA_792Mhz_r403_v05.bct -cbootimage -t114 dalmore-t40s-1600.img.cfg dalmore-t40s-1600.img diff --git a/dalmore/dalmore-t40s-1600.img.cfg b/dalmore/dalmore-t40s-1600.img.cfg deleted file mode 100644 index 5500798..0000000 --- a/dalmore/dalmore-t40s-1600.img.cfg +++ /dev/null @@ -1,22 +0,0 @@ -# Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. -# -# This software is provided 'as-is', without any express or implied -# warranty. In no event will the authors be held liable for any damages -# arising from the use of this software. -# -# Permission is granted to anyone to use this software for any purpose, -# including commercial applications, and to alter it and redistribute it -# freely, subject to the following restrictions: -# -# 1. The origin of this software must not be misrepresented; you must not -# claim that you wrote the original software. If you use this software -# in a product, an acknowledgment in the product documentation would be -# appreciated but is not required. -# 2. Altered source versions must be plainly marked as such, and must not be -# misrepresented as being the original software. -# 3. This notice may not be removed or altered from any source distribution. - -Version = 0x00350001; -Bctcopy = 1; -Bctfile = E1611_Hynix_2GB_H5TC4G63MFR-PBA_792Mhz_r403_v05.bct; -BootLoader = u-boot.bin,0x80108000,0x80108000,Complete; diff --git a/dalmore/dalmore-t40s-1866.img.cfg b/dalmore/dalmore-t40s-1866.img.cfg deleted file mode 100644 index ef5f7ea..0000000 --- a/dalmore/dalmore-t40s-1866.img.cfg +++ /dev/null @@ -1,22 +0,0 @@ -# Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. -# -# This software is provided 'as-is', without any express or implied -# warranty. In no event will the authors be held liable for any damages -# arising from the use of this software. -# -# Permission is granted to anyone to use this software for any purpose, -# including commercial applications, and to alter it and redistribute it -# freely, subject to the following restrictions: -# -# 1. The origin of this software must not be misrepresented; you must not -# claim that you wrote the original software. If you use this software -# in a product, an acknowledgment in the product documentation would be -# appreciated but is not required. -# 2. Altered source versions must be plainly marked as such, and must not be -# misrepresented as being the original software. -# 3. This notice may not be removed or altered from any source distribution. - -Version = 0x00350001; -Bctcopy = 1; -Bctfile = E1611_Hynix_2GB_H5TC4G63AFR-RDA_792Mhz_r403_v2.bct; -BootLoader = u-boot.bin,0x80108000,0x80108000,Complete; diff --git a/dalmore/dalmore-t40x-1866.img.cfg b/dalmore/dalmore-t40x-1866.img.cfg deleted file mode 100644 index d956fd5..0000000 --- a/dalmore/dalmore-t40x-1866.img.cfg +++ /dev/null @@ -1,22 +0,0 @@ -# Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. -# -# This software is provided 'as-is', without any express or implied -# warranty. In no event will the authors be held liable for any damages -# arising from the use of this software. -# -# Permission is granted to anyone to use this software for any purpose, -# including commercial applications, and to alter it and redistribute it -# freely, subject to the following restrictions: -# -# 1. The origin of this software must not be misrepresented; you must not -# claim that you wrote the original software. If you use this software -# in a product, an acknowledgment in the product documentation would be -# appreciated but is not required. -# 2. Altered source versions must be plainly marked as such, and must not be -# misrepresented as being the original software. -# 3. This notice may not be removed or altered from any source distribution. - -Version = 0x00350001; -Bctcopy = 1; -Bctfile = E1611_Hynix_2GB_H5TC4G63AFR-RDA_792MHz_r403_v03.bct; -BootLoader = u-boot.bin,0x80108000,0x80108000,Complete; diff --git a/harmony/build.sh b/harmony/build.sh deleted file mode 100755 index 2209860..0000000 --- a/harmony/build.sh +++ /dev/null @@ -1,27 +0,0 @@ -#!/bin/sh - -# Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. -# -# This software is provided 'as-is', without any express or implied -# warranty. In no event will the authors be held liable for any damages -# arising from the use of this software. -# -# Permission is granted to anyone to use this software for any purpose, -# including commercial applications, and to alter it and redistribute it -# freely, subject to the following restrictions: -# -# 1. The origin of this software must not be misrepresented; you must not -# claim that you wrote the original software. If you use this software -# in a product, an acknowledgment in the product documentation would be -# appreciated but is not required. -# 2. Altered source versions must be plainly marked as such, and must not be -# misrepresented as being the original software. -# 3. This notice may not be removed or altered from any source distribution. - -set -e -set -x - -cbootimage -gbct \ - harmony_a02_12Mhz_H5PS1G83EFR-S6C_333Mhz_1GB_2K8Nand_HY27UF084G2B-TP.bct.cfg \ - harmony_a02_12Mhz_H5PS1G83EFR-S6C_333Mhz_1GB_2K8Nand_HY27UF084G2B-TP.bct -cbootimage harmony-nand.img.cfg harmony-nand.img diff --git a/harmony/harmony-nand.img.cfg b/harmony/harmony-nand.img.cfg deleted file mode 100644 index ac2bc51..0000000 --- a/harmony/harmony-nand.img.cfg +++ /dev/null @@ -1,22 +0,0 @@ -# Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. -# -# This software is provided 'as-is', without any express or implied -# warranty. In no event will the authors be held liable for any damages -# arising from the use of this software. -# -# Permission is granted to anyone to use this software for any purpose, -# including commercial applications, and to alter it and redistribute it -# freely, subject to the following restrictions: -# -# 1. The origin of this software must not be misrepresented; you must not -# claim that you wrote the original software. If you use this software -# in a product, an acknowledgment in the product documentation would be -# appreciated but is not required. -# 2. Altered source versions must be plainly marked as such, and must not be -# misrepresented as being the original software. -# 3. This notice may not be removed or altered from any source distribution. - -Version = 0x00020001; -Bctcopy = 1; -Bctfile = harmony_a02_12Mhz_H5PS1G83EFR-S6C_333Mhz_1GB_2K8Nand_HY27UF084G2B-TP.bct; -BootLoader = u-boot.bin,0x00108000,0x00108000,Complete; diff --git a/harmony/harmony_a02_12Mhz_H5PS1G83EFR-S6C_333Mhz_1GB_2K8Nand_HY27UF084G2B-TP.bct.cfg b/harmony/harmony_a02_12Mhz_H5PS1G83EFR-S6C_333Mhz_1GB_2K8Nand_HY27UF084G2B-TP.bct.cfg deleted file mode 100644 index f948be1..0000000 --- a/harmony/harmony_a02_12Mhz_H5PS1G83EFR-S6C_333Mhz_1GB_2K8Nand_HY27UF084G2B-TP.bct.cfg +++ /dev/null @@ -1,153 +0,0 @@ -# Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. -# -# This software is provided 'as-is', without any express or implied -# warranty. In no event will the authors be held liable for any damages -# arising from the use of this software. -# -# Permission is granted to anyone to use this software for any purpose, -# including commercial applications, and to alter it and redistribute it -# freely, subject to the following restrictions: -# -# 1. The origin of this software must not be misrepresented; you must not -# claim that you wrote the original software. If you use this software -# in a product, an acknowledgment in the product documentation would be -# appreciated but is not required. -# 2. Altered source versions must be plainly marked as such, and must not be -# misrepresented as being the original software. -# 3. This notice may not be removed or altered from any source distribution. - -Version = 0x00020001; -BlockSize = 0x00020000; -PageSize = 0x00000800; -PartitionSize = 0x01000000; -OdmData = 0x300d8000; - -DevType[0] = NvBootDevType_Nand; -DeviceParam[0].NandParams.ClockDivider = 0x00000004; -DeviceParam[0].NandParams.NandTiming2 = 0x0000000a; -DeviceParam[0].NandParams.NandTiming = 0x3b269213; -DeviceParam[0].NandParams.BlockSizeLog2 = 0x00000000; -DeviceParam[0].NandParams.PageSizeLog2 = 0x00000000; - -DevType[1] = NvBootDevType_Nand; -DeviceParam[1].NandParams.ClockDivider = 0x00000004; -DeviceParam[1].NandParams.NandTiming2 = 0x0000000a; -DeviceParam[1].NandParams.NandTiming = 0x3b269213; -DeviceParam[1].NandParams.BlockSizeLog2 = 0x00000000; -DeviceParam[1].NandParams.PageSizeLog2 = 0x00000000; - -DevType[2] = NvBootDevType_Nand; -DeviceParam[2].NandParams.ClockDivider = 0x00000004; -DeviceParam[2].NandParams.NandTiming2 = 0x0000000a; -DeviceParam[2].NandParams.NandTiming = 0x3b269213; -DeviceParam[2].NandParams.BlockSizeLog2 = 0x00000000; -DeviceParam[2].NandParams.PageSizeLog2 = 0x00000000; - -DevType[3] = NvBootDevType_Nand; -DeviceParam[3].NandParams.ClockDivider = 0x00000004; -DeviceParam[3].NandParams.NandTiming2 = 0x0000000a; -DeviceParam[3].NandParams.NandTiming = 0x3b269213; -DeviceParam[3].NandParams.BlockSizeLog2 = 0x00000000; -DeviceParam[3].NandParams.PageSizeLog2 = 0x00000000; - -SDRAM[0].MemoryType = NvBootMemoryType_Ddr2; -SDRAM[0].PllMChargePumpSetupControl = 0x00000008; -SDRAM[0].PllMLoopFilterSetupControl = 0x00000000; -SDRAM[0].PllMInputDivider = 0x0000000c; -SDRAM[0].PllMFeedbackDivider = 0x0000029a; -SDRAM[0].PllMPostDivider = 0x00000000; -SDRAM[0].PllMStableTime = 0x0000012c; -SDRAM[0].EmcClockDivider = 0x00000001; -SDRAM[0].EmcAutoCalInterval = 0x00000000; -SDRAM[0].EmcAutoCalConfig = 0xe0a61818; -SDRAM[0].EmcAutoCalWait = 0x00000000; -SDRAM[0].EmcPinProgramWait = 0x00000000; -SDRAM[0].EmcRc = 0x00000014; -SDRAM[0].EmcRfc = 0x0000002b; -SDRAM[0].EmcRas = 0x0000000f; -SDRAM[0].EmcRp = 0x00000005; -SDRAM[0].EmcR2w = 0x00000004; -SDRAM[0].EmcW2r = 0x00000005; -SDRAM[0].EmcR2p = 0x00000003; -SDRAM[0].EmcW2p = 0x0000000c; -SDRAM[0].EmcRrd = 0x00000003; -SDRAM[0].EmcRdRcd = 0x00000005; -SDRAM[0].EmcWrRcd = 0x00000005; -SDRAM[0].EmcRext = 0x00000001; -SDRAM[0].EmcWdv = 0x00000004; -SDRAM[0].EmcQUseExtra = 0x00000000; -SDRAM[0].EmcQUse = 0x00000005; -SDRAM[0].EmcQRst = 0x00000004; -SDRAM[0].EmcQSafe = 0x00000009; -SDRAM[0].EmcRdv = 0x0000000d; -SDRAM[0].EmcRefresh = 0x000009ff; -SDRAM[0].EmcBurstRefreshNum = 0x00000000; -SDRAM[0].EmcPdEx2Wr = 0x00000003; -SDRAM[0].EmcPdEx2Rd = 0x00000003; -SDRAM[0].EmcPChg2Pden = 0x00000005; -SDRAM[0].EmcAct2Pden = 0x00000005; -SDRAM[0].EmcAr2Pden = 0x00000001; -SDRAM[0].EmcRw2Pden = 0x0000000f; -SDRAM[0].EmcTxsr = 0x000000c8; -SDRAM[0].EmcTcke = 0x00000003; -SDRAM[0].EmcTfaw = 0x0000000c; -SDRAM[0].EmcTrpab = 0x00000006; -SDRAM[0].EmcTClkStable = 0x00000008; -SDRAM[0].EmcTClkStop = 0x00000002; -SDRAM[0].EmcTRefBw = 0x00000000; -SDRAM[0].EmcFbioCfg1 = 0x00000000; -SDRAM[0].EmcFbioDqsibDlyMsb = 0x00000000; -SDRAM[0].EmcFbioDqsibDly = 0x1c1c2020; -SDRAM[0].EmcFbioQuseDlyMsb = 0x00000000; -SDRAM[0].EmcFbioQuseDly = 0x5a504646; -SDRAM[0].EmcFbioCfg5 = 0x00000083; -SDRAM[0].EmcFbioCfg6 = 0x00000002; -SDRAM[0].EmcFbioSpare = 0x00000000; -SDRAM[0].EmcMrsResetDllWait = 0x00000000; -SDRAM[0].EmcMrsResetDll = 0x00000000; -SDRAM[0].EmcMrsDdr2DllReset = 0x00000100; -SDRAM[0].EmcMrs = 0x00000a6a; -SDRAM[0].EmcEmrsEmr2 = 0x00200000; -SDRAM[0].EmcEmrsEmr3 = 0x00300000; -SDRAM[0].EmcEmrsDdr2DllEnable = 0x00100000; -SDRAM[0].EmcEmrsDdr2OcdCalib = 0x00100384; -SDRAM[0].EmcEmrs = 0x00100004; -SDRAM[0].EmcMrw1 = 0x00000000; -SDRAM[0].EmcMrw2 = 0x00000000; -SDRAM[0].EmcMrw3 = 0x00000000; -SDRAM[0].EmcMrwResetCommand = 0x00000000; -SDRAM[0].EmcMrwResetNInitWait = 0x00000000; -SDRAM[0].EmcAdrCfg1 = 0x00070303; -SDRAM[0].EmcAdrCfg = 0x01070303; -SDRAM[0].McEmemCfg = 0x00100000; -SDRAM[0].McLowLatencyConfig = 0x80000003; -SDRAM[0].EmcCfg2 = 0x00000405; -SDRAM[0].EmcCfgDigDll = 0xf0000313; -SDRAM[0].EmcCfgClktrim0 = 0x00000000; -SDRAM[0].EmcCfgClktrim1 = 0x00000000; -SDRAM[0].EmcCfgClktrim2 = 0x00000000; -SDRAM[0].EmcCfg = 0x2001ff01; -SDRAM[0].EmcDbg = 0x01000000; -SDRAM[0].AhbArbitrationXbarCtrl = 0x00010000; -SDRAM[0].EmcDllXformDqs = 0x00000010; -SDRAM[0].EmcDllXformQUse = 0x00000008; -SDRAM[0].WarmBootWait = 0x00000002; -SDRAM[0].EmcCttTermCtrl = 0x00000802; -SDRAM[0].EmcOdtWrite = 0x00000000; -SDRAM[0].EmcOdtRead = 0x00000000; -SDRAM[0].EmcZcalRefCnt = 0x00000000; -SDRAM[0].EmcZcalWaitCnt = 0x00000000; -SDRAM[0].EmcZcalMrwCmd = 0x00000000; -SDRAM[0].EmcMrwZqInitDev0 = 0x00000000; -SDRAM[0].EmcMrwZqInitDev1 = 0x00000000; -SDRAM[0].EmcMrwZqInitWait = 0x00000000; -SDRAM[0].EmcDdr2Wait = 0x00000002; -SDRAM[0].PmcDdrPwr = 0x00000001; -SDRAM[0].ApbMiscGpXm2CfgAPadCtrl = 0x77ffc000; -SDRAM[0].ApbMiscGpXm2CfgCPadCtrl2 = 0x08080079; -SDRAM[0].ApbMiscGpXm2CfgCPadCtrl = 0x77fffff0; -SDRAM[0].ApbMiscGpXm2CfgDPadCtrl2 = 0x44440009; -SDRAM[0].ApbMiscGpXm2CfgDPadCtrl = 0x77fffff0; -SDRAM[0].ApbMiscGpXm2ClkCfgPadCtrl = 0x77ffc000; -SDRAM[0].ApbMiscGpXm2CompPadCtrl = 0x01f1f008; -SDRAM[0].ApbMiscGpXm2VttGenPadCtrl = 0x07076600; diff --git a/medcom-wide/build.sh b/medcom-wide/build.sh deleted file mode 100755 index 9fa70e5..0000000 --- a/medcom-wide/build.sh +++ /dev/null @@ -1,27 +0,0 @@ -#!/bin/sh - -# Copyright (C) 2013 Avionic Design GmbH -# -# This software is provided 'as-is', without any express or implied -# warranty. In no event will the authors be held liable for any damages -# arising from the use of this software. -# -# Permission is granted to anyone to use this software for any purpose, -# including commercial applications, and to alter it and redistribute it -# freely, subject to the following restrictions: -# -# 1. The origin of this software must not be misrepresented; you must not -# claim that you wrote the original software. If you use this software -# in a product, an acknowledgment in the product documentation would be -# appreciated but is not required. -# 2. Altered source versions must be plainly marked as such, and must not be -# misrepresented as being the original software. -# 3. This notice may not be removed or altered from any source distribution. - -set -e -set -x - -cbootimage -t20 -gbct \ - ../tamonten/Tamonten_T2_512MB_MEM2G16D2D-ABG-25_366MHz.bct.cfg \ - Tamonten_T2_512MB_MEM2G16D2D-ABG-25_366MHz.bct -cbootimage -t20 ../tamonten/tegra20.img.cfg tegra20-medcom-wide.img diff --git a/plutux/build.sh b/plutux/build.sh deleted file mode 100755 index 382e451..0000000 --- a/plutux/build.sh +++ /dev/null @@ -1,27 +0,0 @@ -#!/bin/sh - -# Copyright (C) 2013 Avionic Design GmbH -# -# This software is provided 'as-is', without any express or implied -# warranty. In no event will the authors be held liable for any damages -# arising from the use of this software. -# -# Permission is granted to anyone to use this software for any purpose, -# including commercial applications, and to alter it and redistribute it -# freely, subject to the following restrictions: -# -# 1. The origin of this software must not be misrepresented; you must not -# claim that you wrote the original software. If you use this software -# in a product, an acknowledgment in the product documentation would be -# appreciated but is not required. -# 2. Altered source versions must be plainly marked as such, and must not be -# misrepresented as being the original software. -# 3. This notice may not be removed or altered from any source distribution. - -set -e -set -x - -cbootimage -t20 -gbct \ - ../tamonten/Tamonten_T2_512MB_MEM2G16D2D-ABG-25_366MHz.bct.cfg \ - Tamonten_T2_512MB_MEM2G16D2D-ABG-25_366MHz.bct -cbootimage -t20 ../tamonten/tegra20.img.cfg tegra20-plutux.img diff --git a/seaboard/PM282_Hynix_1GB_H5PS2G83AFR-S6C_380MHz_nand.bct.cfg b/seaboard/PM282_Hynix_1GB_H5PS2G83AFR-S6C_380MHz_nand.bct.cfg deleted file mode 100644 index 0e15eb7..0000000 --- a/seaboard/PM282_Hynix_1GB_H5PS2G83AFR-S6C_380MHz_nand.bct.cfg +++ /dev/null @@ -1,153 +0,0 @@ -# Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. -# -# This software is provided 'as-is', without any express or implied -# warranty. In no event will the authors be held liable for any damages -# arising from the use of this software. -# -# Permission is granted to anyone to use this software for any purpose, -# including commercial applications, and to alter it and redistribute it -# freely, subject to the following restrictions: -# -# 1. The origin of this software must not be misrepresented; you must not -# claim that you wrote the original software. If you use this software -# in a product, an acknowledgment in the product documentation would be -# appreciated but is not required. -# 2. Altered source versions must be plainly marked as such, and must not be -# misrepresented as being the original software. -# 3. This notice may not be removed or altered from any source distribution. - -Version = 0x00020001; -BlockSize = 0x00020000; -PageSize = 0x00000800; -PartitionSize = 0x01000000; -OdmData = 0x300d8000; - -DevType[0] = NvBootDevType_Nand; -DeviceParam[0].NandParams.ClockDivider = 0x00000004; -DeviceParam[0].NandParams.NandTiming2 = 0x0000000a; -DeviceParam[0].NandParams.NandTiming = 0x3b269213; -DeviceParam[0].NandParams.BlockSizeLog2 = 0x00000000; -DeviceParam[0].NandParams.PageSizeLog2 = 0x00000000; - -DevType[1] = NvBootDevType_Nand; -DeviceParam[1].NandParams.ClockDivider = 0x00000004; -DeviceParam[1].NandParams.NandTiming2 = 0x0000000a; -DeviceParam[1].NandParams.NandTiming = 0x3b269213; -DeviceParam[1].NandParams.BlockSizeLog2 = 0x00000000; -DeviceParam[1].NandParams.PageSizeLog2 = 0x00000000; - -DevType[2] = NvBootDevType_Nand; -DeviceParam[2].NandParams.ClockDivider = 0x00000004; -DeviceParam[2].NandParams.NandTiming2 = 0x0000000a; -DeviceParam[2].NandParams.NandTiming = 0x3b269213; -DeviceParam[2].NandParams.BlockSizeLog2 = 0x00000000; -DeviceParam[2].NandParams.PageSizeLog2 = 0x00000000; - -DevType[3] = NvBootDevType_Nand; -DeviceParam[3].NandParams.ClockDivider = 0x00000004; -DeviceParam[3].NandParams.NandTiming2 = 0x0000000a; -DeviceParam[3].NandParams.NandTiming = 0x3b269213; -DeviceParam[3].NandParams.BlockSizeLog2 = 0x00000000; -DeviceParam[3].NandParams.PageSizeLog2 = 0x00000000; - -SDRAM[0].MemoryType = NvBootMemoryType_Ddr2; -SDRAM[0].PllMChargePumpSetupControl = 0x00000008; -SDRAM[0].PllMLoopFilterSetupControl = 0x00000000; -SDRAM[0].PllMInputDivider = 0x0000000c; -SDRAM[0].PllMFeedbackDivider = 0x000002f8; -SDRAM[0].PllMPostDivider = 0x00000000; -SDRAM[0].PllMStableTime = 0x0000012c; -SDRAM[0].EmcClockDivider = 0x00000001; -SDRAM[0].EmcAutoCalInterval = 0x00000000; -SDRAM[0].EmcAutoCalConfig = 0xe0a61818; -SDRAM[0].EmcAutoCalWait = 0x00000000; -SDRAM[0].EmcPinProgramWait = 0x00000000; -SDRAM[0].EmcRc = 0x00000017; -SDRAM[0].EmcRfc = 0x0000004b; -SDRAM[0].EmcRas = 0x00000012; -SDRAM[0].EmcRp = 0x00000006; -SDRAM[0].EmcR2w = 0x00000004; -SDRAM[0].EmcW2r = 0x00000005; -SDRAM[0].EmcR2p = 0x00000003; -SDRAM[0].EmcW2p = 0x0000000c; -SDRAM[0].EmcRrd = 0x00000003; -SDRAM[0].EmcRdRcd = 0x00000006; -SDRAM[0].EmcWrRcd = 0x00000006; -SDRAM[0].EmcRext = 0x00000001; -SDRAM[0].EmcWdv = 0x00000004; -SDRAM[0].EmcQUseExtra = 0x00000000; -SDRAM[0].EmcQUse = 0x00000005; -SDRAM[0].EmcQRst = 0x00000004; -SDRAM[0].EmcQSafe = 0x00000009; -SDRAM[0].EmcRdv = 0x0000000d; -SDRAM[0].EmcRefresh = 0x00000b5f; -SDRAM[0].EmcBurstRefreshNum = 0x00000000; -SDRAM[0].EmcPdEx2Wr = 0x00000003; -SDRAM[0].EmcPdEx2Rd = 0x00000003; -SDRAM[0].EmcPChg2Pden = 0x00000006; -SDRAM[0].EmcAct2Pden = 0x00000006; -SDRAM[0].EmcAr2Pden = 0x00000001; -SDRAM[0].EmcRw2Pden = 0x00000011; -SDRAM[0].EmcTxsr = 0x000000c8; -SDRAM[0].EmcTcke = 0x00000003; -SDRAM[0].EmcTfaw = 0x0000000e; -SDRAM[0].EmcTrpab = 0x00000007; -SDRAM[0].EmcTClkStable = 0x0000000f; -SDRAM[0].EmcTClkStop = 0x00000002; -SDRAM[0].EmcTRefBw = 0x00000000; -SDRAM[0].EmcFbioCfg1 = 0x00000000; -SDRAM[0].EmcFbioDqsibDlyMsb = 0x00000000; -SDRAM[0].EmcFbioDqsibDly = 0x24242424; -SDRAM[0].EmcFbioQuseDlyMsb = 0x00000000; -SDRAM[0].EmcFbioQuseDly = 0x64646464; -SDRAM[0].EmcFbioCfg5 = 0x00000083; -SDRAM[0].EmcFbioCfg6 = 0x00000002; -SDRAM[0].EmcFbioSpare = 0x00000000; -SDRAM[0].EmcMrsResetDllWait = 0x00000000; -SDRAM[0].EmcMrsResetDll = 0x00000000; -SDRAM[0].EmcMrsDdr2DllReset = 0x00000100; -SDRAM[0].EmcMrs = 0x00000a6a; -SDRAM[0].EmcEmrsEmr2 = 0x00200000; -SDRAM[0].EmcEmrsEmr3 = 0x00300000; -SDRAM[0].EmcEmrsDdr2DllEnable = 0x00100000; -SDRAM[0].EmcEmrsDdr2OcdCalib = 0x00100380; -SDRAM[0].EmcEmrs = 0x00100000; -SDRAM[0].EmcMrw1 = 0x00000000; -SDRAM[0].EmcMrw2 = 0x00000000; -SDRAM[0].EmcMrw3 = 0x00000000; -SDRAM[0].EmcMrwResetCommand = 0x00000000; -SDRAM[0].EmcMrwResetNInitWait = 0x00000000; -SDRAM[0].EmcAdrCfg1 = 0x00080303; -SDRAM[0].EmcAdrCfg = 0x00080303; -SDRAM[0].McEmemCfg = 0x00100000; -SDRAM[0].McLowLatencyConfig = 0x80000003; -SDRAM[0].EmcCfg2 = 0x00000405; -SDRAM[0].EmcCfgDigDll = 0xf0000413; -SDRAM[0].EmcCfgClktrim0 = 0x00000000; -SDRAM[0].EmcCfgClktrim1 = 0x00000000; -SDRAM[0].EmcCfgClktrim2 = 0x00000000; -SDRAM[0].EmcCfg = 0x0001ff00; -SDRAM[0].EmcDbg = 0x01000000; -SDRAM[0].AhbArbitrationXbarCtrl = 0x00010000; -SDRAM[0].EmcDllXformDqs = 0x00000010; -SDRAM[0].EmcDllXformQUse = 0x00000008; -SDRAM[0].WarmBootWait = 0x00000002; -SDRAM[0].EmcCttTermCtrl = 0x00000802; -SDRAM[0].EmcOdtWrite = 0x00000000; -SDRAM[0].EmcOdtRead = 0x00000000; -SDRAM[0].EmcZcalRefCnt = 0x00000000; -SDRAM[0].EmcZcalWaitCnt = 0x00000000; -SDRAM[0].EmcZcalMrwCmd = 0x00000000; -SDRAM[0].EmcMrwZqInitDev0 = 0x00000000; -SDRAM[0].EmcMrwZqInitDev1 = 0x00000000; -SDRAM[0].EmcMrwZqInitWait = 0x00000000; -SDRAM[0].EmcDdr2Wait = 0x00000002; -SDRAM[0].PmcDdrPwr = 0x00000001; -SDRAM[0].ApbMiscGpXm2CfgAPadCtrl = 0x77ffc000; -SDRAM[0].ApbMiscGpXm2CfgCPadCtrl2 = 0x08080079; -SDRAM[0].ApbMiscGpXm2CfgCPadCtrl = 0x77fffff0; -SDRAM[0].ApbMiscGpXm2CfgDPadCtrl2 = 0x00000009; -SDRAM[0].ApbMiscGpXm2CfgDPadCtrl = 0x77fffff0; -SDRAM[0].ApbMiscGpXm2ClkCfgPadCtrl = 0x77ffc000; -SDRAM[0].ApbMiscGpXm2CompPadCtrl = 0x01f1f008; -SDRAM[0].ApbMiscGpXm2VttGenPadCtrl = 0x07076600; diff --git a/seaboard/build.sh b/seaboard/build.sh deleted file mode 100755 index 558a7ce..0000000 --- a/seaboard/build.sh +++ /dev/null @@ -1,27 +0,0 @@ -#!/bin/sh - -# Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. -# -# This software is provided 'as-is', without any express or implied -# warranty. In no event will the authors be held liable for any damages -# arising from the use of this software. -# -# Permission is granted to anyone to use this software for any purpose, -# including commercial applications, and to alter it and redistribute it -# freely, subject to the following restrictions: -# -# 1. The origin of this software must not be misrepresented; you must not -# claim that you wrote the original software. If you use this software -# in a product, an acknowledgment in the product documentation would be -# appreciated but is not required. -# 2. Altered source versions must be plainly marked as such, and must not be -# misrepresented as being the original software. -# 3. This notice may not be removed or altered from any source distribution. - -set -e -set -x - -cbootimage -gbct \ - PM282_Hynix_1GB_H5PS2G83AFR-S6C_380MHz_nand.bct.cfg \ - PM282_Hynix_1GB_H5PS2G83AFR-S6C_380MHz_nand.bct -cbootimage seaboard-nand.img.cfg seaboard-nand.img diff --git a/seaboard/seaboard-nand.img.cfg b/seaboard/seaboard-nand.img.cfg deleted file mode 100644 index 82faac0..0000000 --- a/seaboard/seaboard-nand.img.cfg +++ /dev/null @@ -1,22 +0,0 @@ -# Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. -# -# This software is provided 'as-is', without any express or implied -# warranty. In no event will the authors be held liable for any damages -# arising from the use of this software. -# -# Permission is granted to anyone to use this software for any purpose, -# including commercial applications, and to alter it and redistribute it -# freely, subject to the following restrictions: -# -# 1. The origin of this software must not be misrepresented; you must not -# claim that you wrote the original software. If you use this software -# in a product, an acknowledgment in the product documentation would be -# appreciated but is not required. -# 2. Altered source versions must be plainly marked as such, and must not be -# misrepresented as being the original software. -# 3. This notice may not be removed or altered from any source distribution. - -Version = 0x00020001; -Bctcopy = 1; -Bctfile = PM282_Hynix_1GB_H5PS2G83AFR-S6C_380MHz_nand.bct; -BootLoader = u-boot.bin,0x00108000,0x00108000,Complete; diff --git a/tamonten/Tamonten_T2_512MB_MEM2G16D2D-ABG-25_366MHz.bct.cfg b/tamonten/Tamonten_T2_512MB_MEM2G16D2D-ABG-25_366MHz.bct.cfg deleted file mode 100644 index 16ff9af..0000000 --- a/tamonten/Tamonten_T2_512MB_MEM2G16D2D-ABG-25_366MHz.bct.cfg +++ /dev/null @@ -1,132 +0,0 @@ -# Copyright (C) 2011-2013 Avionic Design GmbH -# -# This software is provided 'as-is', without any express or implied -# warranty. In no event will the authors be held liable for any damages -# arising from the use of this software. -# -# Permission is granted to anyone to use this software for any purpose, -# including commercial applications, and to alter it and redistribute it -# freely, subject to the following restrictions: -# -# 1. The origin of this software must not be misrepresented; you must not -# claim that you wrote the original software. If you use this software -# in a product, an acknowledgment in the product documentation would be -# appreciated but is not required. -# 2. Altered source versions must be plainly marked as such, and must not be -# misrepresented as being the original software. -# 3. This notice may not be removed or altered from any source distribution. - -Version = 0x00020001; -BlockSize = 0x00020000; -PageSize = 0x00000800; -PartitionSize = 0x01000000; -OdmData = 0x2b2d8011; - -DevType[0] = NvBootDevType_Nand; -DeviceParam[0].NandParams.ClockDivider = 0x00000004; -DeviceParam[0].NandParams.NandTiming2 = 0x0000000a; -DeviceParam[0].NandParams.NandTiming = 0x3b269213; -DeviceParam[0].NandParams.BlockSizeLog2 = 0x00000000; -DeviceParam[0].NandParams.PageSizeLog2 = 0x00000000; - -SDRAM[0].MemoryType = NvBootMemoryType_Ddr2; -SDRAM[0].PllMChargePumpSetupControl = 0x00000008; -SDRAM[0].PllMLoopFilterSetupControl = 0x00000000; -SDRAM[0].PllMInputDivider = 0x0000000c; -SDRAM[0].PllMFeedbackDivider = 0x0000029a; -SDRAM[0].PllMPostDivider = 0x00000000; -SDRAM[0].PllMStableTime = 0x0000012c; -SDRAM[0].EmcClockDivider = 0x00000001; -SDRAM[0].EmcAutoCalInterval = 0x00000000; -SDRAM[0].EmcAutoCalConfig = 0xe0a61111; -SDRAM[0].EmcAutoCalWait = 0x00000000; -SDRAM[0].EmcPinProgramWait = 0x00000000; -SDRAM[0].EmcRc = 0x00000014; -SDRAM[0].EmcRfc = 0x00000041; -SDRAM[0].EmcRas = 0x0000000f; -SDRAM[0].EmcRp = 0x00000005; -SDRAM[0].EmcR2w = 0x00000004; -SDRAM[0].EmcW2r = 0x00000005; -SDRAM[0].EmcR2p = 0x00000003; -SDRAM[0].EmcW2p = 0x0000000b; -SDRAM[0].EmcRrd = 0x00000004; -SDRAM[0].EmcRdRcd = 0x00000005; -SDRAM[0].EmcWrRcd = 0x00000005; -SDRAM[0].EmcRext = 0x00000001; -SDRAM[0].EmcWdv = 0x00000003; -SDRAM[0].EmcQUseExtra = 0x00000000; -SDRAM[0].EmcQUse = 0x00000004; -SDRAM[0].EmcQRst = 0x00000003; -SDRAM[0].EmcQSafe = 0x00000009; -SDRAM[0].EmcRdv = 0x0000000c; -SDRAM[0].EmcRefresh = 0x000004df; -SDRAM[0].EmcBurstRefreshNum = 0x00000000; -SDRAM[0].EmcPdEx2Wr = 0x00000003; -SDRAM[0].EmcPdEx2Rd = 0x00000003; -SDRAM[0].EmcPChg2Pden = 0x00000005; -SDRAM[0].EmcAct2Pden = 0x00000005; -SDRAM[0].EmcAr2Pden = 0x00000001; -SDRAM[0].EmcRw2Pden = 0x0000000e; -SDRAM[0].EmcTxsr = 0x000000c8; -SDRAM[0].EmcTcke = 0x00000003; -SDRAM[0].EmcTfaw = 0x0000000f; -SDRAM[0].EmcTrpab = 0x00000006; -SDRAM[0].EmcTClkStable = 0x0000000f; -SDRAM[0].EmcTClkStop = 0x00000002; -SDRAM[0].EmcTRefBw = 0x00000000; -SDRAM[0].EmcFbioCfg1 = 0x00000000; -SDRAM[0].EmcFbioDqsibDlyMsb = 0x00000000; -SDRAM[0].EmcFbioDqsibDly = 0x2f2f2f2f; -SDRAM[0].EmcFbioQuseDlyMsb = 0x00000000; -SDRAM[0].EmcFbioQuseDly = 0x2f2f2f2f; -SDRAM[0].EmcFbioCfg5 = 0x00000083; -SDRAM[0].EmcFbioCfg6 = 0x00000002; -SDRAM[0].EmcFbioSpare = 0x00000000; -SDRAM[0].EmcMrsResetDllWait = 0x00000000; -SDRAM[0].EmcMrsResetDll = 0x00000000; -SDRAM[0].EmcMrsDdr2DllReset = 0x00000100; -SDRAM[0].EmcMrs = 0x00000a5a; -SDRAM[0].EmcEmrsEmr2 = 0x00200000; -SDRAM[0].EmcEmrsEmr3 = 0x00300000; -SDRAM[0].EmcEmrsDdr2DllEnable = 0x00100000; -SDRAM[0].EmcEmrsDdr2OcdCalib = 0x00100382; -SDRAM[0].EmcEmrs = 0x00100002; -SDRAM[0].EmcMrw1 = 0x00000000; -SDRAM[0].EmcMrw2 = 0x00000000; -SDRAM[0].EmcMrw3 = 0x00000000; -SDRAM[0].EmcMrwResetCommand = 0x00000000; -SDRAM[0].EmcMrwResetNInitWait = 0x00000000; -SDRAM[0].EmcAdrCfg1 = 0x00070303; -SDRAM[0].EmcAdrCfg = 0x00070303; -SDRAM[0].McEmemCfg = 0x00080000; -SDRAM[0].McLowLatencyConfig = 0x80000003; -SDRAM[0].EmcCfg2 = 0x00000405; -SDRAM[0].EmcCfgDigDll = 0x00380006; -SDRAM[0].EmcCfgClktrim0 = 0x00000000; -SDRAM[0].EmcCfgClktrim1 = 0x00000000; -SDRAM[0].EmcCfgClktrim2 = 0x00000000; -SDRAM[0].EmcCfg = 0x0001ff00; -SDRAM[0].EmcDbg = 0x01000000; -SDRAM[0].AhbArbitrationXbarCtrl = 0x00010000; -SDRAM[0].EmcDllXformDqs = 0x00000010; -SDRAM[0].EmcDllXformQUse = 0x00000008; -SDRAM[0].WarmBootWait = 0x00000002; -SDRAM[0].EmcCttTermCtrl = 0x00000802; -SDRAM[0].EmcOdtWrite = 0x00000000; -SDRAM[0].EmcOdtRead = 0x00000000; -SDRAM[0].EmcZcalRefCnt = 0x00000000; -SDRAM[0].EmcZcalWaitCnt = 0x00000000; -SDRAM[0].EmcZcalMrwCmd = 0x00000000; -SDRAM[0].EmcMrwZqInitDev0 = 0x00000000; -SDRAM[0].EmcMrwZqInitDev1 = 0x00000000; -SDRAM[0].EmcMrwZqInitWait = 0x00000000; -SDRAM[0].EmcDdr2Wait = 0x00000002; -SDRAM[0].PmcDdrPwr = 0x00000001; -SDRAM[0].ApbMiscGpXm2CfgAPadCtrl = 0x77ffc000; -SDRAM[0].ApbMiscGpXm2CfgCPadCtrl2 = 0x08080079; -SDRAM[0].ApbMiscGpXm2CfgCPadCtrl = 0x77fffff0; -SDRAM[0].ApbMiscGpXm2CfgDPadCtrl2 = 0x44440009; -SDRAM[0].ApbMiscGpXm2CfgDPadCtrl = 0x77fffff0; -SDRAM[0].ApbMiscGpXm2ClkCfgPadCtrl = 0x77ffc000; -SDRAM[0].ApbMiscGpXm2CompPadCtrl = 0x01f1f008; -SDRAM[0].ApbMiscGpXm2VttGenPadCtrl = 0x07076600; diff --git a/tamonten/tegra20.img.cfg b/tamonten/tegra20.img.cfg deleted file mode 100644 index f37614d..0000000 --- a/tamonten/tegra20.img.cfg +++ /dev/null @@ -1,22 +0,0 @@ -# Copyright (C) 2013 Avionic Design GmbH -# -# This software is provided 'as-is', without any express or implied -# warranty. In no event will the authors be held liable for any damages -# arising from the use of this software. -# -# Permission is granted to anyone to use this software for any purpose, -# including commercial applications, and to alter it and redistribute it -# freely, subject to the following restrictions: -# -# 1. The origin of this software must not be misrepresented; you must not -# claim that you wrote the original software. If you use this software -# in a product, an acknowledgment in the product documentation would be -# appreciated but is not required. -# 2. Altered source versions must be plainly marked as such, and must not be -# misrepresented as being the original software. -# 3. This notice may not be removed or altered from any source distribution. - -Version = 0x00020001; -Bctcopy = 1; -Bctfile = Tamonten_T2_512MB_MEM2G16D2D-ABG-25_366MHz.bct; -BootLoader = u-boot.bin,0x00108000,0x00108000,Complete; diff --git a/tec/build.sh b/tec/build.sh deleted file mode 100755 index 2a49fdd..0000000 --- a/tec/build.sh +++ /dev/null @@ -1,27 +0,0 @@ -#!/bin/sh - -# Copyright (C) 2013 Avionic Design GmbH -# -# This software is provided 'as-is', without any express or implied -# warranty. In no event will the authors be held liable for any damages -# arising from the use of this software. -# -# Permission is granted to anyone to use this software for any purpose, -# including commercial applications, and to alter it and redistribute it -# freely, subject to the following restrictions: -# -# 1. The origin of this software must not be misrepresented; you must not -# claim that you wrote the original software. If you use this software -# in a product, an acknowledgment in the product documentation would be -# appreciated but is not required. -# 2. Altered source versions must be plainly marked as such, and must not be -# misrepresented as being the original software. -# 3. This notice may not be removed or altered from any source distribution. - -set -e -set -x - -cbootimage -t20 -gbct \ - ../tamonten/Tamonten_T2_512MB_MEM2G16D2D-ABG-25_366MHz.bct.cfg \ - Tamonten_T2_512MB_MEM2G16D2D-ABG-25_366MHz.bct -cbootimage -t20 ../tamonten/tegra20.img.cfg tegra20-tec.img diff --git a/tegra114/nvidia/dalmore/E1611_Hynix_2GB_H5TC4G63AFR-RDA_792MHz_r403_v03.bct.cfg b/tegra114/nvidia/dalmore/E1611_Hynix_2GB_H5TC4G63AFR-RDA_792MHz_r403_v03.bct.cfg new file mode 100644 index 0000000..29512ee --- /dev/null +++ b/tegra114/nvidia/dalmore/E1611_Hynix_2GB_H5TC4G63AFR-RDA_792MHz_r403_v03.bct.cfg @@ -0,0 +1,1273 @@ +# Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. +# +# This software is provided 'as-is', without any express or implied +# warranty. In no event will the authors be held liable for any damages +# arising from the use of this software. +# +# Permission is granted to anyone to use this software for any purpose, +# including commercial applications, and to alter it and redistribute it +# freely, subject to the following restrictions: +# +# 1. The origin of this software must not be misrepresented; you must not +# claim that you wrote the original software. If you use this software +# in a product, an acknowledgment in the product documentation would be +# appreciated but is not required. +# 2. Altered source versions must be plainly marked as such, and must not be +# misrepresented as being the original software. +# 3. This notice may not be removed or altered from any source distribution. + +Version = 0x00350001; +BlockSize = 0x00004000; +PageSize = 0x00000200; +PartitionSize = 0x01000000; +OdmData = 0x800d8000; + +DevType[0] = NvBootDevType_Sdmmc; +DeviceParam[0].SdmmcParams.ClockDivider = 0x00000009; +DeviceParam[0].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_8Bit; +DeviceParam[0].SdmmcParams.MaxPowerClassSupported = 0x00000000; +DeviceParam[0].SdmmcParams.MultiPageSupport = 0x00000000; + +SDRAM[0].MemoryType = NvBootMemoryType_Ddr3; +SDRAM[0].PllMInputDivider = 0x00000001; +SDRAM[0].PllMFeedbackDivider = 0x00000042; +SDRAM[0].PllMStableTime = 0x0000012c; +SDRAM[0].PllMSetupControl = 0x00000000; +SDRAM[0].PllMSelectDiv2 = 0x00000000; +SDRAM[0].PllMPDLshiftPh45 = 0x00000000; +SDRAM[0].PllMPDLshiftPh90 = 0x00000000; +SDRAM[0].PllMPDLshiftPh135 = 0x00000000; +SDRAM[0].PllMKCP = 0x00000000; +SDRAM[0].PllMKVCO = 0x00000000; +SDRAM[0].EmcBctSpare0 = 0x00000bad; +SDRAM[0].EmcClockSource = 0x80000000; +SDRAM[0].EmcAutoCalInterval = 0x001fffff; +SDRAM[0].EmcAutoCalConfig = 0xa0f10f0f; +SDRAM[0].EmcAutoCalConfig2 = 0x00000000; +SDRAM[0].EmcAutoCalConfig3 = 0x00000000; +SDRAM[0].EmcAutoCalWait = 0x00000064; +SDRAM[0].EmcAdrCfg = 0x00000000; +SDRAM[0].EmcPinProgramWait = 0x00000001; +SDRAM[0].EmcPinExtraWait = 0x00000000; +SDRAM[0].EmcTimingControlWait = 0x00000001; +SDRAM[0].EmcRc = 0x00000024; +SDRAM[0].EmcRfc = 0x000000cd; +SDRAM[0].EmcRfcSlr = 0x00000000; +SDRAM[0].EmcRas = 0x00000019; +SDRAM[0].EmcRp = 0x0000000a; +SDRAM[0].EmcR2r = 0x00000000; +SDRAM[0].EmcW2w = 0x00000000; +SDRAM[0].EmcR2w = 0x00000009; +SDRAM[0].EmcW2r = 0x0000000d; +SDRAM[0].EmcR2p = 0x00000004; +SDRAM[0].EmcW2p = 0x00000013; +SDRAM[0].EmcRdRcd = 0x0000000a; +SDRAM[0].EmcWrRcd = 0x0000000a; +SDRAM[0].EmcRrd = 0x00000003; +SDRAM[0].EmcRext = 0x00000001; +SDRAM[0].EmcWext = 0x00000000; +SDRAM[0].EmcWdv = 0x00000006; +SDRAM[0].EmcWdvMask = 0x00000006; +SDRAM[0].EmcQUse = 0x0000000b; +SDRAM[0].EmcIbdly = 0x0000000b; +SDRAM[0].EmcEInput = 0x00000008; +SDRAM[0].EmcEInputDuration = 0x00000006; +SDRAM[0].EmcPutermExtra = 0x000d000a; +SDRAM[0].EmcCdbCntl1 = 0x00000000; +SDRAM[0].EmcCdbCntl2 = 0x00000000; +SDRAM[0].EmcQRst = 0x00000008; +SDRAM[0].EmcQSafe = 0x0000000d; +SDRAM[0].EmcRdv = 0x00000014; +SDRAM[0].EmcRdvMask = 0x00000014; +SDRAM[0].EmcCtt = 0x00000000; +SDRAM[0].EmcCttDuration = 0x00000000; +SDRAM[0].EmcRefresh = 0x000017e4; +SDRAM[0].EmcBurstRefreshNum = 0x00000000; +SDRAM[0].EmcPreRefreshReqCnt = 0x000005f9; +SDRAM[0].EmcPdEx2Wr = 0x00000003; +SDRAM[0].EmcPdEx2Rd = 0x00000012; +SDRAM[0].EmcPChg2Pden = 0x00000001; +SDRAM[0].EmcAct2Pden = 0x00000000; +SDRAM[0].EmcAr2Pden = 0x000000c6; +SDRAM[0].EmcRw2Pden = 0x00000018; +SDRAM[0].EmcTxsr = 0x000000d6; +SDRAM[0].EmcTxsrDll = 0x00000200; +SDRAM[0].EmcTcke = 0x00000005; +SDRAM[0].EmcTckesr = 0x00000005; +SDRAM[0].EmcTpd = 0x00000005; +SDRAM[0].EmcTfaw = 0x00000020; +SDRAM[0].EmcTrpab = 0x00000000; +SDRAM[0].EmcTClkStable = 0x00000007; +SDRAM[0].EmcTClkStop = 0x00000008; +SDRAM[0].EmcTRefBw = 0x00001825; +SDRAM[0].EmcQUseExtra = 0x0000000a; +SDRAM[0].EmcFbioCfg5 = 0x0000ba88; +SDRAM[0].EmcFbioCfg6 = 0x00000006; +SDRAM[0].EmcFbioSpare = 0x02000000; +SDRAM[0].EmcCfgRsv = 0xff00ff00; +SDRAM[0].EmcMrs = 0x80000d71; +SDRAM[0].EmcEmrs = 0x80100002; +SDRAM[0].EmcEmrs2 = 0x80200418; +SDRAM[0].EmcEmrs3 = 0x80300000; +SDRAM[0].EmcMrw1 = 0x00000000; +SDRAM[0].EmcMrw2 = 0x00000000; +SDRAM[0].EmcMrw3 = 0x00000000; +SDRAM[0].EmcMrw4 = 0x00000000; +SDRAM[0].EmcMrwExtra = 0x00000000; +SDRAM[0].EmcWarmBootMrwExtra = 0x00000000; +SDRAM[0].EmcWarmBootExtraModeRegWriteEnable = 0x00000000; +SDRAM[0].EmcExtraModeRegWriteEnable = 0x00000000; +SDRAM[0].EmcMrwResetCommand = 0x00000000; +SDRAM[0].EmcMrwResetNInitWait = 0x00000000; +SDRAM[0].EmcMrsWaitCnt = 0x00f8000f; +SDRAM[0].EmcMrsWaitCnt2 = 0x00f8000f; +SDRAM[0].EmcCfg = 0x53200000; +SDRAM[0].EmcCfg2 = 0x008008c1; +SDRAM[0].EmcDbg = 0x01000400; +SDRAM[0].EmcCmdQ = 0x10004408; +SDRAM[0].EmcMc2EmcQ = 0x06000404; +SDRAM[0].EmcDynSelfRefControl = 0x80003018; +SDRAM[0].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; +SDRAM[0].EmcCfgDigDll = 0xf0070191; +SDRAM[0].EmcCfgDigDllPeriod = 0x00008000; +SDRAM[0].EmcDevSelect = 0x00000002; +SDRAM[0].EmcSelDpdCtrl = 0x00040000; +SDRAM[0].EmcDllXformDqs0 = 0x00000008; +SDRAM[0].EmcDllXformDqs1 = 0x00000008; +SDRAM[0].EmcDllXformDqs2 = 0x00000008; +SDRAM[0].EmcDllXformDqs3 = 0x00000008; +SDRAM[0].EmcDllXformDqs4 = 0x00000008; +SDRAM[0].EmcDllXformDqs5 = 0x00000008; +SDRAM[0].EmcDllXformDqs6 = 0x00000008; +SDRAM[0].EmcDllXformDqs7 = 0x00000008; +SDRAM[0].EmcDllXformQUse0 = 0x00000000; +SDRAM[0].EmcDllXformQUse1 = 0x00000000; +SDRAM[0].EmcDllXformQUse2 = 0x00000000; +SDRAM[0].EmcDllXformQUse3 = 0x00000000; +SDRAM[0].EmcDllXformQUse4 = 0x00000000; +SDRAM[0].EmcDllXformQUse5 = 0x00000000; +SDRAM[0].EmcDllXformQUse6 = 0x00000000; +SDRAM[0].EmcDllXformQUse7 = 0x00000000; +SDRAM[0].EmcDllXformAddr0 = 0x00000008; +SDRAM[0].EmcDllXformAddr1 = 0x00000000; +SDRAM[0].EmcDllXformAddr2 = 0x00000000; +SDRAM[0].EmcDliTrimTxDqs0 = 0x00000000; +SDRAM[0].EmcDliTrimTxDqs1 = 0x00000000; +SDRAM[0].EmcDliTrimTxDqs2 = 0x00000000; +SDRAM[0].EmcDliTrimTxDqs3 = 0x00000000; +SDRAM[0].EmcDliTrimTxDqs4 = 0x00000000; +SDRAM[0].EmcDliTrimTxDqs5 = 0x00000000; +SDRAM[0].EmcDliTrimTxDqs6 = 0x00000000; +SDRAM[0].EmcDliTrimTxDqs7 = 0x00000000; +SDRAM[0].EmcDllXformDq0 = 0x0000000A; +SDRAM[0].EmcDllXformDq1 = 0x0000000A; +SDRAM[0].EmcDllXformDq2 = 0x0000000A; +SDRAM[0].EmcDllXformDq3 = 0x0000000A; +SDRAM[0].WarmBootWait = 0x00000002; +SDRAM[0].EmcCttTermCtrl = 0x00000802; +SDRAM[0].EmcOdtWrite = 0x80000020; +SDRAM[0].EmcOdtRead = 0x00000000; +SDRAM[0].EmcZcalInterval = 0x00020000; +SDRAM[0].EmcZcalWaitCnt = 0x00000042; +SDRAM[0].EmcZcalMrwCmd = 0x80000000; +SDRAM[0].EmcMrsResetDll = 0x00000000; +SDRAM[0].EmcZcalInitDev0 = 0x80000011; +SDRAM[0].EmcZcalInitDev1 = 0x00000000; +SDRAM[0].EmcZcalInitWait = 0x00000001; +SDRAM[0].EmcZcalWarmColdBootEnables = 0x00000003; +SDRAM[0].EmcMrwLpddr2ZcalWarmBoot = 0x000a00ab; +SDRAM[0].EmcZqCalDdr3WarmBoot = 0x00000011; +SDRAM[0].EmcZcalWarmBootWait = 0x00000001; +SDRAM[0].EmcMrsWarmBootEnable = 0x00000001; +SDRAM[0].EmcMrsResetDllWait = 0x00000000; +SDRAM[0].EmcMrsExtra = 0x80000d05; +SDRAM[0].EmcWarmBootMrsExtra = 0x80100002; +SDRAM[0].EmcEmrsDdr2DllEnable = 0x00000000; +SDRAM[0].EmcMrsDdr2DllReset = 0x00000000; +SDRAM[0].EmcEmrsDdr2OcdCalib = 0x00000000; +SDRAM[0].EmcDdr2Wait = 0x00000000; +SDRAM[0].EmcClkenOverride = 0x00000000; +SDRAM[0].EmcExtraRefreshNum = 0x00000002; +SDRAM[0].EmcClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[0].McClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[0].EmcCfgDigDllPeriodWarmBoot = 0x00000003; +SDRAM[0].PmcVddpSel = 0x00000002; +SDRAM[0].PmcDdrPwr = 0x00000003; +SDRAM[0].PmcDdrCfg = 0x00000092; +SDRAM[0].PmcIoDpdReq = 0x80800000; +SDRAM[0].PmcIoDpd2Req = 0x00000000; +SDRAM[0].PmcRegShort = 0x00000000; +SDRAM[0].PmcENoVttGen = 0x00000000; +SDRAM[0].PmcNoIoPower = 0x00000000; +SDRAM[0].EmcXm2CmdPadCtrl = 0x001112a0; +SDRAM[0].EmcXm2CmdPadCtrl2 = 0x770c0000; +SDRAM[0].EmcXm2CmdPadCtrl3 = 0x050c0000; +SDRAM[0].EmcXm2CmdPadCtrl4 = 0x00000000; +SDRAM[0].EmcXm2DqsPadCtrl = 0x770c1414; +SDRAM[0].EmcXm2DqsPadCtrl2 = 0x0000013d; +SDRAM[0].EmcXm2DqsPadCtrl3 = 0x10410400; +SDRAM[0].EmcXm2DqsPadCtrl4 = 0x00249249; +SDRAM[0].EmcXm2DqPadCtrl = 0x770c2990; +SDRAM[0].EmcXm2DqPadCtrl2 = 0x00000000; +SDRAM[0].EmcXm2ClkPadCtrl = 0x77ffc085; +SDRAM[0].EmcXm2ClkPadCtrl2 = 0x00000b0b; +SDRAM[0].EmcXm2CompPadCtrl = 0x81f1f508; +SDRAM[0].EmcXm2VttGenPadCtrl = 0x07076604; +SDRAM[0].EmcXm2VttGenPadCtrl2 = 0x00000000; +SDRAM[0].EmcAcpdControl = 0x00000000; +SDRAM[0].EmcSwizzleRank0ByteCfg = 0x00000087; +SDRAM[0].EmcSwizzleRank0Byte0 = 0x53614207; +SDRAM[0].EmcSwizzleRank0Byte1 = 0x26043715; +SDRAM[0].EmcSwizzleRank0Byte2 = 0x40517236; +SDRAM[0].EmcSwizzleRank0Byte3 = 0x45370612; +SDRAM[0].EmcSwizzleRank1ByteCfg = 0x00000087; +SDRAM[0].EmcSwizzleRank1Byte0 = 0x53614207; +SDRAM[0].EmcSwizzleRank1Byte1 = 0x26043715; +SDRAM[0].EmcSwizzleRank1Byte2 = 0x40517236; +SDRAM[0].EmcSwizzleRank1Byte3 = 0x45370612; +SDRAM[0].EmcAddrSwizzleStack1a = 0x0396071a; +SDRAM[0].EmcAddrSwizzleStack1b = 0x000425b8; +SDRAM[0].EmcAddrSwizzleStack2a = 0x07412306; +SDRAM[0].EmcAddrSwizzleStack2b = 0x00000598; +SDRAM[0].EmcAddrSwizzleStack3 = 0x00534012; +SDRAM[0].EmcDsrVttgenDrv = 0x0000003f; +SDRAM[0].EmcTxdsrvttgen = 0x00000000; +SDRAM[0].McEmemAdrCfg = 0x00000000; +SDRAM[0].McEmemAdrCfgDev0 = 0x00080303; +SDRAM[0].McEmemAdrCfgDev1 = 0x00080303; +SDRAM[0].McEmemAdrCfgChannelMask = 0x00000640; +SDRAM[0].McEmemAdrCfgChannelMaskPropagationCount = 0x00000008; +SDRAM[0].McEmemAdrCfgBankMask0 = 0x69248003; +SDRAM[0].McEmemAdrCfgBankMask1 = 0x24928000; +SDRAM[0].McEmemAdrCfgBankMask2 = 0x92c94c00; +SDRAM[0].McEmemCfg = 0x00000800; +SDRAM[0].McEmemArbCfg = 0x0e00000b; +SDRAM[0].McEmemArbOutstandingReq = 0x80000190; +SDRAM[0].McEmemArbTimingRcd = 0x00000004; +SDRAM[0].McEmemArbTimingRp = 0x00000005; +SDRAM[0].McEmemArbTimingRc = 0x00000013; +SDRAM[0].McEmemArbTimingRas = 0x0000000c; +SDRAM[0].McEmemArbTimingFaw = 0x0000000f; +SDRAM[0].McEmemArbTimingRrd = 0x00000002; +SDRAM[0].McEmemArbTimingRap2Pre = 0x00000003; +SDRAM[0].McEmemArbTimingWap2Pre = 0x0000000c; +SDRAM[0].McEmemArbTimingR2R = 0x00000002; +SDRAM[0].McEmemArbTimingW2W = 0x00000002; +SDRAM[0].McEmemArbTimingR2W = 0x00000006; +SDRAM[0].McEmemArbTimingW2R = 0x00000008; +SDRAM[0].McEmemArbDaTurns = 0x08060202; +SDRAM[0].McEmemArbDaCovers = 0x00170e13; +SDRAM[0].McEmemArbMisc0 = 0x734c2414; +SDRAM[0].McEmemArbMisc1 = 0x78000000; +SDRAM[0].McEmemArbRing1Throttle = 0x001f0000; +SDRAM[0].McEmemArbOverride = 0x00000083; +SDRAM[0].McEmemArbRsv = 0xff00ff00; +SDRAM[0].McClkenOverride = 0x00000000; +SDRAM[0].McEmcRegMode = 0x00000002; +SDRAM[0].McVideoProtectBom = 0xfff00000; +SDRAM[0].McVideoProtectSizeMb = 0x00000000; +SDRAM[0].McVideoProtectVprOverride = 0x009a4752; +SDRAM[0].McSecCarveoutBom = 0xfff00000; +SDRAM[0].McSecCarveoutSizeMb = 0x00000000; +SDRAM[0].McVideoProtectWriteAccess = 0x00000000; +SDRAM[0].McSecCarveoutProtectWriteAccess = 0x00000000; +SDRAM[0].EmcCaTrainingEnable = 0x00000000; +SDRAM[0].EmcCaTrainingTimingCntl1 = 0x1f7df7df; +SDRAM[0].EmcCaTrainingTimingCntl2 = 0x0000001f; +SDRAM[0].SwizzleRankByteEncode = 0x000022aa; +SDRAM[0].BootRomPatchControl = 0x00000000; +SDRAM[0].BootRomPatchData = 0x00000000; +SDRAM[0].Ch1EmcDllXformDqs0 = 0x00000008; +SDRAM[0].Ch1EmcDllXformDqs1 = 0x00000008; +SDRAM[0].Ch1EmcDllXformDqs2 = 0x00000008; +SDRAM[0].Ch1EmcDllXformDqs3 = 0x00000008; +SDRAM[0].Ch1EmcDllXformDqs4 = 0x00000008; +SDRAM[0].Ch1EmcDllXformDqs5 = 0x00000008; +SDRAM[0].Ch1EmcDllXformDqs6 = 0x00000008; +SDRAM[0].Ch1EmcDllXformDqs7 = 0x00000008; +SDRAM[0].Ch1EmcDllXformQUse0 = 0x00000000; +SDRAM[0].Ch1EmcDllXformQUse1 = 0x00000000; +SDRAM[0].Ch1EmcDllXformQUse2 = 0x00000000; +SDRAM[0].Ch1EmcDllXformQUse3 = 0x00000000; +SDRAM[0].Ch1EmcDllXformQUse4 = 0x00000000; +SDRAM[0].Ch1EmcDllXformQUse5 = 0x00000000; +SDRAM[0].Ch1EmcDllXformQUse6 = 0x00000000; +SDRAM[0].Ch1EmcDllXformQUse7 = 0x00000000; +SDRAM[0].Ch1EmcDliTrimTxDqs0 = 0x00000000; +SDRAM[0].Ch1EmcDliTrimTxDqs1 = 0x00000000; +SDRAM[0].Ch1EmcDliTrimTxDqs2 = 0x00000000; +SDRAM[0].Ch1EmcDliTrimTxDqs3 = 0x00000000; +SDRAM[0].Ch1EmcDliTrimTxDqs4 = 0x00000000; +SDRAM[0].Ch1EmcDliTrimTxDqs5 = 0x00000000; +SDRAM[0].Ch1EmcDliTrimTxDqs6 = 0x00000000; +SDRAM[0].Ch1EmcDliTrimTxDqs7 = 0x00000000; +SDRAM[0].Ch1EmcDllXformDq0 = 0x0000000A; +SDRAM[0].Ch1EmcDllXformDq1 = 0x0000000A; +SDRAM[0].Ch1EmcDllXformDq2 = 0x0000000A; +SDRAM[0].Ch1EmcDllXformDq3 = 0x0000000A; +SDRAM[0].Ch1EmcSwizzleRank0ByteCfg = 0x000000d2; +SDRAM[0].Ch1EmcSwizzleRank0Byte0 = 0x51430267; +SDRAM[0].Ch1EmcSwizzleRank0Byte1 = 0x13072465; +SDRAM[0].Ch1EmcSwizzleRank0Byte2 = 0x72605314; +SDRAM[0].Ch1EmcSwizzleRank0Byte3 = 0x54073162; +SDRAM[0].Ch1EmcSwizzleRank1ByteCfg = 0x000000d2; +SDRAM[0].Ch1EmcSwizzleRank1Byte0 = 0x51430267; +SDRAM[0].Ch1EmcSwizzleRank1Byte1 = 0x13072465; +SDRAM[0].Ch1EmcSwizzleRank1Byte2 = 0x72605314; +SDRAM[0].Ch1EmcSwizzleRank1Byte3 = 0x54073162; +SDRAM[0].Ch1EmcAddrSwizzleStack1a = 0x79320a61; +SDRAM[0].Ch1EmcAddrSwizzleStack1b = 0x000b8450; +SDRAM[0].Ch1EmcAddrSwizzleStack2a = 0x07623014; +SDRAM[0].Ch1EmcAddrSwizzleStack2b = 0x00000589; +SDRAM[0].Ch1EmcAddrSwizzleStack3 = 0x00530124; +SDRAM[0].Ch1EmcAutoCalConfig = 0xa8f10f0f; +SDRAM[0].Ch1EmcAutoCalConfig2 = 0x00000000; +SDRAM[0].Ch1EmcAutoCalConfig3 = 0x00000000; +SDRAM[0].Ch1EmcCdbCntl1 = 0x00000000; +SDRAM[0].Ch1EmcDllXformAddr0 = 0x00000008; +SDRAM[0].Ch1EmcDllXformAddr1 = 0x00000000; +SDRAM[0].Ch1EmcDllXformAddr2 = 0x00000000; +SDRAM[0].Ch1EmcFbioSpare = 0x02000000; +SDRAM[0].Ch1EmcXm2ClkPadCtrl = 0x77ffc085; +SDRAM[0].Ch1EmcXm2ClkPadCtrl2 = 0x00000b0b; +SDRAM[0].Ch1EmcXm2CmdPadCtrl2 = 0x770c0000; +SDRAM[0].Ch1EmcXm2CmdPadCtrl3 = 0x050c0000; +SDRAM[0].Ch1EmcXm2CmdPadCtrl4 = 0x00000000; +SDRAM[0].Ch1EmcXm2DqPadCtrl = 0x770c2990; +SDRAM[0].Ch1EmcXm2DqPadCtrl2 = 0x00000000; +SDRAM[0].Ch1EmcXm2DqsPadCtrl = 0x770c1515; +SDRAM[0].Ch1EmcXm2DqsPadCtrl3 = 0x10410400; +SDRAM[0].Ch1EmcXm2DqsPadCtrl4 = 0x00249249; + +SDRAM[1].MemoryType = NvBootMemoryType_Ddr3; +SDRAM[1].PllMInputDivider = 0x00000001; +SDRAM[1].PllMFeedbackDivider = 0x00000042; +SDRAM[1].PllMStableTime = 0x0000012c; +SDRAM[1].PllMSetupControl = 0x00000000; +SDRAM[1].PllMSelectDiv2 = 0x00000000; +SDRAM[1].PllMPDLshiftPh45 = 0x00000000; +SDRAM[1].PllMPDLshiftPh90 = 0x00000000; +SDRAM[1].PllMPDLshiftPh135 = 0x00000000; +SDRAM[1].PllMKCP = 0x00000000; +SDRAM[1].PllMKVCO = 0x00000000; +SDRAM[1].EmcBctSpare0 = 0x00000bad; +SDRAM[1].EmcClockSource = 0x80000000; +SDRAM[1].EmcAutoCalInterval = 0x001fffff; +SDRAM[1].EmcAutoCalConfig = 0xa0f10f0f; +SDRAM[1].EmcAutoCalConfig2 = 0x00000000; +SDRAM[1].EmcAutoCalConfig3 = 0x00000000; +SDRAM[1].EmcAutoCalWait = 0x00000064; +SDRAM[1].EmcAdrCfg = 0x00000000; +SDRAM[1].EmcPinProgramWait = 0x00000001; +SDRAM[1].EmcPinExtraWait = 0x00000000; +SDRAM[1].EmcTimingControlWait = 0x00000001; +SDRAM[1].EmcRc = 0x00000024; +SDRAM[1].EmcRfc = 0x000000cd; +SDRAM[1].EmcRfcSlr = 0x00000000; +SDRAM[1].EmcRas = 0x00000019; +SDRAM[1].EmcRp = 0x0000000a; +SDRAM[1].EmcR2r = 0x00000000; +SDRAM[1].EmcW2w = 0x00000000; +SDRAM[1].EmcR2w = 0x00000009; +SDRAM[1].EmcW2r = 0x0000000d; +SDRAM[1].EmcR2p = 0x00000004; +SDRAM[1].EmcW2p = 0x00000013; +SDRAM[1].EmcRdRcd = 0x0000000a; +SDRAM[1].EmcWrRcd = 0x0000000a; +SDRAM[1].EmcRrd = 0x00000003; +SDRAM[1].EmcRext = 0x00000001; +SDRAM[1].EmcWext = 0x00000000; +SDRAM[1].EmcWdv = 0x00000006; +SDRAM[1].EmcWdvMask = 0x00000006; +SDRAM[1].EmcQUse = 0x0000000b; +SDRAM[1].EmcIbdly = 0x0000000b; +SDRAM[1].EmcEInput = 0x00000008; +SDRAM[1].EmcEInputDuration = 0x00000006; +SDRAM[1].EmcPutermExtra = 0x000d000a; +SDRAM[1].EmcCdbCntl1 = 0x00000000; +SDRAM[1].EmcCdbCntl2 = 0x00000000; +SDRAM[1].EmcQRst = 0x00000008; +SDRAM[1].EmcQSafe = 0x0000000d; +SDRAM[1].EmcRdv = 0x00000014; +SDRAM[1].EmcRdvMask = 0x00000014; +SDRAM[1].EmcCtt = 0x00000000; +SDRAM[1].EmcCttDuration = 0x00000000; +SDRAM[1].EmcRefresh = 0x000017e4; +SDRAM[1].EmcBurstRefreshNum = 0x00000000; +SDRAM[1].EmcPreRefreshReqCnt = 0x000005f9; +SDRAM[1].EmcPdEx2Wr = 0x00000003; +SDRAM[1].EmcPdEx2Rd = 0x00000012; +SDRAM[1].EmcPChg2Pden = 0x00000001; +SDRAM[1].EmcAct2Pden = 0x00000000; +SDRAM[1].EmcAr2Pden = 0x000000c6; +SDRAM[1].EmcRw2Pden = 0x00000018; +SDRAM[1].EmcTxsr = 0x000000d6; +SDRAM[1].EmcTxsrDll = 0x00000200; +SDRAM[1].EmcTcke = 0x00000005; +SDRAM[1].EmcTckesr = 0x00000005; +SDRAM[1].EmcTpd = 0x00000005; +SDRAM[1].EmcTfaw = 0x00000020; +SDRAM[1].EmcTrpab = 0x00000000; +SDRAM[1].EmcTClkStable = 0x00000007; +SDRAM[1].EmcTClkStop = 0x00000008; +SDRAM[1].EmcTRefBw = 0x00001825; +SDRAM[1].EmcQUseExtra = 0x0000000a; +SDRAM[1].EmcFbioCfg5 = 0x0000ba88; +SDRAM[1].EmcFbioCfg6 = 0x00000006; +SDRAM[1].EmcFbioSpare = 0x02000000; +SDRAM[1].EmcCfgRsv = 0xff00ff00; +SDRAM[1].EmcMrs = 0x80000d71; +SDRAM[1].EmcEmrs = 0x80100002; +SDRAM[1].EmcEmrs2 = 0x80200418; +SDRAM[1].EmcEmrs3 = 0x80300000; +SDRAM[1].EmcMrw1 = 0x00000000; +SDRAM[1].EmcMrw2 = 0x00000000; +SDRAM[1].EmcMrw3 = 0x00000000; +SDRAM[1].EmcMrw4 = 0x00000000; +SDRAM[1].EmcMrwExtra = 0x00000000; +SDRAM[1].EmcWarmBootMrwExtra = 0x00000000; +SDRAM[1].EmcWarmBootExtraModeRegWriteEnable = 0x00000000; +SDRAM[1].EmcExtraModeRegWriteEnable = 0x00000000; +SDRAM[1].EmcMrwResetCommand = 0x00000000; +SDRAM[1].EmcMrwResetNInitWait = 0x00000000; +SDRAM[1].EmcMrsWaitCnt = 0x00f8000f; +SDRAM[1].EmcMrsWaitCnt2 = 0x00f8000f; +SDRAM[1].EmcCfg = 0x53200000; +SDRAM[1].EmcCfg2 = 0x008008c1; +SDRAM[1].EmcDbg = 0x01000400; +SDRAM[1].EmcCmdQ = 0x10004408; +SDRAM[1].EmcMc2EmcQ = 0x06000404; +SDRAM[1].EmcDynSelfRefControl = 0x80003018; +SDRAM[1].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; +SDRAM[1].EmcCfgDigDll = 0xf0070191; +SDRAM[1].EmcCfgDigDllPeriod = 0x00008000; +SDRAM[1].EmcDevSelect = 0x00000002; +SDRAM[1].EmcSelDpdCtrl = 0x00040000; +SDRAM[1].EmcDllXformDqs0 = 0x00000008; +SDRAM[1].EmcDllXformDqs1 = 0x00000008; +SDRAM[1].EmcDllXformDqs2 = 0x00000008; +SDRAM[1].EmcDllXformDqs3 = 0x00000008; +SDRAM[1].EmcDllXformDqs4 = 0x00000008; +SDRAM[1].EmcDllXformDqs5 = 0x00000008; +SDRAM[1].EmcDllXformDqs6 = 0x00000008; +SDRAM[1].EmcDllXformDqs7 = 0x00000008; +SDRAM[1].EmcDllXformQUse0 = 0x00000000; +SDRAM[1].EmcDllXformQUse1 = 0x00000000; +SDRAM[1].EmcDllXformQUse2 = 0x00000000; +SDRAM[1].EmcDllXformQUse3 = 0x00000000; +SDRAM[1].EmcDllXformQUse4 = 0x00000000; +SDRAM[1].EmcDllXformQUse5 = 0x00000000; +SDRAM[1].EmcDllXformQUse6 = 0x00000000; +SDRAM[1].EmcDllXformQUse7 = 0x00000000; +SDRAM[1].EmcDllXformAddr0 = 0x00000008; +SDRAM[1].EmcDllXformAddr1 = 0x00000000; +SDRAM[1].EmcDllXformAddr2 = 0x00000000; +SDRAM[1].EmcDliTrimTxDqs0 = 0x00000000; +SDRAM[1].EmcDliTrimTxDqs1 = 0x00000000; +SDRAM[1].EmcDliTrimTxDqs2 = 0x00000000; +SDRAM[1].EmcDliTrimTxDqs3 = 0x00000000; +SDRAM[1].EmcDliTrimTxDqs4 = 0x00000000; +SDRAM[1].EmcDliTrimTxDqs5 = 0x00000000; +SDRAM[1].EmcDliTrimTxDqs6 = 0x00000000; +SDRAM[1].EmcDliTrimTxDqs7 = 0x00000000; +SDRAM[1].EmcDllXformDq0 = 0x0000000A; +SDRAM[1].EmcDllXformDq1 = 0x0000000A; +SDRAM[1].EmcDllXformDq2 = 0x0000000A; +SDRAM[1].EmcDllXformDq3 = 0x0000000A; +SDRAM[1].WarmBootWait = 0x00000002; +SDRAM[1].EmcCttTermCtrl = 0x00000802; +SDRAM[1].EmcOdtWrite = 0x80000020; +SDRAM[1].EmcOdtRead = 0x00000000; +SDRAM[1].EmcZcalInterval = 0x00020000; +SDRAM[1].EmcZcalWaitCnt = 0x00000042; +SDRAM[1].EmcZcalMrwCmd = 0x80000000; +SDRAM[1].EmcMrsResetDll = 0x00000000; +SDRAM[1].EmcZcalInitDev0 = 0x80000011; +SDRAM[1].EmcZcalInitDev1 = 0x00000000; +SDRAM[1].EmcZcalInitWait = 0x00000001; +SDRAM[1].EmcZcalWarmColdBootEnables = 0x00000003; +SDRAM[1].EmcMrwLpddr2ZcalWarmBoot = 0x000a00ab; +SDRAM[1].EmcZqCalDdr3WarmBoot = 0x00000011; +SDRAM[1].EmcZcalWarmBootWait = 0x00000001; +SDRAM[1].EmcMrsWarmBootEnable = 0x00000001; +SDRAM[1].EmcMrsResetDllWait = 0x00000000; +SDRAM[1].EmcMrsExtra = 0x80000d05; +SDRAM[1].EmcWarmBootMrsExtra = 0x80100002; +SDRAM[1].EmcEmrsDdr2DllEnable = 0x00000000; +SDRAM[1].EmcMrsDdr2DllReset = 0x00000000; +SDRAM[1].EmcEmrsDdr2OcdCalib = 0x00000000; +SDRAM[1].EmcDdr2Wait = 0x00000000; +SDRAM[1].EmcClkenOverride = 0x00000000; +SDRAM[1].EmcExtraRefreshNum = 0x00000002; +SDRAM[1].EmcClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[1].McClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[1].EmcCfgDigDllPeriodWarmBoot = 0x00000003; +SDRAM[1].PmcVddpSel = 0x00000002; +SDRAM[1].PmcDdrPwr = 0x00000003; +SDRAM[1].PmcDdrCfg = 0x00000092; +SDRAM[1].PmcIoDpdReq = 0x80800000; +SDRAM[1].PmcIoDpd2Req = 0x00000000; +SDRAM[1].PmcRegShort = 0x00000000; +SDRAM[1].PmcENoVttGen = 0x00000000; +SDRAM[1].PmcNoIoPower = 0x00000000; +SDRAM[1].EmcXm2CmdPadCtrl = 0x001112a0; +SDRAM[1].EmcXm2CmdPadCtrl2 = 0x770c0000; +SDRAM[1].EmcXm2CmdPadCtrl3 = 0x050c0000; +SDRAM[1].EmcXm2CmdPadCtrl4 = 0x00000000; +SDRAM[1].EmcXm2DqsPadCtrl = 0x770c1414; +SDRAM[1].EmcXm2DqsPadCtrl2 = 0x0000013d; +SDRAM[1].EmcXm2DqsPadCtrl3 = 0x10410400; +SDRAM[1].EmcXm2DqsPadCtrl4 = 0x00249249; +SDRAM[1].EmcXm2DqPadCtrl = 0x770c2990; +SDRAM[1].EmcXm2DqPadCtrl2 = 0x00000000; +SDRAM[1].EmcXm2ClkPadCtrl = 0x77ffc085; +SDRAM[1].EmcXm2ClkPadCtrl2 = 0x00000b0b; +SDRAM[1].EmcXm2CompPadCtrl = 0x81f1f508; +SDRAM[1].EmcXm2VttGenPadCtrl = 0x07076604; +SDRAM[1].EmcXm2VttGenPadCtrl2 = 0x00000000; +SDRAM[1].EmcAcpdControl = 0x00000000; +SDRAM[1].EmcSwizzleRank0ByteCfg = 0x00000087; +SDRAM[1].EmcSwizzleRank0Byte0 = 0x53614207; +SDRAM[1].EmcSwizzleRank0Byte1 = 0x26043715; +SDRAM[1].EmcSwizzleRank0Byte2 = 0x40517236; +SDRAM[1].EmcSwizzleRank0Byte3 = 0x45370612; +SDRAM[1].EmcSwizzleRank1ByteCfg = 0x00000087; +SDRAM[1].EmcSwizzleRank1Byte0 = 0x53614207; +SDRAM[1].EmcSwizzleRank1Byte1 = 0x26043715; +SDRAM[1].EmcSwizzleRank1Byte2 = 0x40517236; +SDRAM[1].EmcSwizzleRank1Byte3 = 0x45370612; +SDRAM[1].EmcAddrSwizzleStack1a = 0x0396071a; +SDRAM[1].EmcAddrSwizzleStack1b = 0x000425b8; +SDRAM[1].EmcAddrSwizzleStack2a = 0x07412306; +SDRAM[1].EmcAddrSwizzleStack2b = 0x00000598; +SDRAM[1].EmcAddrSwizzleStack3 = 0x00534012; +SDRAM[1].EmcDsrVttgenDrv = 0x0000003f; +SDRAM[1].EmcTxdsrvttgen = 0x00000000; +SDRAM[1].McEmemAdrCfg = 0x00000000; +SDRAM[1].McEmemAdrCfgDev0 = 0x00080303; +SDRAM[1].McEmemAdrCfgDev1 = 0x00080303; +SDRAM[1].McEmemAdrCfgChannelMask = 0x00000640; +SDRAM[1].McEmemAdrCfgChannelMaskPropagationCount = 0x00000008; +SDRAM[1].McEmemAdrCfgBankMask0 = 0x69248003; +SDRAM[1].McEmemAdrCfgBankMask1 = 0x24928000; +SDRAM[1].McEmemAdrCfgBankMask2 = 0x92c94c00; +SDRAM[1].McEmemCfg = 0x00000800; +SDRAM[1].McEmemArbCfg = 0x0e00000b; +SDRAM[1].McEmemArbOutstandingReq = 0x80000190; +SDRAM[1].McEmemArbTimingRcd = 0x00000004; +SDRAM[1].McEmemArbTimingRp = 0x00000005; +SDRAM[1].McEmemArbTimingRc = 0x00000013; +SDRAM[1].McEmemArbTimingRas = 0x0000000c; +SDRAM[1].McEmemArbTimingFaw = 0x0000000f; +SDRAM[1].McEmemArbTimingRrd = 0x00000002; +SDRAM[1].McEmemArbTimingRap2Pre = 0x00000003; +SDRAM[1].McEmemArbTimingWap2Pre = 0x0000000c; +SDRAM[1].McEmemArbTimingR2R = 0x00000002; +SDRAM[1].McEmemArbTimingW2W = 0x00000002; +SDRAM[1].McEmemArbTimingR2W = 0x00000006; +SDRAM[1].McEmemArbTimingW2R = 0x00000008; +SDRAM[1].McEmemArbDaTurns = 0x08060202; +SDRAM[1].McEmemArbDaCovers = 0x00170e13; +SDRAM[1].McEmemArbMisc0 = 0x734c2414; +SDRAM[1].McEmemArbMisc1 = 0x78000000; +SDRAM[1].McEmemArbRing1Throttle = 0x001f0000; +SDRAM[1].McEmemArbOverride = 0x00000083; +SDRAM[1].McEmemArbRsv = 0xff00ff00; +SDRAM[1].McClkenOverride = 0x00000000; +SDRAM[1].McEmcRegMode = 0x00000002; +SDRAM[1].McVideoProtectBom = 0xfff00000; +SDRAM[1].McVideoProtectSizeMb = 0x00000000; +SDRAM[1].McVideoProtectVprOverride = 0x009a4752; +SDRAM[1].McSecCarveoutBom = 0xfff00000; +SDRAM[1].McSecCarveoutSizeMb = 0x00000000; +SDRAM[1].McVideoProtectWriteAccess = 0x00000000; +SDRAM[1].McSecCarveoutProtectWriteAccess = 0x00000000; +SDRAM[1].EmcCaTrainingEnable = 0x00000000; +SDRAM[1].EmcCaTrainingTimingCntl1 = 0x1f7df7df; +SDRAM[1].EmcCaTrainingTimingCntl2 = 0x0000001f; +SDRAM[1].SwizzleRankByteEncode = 0x000022aa; +SDRAM[1].BootRomPatchControl = 0x00000000; +SDRAM[1].BootRomPatchData = 0x00000000; +SDRAM[1].Ch1EmcDllXformDqs0 = 0x00000008; +SDRAM[1].Ch1EmcDllXformDqs1 = 0x00000008; +SDRAM[1].Ch1EmcDllXformDqs2 = 0x00000008; +SDRAM[1].Ch1EmcDllXformDqs3 = 0x00000008; +SDRAM[1].Ch1EmcDllXformDqs4 = 0x00000008; +SDRAM[1].Ch1EmcDllXformDqs5 = 0x00000008; +SDRAM[1].Ch1EmcDllXformDqs6 = 0x00000008; +SDRAM[1].Ch1EmcDllXformDqs7 = 0x00000008; +SDRAM[1].Ch1EmcDllXformQUse0 = 0x00000000; +SDRAM[1].Ch1EmcDllXformQUse1 = 0x00000000; +SDRAM[1].Ch1EmcDllXformQUse2 = 0x00000000; +SDRAM[1].Ch1EmcDllXformQUse3 = 0x00000000; +SDRAM[1].Ch1EmcDllXformQUse4 = 0x00000000; +SDRAM[1].Ch1EmcDllXformQUse5 = 0x00000000; +SDRAM[1].Ch1EmcDllXformQUse6 = 0x00000000; +SDRAM[1].Ch1EmcDllXformQUse7 = 0x00000000; +SDRAM[1].Ch1EmcDliTrimTxDqs0 = 0x00000000; +SDRAM[1].Ch1EmcDliTrimTxDqs1 = 0x00000000; +SDRAM[1].Ch1EmcDliTrimTxDqs2 = 0x00000000; +SDRAM[1].Ch1EmcDliTrimTxDqs3 = 0x00000000; +SDRAM[1].Ch1EmcDliTrimTxDqs4 = 0x00000000; +SDRAM[1].Ch1EmcDliTrimTxDqs5 = 0x00000000; +SDRAM[1].Ch1EmcDliTrimTxDqs6 = 0x00000000; +SDRAM[1].Ch1EmcDliTrimTxDqs7 = 0x00000000; +SDRAM[1].Ch1EmcDllXformDq0 = 0x0000000A; +SDRAM[1].Ch1EmcDllXformDq1 = 0x0000000A; +SDRAM[1].Ch1EmcDllXformDq2 = 0x0000000A; +SDRAM[1].Ch1EmcDllXformDq3 = 0x0000000A; +SDRAM[1].Ch1EmcSwizzleRank0ByteCfg = 0x000000d2; +SDRAM[1].Ch1EmcSwizzleRank0Byte0 = 0x51430267; +SDRAM[1].Ch1EmcSwizzleRank0Byte1 = 0x13072465; +SDRAM[1].Ch1EmcSwizzleRank0Byte2 = 0x72605314; +SDRAM[1].Ch1EmcSwizzleRank0Byte3 = 0x54073162; +SDRAM[1].Ch1EmcSwizzleRank1ByteCfg = 0x000000d2; +SDRAM[1].Ch1EmcSwizzleRank1Byte0 = 0x51430267; +SDRAM[1].Ch1EmcSwizzleRank1Byte1 = 0x13072465; +SDRAM[1].Ch1EmcSwizzleRank1Byte2 = 0x72605314; +SDRAM[1].Ch1EmcSwizzleRank1Byte3 = 0x54073162; +SDRAM[1].Ch1EmcAddrSwizzleStack1a = 0x79320a61; +SDRAM[1].Ch1EmcAddrSwizzleStack1b = 0x000b8450; +SDRAM[1].Ch1EmcAddrSwizzleStack2a = 0x07623014; +SDRAM[1].Ch1EmcAddrSwizzleStack2b = 0x00000589; +SDRAM[1].Ch1EmcAddrSwizzleStack3 = 0x00530124; +SDRAM[1].Ch1EmcAutoCalConfig = 0xa8f10f0f; +SDRAM[1].Ch1EmcAutoCalConfig2 = 0x00000000; +SDRAM[1].Ch1EmcAutoCalConfig3 = 0x00000000; +SDRAM[1].Ch1EmcCdbCntl1 = 0x00000000; +SDRAM[1].Ch1EmcDllXformAddr0 = 0x00000008; +SDRAM[1].Ch1EmcDllXformAddr1 = 0x00000000; +SDRAM[1].Ch1EmcDllXformAddr2 = 0x00000000; +SDRAM[1].Ch1EmcFbioSpare = 0x02000000; +SDRAM[1].Ch1EmcXm2ClkPadCtrl = 0x77ffc085; +SDRAM[1].Ch1EmcXm2ClkPadCtrl2 = 0x00000b0b; +SDRAM[1].Ch1EmcXm2CmdPadCtrl2 = 0x770c0000; +SDRAM[1].Ch1EmcXm2CmdPadCtrl3 = 0x050c0000; +SDRAM[1].Ch1EmcXm2CmdPadCtrl4 = 0x00000000; +SDRAM[1].Ch1EmcXm2DqPadCtrl = 0x770c2990; +SDRAM[1].Ch1EmcXm2DqPadCtrl2 = 0x00000000; +SDRAM[1].Ch1EmcXm2DqsPadCtrl = 0x770c1515; +SDRAM[1].Ch1EmcXm2DqsPadCtrl3 = 0x10410400; +SDRAM[1].Ch1EmcXm2DqsPadCtrl4 = 0x00249249; + +SDRAM[2].MemoryType = NvBootMemoryType_Ddr3; +SDRAM[2].PllMInputDivider = 0x00000001; +SDRAM[2].PllMFeedbackDivider = 0x00000042; +SDRAM[2].PllMStableTime = 0x0000012c; +SDRAM[2].PllMSetupControl = 0x00000000; +SDRAM[2].PllMSelectDiv2 = 0x00000000; +SDRAM[2].PllMPDLshiftPh45 = 0x00000000; +SDRAM[2].PllMPDLshiftPh90 = 0x00000000; +SDRAM[2].PllMPDLshiftPh135 = 0x00000000; +SDRAM[2].PllMKCP = 0x00000000; +SDRAM[2].PllMKVCO = 0x00000000; +SDRAM[2].EmcBctSpare0 = 0x00000bad; +SDRAM[2].EmcClockSource = 0x80000000; +SDRAM[2].EmcAutoCalInterval = 0x001fffff; +SDRAM[2].EmcAutoCalConfig = 0xa0f10f0f; +SDRAM[2].EmcAutoCalConfig2 = 0x00000000; +SDRAM[2].EmcAutoCalConfig3 = 0x00000000; +SDRAM[2].EmcAutoCalWait = 0x00000064; +SDRAM[2].EmcAdrCfg = 0x00000000; +SDRAM[2].EmcPinProgramWait = 0x00000001; +SDRAM[2].EmcPinExtraWait = 0x00000000; +SDRAM[2].EmcTimingControlWait = 0x00000001; +SDRAM[2].EmcRc = 0x00000024; +SDRAM[2].EmcRfc = 0x000000cd; +SDRAM[2].EmcRfcSlr = 0x00000000; +SDRAM[2].EmcRas = 0x00000019; +SDRAM[2].EmcRp = 0x0000000a; +SDRAM[2].EmcR2r = 0x00000000; +SDRAM[2].EmcW2w = 0x00000000; +SDRAM[2].EmcR2w = 0x00000009; +SDRAM[2].EmcW2r = 0x0000000d; +SDRAM[2].EmcR2p = 0x00000004; +SDRAM[2].EmcW2p = 0x00000013; +SDRAM[2].EmcRdRcd = 0x0000000a; +SDRAM[2].EmcWrRcd = 0x0000000a; +SDRAM[2].EmcRrd = 0x00000003; +SDRAM[2].EmcRext = 0x00000001; +SDRAM[2].EmcWext = 0x00000000; +SDRAM[2].EmcWdv = 0x00000006; +SDRAM[2].EmcWdvMask = 0x00000006; +SDRAM[2].EmcQUse = 0x0000000b; +SDRAM[2].EmcIbdly = 0x0000000b; +SDRAM[2].EmcEInput = 0x00000008; +SDRAM[2].EmcEInputDuration = 0x00000006; +SDRAM[2].EmcPutermExtra = 0x000d000a; +SDRAM[2].EmcCdbCntl1 = 0x00000000; +SDRAM[2].EmcCdbCntl2 = 0x00000000; +SDRAM[2].EmcQRst = 0x00000008; +SDRAM[2].EmcQSafe = 0x0000000d; +SDRAM[2].EmcRdv = 0x00000014; +SDRAM[2].EmcRdvMask = 0x00000014; +SDRAM[2].EmcCtt = 0x00000000; +SDRAM[2].EmcCttDuration = 0x00000000; +SDRAM[2].EmcRefresh = 0x000017e4; +SDRAM[2].EmcBurstRefreshNum = 0x00000000; +SDRAM[2].EmcPreRefreshReqCnt = 0x000005f9; +SDRAM[2].EmcPdEx2Wr = 0x00000003; +SDRAM[2].EmcPdEx2Rd = 0x00000012; +SDRAM[2].EmcPChg2Pden = 0x00000001; +SDRAM[2].EmcAct2Pden = 0x00000000; +SDRAM[2].EmcAr2Pden = 0x000000c6; +SDRAM[2].EmcRw2Pden = 0x00000018; +SDRAM[2].EmcTxsr = 0x000000d6; +SDRAM[2].EmcTxsrDll = 0x00000200; +SDRAM[2].EmcTcke = 0x00000005; +SDRAM[2].EmcTckesr = 0x00000005; +SDRAM[2].EmcTpd = 0x00000005; +SDRAM[2].EmcTfaw = 0x00000020; +SDRAM[2].EmcTrpab = 0x00000000; +SDRAM[2].EmcTClkStable = 0x00000007; +SDRAM[2].EmcTClkStop = 0x00000008; +SDRAM[2].EmcTRefBw = 0x00001825; +SDRAM[2].EmcQUseExtra = 0x0000000a; +SDRAM[2].EmcFbioCfg5 = 0x0000ba88; +SDRAM[2].EmcFbioCfg6 = 0x00000006; +SDRAM[2].EmcFbioSpare = 0x02000000; +SDRAM[2].EmcCfgRsv = 0xff00ff00; +SDRAM[2].EmcMrs = 0x80000d71; +SDRAM[2].EmcEmrs = 0x80100002; +SDRAM[2].EmcEmrs2 = 0x80200418; +SDRAM[2].EmcEmrs3 = 0x80300000; +SDRAM[2].EmcMrw1 = 0x00000000; +SDRAM[2].EmcMrw2 = 0x00000000; +SDRAM[2].EmcMrw3 = 0x00000000; +SDRAM[2].EmcMrw4 = 0x00000000; +SDRAM[2].EmcMrwExtra = 0x00000000; +SDRAM[2].EmcWarmBootMrwExtra = 0x00000000; +SDRAM[2].EmcWarmBootExtraModeRegWriteEnable = 0x00000000; +SDRAM[2].EmcExtraModeRegWriteEnable = 0x00000000; +SDRAM[2].EmcMrwResetCommand = 0x00000000; +SDRAM[2].EmcMrwResetNInitWait = 0x00000000; +SDRAM[2].EmcMrsWaitCnt = 0x00f8000f; +SDRAM[2].EmcMrsWaitCnt2 = 0x00f8000f; +SDRAM[2].EmcCfg = 0x53200000; +SDRAM[2].EmcCfg2 = 0x008008c1; +SDRAM[2].EmcDbg = 0x01000400; +SDRAM[2].EmcCmdQ = 0x10004408; +SDRAM[2].EmcMc2EmcQ = 0x06000404; +SDRAM[2].EmcDynSelfRefControl = 0x80003018; +SDRAM[2].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; +SDRAM[2].EmcCfgDigDll = 0xf0070191; +SDRAM[2].EmcCfgDigDllPeriod = 0x00008000; +SDRAM[2].EmcDevSelect = 0x00000002; +SDRAM[2].EmcSelDpdCtrl = 0x00040000; +SDRAM[2].EmcDllXformDqs0 = 0x00000008; +SDRAM[2].EmcDllXformDqs1 = 0x00000008; +SDRAM[2].EmcDllXformDqs2 = 0x00000008; +SDRAM[2].EmcDllXformDqs3 = 0x00000008; +SDRAM[2].EmcDllXformDqs4 = 0x00000008; +SDRAM[2].EmcDllXformDqs5 = 0x00000008; +SDRAM[2].EmcDllXformDqs6 = 0x00000008; +SDRAM[2].EmcDllXformDqs7 = 0x00000008; +SDRAM[2].EmcDllXformQUse0 = 0x00000000; +SDRAM[2].EmcDllXformQUse1 = 0x00000000; +SDRAM[2].EmcDllXformQUse2 = 0x00000000; +SDRAM[2].EmcDllXformQUse3 = 0x00000000; +SDRAM[2].EmcDllXformQUse4 = 0x00000000; +SDRAM[2].EmcDllXformQUse5 = 0x00000000; +SDRAM[2].EmcDllXformQUse6 = 0x00000000; +SDRAM[2].EmcDllXformQUse7 = 0x00000000; +SDRAM[2].EmcDllXformAddr0 = 0x00000008; +SDRAM[2].EmcDllXformAddr1 = 0x00000000; +SDRAM[2].EmcDllXformAddr2 = 0x00000000; +SDRAM[2].EmcDliTrimTxDqs0 = 0x00000000; +SDRAM[2].EmcDliTrimTxDqs1 = 0x00000000; +SDRAM[2].EmcDliTrimTxDqs2 = 0x00000000; +SDRAM[2].EmcDliTrimTxDqs3 = 0x00000000; +SDRAM[2].EmcDliTrimTxDqs4 = 0x00000000; +SDRAM[2].EmcDliTrimTxDqs5 = 0x00000000; +SDRAM[2].EmcDliTrimTxDqs6 = 0x00000000; +SDRAM[2].EmcDliTrimTxDqs7 = 0x00000000; +SDRAM[2].EmcDllXformDq0 = 0x0000000A; +SDRAM[2].EmcDllXformDq1 = 0x0000000A; +SDRAM[2].EmcDllXformDq2 = 0x0000000A; +SDRAM[2].EmcDllXformDq3 = 0x0000000A; +SDRAM[2].WarmBootWait = 0x00000002; +SDRAM[2].EmcCttTermCtrl = 0x00000802; +SDRAM[2].EmcOdtWrite = 0x80000020; +SDRAM[2].EmcOdtRead = 0x00000000; +SDRAM[2].EmcZcalInterval = 0x00020000; +SDRAM[2].EmcZcalWaitCnt = 0x00000042; +SDRAM[2].EmcZcalMrwCmd = 0x80000000; +SDRAM[2].EmcMrsResetDll = 0x00000000; +SDRAM[2].EmcZcalInitDev0 = 0x80000011; +SDRAM[2].EmcZcalInitDev1 = 0x00000000; +SDRAM[2].EmcZcalInitWait = 0x00000001; +SDRAM[2].EmcZcalWarmColdBootEnables = 0x00000003; +SDRAM[2].EmcMrwLpddr2ZcalWarmBoot = 0x000a00ab; +SDRAM[2].EmcZqCalDdr3WarmBoot = 0x00000011; +SDRAM[2].EmcZcalWarmBootWait = 0x00000001; +SDRAM[2].EmcMrsWarmBootEnable = 0x00000001; +SDRAM[2].EmcMrsResetDllWait = 0x00000000; +SDRAM[2].EmcMrsExtra = 0x80000d05; +SDRAM[2].EmcWarmBootMrsExtra = 0x80100002; +SDRAM[2].EmcEmrsDdr2DllEnable = 0x00000000; +SDRAM[2].EmcMrsDdr2DllReset = 0x00000000; +SDRAM[2].EmcEmrsDdr2OcdCalib = 0x00000000; +SDRAM[2].EmcDdr2Wait = 0x00000000; +SDRAM[2].EmcClkenOverride = 0x00000000; +SDRAM[2].EmcExtraRefreshNum = 0x00000002; +SDRAM[2].EmcClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[2].McClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[2].EmcCfgDigDllPeriodWarmBoot = 0x00000003; +SDRAM[2].PmcVddpSel = 0x00000002; +SDRAM[2].PmcDdrPwr = 0x00000003; +SDRAM[2].PmcDdrCfg = 0x00000092; +SDRAM[2].PmcIoDpdReq = 0x80800000; +SDRAM[2].PmcIoDpd2Req = 0x00000000; +SDRAM[2].PmcRegShort = 0x00000000; +SDRAM[2].PmcENoVttGen = 0x00000000; +SDRAM[2].PmcNoIoPower = 0x00000000; +SDRAM[2].EmcXm2CmdPadCtrl = 0x001112a0; +SDRAM[2].EmcXm2CmdPadCtrl2 = 0x770c0000; +SDRAM[2].EmcXm2CmdPadCtrl3 = 0x050c0000; +SDRAM[2].EmcXm2CmdPadCtrl4 = 0x00000000; +SDRAM[2].EmcXm2DqsPadCtrl = 0x770c1414; +SDRAM[2].EmcXm2DqsPadCtrl2 = 0x0000013d; +SDRAM[2].EmcXm2DqsPadCtrl3 = 0x10410400; +SDRAM[2].EmcXm2DqsPadCtrl4 = 0x00249249; +SDRAM[2].EmcXm2DqPadCtrl = 0x770c2990; +SDRAM[2].EmcXm2DqPadCtrl2 = 0x00000000; +SDRAM[2].EmcXm2ClkPadCtrl = 0x77ffc085; +SDRAM[2].EmcXm2ClkPadCtrl2 = 0x00000b0b; +SDRAM[2].EmcXm2CompPadCtrl = 0x81f1f508; +SDRAM[2].EmcXm2VttGenPadCtrl = 0x07076604; +SDRAM[2].EmcXm2VttGenPadCtrl2 = 0x00000000; +SDRAM[2].EmcAcpdControl = 0x00000000; +SDRAM[2].EmcSwizzleRank0ByteCfg = 0x00000087; +SDRAM[2].EmcSwizzleRank0Byte0 = 0x53614207; +SDRAM[2].EmcSwizzleRank0Byte1 = 0x26043715; +SDRAM[2].EmcSwizzleRank0Byte2 = 0x40517236; +SDRAM[2].EmcSwizzleRank0Byte3 = 0x45370612; +SDRAM[2].EmcSwizzleRank1ByteCfg = 0x00000087; +SDRAM[2].EmcSwizzleRank1Byte0 = 0x53614207; +SDRAM[2].EmcSwizzleRank1Byte1 = 0x26043715; +SDRAM[2].EmcSwizzleRank1Byte2 = 0x40517236; +SDRAM[2].EmcSwizzleRank1Byte3 = 0x45370612; +SDRAM[2].EmcAddrSwizzleStack1a = 0x0396071a; +SDRAM[2].EmcAddrSwizzleStack1b = 0x000425b8; +SDRAM[2].EmcAddrSwizzleStack2a = 0x07412306; +SDRAM[2].EmcAddrSwizzleStack2b = 0x00000598; +SDRAM[2].EmcAddrSwizzleStack3 = 0x00534012; +SDRAM[2].EmcDsrVttgenDrv = 0x0000003f; +SDRAM[2].EmcTxdsrvttgen = 0x00000000; +SDRAM[2].McEmemAdrCfg = 0x00000000; +SDRAM[2].McEmemAdrCfgDev0 = 0x00080303; +SDRAM[2].McEmemAdrCfgDev1 = 0x00080303; +SDRAM[2].McEmemAdrCfgChannelMask = 0x00000640; +SDRAM[2].McEmemAdrCfgChannelMaskPropagationCount = 0x00000008; +SDRAM[2].McEmemAdrCfgBankMask0 = 0x69248003; +SDRAM[2].McEmemAdrCfgBankMask1 = 0x24928000; +SDRAM[2].McEmemAdrCfgBankMask2 = 0x92c94c00; +SDRAM[2].McEmemCfg = 0x00000800; +SDRAM[2].McEmemArbCfg = 0x0e00000b; +SDRAM[2].McEmemArbOutstandingReq = 0x80000190; +SDRAM[2].McEmemArbTimingRcd = 0x00000004; +SDRAM[2].McEmemArbTimingRp = 0x00000005; +SDRAM[2].McEmemArbTimingRc = 0x00000013; +SDRAM[2].McEmemArbTimingRas = 0x0000000c; +SDRAM[2].McEmemArbTimingFaw = 0x0000000f; +SDRAM[2].McEmemArbTimingRrd = 0x00000002; +SDRAM[2].McEmemArbTimingRap2Pre = 0x00000003; +SDRAM[2].McEmemArbTimingWap2Pre = 0x0000000c; +SDRAM[2].McEmemArbTimingR2R = 0x00000002; +SDRAM[2].McEmemArbTimingW2W = 0x00000002; +SDRAM[2].McEmemArbTimingR2W = 0x00000006; +SDRAM[2].McEmemArbTimingW2R = 0x00000008; +SDRAM[2].McEmemArbDaTurns = 0x08060202; +SDRAM[2].McEmemArbDaCovers = 0x00170e13; +SDRAM[2].McEmemArbMisc0 = 0x734c2414; +SDRAM[2].McEmemArbMisc1 = 0x78000000; +SDRAM[2].McEmemArbRing1Throttle = 0x001f0000; +SDRAM[2].McEmemArbOverride = 0x00000083; +SDRAM[2].McEmemArbRsv = 0xff00ff00; +SDRAM[2].McClkenOverride = 0x00000000; +SDRAM[2].McEmcRegMode = 0x00000002; +SDRAM[2].McVideoProtectBom = 0xfff00000; +SDRAM[2].McVideoProtectSizeMb = 0x00000000; +SDRAM[2].McVideoProtectVprOverride = 0x009a4752; +SDRAM[2].McSecCarveoutBom = 0xfff00000; +SDRAM[2].McSecCarveoutSizeMb = 0x00000000; +SDRAM[2].McVideoProtectWriteAccess = 0x00000000; +SDRAM[2].McSecCarveoutProtectWriteAccess = 0x00000000; +SDRAM[2].EmcCaTrainingEnable = 0x00000000; +SDRAM[2].EmcCaTrainingTimingCntl1 = 0x1f7df7df; +SDRAM[2].EmcCaTrainingTimingCntl2 = 0x0000001f; +SDRAM[2].SwizzleRankByteEncode = 0x000022aa; +SDRAM[2].BootRomPatchControl = 0x00000000; +SDRAM[2].BootRomPatchData = 0x00000000; +SDRAM[2].Ch1EmcDllXformDqs0 = 0x00000008; +SDRAM[2].Ch1EmcDllXformDqs1 = 0x00000008; +SDRAM[2].Ch1EmcDllXformDqs2 = 0x00000008; +SDRAM[2].Ch1EmcDllXformDqs3 = 0x00000008; +SDRAM[2].Ch1EmcDllXformDqs4 = 0x00000008; +SDRAM[2].Ch1EmcDllXformDqs5 = 0x00000008; +SDRAM[2].Ch1EmcDllXformDqs6 = 0x00000008; +SDRAM[2].Ch1EmcDllXformDqs7 = 0x00000008; +SDRAM[2].Ch1EmcDllXformQUse0 = 0x00000000; +SDRAM[2].Ch1EmcDllXformQUse1 = 0x00000000; +SDRAM[2].Ch1EmcDllXformQUse2 = 0x00000000; +SDRAM[2].Ch1EmcDllXformQUse3 = 0x00000000; +SDRAM[2].Ch1EmcDllXformQUse4 = 0x00000000; +SDRAM[2].Ch1EmcDllXformQUse5 = 0x00000000; +SDRAM[2].Ch1EmcDllXformQUse6 = 0x00000000; +SDRAM[2].Ch1EmcDllXformQUse7 = 0x00000000; +SDRAM[2].Ch1EmcDliTrimTxDqs0 = 0x00000000; +SDRAM[2].Ch1EmcDliTrimTxDqs1 = 0x00000000; +SDRAM[2].Ch1EmcDliTrimTxDqs2 = 0x00000000; +SDRAM[2].Ch1EmcDliTrimTxDqs3 = 0x00000000; +SDRAM[2].Ch1EmcDliTrimTxDqs4 = 0x00000000; +SDRAM[2].Ch1EmcDliTrimTxDqs5 = 0x00000000; +SDRAM[2].Ch1EmcDliTrimTxDqs6 = 0x00000000; +SDRAM[2].Ch1EmcDliTrimTxDqs7 = 0x00000000; +SDRAM[2].Ch1EmcDllXformDq0 = 0x0000000A; +SDRAM[2].Ch1EmcDllXformDq1 = 0x0000000A; +SDRAM[2].Ch1EmcDllXformDq2 = 0x0000000A; +SDRAM[2].Ch1EmcDllXformDq3 = 0x0000000A; +SDRAM[2].Ch1EmcSwizzleRank0ByteCfg = 0x000000d2; +SDRAM[2].Ch1EmcSwizzleRank0Byte0 = 0x51430267; +SDRAM[2].Ch1EmcSwizzleRank0Byte1 = 0x13072465; +SDRAM[2].Ch1EmcSwizzleRank0Byte2 = 0x72605314; +SDRAM[2].Ch1EmcSwizzleRank0Byte3 = 0x54073162; +SDRAM[2].Ch1EmcSwizzleRank1ByteCfg = 0x000000d2; +SDRAM[2].Ch1EmcSwizzleRank1Byte0 = 0x51430267; +SDRAM[2].Ch1EmcSwizzleRank1Byte1 = 0x13072465; +SDRAM[2].Ch1EmcSwizzleRank1Byte2 = 0x72605314; +SDRAM[2].Ch1EmcSwizzleRank1Byte3 = 0x54073162; +SDRAM[2].Ch1EmcAddrSwizzleStack1a = 0x79320a61; +SDRAM[2].Ch1EmcAddrSwizzleStack1b = 0x000b8450; +SDRAM[2].Ch1EmcAddrSwizzleStack2a = 0x07623014; +SDRAM[2].Ch1EmcAddrSwizzleStack2b = 0x00000589; +SDRAM[2].Ch1EmcAddrSwizzleStack3 = 0x00530124; +SDRAM[2].Ch1EmcAutoCalConfig = 0xa8f10f0f; +SDRAM[2].Ch1EmcAutoCalConfig2 = 0x00000000; +SDRAM[2].Ch1EmcAutoCalConfig3 = 0x00000000; +SDRAM[2].Ch1EmcCdbCntl1 = 0x00000000; +SDRAM[2].Ch1EmcDllXformAddr0 = 0x00000008; +SDRAM[2].Ch1EmcDllXformAddr1 = 0x00000000; +SDRAM[2].Ch1EmcDllXformAddr2 = 0x00000000; +SDRAM[2].Ch1EmcFbioSpare = 0x02000000; +SDRAM[2].Ch1EmcXm2ClkPadCtrl = 0x77ffc085; +SDRAM[2].Ch1EmcXm2ClkPadCtrl2 = 0x00000b0b; +SDRAM[2].Ch1EmcXm2CmdPadCtrl2 = 0x770c0000; +SDRAM[2].Ch1EmcXm2CmdPadCtrl3 = 0x050c0000; +SDRAM[2].Ch1EmcXm2CmdPadCtrl4 = 0x00000000; +SDRAM[2].Ch1EmcXm2DqPadCtrl = 0x770c2990; +SDRAM[2].Ch1EmcXm2DqPadCtrl2 = 0x00000000; +SDRAM[2].Ch1EmcXm2DqsPadCtrl = 0x770c1515; +SDRAM[2].Ch1EmcXm2DqsPadCtrl3 = 0x10410400; +SDRAM[2].Ch1EmcXm2DqsPadCtrl4 = 0x00249249; + +SDRAM[3].MemoryType = NvBootMemoryType_Ddr3; +SDRAM[3].PllMInputDivider = 0x00000001; +SDRAM[3].PllMFeedbackDivider = 0x00000042; +SDRAM[3].PllMStableTime = 0x0000012c; +SDRAM[3].PllMSetupControl = 0x00000000; +SDRAM[3].PllMSelectDiv2 = 0x00000000; +SDRAM[3].PllMPDLshiftPh45 = 0x00000000; +SDRAM[3].PllMPDLshiftPh90 = 0x00000000; +SDRAM[3].PllMPDLshiftPh135 = 0x00000000; +SDRAM[3].PllMKCP = 0x00000000; +SDRAM[3].PllMKVCO = 0x00000000; +SDRAM[3].EmcBctSpare0 = 0x00000bad; +SDRAM[3].EmcClockSource = 0x80000000; +SDRAM[3].EmcAutoCalInterval = 0x001fffff; +SDRAM[3].EmcAutoCalConfig = 0xa0f10f0f; +SDRAM[3].EmcAutoCalConfig2 = 0x00000000; +SDRAM[3].EmcAutoCalConfig3 = 0x00000000; +SDRAM[3].EmcAutoCalWait = 0x00000064; +SDRAM[3].EmcAdrCfg = 0x00000000; +SDRAM[3].EmcPinProgramWait = 0x00000001; +SDRAM[3].EmcPinExtraWait = 0x00000000; +SDRAM[3].EmcTimingControlWait = 0x00000001; +SDRAM[3].EmcRc = 0x00000024; +SDRAM[3].EmcRfc = 0x000000cd; +SDRAM[3].EmcRfcSlr = 0x00000000; +SDRAM[3].EmcRas = 0x00000019; +SDRAM[3].EmcRp = 0x0000000a; +SDRAM[3].EmcR2r = 0x00000000; +SDRAM[3].EmcW2w = 0x00000000; +SDRAM[3].EmcR2w = 0x00000009; +SDRAM[3].EmcW2r = 0x0000000d; +SDRAM[3].EmcR2p = 0x00000004; +SDRAM[3].EmcW2p = 0x00000013; +SDRAM[3].EmcRdRcd = 0x0000000a; +SDRAM[3].EmcWrRcd = 0x0000000a; +SDRAM[3].EmcRrd = 0x00000003; +SDRAM[3].EmcRext = 0x00000001; +SDRAM[3].EmcWext = 0x00000000; +SDRAM[3].EmcWdv = 0x00000006; +SDRAM[3].EmcWdvMask = 0x00000006; +SDRAM[3].EmcQUse = 0x0000000b; +SDRAM[3].EmcIbdly = 0x0000000b; +SDRAM[3].EmcEInput = 0x00000008; +SDRAM[3].EmcEInputDuration = 0x00000006; +SDRAM[3].EmcPutermExtra = 0x000d000a; +SDRAM[3].EmcCdbCntl1 = 0x00000000; +SDRAM[3].EmcCdbCntl2 = 0x00000000; +SDRAM[3].EmcQRst = 0x00000008; +SDRAM[3].EmcQSafe = 0x0000000d; +SDRAM[3].EmcRdv = 0x00000014; +SDRAM[3].EmcRdvMask = 0x00000014; +SDRAM[3].EmcCtt = 0x00000000; +SDRAM[3].EmcCttDuration = 0x00000000; +SDRAM[3].EmcRefresh = 0x000017e4; +SDRAM[3].EmcBurstRefreshNum = 0x00000000; +SDRAM[3].EmcPreRefreshReqCnt = 0x000005f9; +SDRAM[3].EmcPdEx2Wr = 0x00000003; +SDRAM[3].EmcPdEx2Rd = 0x00000012; +SDRAM[3].EmcPChg2Pden = 0x00000001; +SDRAM[3].EmcAct2Pden = 0x00000000; +SDRAM[3].EmcAr2Pden = 0x000000c6; +SDRAM[3].EmcRw2Pden = 0x00000018; +SDRAM[3].EmcTxsr = 0x000000d6; +SDRAM[3].EmcTxsrDll = 0x00000200; +SDRAM[3].EmcTcke = 0x00000005; +SDRAM[3].EmcTckesr = 0x00000005; +SDRAM[3].EmcTpd = 0x00000005; +SDRAM[3].EmcTfaw = 0x00000020; +SDRAM[3].EmcTrpab = 0x00000000; +SDRAM[3].EmcTClkStable = 0x00000007; +SDRAM[3].EmcTClkStop = 0x00000008; +SDRAM[3].EmcTRefBw = 0x00001825; +SDRAM[3].EmcQUseExtra = 0x0000000a; +SDRAM[3].EmcFbioCfg5 = 0x0000ba88; +SDRAM[3].EmcFbioCfg6 = 0x00000006; +SDRAM[3].EmcFbioSpare = 0x02000000; +SDRAM[3].EmcCfgRsv = 0xff00ff00; +SDRAM[3].EmcMrs = 0x80000d71; +SDRAM[3].EmcEmrs = 0x80100002; +SDRAM[3].EmcEmrs2 = 0x80200418; +SDRAM[3].EmcEmrs3 = 0x80300000; +SDRAM[3].EmcMrw1 = 0x00000000; +SDRAM[3].EmcMrw2 = 0x00000000; +SDRAM[3].EmcMrw3 = 0x00000000; +SDRAM[3].EmcMrw4 = 0x00000000; +SDRAM[3].EmcMrwExtra = 0x00000000; +SDRAM[3].EmcWarmBootMrwExtra = 0x00000000; +SDRAM[3].EmcWarmBootExtraModeRegWriteEnable = 0x00000000; +SDRAM[3].EmcExtraModeRegWriteEnable = 0x00000000; +SDRAM[3].EmcMrwResetCommand = 0x00000000; +SDRAM[3].EmcMrwResetNInitWait = 0x00000000; +SDRAM[3].EmcMrsWaitCnt = 0x00f8000f; +SDRAM[3].EmcMrsWaitCnt2 = 0x00f8000f; +SDRAM[3].EmcCfg = 0x53200000; +SDRAM[3].EmcCfg2 = 0x008008c1; +SDRAM[3].EmcDbg = 0x01000400; +SDRAM[3].EmcCmdQ = 0x10004408; +SDRAM[3].EmcMc2EmcQ = 0x06000404; +SDRAM[3].EmcDynSelfRefControl = 0x80003018; +SDRAM[3].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; +SDRAM[3].EmcCfgDigDll = 0xf0070191; +SDRAM[3].EmcCfgDigDllPeriod = 0x00008000; +SDRAM[3].EmcDevSelect = 0x00000002; +SDRAM[3].EmcSelDpdCtrl = 0x00040000; +SDRAM[3].EmcDllXformDqs0 = 0x00000008; +SDRAM[3].EmcDllXformDqs1 = 0x00000008; +SDRAM[3].EmcDllXformDqs2 = 0x00000008; +SDRAM[3].EmcDllXformDqs3 = 0x00000008; +SDRAM[3].EmcDllXformDqs4 = 0x00000008; +SDRAM[3].EmcDllXformDqs5 = 0x00000008; +SDRAM[3].EmcDllXformDqs6 = 0x00000008; +SDRAM[3].EmcDllXformDqs7 = 0x00000008; +SDRAM[3].EmcDllXformQUse0 = 0x00000000; +SDRAM[3].EmcDllXformQUse1 = 0x00000000; +SDRAM[3].EmcDllXformQUse2 = 0x00000000; +SDRAM[3].EmcDllXformQUse3 = 0x00000000; +SDRAM[3].EmcDllXformQUse4 = 0x00000000; +SDRAM[3].EmcDllXformQUse5 = 0x00000000; +SDRAM[3].EmcDllXformQUse6 = 0x00000000; +SDRAM[3].EmcDllXformQUse7 = 0x00000000; +SDRAM[3].EmcDllXformAddr0 = 0x00000008; +SDRAM[3].EmcDllXformAddr1 = 0x00000000; +SDRAM[3].EmcDllXformAddr2 = 0x00000000; +SDRAM[3].EmcDliTrimTxDqs0 = 0x00000000; +SDRAM[3].EmcDliTrimTxDqs1 = 0x00000000; +SDRAM[3].EmcDliTrimTxDqs2 = 0x00000000; +SDRAM[3].EmcDliTrimTxDqs3 = 0x00000000; +SDRAM[3].EmcDliTrimTxDqs4 = 0x00000000; +SDRAM[3].EmcDliTrimTxDqs5 = 0x00000000; +SDRAM[3].EmcDliTrimTxDqs6 = 0x00000000; +SDRAM[3].EmcDliTrimTxDqs7 = 0x00000000; +SDRAM[3].EmcDllXformDq0 = 0x0000000A; +SDRAM[3].EmcDllXformDq1 = 0x0000000A; +SDRAM[3].EmcDllXformDq2 = 0x0000000A; +SDRAM[3].EmcDllXformDq3 = 0x0000000A; +SDRAM[3].WarmBootWait = 0x00000002; +SDRAM[3].EmcCttTermCtrl = 0x00000802; +SDRAM[3].EmcOdtWrite = 0x80000020; +SDRAM[3].EmcOdtRead = 0x00000000; +SDRAM[3].EmcZcalInterval = 0x00020000; +SDRAM[3].EmcZcalWaitCnt = 0x00000042; +SDRAM[3].EmcZcalMrwCmd = 0x80000000; +SDRAM[3].EmcMrsResetDll = 0x00000000; +SDRAM[3].EmcZcalInitDev0 = 0x80000011; +SDRAM[3].EmcZcalInitDev1 = 0x00000000; +SDRAM[3].EmcZcalInitWait = 0x00000001; +SDRAM[3].EmcZcalWarmColdBootEnables = 0x00000003; +SDRAM[3].EmcMrwLpddr2ZcalWarmBoot = 0x000a00ab; +SDRAM[3].EmcZqCalDdr3WarmBoot = 0x00000011; +SDRAM[3].EmcZcalWarmBootWait = 0x00000001; +SDRAM[3].EmcMrsWarmBootEnable = 0x00000001; +SDRAM[3].EmcMrsResetDllWait = 0x00000000; +SDRAM[3].EmcMrsExtra = 0x80000d05; +SDRAM[3].EmcWarmBootMrsExtra = 0x80100002; +SDRAM[3].EmcEmrsDdr2DllEnable = 0x00000000; +SDRAM[3].EmcMrsDdr2DllReset = 0x00000000; +SDRAM[3].EmcEmrsDdr2OcdCalib = 0x00000000; +SDRAM[3].EmcDdr2Wait = 0x00000000; +SDRAM[3].EmcClkenOverride = 0x00000000; +SDRAM[3].EmcExtraRefreshNum = 0x00000002; +SDRAM[3].EmcClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[3].McClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[3].EmcCfgDigDllPeriodWarmBoot = 0x00000003; +SDRAM[3].PmcVddpSel = 0x00000002; +SDRAM[3].PmcDdrPwr = 0x00000003; +SDRAM[3].PmcDdrCfg = 0x00000092; +SDRAM[3].PmcIoDpdReq = 0x80800000; +SDRAM[3].PmcIoDpd2Req = 0x00000000; +SDRAM[3].PmcRegShort = 0x00000000; +SDRAM[3].PmcENoVttGen = 0x00000000; +SDRAM[3].PmcNoIoPower = 0x00000000; +SDRAM[3].EmcXm2CmdPadCtrl = 0x001112a0; +SDRAM[3].EmcXm2CmdPadCtrl2 = 0x770c0000; +SDRAM[3].EmcXm2CmdPadCtrl3 = 0x050c0000; +SDRAM[3].EmcXm2CmdPadCtrl4 = 0x00000000; +SDRAM[3].EmcXm2DqsPadCtrl = 0x770c1414; +SDRAM[3].EmcXm2DqsPadCtrl2 = 0x0000013d; +SDRAM[3].EmcXm2DqsPadCtrl3 = 0x10410400; +SDRAM[3].EmcXm2DqsPadCtrl4 = 0x00249249; +SDRAM[3].EmcXm2DqPadCtrl = 0x770c2990; +SDRAM[3].EmcXm2DqPadCtrl2 = 0x00000000; +SDRAM[3].EmcXm2ClkPadCtrl = 0x77ffc085; +SDRAM[3].EmcXm2ClkPadCtrl2 = 0x00000b0b; +SDRAM[3].EmcXm2CompPadCtrl = 0x81f1f508; +SDRAM[3].EmcXm2VttGenPadCtrl = 0x07076604; +SDRAM[3].EmcXm2VttGenPadCtrl2 = 0x00000000; +SDRAM[3].EmcAcpdControl = 0x00000000; +SDRAM[3].EmcSwizzleRank0ByteCfg = 0x00000087; +SDRAM[3].EmcSwizzleRank0Byte0 = 0x53614207; +SDRAM[3].EmcSwizzleRank0Byte1 = 0x26043715; +SDRAM[3].EmcSwizzleRank0Byte2 = 0x40517236; +SDRAM[3].EmcSwizzleRank0Byte3 = 0x45370612; +SDRAM[3].EmcSwizzleRank1ByteCfg = 0x00000087; +SDRAM[3].EmcSwizzleRank1Byte0 = 0x53614207; +SDRAM[3].EmcSwizzleRank1Byte1 = 0x26043715; +SDRAM[3].EmcSwizzleRank1Byte2 = 0x40517236; +SDRAM[3].EmcSwizzleRank1Byte3 = 0x45370612; +SDRAM[3].EmcAddrSwizzleStack1a = 0x0396071a; +SDRAM[3].EmcAddrSwizzleStack1b = 0x000425b8; +SDRAM[3].EmcAddrSwizzleStack2a = 0x07412306; +SDRAM[3].EmcAddrSwizzleStack2b = 0x00000598; +SDRAM[3].EmcAddrSwizzleStack3 = 0x00534012; +SDRAM[3].EmcDsrVttgenDrv = 0x0000003f; +SDRAM[3].EmcTxdsrvttgen = 0x00000000; +SDRAM[3].McEmemAdrCfg = 0x00000000; +SDRAM[3].McEmemAdrCfgDev0 = 0x00080303; +SDRAM[3].McEmemAdrCfgDev1 = 0x00080303; +SDRAM[3].McEmemAdrCfgChannelMask = 0x00000640; +SDRAM[3].McEmemAdrCfgChannelMaskPropagationCount = 0x00000008; +SDRAM[3].McEmemAdrCfgBankMask0 = 0x69248003; +SDRAM[3].McEmemAdrCfgBankMask1 = 0x24928000; +SDRAM[3].McEmemAdrCfgBankMask2 = 0x92c94c00; +SDRAM[3].McEmemCfg = 0x00000800; +SDRAM[3].McEmemArbCfg = 0x0e00000b; +SDRAM[3].McEmemArbOutstandingReq = 0x80000190; +SDRAM[3].McEmemArbTimingRcd = 0x00000004; +SDRAM[3].McEmemArbTimingRp = 0x00000005; +SDRAM[3].McEmemArbTimingRc = 0x00000013; +SDRAM[3].McEmemArbTimingRas = 0x0000000c; +SDRAM[3].McEmemArbTimingFaw = 0x0000000f; +SDRAM[3].McEmemArbTimingRrd = 0x00000002; +SDRAM[3].McEmemArbTimingRap2Pre = 0x00000003; +SDRAM[3].McEmemArbTimingWap2Pre = 0x0000000c; +SDRAM[3].McEmemArbTimingR2R = 0x00000002; +SDRAM[3].McEmemArbTimingW2W = 0x00000002; +SDRAM[3].McEmemArbTimingR2W = 0x00000006; +SDRAM[3].McEmemArbTimingW2R = 0x00000008; +SDRAM[3].McEmemArbDaTurns = 0x08060202; +SDRAM[3].McEmemArbDaCovers = 0x00170e13; +SDRAM[3].McEmemArbMisc0 = 0x734c2414; +SDRAM[3].McEmemArbMisc1 = 0x78000000; +SDRAM[3].McEmemArbRing1Throttle = 0x001f0000; +SDRAM[3].McEmemArbOverride = 0x00000083; +SDRAM[3].McEmemArbRsv = 0xff00ff00; +SDRAM[3].McClkenOverride = 0x00000000; +SDRAM[3].McEmcRegMode = 0x00000002; +SDRAM[3].McVideoProtectBom = 0xfff00000; +SDRAM[3].McVideoProtectSizeMb = 0x00000000; +SDRAM[3].McVideoProtectVprOverride = 0x009a4752; +SDRAM[3].McSecCarveoutBom = 0xfff00000; +SDRAM[3].McSecCarveoutSizeMb = 0x00000000; +SDRAM[3].McVideoProtectWriteAccess = 0x00000000; +SDRAM[3].McSecCarveoutProtectWriteAccess = 0x00000000; +SDRAM[3].EmcCaTrainingEnable = 0x00000000; +SDRAM[3].EmcCaTrainingTimingCntl1 = 0x1f7df7df; +SDRAM[3].EmcCaTrainingTimingCntl2 = 0x0000001f; +SDRAM[3].SwizzleRankByteEncode = 0x000022aa; +SDRAM[3].BootRomPatchControl = 0x00000000; +SDRAM[3].BootRomPatchData = 0x00000000; +SDRAM[3].Ch1EmcDllXformDqs0 = 0x00000008; +SDRAM[3].Ch1EmcDllXformDqs1 = 0x00000008; +SDRAM[3].Ch1EmcDllXformDqs2 = 0x00000008; +SDRAM[3].Ch1EmcDllXformDqs3 = 0x00000008; +SDRAM[3].Ch1EmcDllXformDqs4 = 0x00000008; +SDRAM[3].Ch1EmcDllXformDqs5 = 0x00000008; +SDRAM[3].Ch1EmcDllXformDqs6 = 0x00000008; +SDRAM[3].Ch1EmcDllXformDqs7 = 0x00000008; +SDRAM[3].Ch1EmcDllXformQUse0 = 0x00000000; +SDRAM[3].Ch1EmcDllXformQUse1 = 0x00000000; +SDRAM[3].Ch1EmcDllXformQUse2 = 0x00000000; +SDRAM[3].Ch1EmcDllXformQUse3 = 0x00000000; +SDRAM[3].Ch1EmcDllXformQUse4 = 0x00000000; +SDRAM[3].Ch1EmcDllXformQUse5 = 0x00000000; +SDRAM[3].Ch1EmcDllXformQUse6 = 0x00000000; +SDRAM[3].Ch1EmcDllXformQUse7 = 0x00000000; +SDRAM[3].Ch1EmcDliTrimTxDqs0 = 0x00000000; +SDRAM[3].Ch1EmcDliTrimTxDqs1 = 0x00000000; +SDRAM[3].Ch1EmcDliTrimTxDqs2 = 0x00000000; +SDRAM[3].Ch1EmcDliTrimTxDqs3 = 0x00000000; +SDRAM[3].Ch1EmcDliTrimTxDqs4 = 0x00000000; +SDRAM[3].Ch1EmcDliTrimTxDqs5 = 0x00000000; +SDRAM[3].Ch1EmcDliTrimTxDqs6 = 0x00000000; +SDRAM[3].Ch1EmcDliTrimTxDqs7 = 0x00000000; +SDRAM[3].Ch1EmcDllXformDq0 = 0x0000000A; +SDRAM[3].Ch1EmcDllXformDq1 = 0x0000000A; +SDRAM[3].Ch1EmcDllXformDq2 = 0x0000000A; +SDRAM[3].Ch1EmcDllXformDq3 = 0x0000000A; +SDRAM[3].Ch1EmcSwizzleRank0ByteCfg = 0x000000d2; +SDRAM[3].Ch1EmcSwizzleRank0Byte0 = 0x51430267; +SDRAM[3].Ch1EmcSwizzleRank0Byte1 = 0x13072465; +SDRAM[3].Ch1EmcSwizzleRank0Byte2 = 0x72605314; +SDRAM[3].Ch1EmcSwizzleRank0Byte3 = 0x54073162; +SDRAM[3].Ch1EmcSwizzleRank1ByteCfg = 0x000000d2; +SDRAM[3].Ch1EmcSwizzleRank1Byte0 = 0x51430267; +SDRAM[3].Ch1EmcSwizzleRank1Byte1 = 0x13072465; +SDRAM[3].Ch1EmcSwizzleRank1Byte2 = 0x72605314; +SDRAM[3].Ch1EmcSwizzleRank1Byte3 = 0x54073162; +SDRAM[3].Ch1EmcAddrSwizzleStack1a = 0x79320a61; +SDRAM[3].Ch1EmcAddrSwizzleStack1b = 0x000b8450; +SDRAM[3].Ch1EmcAddrSwizzleStack2a = 0x07623014; +SDRAM[3].Ch1EmcAddrSwizzleStack2b = 0x00000589; +SDRAM[3].Ch1EmcAddrSwizzleStack3 = 0x00530124; +SDRAM[3].Ch1EmcAutoCalConfig = 0xa8f10f0f; +SDRAM[3].Ch1EmcAutoCalConfig2 = 0x00000000; +SDRAM[3].Ch1EmcAutoCalConfig3 = 0x00000000; +SDRAM[3].Ch1EmcCdbCntl1 = 0x00000000; +SDRAM[3].Ch1EmcDllXformAddr0 = 0x00000008; +SDRAM[3].Ch1EmcDllXformAddr1 = 0x00000000; +SDRAM[3].Ch1EmcDllXformAddr2 = 0x00000000; +SDRAM[3].Ch1EmcFbioSpare = 0x02000000; +SDRAM[3].Ch1EmcXm2ClkPadCtrl = 0x77ffc085; +SDRAM[3].Ch1EmcXm2ClkPadCtrl2 = 0x00000b0b; +SDRAM[3].Ch1EmcXm2CmdPadCtrl2 = 0x770c0000; +SDRAM[3].Ch1EmcXm2CmdPadCtrl3 = 0x050c0000; +SDRAM[3].Ch1EmcXm2CmdPadCtrl4 = 0x00000000; +SDRAM[3].Ch1EmcXm2DqPadCtrl = 0x770c2990; +SDRAM[3].Ch1EmcXm2DqPadCtrl2 = 0x00000000; +SDRAM[3].Ch1EmcXm2DqsPadCtrl = 0x770c1515; +SDRAM[3].Ch1EmcXm2DqsPadCtrl3 = 0x10410400; +SDRAM[3].Ch1EmcXm2DqsPadCtrl4 = 0x00249249; diff --git a/tegra114/nvidia/dalmore/E1611_Hynix_2GB_H5TC4G63AFR-RDA_792Mhz_r403_v2.bct.cfg b/tegra114/nvidia/dalmore/E1611_Hynix_2GB_H5TC4G63AFR-RDA_792Mhz_r403_v2.bct.cfg new file mode 100644 index 0000000..3127181 --- /dev/null +++ b/tegra114/nvidia/dalmore/E1611_Hynix_2GB_H5TC4G63AFR-RDA_792Mhz_r403_v2.bct.cfg @@ -0,0 +1,1273 @@ +# Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. +# +# This software is provided 'as-is', without any express or implied +# warranty. In no event will the authors be held liable for any damages +# arising from the use of this software. +# +# Permission is granted to anyone to use this software for any purpose, +# including commercial applications, and to alter it and redistribute it +# freely, subject to the following restrictions: +# +# 1. The origin of this software must not be misrepresented; you must not +# claim that you wrote the original software. If you use this software +# in a product, an acknowledgment in the product documentation would be +# appreciated but is not required. +# 2. Altered source versions must be plainly marked as such, and must not be +# misrepresented as being the original software. +# 3. This notice may not be removed or altered from any source distribution. + +Version = 0x00350001; +BlockSize = 0x00004000; +PageSize = 0x00000200; +PartitionSize = 0x01000000; +OdmData = 0x800d8000; + +DevType[0] = NvBootDevType_Sdmmc; +DeviceParam[0].SdmmcParams.ClockDivider = 0x00000009; +DeviceParam[0].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_8Bit; +DeviceParam[0].SdmmcParams.MaxPowerClassSupported = 0x00000000; +DeviceParam[0].SdmmcParams.MultiPageSupport = 0x00000000; + +SDRAM[0].MemoryType = NvBootMemoryType_Ddr3; +SDRAM[0].PllMInputDivider = 0x00000001; +SDRAM[0].PllMFeedbackDivider = 0x00000042; +SDRAM[0].PllMStableTime = 0x0000012c; +SDRAM[0].PllMSetupControl = 0x00000000; +SDRAM[0].PllMSelectDiv2 = 0x00000000; +SDRAM[0].PllMPDLshiftPh45 = 0x00000000; +SDRAM[0].PllMPDLshiftPh90 = 0x00000000; +SDRAM[0].PllMPDLshiftPh135 = 0x00000000; +SDRAM[0].PllMKCP = 0x00000000; +SDRAM[0].PllMKVCO = 0x00000000; +SDRAM[0].EmcBctSpare0 = 0x00000bad; +SDRAM[0].EmcClockSource = 0x80000000; +SDRAM[0].EmcAutoCalInterval = 0x001fffff; +SDRAM[0].EmcAutoCalConfig = 0xa0f10f0f; +SDRAM[0].EmcAutoCalConfig2 = 0x00000000; +SDRAM[0].EmcAutoCalConfig3 = 0x00000000; +SDRAM[0].EmcAutoCalWait = 0x00000064; +SDRAM[0].EmcAdrCfg = 0x00000000; +SDRAM[0].EmcPinProgramWait = 0x00000001; +SDRAM[0].EmcPinExtraWait = 0x00000000; +SDRAM[0].EmcTimingControlWait = 0x00000001; +SDRAM[0].EmcRc = 0x00000024; +SDRAM[0].EmcRfc = 0x000000cd; +SDRAM[0].EmcRfcSlr = 0x00000000; +SDRAM[0].EmcRas = 0x00000019; +SDRAM[0].EmcRp = 0x0000000a; +SDRAM[0].EmcR2r = 0x00000000; +SDRAM[0].EmcW2w = 0x00000000; +SDRAM[0].EmcR2w = 0x00000009; +SDRAM[0].EmcW2r = 0x0000000d; +SDRAM[0].EmcR2p = 0x00000004; +SDRAM[0].EmcW2p = 0x00000013; +SDRAM[0].EmcRdRcd = 0x0000000a; +SDRAM[0].EmcWrRcd = 0x0000000a; +SDRAM[0].EmcRrd = 0x00000003; +SDRAM[0].EmcRext = 0x00000001; +SDRAM[0].EmcWext = 0x00000000; +SDRAM[0].EmcWdv = 0x00000006; +SDRAM[0].EmcWdvMask = 0x00000006; +SDRAM[0].EmcQUse = 0x0000000b; +SDRAM[0].EmcIbdly = 0x0000000b; +SDRAM[0].EmcEInput = 0x00000008; +SDRAM[0].EmcEInputDuration = 0x00000006; +SDRAM[0].EmcPutermExtra = 0x000d000a; +SDRAM[0].EmcCdbCntl1 = 0x00000000; +SDRAM[0].EmcCdbCntl2 = 0x00000000; +SDRAM[0].EmcQRst = 0x00000008; +SDRAM[0].EmcQSafe = 0x0000000d; +SDRAM[0].EmcRdv = 0x00000014; +SDRAM[0].EmcRdvMask = 0x00000014; +SDRAM[0].EmcCtt = 0x00000000; +SDRAM[0].EmcCttDuration = 0x00000000; +SDRAM[0].EmcRefresh = 0x000017e4; +SDRAM[0].EmcBurstRefreshNum = 0x00000000; +SDRAM[0].EmcPreRefreshReqCnt = 0x000005f9; +SDRAM[0].EmcPdEx2Wr = 0x00000003; +SDRAM[0].EmcPdEx2Rd = 0x00000012; +SDRAM[0].EmcPChg2Pden = 0x00000001; +SDRAM[0].EmcAct2Pden = 0x00000000; +SDRAM[0].EmcAr2Pden = 0x000000c6; +SDRAM[0].EmcRw2Pden = 0x00000018; +SDRAM[0].EmcTxsr = 0x000000d6; +SDRAM[0].EmcTxsrDll = 0x00000200; +SDRAM[0].EmcTcke = 0x00000005; +SDRAM[0].EmcTckesr = 0x00000005; +SDRAM[0].EmcTpd = 0x00000005; +SDRAM[0].EmcTfaw = 0x00000020; +SDRAM[0].EmcTrpab = 0x00000000; +SDRAM[0].EmcTClkStable = 0x00000007; +SDRAM[0].EmcTClkStop = 0x00000008; +SDRAM[0].EmcTRefBw = 0x00001825; +SDRAM[0].EmcQUseExtra = 0x0000000a; +SDRAM[0].EmcFbioCfg5 = 0x0000ba88; +SDRAM[0].EmcFbioCfg6 = 0x00000006; +SDRAM[0].EmcFbioSpare = 0x02000000; +SDRAM[0].EmcCfgRsv = 0xff00ff00; +SDRAM[0].EmcMrs = 0x80000d71; +SDRAM[0].EmcEmrs = 0x80100002; +SDRAM[0].EmcEmrs2 = 0x80200218; +SDRAM[0].EmcEmrs3 = 0x80300000; +SDRAM[0].EmcMrw1 = 0x00000000; +SDRAM[0].EmcMrw2 = 0x00000000; +SDRAM[0].EmcMrw3 = 0x00000000; +SDRAM[0].EmcMrw4 = 0x00000000; +SDRAM[0].EmcMrwExtra = 0x00000000; +SDRAM[0].EmcWarmBootMrwExtra = 0x00000000; +SDRAM[0].EmcWarmBootExtraModeRegWriteEnable = 0x00000000; +SDRAM[0].EmcExtraModeRegWriteEnable = 0x00000000; +SDRAM[0].EmcMrwResetCommand = 0x00000000; +SDRAM[0].EmcMrwResetNInitWait = 0x00000000; +SDRAM[0].EmcMrsWaitCnt = 0x00f8000f; +SDRAM[0].EmcMrsWaitCnt2 = 0x00f8000f; +SDRAM[0].EmcCfg = 0x73000000; +SDRAM[0].EmcCfg2 = 0x008008c1; +SDRAM[0].EmcDbg = 0x01000400; +SDRAM[0].EmcCmdQ = 0x10004408; +SDRAM[0].EmcMc2EmcQ = 0x06000404; +SDRAM[0].EmcDynSelfRefControl = 0x80003018; +SDRAM[0].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; +SDRAM[0].EmcCfgDigDll = 0xf0070191; +SDRAM[0].EmcCfgDigDllPeriod = 0x00008000; +SDRAM[0].EmcDevSelect = 0x00000002; +SDRAM[0].EmcSelDpdCtrl = 0x00040000; +SDRAM[0].EmcDllXformDqs0 = 0x0000000A; +SDRAM[0].EmcDllXformDqs1 = 0x0000000A; +SDRAM[0].EmcDllXformDqs2 = 0x0000000A; +SDRAM[0].EmcDllXformDqs3 = 0x0000000A; +SDRAM[0].EmcDllXformDqs4 = 0x0000000A; +SDRAM[0].EmcDllXformDqs5 = 0x0000000A; +SDRAM[0].EmcDllXformDqs6 = 0x0000000A; +SDRAM[0].EmcDllXformDqs7 = 0x0000000A; +SDRAM[0].EmcDllXformQUse0 = 0x00000000; +SDRAM[0].EmcDllXformQUse1 = 0x00000000; +SDRAM[0].EmcDllXformQUse2 = 0x00000000; +SDRAM[0].EmcDllXformQUse3 = 0x00000000; +SDRAM[0].EmcDllXformQUse4 = 0x00000000; +SDRAM[0].EmcDllXformQUse5 = 0x00000000; +SDRAM[0].EmcDllXformQUse6 = 0x00000000; +SDRAM[0].EmcDllXformQUse7 = 0x00000000; +SDRAM[0].EmcDllXformAddr0 = 0x0000000D; +SDRAM[0].EmcDllXformAddr1 = 0x0000000D; +SDRAM[0].EmcDllXformAddr2 = 0x0000000D; +SDRAM[0].EmcDliTrimTxDqs0 = 0x00000000; +SDRAM[0].EmcDliTrimTxDqs1 = 0x00000000; +SDRAM[0].EmcDliTrimTxDqs2 = 0x00000000; +SDRAM[0].EmcDliTrimTxDqs3 = 0x00000000; +SDRAM[0].EmcDliTrimTxDqs4 = 0x00000000; +SDRAM[0].EmcDliTrimTxDqs5 = 0x00000000; +SDRAM[0].EmcDliTrimTxDqs6 = 0x00000000; +SDRAM[0].EmcDliTrimTxDqs7 = 0x00000000; +SDRAM[0].EmcDllXformDq0 = 0x0000000A; +SDRAM[0].EmcDllXformDq1 = 0x0000000A; +SDRAM[0].EmcDllXformDq2 = 0x0000000A; +SDRAM[0].EmcDllXformDq3 = 0x0000000A; +SDRAM[0].WarmBootWait = 0x00000002; +SDRAM[0].EmcCttTermCtrl = 0x00000802; +SDRAM[0].EmcOdtWrite = 0x80000020; +SDRAM[0].EmcOdtRead = 0x00000000; +SDRAM[0].EmcZcalInterval = 0x00020000; +SDRAM[0].EmcZcalWaitCnt = 0x00000042; +SDRAM[0].EmcZcalMrwCmd = 0x80000000; +SDRAM[0].EmcMrsResetDll = 0x00000000; +SDRAM[0].EmcZcalInitDev0 = 0x80000011; +SDRAM[0].EmcZcalInitDev1 = 0x00000000; +SDRAM[0].EmcZcalInitWait = 0x00000001; +SDRAM[0].EmcZcalWarmColdBootEnables = 0x00000003; +SDRAM[0].EmcMrwLpddr2ZcalWarmBoot = 0x000a00ab; +SDRAM[0].EmcZqCalDdr3WarmBoot = 0x00000011; +SDRAM[0].EmcZcalWarmBootWait = 0x00000001; +SDRAM[0].EmcMrsWarmBootEnable = 0x00000001; +SDRAM[0].EmcMrsResetDllWait = 0x00000000; +SDRAM[0].EmcMrsExtra = 0x80000d05; +SDRAM[0].EmcWarmBootMrsExtra = 0x80100002; +SDRAM[0].EmcEmrsDdr2DllEnable = 0x00000000; +SDRAM[0].EmcMrsDdr2DllReset = 0x00000000; +SDRAM[0].EmcEmrsDdr2OcdCalib = 0x00000000; +SDRAM[0].EmcDdr2Wait = 0x00000000; +SDRAM[0].EmcClkenOverride = 0x00000000; +SDRAM[0].EmcExtraRefreshNum = 0x00000002; +SDRAM[0].EmcClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[0].McClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[0].EmcCfgDigDllPeriodWarmBoot = 0x00000003; +SDRAM[0].PmcVddpSel = 0x00000002; +SDRAM[0].PmcDdrPwr = 0x00000003; +SDRAM[0].PmcDdrCfg = 0x00000092; +SDRAM[0].PmcIoDpdReq = 0x80800000; +SDRAM[0].PmcIoDpd2Req = 0x00000000; +SDRAM[0].PmcRegShort = 0x00000000; +SDRAM[0].PmcENoVttGen = 0x00000000; +SDRAM[0].PmcNoIoPower = 0x00000000; +SDRAM[0].EmcXm2CmdPadCtrl = 0x001112a0; +SDRAM[0].EmcXm2CmdPadCtrl2 = 0x770c0000; +SDRAM[0].EmcXm2CmdPadCtrl3 = 0x050c0000; +SDRAM[0].EmcXm2CmdPadCtrl4 = 0x00000000; +SDRAM[0].EmcXm2DqsPadCtrl = 0x770c1414; +SDRAM[0].EmcXm2DqsPadCtrl2 = 0x0000013d; +SDRAM[0].EmcXm2DqsPadCtrl3 = 0x10410400; +SDRAM[0].EmcXm2DqsPadCtrl4 = 0x00249249; +SDRAM[0].EmcXm2DqPadCtrl = 0x770c2990; +SDRAM[0].EmcXm2DqPadCtrl2 = 0x00000000; +SDRAM[0].EmcXm2ClkPadCtrl = 0x77ffc084; +SDRAM[0].EmcXm2ClkPadCtrl2 = 0x00000b0b; +SDRAM[0].EmcXm2CompPadCtrl = 0x81f1f508; +SDRAM[0].EmcXm2VttGenPadCtrl = 0x07077704; +SDRAM[0].EmcXm2VttGenPadCtrl2 = 0x00000000; +SDRAM[0].EmcAcpdControl = 0x00000000; +SDRAM[0].EmcSwizzleRank0ByteCfg = 0x00000087; +SDRAM[0].EmcSwizzleRank0Byte0 = 0x53614207; +SDRAM[0].EmcSwizzleRank0Byte1 = 0x26043715; +SDRAM[0].EmcSwizzleRank0Byte2 = 0x40517236; +SDRAM[0].EmcSwizzleRank0Byte3 = 0x45370612; +SDRAM[0].EmcSwizzleRank1ByteCfg = 0x00000087; +SDRAM[0].EmcSwizzleRank1Byte0 = 0x53614207; +SDRAM[0].EmcSwizzleRank1Byte1 = 0x26043715; +SDRAM[0].EmcSwizzleRank1Byte2 = 0x40517236; +SDRAM[0].EmcSwizzleRank1Byte3 = 0x45370612; +SDRAM[0].EmcAddrSwizzleStack1a = 0x0396071a; +SDRAM[0].EmcAddrSwizzleStack1b = 0x000425b8; +SDRAM[0].EmcAddrSwizzleStack2a = 0x07412306; +SDRAM[0].EmcAddrSwizzleStack2b = 0x00000598; +SDRAM[0].EmcAddrSwizzleStack3 = 0x00534012; +SDRAM[0].EmcDsrVttgenDrv = 0x0000003f; +SDRAM[0].EmcTxdsrvttgen = 0x00000000; +SDRAM[0].McEmemAdrCfg = 0x00000000; +SDRAM[0].McEmemAdrCfgDev0 = 0x00080303; +SDRAM[0].McEmemAdrCfgDev1 = 0x00080303; +SDRAM[0].McEmemAdrCfgChannelMask = 0x00000640; +SDRAM[0].McEmemAdrCfgChannelMaskPropagationCount = 0x00000008; +SDRAM[0].McEmemAdrCfgBankMask0 = 0x69248003; +SDRAM[0].McEmemAdrCfgBankMask1 = 0x24928000; +SDRAM[0].McEmemAdrCfgBankMask2 = 0x92c94c00; +SDRAM[0].McEmemCfg = 0x00000800; +SDRAM[0].McEmemArbCfg = 0x0e00000b; +SDRAM[0].McEmemArbOutstandingReq = 0x80000190; +SDRAM[0].McEmemArbTimingRcd = 0x00000004; +SDRAM[0].McEmemArbTimingRp = 0x00000005; +SDRAM[0].McEmemArbTimingRc = 0x00000013; +SDRAM[0].McEmemArbTimingRas = 0x0000000c; +SDRAM[0].McEmemArbTimingFaw = 0x0000000f; +SDRAM[0].McEmemArbTimingRrd = 0x00000002; +SDRAM[0].McEmemArbTimingRap2Pre = 0x00000003; +SDRAM[0].McEmemArbTimingWap2Pre = 0x0000000c; +SDRAM[0].McEmemArbTimingR2R = 0x00000002; +SDRAM[0].McEmemArbTimingW2W = 0x00000002; +SDRAM[0].McEmemArbTimingR2W = 0x00000006; +SDRAM[0].McEmemArbTimingW2R = 0x00000008; +SDRAM[0].McEmemArbDaTurns = 0x08060202; +SDRAM[0].McEmemArbDaCovers = 0x00170e13; +SDRAM[0].McEmemArbMisc0 = 0x734c2414; +SDRAM[0].McEmemArbMisc1 = 0x78000000; +SDRAM[0].McEmemArbRing1Throttle = 0x001f0000; +SDRAM[0].McEmemArbOverride = 0x00000083; +SDRAM[0].McEmemArbRsv = 0xff00ff00; +SDRAM[0].McClkenOverride = 0x00000000; +SDRAM[0].McEmcRegMode = 0x00000002; +SDRAM[0].McVideoProtectBom = 0xfff00000; +SDRAM[0].McVideoProtectSizeMb = 0x00000000; +SDRAM[0].McVideoProtectVprOverride = 0x009a4752; +SDRAM[0].McSecCarveoutBom = 0xfff00000; +SDRAM[0].McSecCarveoutSizeMb = 0x00000000; +SDRAM[0].McVideoProtectWriteAccess = 0x00000000; +SDRAM[0].McSecCarveoutProtectWriteAccess = 0x00000000; +SDRAM[0].EmcCaTrainingEnable = 0x00000000; +SDRAM[0].EmcCaTrainingTimingCntl1 = 0x1f7df7df; +SDRAM[0].EmcCaTrainingTimingCntl2 = 0x0000001f; +SDRAM[0].SwizzleRankByteEncode = 0x000022aa; +SDRAM[0].BootRomPatchControl = 0x00000000; +SDRAM[0].BootRomPatchData = 0x00000000; +SDRAM[0].Ch1EmcDllXformDqs0 = 0x0000000A; +SDRAM[0].Ch1EmcDllXformDqs1 = 0x0000000A; +SDRAM[0].Ch1EmcDllXformDqs2 = 0x0000000A; +SDRAM[0].Ch1EmcDllXformDqs3 = 0x0000000A; +SDRAM[0].Ch1EmcDllXformDqs4 = 0x0000000A; +SDRAM[0].Ch1EmcDllXformDqs5 = 0x0000000A; +SDRAM[0].Ch1EmcDllXformDqs6 = 0x0000000A; +SDRAM[0].Ch1EmcDllXformDqs7 = 0x0000000A; +SDRAM[0].Ch1EmcDllXformQUse0 = 0x00000000; +SDRAM[0].Ch1EmcDllXformQUse1 = 0x00000000; +SDRAM[0].Ch1EmcDllXformQUse2 = 0x00000000; +SDRAM[0].Ch1EmcDllXformQUse3 = 0x00000000; +SDRAM[0].Ch1EmcDllXformQUse4 = 0x00000000; +SDRAM[0].Ch1EmcDllXformQUse5 = 0x00000000; +SDRAM[0].Ch1EmcDllXformQUse6 = 0x00000000; +SDRAM[0].Ch1EmcDllXformQUse7 = 0x00000000; +SDRAM[0].Ch1EmcDliTrimTxDqs0 = 0x00000000; +SDRAM[0].Ch1EmcDliTrimTxDqs1 = 0x00000000; +SDRAM[0].Ch1EmcDliTrimTxDqs2 = 0x00000000; +SDRAM[0].Ch1EmcDliTrimTxDqs3 = 0x00000000; +SDRAM[0].Ch1EmcDliTrimTxDqs4 = 0x00000000; +SDRAM[0].Ch1EmcDliTrimTxDqs5 = 0x00000000; +SDRAM[0].Ch1EmcDliTrimTxDqs6 = 0x00000000; +SDRAM[0].Ch1EmcDliTrimTxDqs7 = 0x00000000; +SDRAM[0].Ch1EmcDllXformDq0 = 0x0000000A; +SDRAM[0].Ch1EmcDllXformDq1 = 0x0000000A; +SDRAM[0].Ch1EmcDllXformDq2 = 0x0000000A; +SDRAM[0].Ch1EmcDllXformDq3 = 0x0000000A; +SDRAM[0].Ch1EmcSwizzleRank0ByteCfg = 0x000000d2; +SDRAM[0].Ch1EmcSwizzleRank0Byte0 = 0x51430267; +SDRAM[0].Ch1EmcSwizzleRank0Byte1 = 0x13072465; +SDRAM[0].Ch1EmcSwizzleRank0Byte2 = 0x72605314; +SDRAM[0].Ch1EmcSwizzleRank0Byte3 = 0x54073162; +SDRAM[0].Ch1EmcSwizzleRank1ByteCfg = 0x000000d2; +SDRAM[0].Ch1EmcSwizzleRank1Byte0 = 0x51430267; +SDRAM[0].Ch1EmcSwizzleRank1Byte1 = 0x13072465; +SDRAM[0].Ch1EmcSwizzleRank1Byte2 = 0x72605314; +SDRAM[0].Ch1EmcSwizzleRank1Byte3 = 0x54073162; +SDRAM[0].Ch1EmcAddrSwizzleStack1a = 0x79320a61; +SDRAM[0].Ch1EmcAddrSwizzleStack1b = 0x000b8450; +SDRAM[0].Ch1EmcAddrSwizzleStack2a = 0x07623014; +SDRAM[0].Ch1EmcAddrSwizzleStack2b = 0x00000589; +SDRAM[0].Ch1EmcAddrSwizzleStack3 = 0x00530124; +SDRAM[0].Ch1EmcAutoCalConfig = 0xa8f10f0f; +SDRAM[0].Ch1EmcAutoCalConfig2 = 0x00000000; +SDRAM[0].Ch1EmcAutoCalConfig3 = 0x00000000; +SDRAM[0].Ch1EmcCdbCntl1 = 0x00000000; +SDRAM[0].Ch1EmcDllXformAddr0 = 0x0000000D; +SDRAM[0].Ch1EmcDllXformAddr1 = 0x0000000D; +SDRAM[0].Ch1EmcDllXformAddr2 = 0x0000000D; +SDRAM[0].Ch1EmcFbioSpare = 0x02000000; +SDRAM[0].Ch1EmcXm2ClkPadCtrl = 0x77ffc084; +SDRAM[0].Ch1EmcXm2ClkPadCtrl2 = 0x00000b0b; +SDRAM[0].Ch1EmcXm2CmdPadCtrl2 = 0x770c0000; +SDRAM[0].Ch1EmcXm2CmdPadCtrl3 = 0x050c0000; +SDRAM[0].Ch1EmcXm2CmdPadCtrl4 = 0x00000000; +SDRAM[0].Ch1EmcXm2DqPadCtrl = 0x770c2990; +SDRAM[0].Ch1EmcXm2DqPadCtrl2 = 0x00000000; +SDRAM[0].Ch1EmcXm2DqsPadCtrl = 0x770c1515; +SDRAM[0].Ch1EmcXm2DqsPadCtrl3 = 0x10410400; +SDRAM[0].Ch1EmcXm2DqsPadCtrl4 = 0x00249249; + +SDRAM[1].MemoryType = NvBootMemoryType_Ddr3; +SDRAM[1].PllMInputDivider = 0x00000001; +SDRAM[1].PllMFeedbackDivider = 0x00000042; +SDRAM[1].PllMStableTime = 0x0000012c; +SDRAM[1].PllMSetupControl = 0x00000000; +SDRAM[1].PllMSelectDiv2 = 0x00000000; +SDRAM[1].PllMPDLshiftPh45 = 0x00000000; +SDRAM[1].PllMPDLshiftPh90 = 0x00000000; +SDRAM[1].PllMPDLshiftPh135 = 0x00000000; +SDRAM[1].PllMKCP = 0x00000000; +SDRAM[1].PllMKVCO = 0x00000000; +SDRAM[1].EmcBctSpare0 = 0x00000bad; +SDRAM[1].EmcClockSource = 0x80000000; +SDRAM[1].EmcAutoCalInterval = 0x001fffff; +SDRAM[1].EmcAutoCalConfig = 0xa0f10f0f; +SDRAM[1].EmcAutoCalConfig2 = 0x00000000; +SDRAM[1].EmcAutoCalConfig3 = 0x00000000; +SDRAM[1].EmcAutoCalWait = 0x00000064; +SDRAM[1].EmcAdrCfg = 0x00000000; +SDRAM[1].EmcPinProgramWait = 0x00000001; +SDRAM[1].EmcPinExtraWait = 0x00000000; +SDRAM[1].EmcTimingControlWait = 0x00000001; +SDRAM[1].EmcRc = 0x00000024; +SDRAM[1].EmcRfc = 0x000000cd; +SDRAM[1].EmcRfcSlr = 0x00000000; +SDRAM[1].EmcRas = 0x00000019; +SDRAM[1].EmcRp = 0x0000000a; +SDRAM[1].EmcR2r = 0x00000000; +SDRAM[1].EmcW2w = 0x00000000; +SDRAM[1].EmcR2w = 0x00000009; +SDRAM[1].EmcW2r = 0x0000000d; +SDRAM[1].EmcR2p = 0x00000004; +SDRAM[1].EmcW2p = 0x00000013; +SDRAM[1].EmcRdRcd = 0x0000000a; +SDRAM[1].EmcWrRcd = 0x0000000a; +SDRAM[1].EmcRrd = 0x00000003; +SDRAM[1].EmcRext = 0x00000001; +SDRAM[1].EmcWext = 0x00000000; +SDRAM[1].EmcWdv = 0x00000006; +SDRAM[1].EmcWdvMask = 0x00000006; +SDRAM[1].EmcQUse = 0x0000000b; +SDRAM[1].EmcIbdly = 0x0000000b; +SDRAM[1].EmcEInput = 0x00000008; +SDRAM[1].EmcEInputDuration = 0x00000006; +SDRAM[1].EmcPutermExtra = 0x000d000a; +SDRAM[1].EmcCdbCntl1 = 0x00000000; +SDRAM[1].EmcCdbCntl2 = 0x00000000; +SDRAM[1].EmcQRst = 0x00000008; +SDRAM[1].EmcQSafe = 0x0000000d; +SDRAM[1].EmcRdv = 0x00000014; +SDRAM[1].EmcRdvMask = 0x00000014; +SDRAM[1].EmcCtt = 0x00000000; +SDRAM[1].EmcCttDuration = 0x00000000; +SDRAM[1].EmcRefresh = 0x000017e4; +SDRAM[1].EmcBurstRefreshNum = 0x00000000; +SDRAM[1].EmcPreRefreshReqCnt = 0x000005f9; +SDRAM[1].EmcPdEx2Wr = 0x00000003; +SDRAM[1].EmcPdEx2Rd = 0x00000012; +SDRAM[1].EmcPChg2Pden = 0x00000001; +SDRAM[1].EmcAct2Pden = 0x00000000; +SDRAM[1].EmcAr2Pden = 0x000000c6; +SDRAM[1].EmcRw2Pden = 0x00000018; +SDRAM[1].EmcTxsr = 0x000000d6; +SDRAM[1].EmcTxsrDll = 0x00000200; +SDRAM[1].EmcTcke = 0x00000005; +SDRAM[1].EmcTckesr = 0x00000005; +SDRAM[1].EmcTpd = 0x00000005; +SDRAM[1].EmcTfaw = 0x00000020; +SDRAM[1].EmcTrpab = 0x00000000; +SDRAM[1].EmcTClkStable = 0x00000007; +SDRAM[1].EmcTClkStop = 0x00000008; +SDRAM[1].EmcTRefBw = 0x00001825; +SDRAM[1].EmcQUseExtra = 0x0000000a; +SDRAM[1].EmcFbioCfg5 = 0x0000ba88; +SDRAM[1].EmcFbioCfg6 = 0x00000006; +SDRAM[1].EmcFbioSpare = 0x02000000; +SDRAM[1].EmcCfgRsv = 0xff00ff00; +SDRAM[1].EmcMrs = 0x80000d71; +SDRAM[1].EmcEmrs = 0x80100002; +SDRAM[1].EmcEmrs2 = 0x80200218; +SDRAM[1].EmcEmrs3 = 0x80300000; +SDRAM[1].EmcMrw1 = 0x00000000; +SDRAM[1].EmcMrw2 = 0x00000000; +SDRAM[1].EmcMrw3 = 0x00000000; +SDRAM[1].EmcMrw4 = 0x00000000; +SDRAM[1].EmcMrwExtra = 0x00000000; +SDRAM[1].EmcWarmBootMrwExtra = 0x00000000; +SDRAM[1].EmcWarmBootExtraModeRegWriteEnable = 0x00000000; +SDRAM[1].EmcExtraModeRegWriteEnable = 0x00000000; +SDRAM[1].EmcMrwResetCommand = 0x00000000; +SDRAM[1].EmcMrwResetNInitWait = 0x00000000; +SDRAM[1].EmcMrsWaitCnt = 0x00f8000f; +SDRAM[1].EmcMrsWaitCnt2 = 0x00f8000f; +SDRAM[1].EmcCfg = 0x73000000; +SDRAM[1].EmcCfg2 = 0x008008c1; +SDRAM[1].EmcDbg = 0x01000400; +SDRAM[1].EmcCmdQ = 0x10004408; +SDRAM[1].EmcMc2EmcQ = 0x06000404; +SDRAM[1].EmcDynSelfRefControl = 0x80003018; +SDRAM[1].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; +SDRAM[1].EmcCfgDigDll = 0xf0070191; +SDRAM[1].EmcCfgDigDllPeriod = 0x00008000; +SDRAM[1].EmcDevSelect = 0x00000002; +SDRAM[1].EmcSelDpdCtrl = 0x00040000; +SDRAM[1].EmcDllXformDqs0 = 0x0000000A; +SDRAM[1].EmcDllXformDqs1 = 0x0000000A; +SDRAM[1].EmcDllXformDqs2 = 0x0000000A; +SDRAM[1].EmcDllXformDqs3 = 0x0000000A; +SDRAM[1].EmcDllXformDqs4 = 0x0000000A; +SDRAM[1].EmcDllXformDqs5 = 0x0000000A; +SDRAM[1].EmcDllXformDqs6 = 0x0000000A; +SDRAM[1].EmcDllXformDqs7 = 0x0000000A; +SDRAM[1].EmcDllXformQUse0 = 0x00000000; +SDRAM[1].EmcDllXformQUse1 = 0x00000000; +SDRAM[1].EmcDllXformQUse2 = 0x00000000; +SDRAM[1].EmcDllXformQUse3 = 0x00000000; +SDRAM[1].EmcDllXformQUse4 = 0x00000000; +SDRAM[1].EmcDllXformQUse5 = 0x00000000; +SDRAM[1].EmcDllXformQUse6 = 0x00000000; +SDRAM[1].EmcDllXformQUse7 = 0x00000000; +SDRAM[1].EmcDllXformAddr0 = 0x0000000D; +SDRAM[1].EmcDllXformAddr1 = 0x0000000D; +SDRAM[1].EmcDllXformAddr2 = 0x0000000D; +SDRAM[1].EmcDliTrimTxDqs0 = 0x00000000; +SDRAM[1].EmcDliTrimTxDqs1 = 0x00000000; +SDRAM[1].EmcDliTrimTxDqs2 = 0x00000000; +SDRAM[1].EmcDliTrimTxDqs3 = 0x00000000; +SDRAM[1].EmcDliTrimTxDqs4 = 0x00000000; +SDRAM[1].EmcDliTrimTxDqs5 = 0x00000000; +SDRAM[1].EmcDliTrimTxDqs6 = 0x00000000; +SDRAM[1].EmcDliTrimTxDqs7 = 0x00000000; +SDRAM[1].EmcDllXformDq0 = 0x0000000A; +SDRAM[1].EmcDllXformDq1 = 0x0000000A; +SDRAM[1].EmcDllXformDq2 = 0x0000000A; +SDRAM[1].EmcDllXformDq3 = 0x0000000A; +SDRAM[1].WarmBootWait = 0x00000002; +SDRAM[1].EmcCttTermCtrl = 0x00000802; +SDRAM[1].EmcOdtWrite = 0x80000020; +SDRAM[1].EmcOdtRead = 0x00000000; +SDRAM[1].EmcZcalInterval = 0x00020000; +SDRAM[1].EmcZcalWaitCnt = 0x00000042; +SDRAM[1].EmcZcalMrwCmd = 0x80000000; +SDRAM[1].EmcMrsResetDll = 0x00000000; +SDRAM[1].EmcZcalInitDev0 = 0x80000011; +SDRAM[1].EmcZcalInitDev1 = 0x00000000; +SDRAM[1].EmcZcalInitWait = 0x00000001; +SDRAM[1].EmcZcalWarmColdBootEnables = 0x00000003; +SDRAM[1].EmcMrwLpddr2ZcalWarmBoot = 0x000a00ab; +SDRAM[1].EmcZqCalDdr3WarmBoot = 0x00000011; +SDRAM[1].EmcZcalWarmBootWait = 0x00000001; +SDRAM[1].EmcMrsWarmBootEnable = 0x00000001; +SDRAM[1].EmcMrsResetDllWait = 0x00000000; +SDRAM[1].EmcMrsExtra = 0x80000d05; +SDRAM[1].EmcWarmBootMrsExtra = 0x80100002; +SDRAM[1].EmcEmrsDdr2DllEnable = 0x00000000; +SDRAM[1].EmcMrsDdr2DllReset = 0x00000000; +SDRAM[1].EmcEmrsDdr2OcdCalib = 0x00000000; +SDRAM[1].EmcDdr2Wait = 0x00000000; +SDRAM[1].EmcClkenOverride = 0x00000000; +SDRAM[1].EmcExtraRefreshNum = 0x00000002; +SDRAM[1].EmcClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[1].McClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[1].EmcCfgDigDllPeriodWarmBoot = 0x00000003; +SDRAM[1].PmcVddpSel = 0x00000002; +SDRAM[1].PmcDdrPwr = 0x00000003; +SDRAM[1].PmcDdrCfg = 0x00000092; +SDRAM[1].PmcIoDpdReq = 0x80800000; +SDRAM[1].PmcIoDpd2Req = 0x00000000; +SDRAM[1].PmcRegShort = 0x00000000; +SDRAM[1].PmcENoVttGen = 0x00000000; +SDRAM[1].PmcNoIoPower = 0x00000000; +SDRAM[1].EmcXm2CmdPadCtrl = 0x001112a0; +SDRAM[1].EmcXm2CmdPadCtrl2 = 0x770c0000; +SDRAM[1].EmcXm2CmdPadCtrl3 = 0x050c0000; +SDRAM[1].EmcXm2CmdPadCtrl4 = 0x00000000; +SDRAM[1].EmcXm2DqsPadCtrl = 0x770c1414; +SDRAM[1].EmcXm2DqsPadCtrl2 = 0x0000013d; +SDRAM[1].EmcXm2DqsPadCtrl3 = 0x10410400; +SDRAM[1].EmcXm2DqsPadCtrl4 = 0x00249249; +SDRAM[1].EmcXm2DqPadCtrl = 0x770c2990; +SDRAM[1].EmcXm2DqPadCtrl2 = 0x00000000; +SDRAM[1].EmcXm2ClkPadCtrl = 0x77ffc084; +SDRAM[1].EmcXm2ClkPadCtrl2 = 0x00000b0b; +SDRAM[1].EmcXm2CompPadCtrl = 0x81f1f508; +SDRAM[1].EmcXm2VttGenPadCtrl = 0x07077704; +SDRAM[1].EmcXm2VttGenPadCtrl2 = 0x00000000; +SDRAM[1].EmcAcpdControl = 0x00000000; +SDRAM[1].EmcSwizzleRank0ByteCfg = 0x00000087; +SDRAM[1].EmcSwizzleRank0Byte0 = 0x53614207; +SDRAM[1].EmcSwizzleRank0Byte1 = 0x26043715; +SDRAM[1].EmcSwizzleRank0Byte2 = 0x40517236; +SDRAM[1].EmcSwizzleRank0Byte3 = 0x45370612; +SDRAM[1].EmcSwizzleRank1ByteCfg = 0x00000087; +SDRAM[1].EmcSwizzleRank1Byte0 = 0x53614207; +SDRAM[1].EmcSwizzleRank1Byte1 = 0x26043715; +SDRAM[1].EmcSwizzleRank1Byte2 = 0x40517236; +SDRAM[1].EmcSwizzleRank1Byte3 = 0x45370612; +SDRAM[1].EmcAddrSwizzleStack1a = 0x0396071a; +SDRAM[1].EmcAddrSwizzleStack1b = 0x000425b8; +SDRAM[1].EmcAddrSwizzleStack2a = 0x07412306; +SDRAM[1].EmcAddrSwizzleStack2b = 0x00000598; +SDRAM[1].EmcAddrSwizzleStack3 = 0x00534012; +SDRAM[1].EmcDsrVttgenDrv = 0x0000003f; +SDRAM[1].EmcTxdsrvttgen = 0x00000000; +SDRAM[1].McEmemAdrCfg = 0x00000000; +SDRAM[1].McEmemAdrCfgDev0 = 0x00080303; +SDRAM[1].McEmemAdrCfgDev1 = 0x00080303; +SDRAM[1].McEmemAdrCfgChannelMask = 0x00000640; +SDRAM[1].McEmemAdrCfgChannelMaskPropagationCount = 0x00000008; +SDRAM[1].McEmemAdrCfgBankMask0 = 0x69248003; +SDRAM[1].McEmemAdrCfgBankMask1 = 0x24928000; +SDRAM[1].McEmemAdrCfgBankMask2 = 0x92c94c00; +SDRAM[1].McEmemCfg = 0x00000800; +SDRAM[1].McEmemArbCfg = 0x0e00000b; +SDRAM[1].McEmemArbOutstandingReq = 0x80000190; +SDRAM[1].McEmemArbTimingRcd = 0x00000004; +SDRAM[1].McEmemArbTimingRp = 0x00000005; +SDRAM[1].McEmemArbTimingRc = 0x00000013; +SDRAM[1].McEmemArbTimingRas = 0x0000000c; +SDRAM[1].McEmemArbTimingFaw = 0x0000000f; +SDRAM[1].McEmemArbTimingRrd = 0x00000002; +SDRAM[1].McEmemArbTimingRap2Pre = 0x00000003; +SDRAM[1].McEmemArbTimingWap2Pre = 0x0000000c; +SDRAM[1].McEmemArbTimingR2R = 0x00000002; +SDRAM[1].McEmemArbTimingW2W = 0x00000002; +SDRAM[1].McEmemArbTimingR2W = 0x00000006; +SDRAM[1].McEmemArbTimingW2R = 0x00000008; +SDRAM[1].McEmemArbDaTurns = 0x08060202; +SDRAM[1].McEmemArbDaCovers = 0x00170e13; +SDRAM[1].McEmemArbMisc0 = 0x734c2414; +SDRAM[1].McEmemArbMisc1 = 0x78000000; +SDRAM[1].McEmemArbRing1Throttle = 0x001f0000; +SDRAM[1].McEmemArbOverride = 0x00000083; +SDRAM[1].McEmemArbRsv = 0xff00ff00; +SDRAM[1].McClkenOverride = 0x00000000; +SDRAM[1].McEmcRegMode = 0x00000002; +SDRAM[1].McVideoProtectBom = 0xfff00000; +SDRAM[1].McVideoProtectSizeMb = 0x00000000; +SDRAM[1].McVideoProtectVprOverride = 0x009a4752; +SDRAM[1].McSecCarveoutBom = 0xfff00000; +SDRAM[1].McSecCarveoutSizeMb = 0x00000000; +SDRAM[1].McVideoProtectWriteAccess = 0x00000000; +SDRAM[1].McSecCarveoutProtectWriteAccess = 0x00000000; +SDRAM[1].EmcCaTrainingEnable = 0x00000000; +SDRAM[1].EmcCaTrainingTimingCntl1 = 0x1f7df7df; +SDRAM[1].EmcCaTrainingTimingCntl2 = 0x0000001f; +SDRAM[1].SwizzleRankByteEncode = 0x000022aa; +SDRAM[1].BootRomPatchControl = 0x00000000; +SDRAM[1].BootRomPatchData = 0x00000000; +SDRAM[1].Ch1EmcDllXformDqs0 = 0x0000000A; +SDRAM[1].Ch1EmcDllXformDqs1 = 0x0000000A; +SDRAM[1].Ch1EmcDllXformDqs2 = 0x0000000A; +SDRAM[1].Ch1EmcDllXformDqs3 = 0x0000000A; +SDRAM[1].Ch1EmcDllXformDqs4 = 0x0000000A; +SDRAM[1].Ch1EmcDllXformDqs5 = 0x0000000A; +SDRAM[1].Ch1EmcDllXformDqs6 = 0x0000000A; +SDRAM[1].Ch1EmcDllXformDqs7 = 0x0000000A; +SDRAM[1].Ch1EmcDllXformQUse0 = 0x00000000; +SDRAM[1].Ch1EmcDllXformQUse1 = 0x00000000; +SDRAM[1].Ch1EmcDllXformQUse2 = 0x00000000; +SDRAM[1].Ch1EmcDllXformQUse3 = 0x00000000; +SDRAM[1].Ch1EmcDllXformQUse4 = 0x00000000; +SDRAM[1].Ch1EmcDllXformQUse5 = 0x00000000; +SDRAM[1].Ch1EmcDllXformQUse6 = 0x00000000; +SDRAM[1].Ch1EmcDllXformQUse7 = 0x00000000; +SDRAM[1].Ch1EmcDliTrimTxDqs0 = 0x00000000; +SDRAM[1].Ch1EmcDliTrimTxDqs1 = 0x00000000; +SDRAM[1].Ch1EmcDliTrimTxDqs2 = 0x00000000; +SDRAM[1].Ch1EmcDliTrimTxDqs3 = 0x00000000; +SDRAM[1].Ch1EmcDliTrimTxDqs4 = 0x00000000; +SDRAM[1].Ch1EmcDliTrimTxDqs5 = 0x00000000; +SDRAM[1].Ch1EmcDliTrimTxDqs6 = 0x00000000; +SDRAM[1].Ch1EmcDliTrimTxDqs7 = 0x00000000; +SDRAM[1].Ch1EmcDllXformDq0 = 0x0000000A; +SDRAM[1].Ch1EmcDllXformDq1 = 0x0000000A; +SDRAM[1].Ch1EmcDllXformDq2 = 0x0000000A; +SDRAM[1].Ch1EmcDllXformDq3 = 0x0000000A; +SDRAM[1].Ch1EmcSwizzleRank0ByteCfg = 0x000000d2; +SDRAM[1].Ch1EmcSwizzleRank0Byte0 = 0x51430267; +SDRAM[1].Ch1EmcSwizzleRank0Byte1 = 0x13072465; +SDRAM[1].Ch1EmcSwizzleRank0Byte2 = 0x72605314; +SDRAM[1].Ch1EmcSwizzleRank0Byte3 = 0x54073162; +SDRAM[1].Ch1EmcSwizzleRank1ByteCfg = 0x000000d2; +SDRAM[1].Ch1EmcSwizzleRank1Byte0 = 0x51430267; +SDRAM[1].Ch1EmcSwizzleRank1Byte1 = 0x13072465; +SDRAM[1].Ch1EmcSwizzleRank1Byte2 = 0x72605314; +SDRAM[1].Ch1EmcSwizzleRank1Byte3 = 0x54073162; +SDRAM[1].Ch1EmcAddrSwizzleStack1a = 0x79320a61; +SDRAM[1].Ch1EmcAddrSwizzleStack1b = 0x000b8450; +SDRAM[1].Ch1EmcAddrSwizzleStack2a = 0x07623014; +SDRAM[1].Ch1EmcAddrSwizzleStack2b = 0x00000589; +SDRAM[1].Ch1EmcAddrSwizzleStack3 = 0x00530124; +SDRAM[1].Ch1EmcAutoCalConfig = 0xa8f10f0f; +SDRAM[1].Ch1EmcAutoCalConfig2 = 0x00000000; +SDRAM[1].Ch1EmcAutoCalConfig3 = 0x00000000; +SDRAM[1].Ch1EmcCdbCntl1 = 0x00000000; +SDRAM[1].Ch1EmcDllXformAddr0 = 0x0000000D; +SDRAM[1].Ch1EmcDllXformAddr1 = 0x0000000D; +SDRAM[1].Ch1EmcDllXformAddr2 = 0x0000000D; +SDRAM[1].Ch1EmcFbioSpare = 0x02000000; +SDRAM[1].Ch1EmcXm2ClkPadCtrl = 0x77ffc084; +SDRAM[1].Ch1EmcXm2ClkPadCtrl2 = 0x00000b0b; +SDRAM[1].Ch1EmcXm2CmdPadCtrl2 = 0x770c0000; +SDRAM[1].Ch1EmcXm2CmdPadCtrl3 = 0x050c0000; +SDRAM[1].Ch1EmcXm2CmdPadCtrl4 = 0x00000000; +SDRAM[1].Ch1EmcXm2DqPadCtrl = 0x770c2990; +SDRAM[1].Ch1EmcXm2DqPadCtrl2 = 0x00000000; +SDRAM[1].Ch1EmcXm2DqsPadCtrl = 0x770c1515; +SDRAM[1].Ch1EmcXm2DqsPadCtrl3 = 0x10410400; +SDRAM[1].Ch1EmcXm2DqsPadCtrl4 = 0x00249249; + +SDRAM[2].MemoryType = NvBootMemoryType_Ddr3; +SDRAM[2].PllMInputDivider = 0x00000001; +SDRAM[2].PllMFeedbackDivider = 0x00000042; +SDRAM[2].PllMStableTime = 0x0000012c; +SDRAM[2].PllMSetupControl = 0x00000000; +SDRAM[2].PllMSelectDiv2 = 0x00000000; +SDRAM[2].PllMPDLshiftPh45 = 0x00000000; +SDRAM[2].PllMPDLshiftPh90 = 0x00000000; +SDRAM[2].PllMPDLshiftPh135 = 0x00000000; +SDRAM[2].PllMKCP = 0x00000000; +SDRAM[2].PllMKVCO = 0x00000000; +SDRAM[2].EmcBctSpare0 = 0x00000bad; +SDRAM[2].EmcClockSource = 0x80000000; +SDRAM[2].EmcAutoCalInterval = 0x001fffff; +SDRAM[2].EmcAutoCalConfig = 0xa0f10f0f; +SDRAM[2].EmcAutoCalConfig2 = 0x00000000; +SDRAM[2].EmcAutoCalConfig3 = 0x00000000; +SDRAM[2].EmcAutoCalWait = 0x00000064; +SDRAM[2].EmcAdrCfg = 0x00000000; +SDRAM[2].EmcPinProgramWait = 0x00000001; +SDRAM[2].EmcPinExtraWait = 0x00000000; +SDRAM[2].EmcTimingControlWait = 0x00000001; +SDRAM[2].EmcRc = 0x00000024; +SDRAM[2].EmcRfc = 0x000000cd; +SDRAM[2].EmcRfcSlr = 0x00000000; +SDRAM[2].EmcRas = 0x00000019; +SDRAM[2].EmcRp = 0x0000000a; +SDRAM[2].EmcR2r = 0x00000000; +SDRAM[2].EmcW2w = 0x00000000; +SDRAM[2].EmcR2w = 0x00000009; +SDRAM[2].EmcW2r = 0x0000000d; +SDRAM[2].EmcR2p = 0x00000004; +SDRAM[2].EmcW2p = 0x00000013; +SDRAM[2].EmcRdRcd = 0x0000000a; +SDRAM[2].EmcWrRcd = 0x0000000a; +SDRAM[2].EmcRrd = 0x00000003; +SDRAM[2].EmcRext = 0x00000001; +SDRAM[2].EmcWext = 0x00000000; +SDRAM[2].EmcWdv = 0x00000006; +SDRAM[2].EmcWdvMask = 0x00000006; +SDRAM[2].EmcQUse = 0x0000000b; +SDRAM[2].EmcIbdly = 0x0000000b; +SDRAM[2].EmcEInput = 0x00000008; +SDRAM[2].EmcEInputDuration = 0x00000006; +SDRAM[2].EmcPutermExtra = 0x000d000a; +SDRAM[2].EmcCdbCntl1 = 0x00000000; +SDRAM[2].EmcCdbCntl2 = 0x00000000; +SDRAM[2].EmcQRst = 0x00000008; +SDRAM[2].EmcQSafe = 0x0000000d; +SDRAM[2].EmcRdv = 0x00000014; +SDRAM[2].EmcRdvMask = 0x00000014; +SDRAM[2].EmcCtt = 0x00000000; +SDRAM[2].EmcCttDuration = 0x00000000; +SDRAM[2].EmcRefresh = 0x000017e4; +SDRAM[2].EmcBurstRefreshNum = 0x00000000; +SDRAM[2].EmcPreRefreshReqCnt = 0x000005f9; +SDRAM[2].EmcPdEx2Wr = 0x00000003; +SDRAM[2].EmcPdEx2Rd = 0x00000012; +SDRAM[2].EmcPChg2Pden = 0x00000001; +SDRAM[2].EmcAct2Pden = 0x00000000; +SDRAM[2].EmcAr2Pden = 0x000000c6; +SDRAM[2].EmcRw2Pden = 0x00000018; +SDRAM[2].EmcTxsr = 0x000000d6; +SDRAM[2].EmcTxsrDll = 0x00000200; +SDRAM[2].EmcTcke = 0x00000005; +SDRAM[2].EmcTckesr = 0x00000005; +SDRAM[2].EmcTpd = 0x00000005; +SDRAM[2].EmcTfaw = 0x00000020; +SDRAM[2].EmcTrpab = 0x00000000; +SDRAM[2].EmcTClkStable = 0x00000007; +SDRAM[2].EmcTClkStop = 0x00000008; +SDRAM[2].EmcTRefBw = 0x00001825; +SDRAM[2].EmcQUseExtra = 0x0000000a; +SDRAM[2].EmcFbioCfg5 = 0x0000ba88; +SDRAM[2].EmcFbioCfg6 = 0x00000006; +SDRAM[2].EmcFbioSpare = 0x02000000; +SDRAM[2].EmcCfgRsv = 0xff00ff00; +SDRAM[2].EmcMrs = 0x80000d71; +SDRAM[2].EmcEmrs = 0x80100002; +SDRAM[2].EmcEmrs2 = 0x80200218; +SDRAM[2].EmcEmrs3 = 0x80300000; +SDRAM[2].EmcMrw1 = 0x00000000; +SDRAM[2].EmcMrw2 = 0x00000000; +SDRAM[2].EmcMrw3 = 0x00000000; +SDRAM[2].EmcMrw4 = 0x00000000; +SDRAM[2].EmcMrwExtra = 0x00000000; +SDRAM[2].EmcWarmBootMrwExtra = 0x00000000; +SDRAM[2].EmcWarmBootExtraModeRegWriteEnable = 0x00000000; +SDRAM[2].EmcExtraModeRegWriteEnable = 0x00000000; +SDRAM[2].EmcMrwResetCommand = 0x00000000; +SDRAM[2].EmcMrwResetNInitWait = 0x00000000; +SDRAM[2].EmcMrsWaitCnt = 0x00f8000f; +SDRAM[2].EmcMrsWaitCnt2 = 0x00f8000f; +SDRAM[2].EmcCfg = 0x73000000; +SDRAM[2].EmcCfg2 = 0x008008c1; +SDRAM[2].EmcDbg = 0x01000400; +SDRAM[2].EmcCmdQ = 0x10004408; +SDRAM[2].EmcMc2EmcQ = 0x06000404; +SDRAM[2].EmcDynSelfRefControl = 0x80003018; +SDRAM[2].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; +SDRAM[2].EmcCfgDigDll = 0xf0070191; +SDRAM[2].EmcCfgDigDllPeriod = 0x00008000; +SDRAM[2].EmcDevSelect = 0x00000002; +SDRAM[2].EmcSelDpdCtrl = 0x00040000; +SDRAM[2].EmcDllXformDqs0 = 0x0000000A; +SDRAM[2].EmcDllXformDqs1 = 0x0000000A; +SDRAM[2].EmcDllXformDqs2 = 0x0000000A; +SDRAM[2].EmcDllXformDqs3 = 0x0000000A; +SDRAM[2].EmcDllXformDqs4 = 0x0000000A; +SDRAM[2].EmcDllXformDqs5 = 0x0000000A; +SDRAM[2].EmcDllXformDqs6 = 0x0000000A; +SDRAM[2].EmcDllXformDqs7 = 0x0000000A; +SDRAM[2].EmcDllXformQUse0 = 0x00000000; +SDRAM[2].EmcDllXformQUse1 = 0x00000000; +SDRAM[2].EmcDllXformQUse2 = 0x00000000; +SDRAM[2].EmcDllXformQUse3 = 0x00000000; +SDRAM[2].EmcDllXformQUse4 = 0x00000000; +SDRAM[2].EmcDllXformQUse5 = 0x00000000; +SDRAM[2].EmcDllXformQUse6 = 0x00000000; +SDRAM[2].EmcDllXformQUse7 = 0x00000000; +SDRAM[2].EmcDllXformAddr0 = 0x0000000D; +SDRAM[2].EmcDllXformAddr1 = 0x0000000D; +SDRAM[2].EmcDllXformAddr2 = 0x0000000D; +SDRAM[2].EmcDliTrimTxDqs0 = 0x00000000; +SDRAM[2].EmcDliTrimTxDqs1 = 0x00000000; +SDRAM[2].EmcDliTrimTxDqs2 = 0x00000000; +SDRAM[2].EmcDliTrimTxDqs3 = 0x00000000; +SDRAM[2].EmcDliTrimTxDqs4 = 0x00000000; +SDRAM[2].EmcDliTrimTxDqs5 = 0x00000000; +SDRAM[2].EmcDliTrimTxDqs6 = 0x00000000; +SDRAM[2].EmcDliTrimTxDqs7 = 0x00000000; +SDRAM[2].EmcDllXformDq0 = 0x0000000A; +SDRAM[2].EmcDllXformDq1 = 0x0000000A; +SDRAM[2].EmcDllXformDq2 = 0x0000000A; +SDRAM[2].EmcDllXformDq3 = 0x0000000A; +SDRAM[2].WarmBootWait = 0x00000002; +SDRAM[2].EmcCttTermCtrl = 0x00000802; +SDRAM[2].EmcOdtWrite = 0x80000020; +SDRAM[2].EmcOdtRead = 0x00000000; +SDRAM[2].EmcZcalInterval = 0x00020000; +SDRAM[2].EmcZcalWaitCnt = 0x00000042; +SDRAM[2].EmcZcalMrwCmd = 0x80000000; +SDRAM[2].EmcMrsResetDll = 0x00000000; +SDRAM[2].EmcZcalInitDev0 = 0x80000011; +SDRAM[2].EmcZcalInitDev1 = 0x00000000; +SDRAM[2].EmcZcalInitWait = 0x00000001; +SDRAM[2].EmcZcalWarmColdBootEnables = 0x00000003; +SDRAM[2].EmcMrwLpddr2ZcalWarmBoot = 0x000a00ab; +SDRAM[2].EmcZqCalDdr3WarmBoot = 0x00000011; +SDRAM[2].EmcZcalWarmBootWait = 0x00000001; +SDRAM[2].EmcMrsWarmBootEnable = 0x00000001; +SDRAM[2].EmcMrsResetDllWait = 0x00000000; +SDRAM[2].EmcMrsExtra = 0x80000d05; +SDRAM[2].EmcWarmBootMrsExtra = 0x80100002; +SDRAM[2].EmcEmrsDdr2DllEnable = 0x00000000; +SDRAM[2].EmcMrsDdr2DllReset = 0x00000000; +SDRAM[2].EmcEmrsDdr2OcdCalib = 0x00000000; +SDRAM[2].EmcDdr2Wait = 0x00000000; +SDRAM[2].EmcClkenOverride = 0x00000000; +SDRAM[2].EmcExtraRefreshNum = 0x00000002; +SDRAM[2].EmcClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[2].McClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[2].EmcCfgDigDllPeriodWarmBoot = 0x00000003; +SDRAM[2].PmcVddpSel = 0x00000002; +SDRAM[2].PmcDdrPwr = 0x00000003; +SDRAM[2].PmcDdrCfg = 0x00000092; +SDRAM[2].PmcIoDpdReq = 0x80800000; +SDRAM[2].PmcIoDpd2Req = 0x00000000; +SDRAM[2].PmcRegShort = 0x00000000; +SDRAM[2].PmcENoVttGen = 0x00000000; +SDRAM[2].PmcNoIoPower = 0x00000000; +SDRAM[2].EmcXm2CmdPadCtrl = 0x001112a0; +SDRAM[2].EmcXm2CmdPadCtrl2 = 0x770c0000; +SDRAM[2].EmcXm2CmdPadCtrl3 = 0x050c0000; +SDRAM[2].EmcXm2CmdPadCtrl4 = 0x00000000; +SDRAM[2].EmcXm2DqsPadCtrl = 0x770c1414; +SDRAM[2].EmcXm2DqsPadCtrl2 = 0x0000013d; +SDRAM[2].EmcXm2DqsPadCtrl3 = 0x10410400; +SDRAM[2].EmcXm2DqsPadCtrl4 = 0x00249249; +SDRAM[2].EmcXm2DqPadCtrl = 0x770c2990; +SDRAM[2].EmcXm2DqPadCtrl2 = 0x00000000; +SDRAM[2].EmcXm2ClkPadCtrl = 0x77ffc084; +SDRAM[2].EmcXm2ClkPadCtrl2 = 0x00000b0b; +SDRAM[2].EmcXm2CompPadCtrl = 0x81f1f508; +SDRAM[2].EmcXm2VttGenPadCtrl = 0x07077704; +SDRAM[2].EmcXm2VttGenPadCtrl2 = 0x00000000; +SDRAM[2].EmcAcpdControl = 0x00000000; +SDRAM[2].EmcSwizzleRank0ByteCfg = 0x00000087; +SDRAM[2].EmcSwizzleRank0Byte0 = 0x53614207; +SDRAM[2].EmcSwizzleRank0Byte1 = 0x26043715; +SDRAM[2].EmcSwizzleRank0Byte2 = 0x40517236; +SDRAM[2].EmcSwizzleRank0Byte3 = 0x45370612; +SDRAM[2].EmcSwizzleRank1ByteCfg = 0x00000087; +SDRAM[2].EmcSwizzleRank1Byte0 = 0x53614207; +SDRAM[2].EmcSwizzleRank1Byte1 = 0x26043715; +SDRAM[2].EmcSwizzleRank1Byte2 = 0x40517236; +SDRAM[2].EmcSwizzleRank1Byte3 = 0x45370612; +SDRAM[2].EmcAddrSwizzleStack1a = 0x0396071a; +SDRAM[2].EmcAddrSwizzleStack1b = 0x000425b8; +SDRAM[2].EmcAddrSwizzleStack2a = 0x07412306; +SDRAM[2].EmcAddrSwizzleStack2b = 0x00000598; +SDRAM[2].EmcAddrSwizzleStack3 = 0x00534012; +SDRAM[2].EmcDsrVttgenDrv = 0x0000003f; +SDRAM[2].EmcTxdsrvttgen = 0x00000000; +SDRAM[2].McEmemAdrCfg = 0x00000000; +SDRAM[2].McEmemAdrCfgDev0 = 0x00080303; +SDRAM[2].McEmemAdrCfgDev1 = 0x00080303; +SDRAM[2].McEmemAdrCfgChannelMask = 0x00000640; +SDRAM[2].McEmemAdrCfgChannelMaskPropagationCount = 0x00000008; +SDRAM[2].McEmemAdrCfgBankMask0 = 0x69248003; +SDRAM[2].McEmemAdrCfgBankMask1 = 0x24928000; +SDRAM[2].McEmemAdrCfgBankMask2 = 0x92c94c00; +SDRAM[2].McEmemCfg = 0x00000800; +SDRAM[2].McEmemArbCfg = 0x0e00000b; +SDRAM[2].McEmemArbOutstandingReq = 0x80000190; +SDRAM[2].McEmemArbTimingRcd = 0x00000004; +SDRAM[2].McEmemArbTimingRp = 0x00000005; +SDRAM[2].McEmemArbTimingRc = 0x00000013; +SDRAM[2].McEmemArbTimingRas = 0x0000000c; +SDRAM[2].McEmemArbTimingFaw = 0x0000000f; +SDRAM[2].McEmemArbTimingRrd = 0x00000002; +SDRAM[2].McEmemArbTimingRap2Pre = 0x00000003; +SDRAM[2].McEmemArbTimingWap2Pre = 0x0000000c; +SDRAM[2].McEmemArbTimingR2R = 0x00000002; +SDRAM[2].McEmemArbTimingW2W = 0x00000002; +SDRAM[2].McEmemArbTimingR2W = 0x00000006; +SDRAM[2].McEmemArbTimingW2R = 0x00000008; +SDRAM[2].McEmemArbDaTurns = 0x08060202; +SDRAM[2].McEmemArbDaCovers = 0x00170e13; +SDRAM[2].McEmemArbMisc0 = 0x734c2414; +SDRAM[2].McEmemArbMisc1 = 0x78000000; +SDRAM[2].McEmemArbRing1Throttle = 0x001f0000; +SDRAM[2].McEmemArbOverride = 0x00000083; +SDRAM[2].McEmemArbRsv = 0xff00ff00; +SDRAM[2].McClkenOverride = 0x00000000; +SDRAM[2].McEmcRegMode = 0x00000002; +SDRAM[2].McVideoProtectBom = 0xfff00000; +SDRAM[2].McVideoProtectSizeMb = 0x00000000; +SDRAM[2].McVideoProtectVprOverride = 0x009a4752; +SDRAM[2].McSecCarveoutBom = 0xfff00000; +SDRAM[2].McSecCarveoutSizeMb = 0x00000000; +SDRAM[2].McVideoProtectWriteAccess = 0x00000000; +SDRAM[2].McSecCarveoutProtectWriteAccess = 0x00000000; +SDRAM[2].EmcCaTrainingEnable = 0x00000000; +SDRAM[2].EmcCaTrainingTimingCntl1 = 0x1f7df7df; +SDRAM[2].EmcCaTrainingTimingCntl2 = 0x0000001f; +SDRAM[2].SwizzleRankByteEncode = 0x000022aa; +SDRAM[2].BootRomPatchControl = 0x00000000; +SDRAM[2].BootRomPatchData = 0x00000000; +SDRAM[2].Ch1EmcDllXformDqs0 = 0x0000000A; +SDRAM[2].Ch1EmcDllXformDqs1 = 0x0000000A; +SDRAM[2].Ch1EmcDllXformDqs2 = 0x0000000A; +SDRAM[2].Ch1EmcDllXformDqs3 = 0x0000000A; +SDRAM[2].Ch1EmcDllXformDqs4 = 0x0000000A; +SDRAM[2].Ch1EmcDllXformDqs5 = 0x0000000A; +SDRAM[2].Ch1EmcDllXformDqs6 = 0x0000000A; +SDRAM[2].Ch1EmcDllXformDqs7 = 0x0000000A; +SDRAM[2].Ch1EmcDllXformQUse0 = 0x00000000; +SDRAM[2].Ch1EmcDllXformQUse1 = 0x00000000; +SDRAM[2].Ch1EmcDllXformQUse2 = 0x00000000; +SDRAM[2].Ch1EmcDllXformQUse3 = 0x00000000; +SDRAM[2].Ch1EmcDllXformQUse4 = 0x00000000; +SDRAM[2].Ch1EmcDllXformQUse5 = 0x00000000; +SDRAM[2].Ch1EmcDllXformQUse6 = 0x00000000; +SDRAM[2].Ch1EmcDllXformQUse7 = 0x00000000; +SDRAM[2].Ch1EmcDliTrimTxDqs0 = 0x00000000; +SDRAM[2].Ch1EmcDliTrimTxDqs1 = 0x00000000; +SDRAM[2].Ch1EmcDliTrimTxDqs2 = 0x00000000; +SDRAM[2].Ch1EmcDliTrimTxDqs3 = 0x00000000; +SDRAM[2].Ch1EmcDliTrimTxDqs4 = 0x00000000; +SDRAM[2].Ch1EmcDliTrimTxDqs5 = 0x00000000; +SDRAM[2].Ch1EmcDliTrimTxDqs6 = 0x00000000; +SDRAM[2].Ch1EmcDliTrimTxDqs7 = 0x00000000; +SDRAM[2].Ch1EmcDllXformDq0 = 0x0000000A; +SDRAM[2].Ch1EmcDllXformDq1 = 0x0000000A; +SDRAM[2].Ch1EmcDllXformDq2 = 0x0000000A; +SDRAM[2].Ch1EmcDllXformDq3 = 0x0000000A; +SDRAM[2].Ch1EmcSwizzleRank0ByteCfg = 0x000000d2; +SDRAM[2].Ch1EmcSwizzleRank0Byte0 = 0x51430267; +SDRAM[2].Ch1EmcSwizzleRank0Byte1 = 0x13072465; +SDRAM[2].Ch1EmcSwizzleRank0Byte2 = 0x72605314; +SDRAM[2].Ch1EmcSwizzleRank0Byte3 = 0x54073162; +SDRAM[2].Ch1EmcSwizzleRank1ByteCfg = 0x000000d2; +SDRAM[2].Ch1EmcSwizzleRank1Byte0 = 0x51430267; +SDRAM[2].Ch1EmcSwizzleRank1Byte1 = 0x13072465; +SDRAM[2].Ch1EmcSwizzleRank1Byte2 = 0x72605314; +SDRAM[2].Ch1EmcSwizzleRank1Byte3 = 0x54073162; +SDRAM[2].Ch1EmcAddrSwizzleStack1a = 0x79320a61; +SDRAM[2].Ch1EmcAddrSwizzleStack1b = 0x000b8450; +SDRAM[2].Ch1EmcAddrSwizzleStack2a = 0x07623014; +SDRAM[2].Ch1EmcAddrSwizzleStack2b = 0x00000589; +SDRAM[2].Ch1EmcAddrSwizzleStack3 = 0x00530124; +SDRAM[2].Ch1EmcAutoCalConfig = 0xa8f10f0f; +SDRAM[2].Ch1EmcAutoCalConfig2 = 0x00000000; +SDRAM[2].Ch1EmcAutoCalConfig3 = 0x00000000; +SDRAM[2].Ch1EmcCdbCntl1 = 0x00000000; +SDRAM[2].Ch1EmcDllXformAddr0 = 0x0000000D; +SDRAM[2].Ch1EmcDllXformAddr1 = 0x0000000D; +SDRAM[2].Ch1EmcDllXformAddr2 = 0x0000000D; +SDRAM[2].Ch1EmcFbioSpare = 0x02000000; +SDRAM[2].Ch1EmcXm2ClkPadCtrl = 0x77ffc084; +SDRAM[2].Ch1EmcXm2ClkPadCtrl2 = 0x00000b0b; +SDRAM[2].Ch1EmcXm2CmdPadCtrl2 = 0x770c0000; +SDRAM[2].Ch1EmcXm2CmdPadCtrl3 = 0x050c0000; +SDRAM[2].Ch1EmcXm2CmdPadCtrl4 = 0x00000000; +SDRAM[2].Ch1EmcXm2DqPadCtrl = 0x770c2990; +SDRAM[2].Ch1EmcXm2DqPadCtrl2 = 0x00000000; +SDRAM[2].Ch1EmcXm2DqsPadCtrl = 0x770c1515; +SDRAM[2].Ch1EmcXm2DqsPadCtrl3 = 0x10410400; +SDRAM[2].Ch1EmcXm2DqsPadCtrl4 = 0x00249249; + +SDRAM[3].MemoryType = NvBootMemoryType_Ddr3; +SDRAM[3].PllMInputDivider = 0x00000001; +SDRAM[3].PllMFeedbackDivider = 0x00000042; +SDRAM[3].PllMStableTime = 0x0000012c; +SDRAM[3].PllMSetupControl = 0x00000000; +SDRAM[3].PllMSelectDiv2 = 0x00000000; +SDRAM[3].PllMPDLshiftPh45 = 0x00000000; +SDRAM[3].PllMPDLshiftPh90 = 0x00000000; +SDRAM[3].PllMPDLshiftPh135 = 0x00000000; +SDRAM[3].PllMKCP = 0x00000000; +SDRAM[3].PllMKVCO = 0x00000000; +SDRAM[3].EmcBctSpare0 = 0x00000bad; +SDRAM[3].EmcClockSource = 0x80000000; +SDRAM[3].EmcAutoCalInterval = 0x001fffff; +SDRAM[3].EmcAutoCalConfig = 0xa0f10f0f; +SDRAM[3].EmcAutoCalConfig2 = 0x00000000; +SDRAM[3].EmcAutoCalConfig3 = 0x00000000; +SDRAM[3].EmcAutoCalWait = 0x00000064; +SDRAM[3].EmcAdrCfg = 0x00000000; +SDRAM[3].EmcPinProgramWait = 0x00000001; +SDRAM[3].EmcPinExtraWait = 0x00000000; +SDRAM[3].EmcTimingControlWait = 0x00000001; +SDRAM[3].EmcRc = 0x00000024; +SDRAM[3].EmcRfc = 0x000000cd; +SDRAM[3].EmcRfcSlr = 0x00000000; +SDRAM[3].EmcRas = 0x00000019; +SDRAM[3].EmcRp = 0x0000000a; +SDRAM[3].EmcR2r = 0x00000000; +SDRAM[3].EmcW2w = 0x00000000; +SDRAM[3].EmcR2w = 0x00000009; +SDRAM[3].EmcW2r = 0x0000000d; +SDRAM[3].EmcR2p = 0x00000004; +SDRAM[3].EmcW2p = 0x00000013; +SDRAM[3].EmcRdRcd = 0x0000000a; +SDRAM[3].EmcWrRcd = 0x0000000a; +SDRAM[3].EmcRrd = 0x00000003; +SDRAM[3].EmcRext = 0x00000001; +SDRAM[3].EmcWext = 0x00000000; +SDRAM[3].EmcWdv = 0x00000006; +SDRAM[3].EmcWdvMask = 0x00000006; +SDRAM[3].EmcQUse = 0x0000000b; +SDRAM[3].EmcIbdly = 0x0000000b; +SDRAM[3].EmcEInput = 0x00000008; +SDRAM[3].EmcEInputDuration = 0x00000006; +SDRAM[3].EmcPutermExtra = 0x000d000a; +SDRAM[3].EmcCdbCntl1 = 0x00000000; +SDRAM[3].EmcCdbCntl2 = 0x00000000; +SDRAM[3].EmcQRst = 0x00000008; +SDRAM[3].EmcQSafe = 0x0000000d; +SDRAM[3].EmcRdv = 0x00000014; +SDRAM[3].EmcRdvMask = 0x00000014; +SDRAM[3].EmcCtt = 0x00000000; +SDRAM[3].EmcCttDuration = 0x00000000; +SDRAM[3].EmcRefresh = 0x000017e4; +SDRAM[3].EmcBurstRefreshNum = 0x00000000; +SDRAM[3].EmcPreRefreshReqCnt = 0x000005f9; +SDRAM[3].EmcPdEx2Wr = 0x00000003; +SDRAM[3].EmcPdEx2Rd = 0x00000012; +SDRAM[3].EmcPChg2Pden = 0x00000001; +SDRAM[3].EmcAct2Pden = 0x00000000; +SDRAM[3].EmcAr2Pden = 0x000000c6; +SDRAM[3].EmcRw2Pden = 0x00000018; +SDRAM[3].EmcTxsr = 0x000000d6; +SDRAM[3].EmcTxsrDll = 0x00000200; +SDRAM[3].EmcTcke = 0x00000005; +SDRAM[3].EmcTckesr = 0x00000005; +SDRAM[3].EmcTpd = 0x00000005; +SDRAM[3].EmcTfaw = 0x00000020; +SDRAM[3].EmcTrpab = 0x00000000; +SDRAM[3].EmcTClkStable = 0x00000007; +SDRAM[3].EmcTClkStop = 0x00000008; +SDRAM[3].EmcTRefBw = 0x00001825; +SDRAM[3].EmcQUseExtra = 0x0000000a; +SDRAM[3].EmcFbioCfg5 = 0x0000ba88; +SDRAM[3].EmcFbioCfg6 = 0x00000006; +SDRAM[3].EmcFbioSpare = 0x02000000; +SDRAM[3].EmcCfgRsv = 0xff00ff00; +SDRAM[3].EmcMrs = 0x80000d71; +SDRAM[3].EmcEmrs = 0x80100002; +SDRAM[3].EmcEmrs2 = 0x80200218; +SDRAM[3].EmcEmrs3 = 0x80300000; +SDRAM[3].EmcMrw1 = 0x00000000; +SDRAM[3].EmcMrw2 = 0x00000000; +SDRAM[3].EmcMrw3 = 0x00000000; +SDRAM[3].EmcMrw4 = 0x00000000; +SDRAM[3].EmcMrwExtra = 0x00000000; +SDRAM[3].EmcWarmBootMrwExtra = 0x00000000; +SDRAM[3].EmcWarmBootExtraModeRegWriteEnable = 0x00000000; +SDRAM[3].EmcExtraModeRegWriteEnable = 0x00000000; +SDRAM[3].EmcMrwResetCommand = 0x00000000; +SDRAM[3].EmcMrwResetNInitWait = 0x00000000; +SDRAM[3].EmcMrsWaitCnt = 0x00f8000f; +SDRAM[3].EmcMrsWaitCnt2 = 0x00f8000f; +SDRAM[3].EmcCfg = 0x73000000; +SDRAM[3].EmcCfg2 = 0x008008c1; +SDRAM[3].EmcDbg = 0x01000400; +SDRAM[3].EmcCmdQ = 0x10004408; +SDRAM[3].EmcMc2EmcQ = 0x06000404; +SDRAM[3].EmcDynSelfRefControl = 0x80003018; +SDRAM[3].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; +SDRAM[3].EmcCfgDigDll = 0xf0070191; +SDRAM[3].EmcCfgDigDllPeriod = 0x00008000; +SDRAM[3].EmcDevSelect = 0x00000002; +SDRAM[3].EmcSelDpdCtrl = 0x00040000; +SDRAM[3].EmcDllXformDqs0 = 0x0000000A; +SDRAM[3].EmcDllXformDqs1 = 0x0000000A; +SDRAM[3].EmcDllXformDqs2 = 0x0000000A; +SDRAM[3].EmcDllXformDqs3 = 0x0000000A; +SDRAM[3].EmcDllXformDqs4 = 0x0000000A; +SDRAM[3].EmcDllXformDqs5 = 0x0000000A; +SDRAM[3].EmcDllXformDqs6 = 0x0000000A; +SDRAM[3].EmcDllXformDqs7 = 0x0000000A; +SDRAM[3].EmcDllXformQUse0 = 0x00000000; +SDRAM[3].EmcDllXformQUse1 = 0x00000000; +SDRAM[3].EmcDllXformQUse2 = 0x00000000; +SDRAM[3].EmcDllXformQUse3 = 0x00000000; +SDRAM[3].EmcDllXformQUse4 = 0x00000000; +SDRAM[3].EmcDllXformQUse5 = 0x00000000; +SDRAM[3].EmcDllXformQUse6 = 0x00000000; +SDRAM[3].EmcDllXformQUse7 = 0x00000000; +SDRAM[3].EmcDllXformAddr0 = 0x0000000D; +SDRAM[3].EmcDllXformAddr1 = 0x0000000D; +SDRAM[3].EmcDllXformAddr2 = 0x0000000D; +SDRAM[3].EmcDliTrimTxDqs0 = 0x00000000; +SDRAM[3].EmcDliTrimTxDqs1 = 0x00000000; +SDRAM[3].EmcDliTrimTxDqs2 = 0x00000000; +SDRAM[3].EmcDliTrimTxDqs3 = 0x00000000; +SDRAM[3].EmcDliTrimTxDqs4 = 0x00000000; +SDRAM[3].EmcDliTrimTxDqs5 = 0x00000000; +SDRAM[3].EmcDliTrimTxDqs6 = 0x00000000; +SDRAM[3].EmcDliTrimTxDqs7 = 0x00000000; +SDRAM[3].EmcDllXformDq0 = 0x0000000A; +SDRAM[3].EmcDllXformDq1 = 0x0000000A; +SDRAM[3].EmcDllXformDq2 = 0x0000000A; +SDRAM[3].EmcDllXformDq3 = 0x0000000A; +SDRAM[3].WarmBootWait = 0x00000002; +SDRAM[3].EmcCttTermCtrl = 0x00000802; +SDRAM[3].EmcOdtWrite = 0x80000020; +SDRAM[3].EmcOdtRead = 0x00000000; +SDRAM[3].EmcZcalInterval = 0x00020000; +SDRAM[3].EmcZcalWaitCnt = 0x00000042; +SDRAM[3].EmcZcalMrwCmd = 0x80000000; +SDRAM[3].EmcMrsResetDll = 0x00000000; +SDRAM[3].EmcZcalInitDev0 = 0x80000011; +SDRAM[3].EmcZcalInitDev1 = 0x00000000; +SDRAM[3].EmcZcalInitWait = 0x00000001; +SDRAM[3].EmcZcalWarmColdBootEnables = 0x00000003; +SDRAM[3].EmcMrwLpddr2ZcalWarmBoot = 0x000a00ab; +SDRAM[3].EmcZqCalDdr3WarmBoot = 0x00000011; +SDRAM[3].EmcZcalWarmBootWait = 0x00000001; +SDRAM[3].EmcMrsWarmBootEnable = 0x00000001; +SDRAM[3].EmcMrsResetDllWait = 0x00000000; +SDRAM[3].EmcMrsExtra = 0x80000d05; +SDRAM[3].EmcWarmBootMrsExtra = 0x80100002; +SDRAM[3].EmcEmrsDdr2DllEnable = 0x00000000; +SDRAM[3].EmcMrsDdr2DllReset = 0x00000000; +SDRAM[3].EmcEmrsDdr2OcdCalib = 0x00000000; +SDRAM[3].EmcDdr2Wait = 0x00000000; +SDRAM[3].EmcClkenOverride = 0x00000000; +SDRAM[3].EmcExtraRefreshNum = 0x00000002; +SDRAM[3].EmcClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[3].McClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[3].EmcCfgDigDllPeriodWarmBoot = 0x00000003; +SDRAM[3].PmcVddpSel = 0x00000002; +SDRAM[3].PmcDdrPwr = 0x00000003; +SDRAM[3].PmcDdrCfg = 0x00000092; +SDRAM[3].PmcIoDpdReq = 0x80800000; +SDRAM[3].PmcIoDpd2Req = 0x00000000; +SDRAM[3].PmcRegShort = 0x00000000; +SDRAM[3].PmcENoVttGen = 0x00000000; +SDRAM[3].PmcNoIoPower = 0x00000000; +SDRAM[3].EmcXm2CmdPadCtrl = 0x001112a0; +SDRAM[3].EmcXm2CmdPadCtrl2 = 0x770c0000; +SDRAM[3].EmcXm2CmdPadCtrl3 = 0x050c0000; +SDRAM[3].EmcXm2CmdPadCtrl4 = 0x00000000; +SDRAM[3].EmcXm2DqsPadCtrl = 0x770c1414; +SDRAM[3].EmcXm2DqsPadCtrl2 = 0x0000013d; +SDRAM[3].EmcXm2DqsPadCtrl3 = 0x10410400; +SDRAM[3].EmcXm2DqsPadCtrl4 = 0x00249249; +SDRAM[3].EmcXm2DqPadCtrl = 0x770c2990; +SDRAM[3].EmcXm2DqPadCtrl2 = 0x00000000; +SDRAM[3].EmcXm2ClkPadCtrl = 0x77ffc084; +SDRAM[3].EmcXm2ClkPadCtrl2 = 0x00000b0b; +SDRAM[3].EmcXm2CompPadCtrl = 0x81f1f508; +SDRAM[3].EmcXm2VttGenPadCtrl = 0x07077704; +SDRAM[3].EmcXm2VttGenPadCtrl2 = 0x00000000; +SDRAM[3].EmcAcpdControl = 0x00000000; +SDRAM[3].EmcSwizzleRank0ByteCfg = 0x00000087; +SDRAM[3].EmcSwizzleRank0Byte0 = 0x53614207; +SDRAM[3].EmcSwizzleRank0Byte1 = 0x26043715; +SDRAM[3].EmcSwizzleRank0Byte2 = 0x40517236; +SDRAM[3].EmcSwizzleRank0Byte3 = 0x45370612; +SDRAM[3].EmcSwizzleRank1ByteCfg = 0x00000087; +SDRAM[3].EmcSwizzleRank1Byte0 = 0x53614207; +SDRAM[3].EmcSwizzleRank1Byte1 = 0x26043715; +SDRAM[3].EmcSwizzleRank1Byte2 = 0x40517236; +SDRAM[3].EmcSwizzleRank1Byte3 = 0x45370612; +SDRAM[3].EmcAddrSwizzleStack1a = 0x0396071a; +SDRAM[3].EmcAddrSwizzleStack1b = 0x000425b8; +SDRAM[3].EmcAddrSwizzleStack2a = 0x07412306; +SDRAM[3].EmcAddrSwizzleStack2b = 0x00000598; +SDRAM[3].EmcAddrSwizzleStack3 = 0x00534012; +SDRAM[3].EmcDsrVttgenDrv = 0x0000003f; +SDRAM[3].EmcTxdsrvttgen = 0x00000000; +SDRAM[3].McEmemAdrCfg = 0x00000000; +SDRAM[3].McEmemAdrCfgDev0 = 0x00080303; +SDRAM[3].McEmemAdrCfgDev1 = 0x00080303; +SDRAM[3].McEmemAdrCfgChannelMask = 0x00000640; +SDRAM[3].McEmemAdrCfgChannelMaskPropagationCount = 0x00000008; +SDRAM[3].McEmemAdrCfgBankMask0 = 0x69248003; +SDRAM[3].McEmemAdrCfgBankMask1 = 0x24928000; +SDRAM[3].McEmemAdrCfgBankMask2 = 0x92c94c00; +SDRAM[3].McEmemCfg = 0x00000800; +SDRAM[3].McEmemArbCfg = 0x0e00000b; +SDRAM[3].McEmemArbOutstandingReq = 0x80000190; +SDRAM[3].McEmemArbTimingRcd = 0x00000004; +SDRAM[3].McEmemArbTimingRp = 0x00000005; +SDRAM[3].McEmemArbTimingRc = 0x00000013; +SDRAM[3].McEmemArbTimingRas = 0x0000000c; +SDRAM[3].McEmemArbTimingFaw = 0x0000000f; +SDRAM[3].McEmemArbTimingRrd = 0x00000002; +SDRAM[3].McEmemArbTimingRap2Pre = 0x00000003; +SDRAM[3].McEmemArbTimingWap2Pre = 0x0000000c; +SDRAM[3].McEmemArbTimingR2R = 0x00000002; +SDRAM[3].McEmemArbTimingW2W = 0x00000002; +SDRAM[3].McEmemArbTimingR2W = 0x00000006; +SDRAM[3].McEmemArbTimingW2R = 0x00000008; +SDRAM[3].McEmemArbDaTurns = 0x08060202; +SDRAM[3].McEmemArbDaCovers = 0x00170e13; +SDRAM[3].McEmemArbMisc0 = 0x734c2414; +SDRAM[3].McEmemArbMisc1 = 0x78000000; +SDRAM[3].McEmemArbRing1Throttle = 0x001f0000; +SDRAM[3].McEmemArbOverride = 0x00000083; +SDRAM[3].McEmemArbRsv = 0xff00ff00; +SDRAM[3].McClkenOverride = 0x00000000; +SDRAM[3].McEmcRegMode = 0x00000002; +SDRAM[3].McVideoProtectBom = 0xfff00000; +SDRAM[3].McVideoProtectSizeMb = 0x00000000; +SDRAM[3].McVideoProtectVprOverride = 0x009a4752; +SDRAM[3].McSecCarveoutBom = 0xfff00000; +SDRAM[3].McSecCarveoutSizeMb = 0x00000000; +SDRAM[3].McVideoProtectWriteAccess = 0x00000000; +SDRAM[3].McSecCarveoutProtectWriteAccess = 0x00000000; +SDRAM[3].EmcCaTrainingEnable = 0x00000000; +SDRAM[3].EmcCaTrainingTimingCntl1 = 0x1f7df7df; +SDRAM[3].EmcCaTrainingTimingCntl2 = 0x0000001f; +SDRAM[3].SwizzleRankByteEncode = 0x000022aa; +SDRAM[3].BootRomPatchControl = 0x00000000; +SDRAM[3].BootRomPatchData = 0x00000000; +SDRAM[3].Ch1EmcDllXformDqs0 = 0x0000000A; +SDRAM[3].Ch1EmcDllXformDqs1 = 0x0000000A; +SDRAM[3].Ch1EmcDllXformDqs2 = 0x0000000A; +SDRAM[3].Ch1EmcDllXformDqs3 = 0x0000000A; +SDRAM[3].Ch1EmcDllXformDqs4 = 0x0000000A; +SDRAM[3].Ch1EmcDllXformDqs5 = 0x0000000A; +SDRAM[3].Ch1EmcDllXformDqs6 = 0x0000000A; +SDRAM[3].Ch1EmcDllXformDqs7 = 0x0000000A; +SDRAM[3].Ch1EmcDllXformQUse0 = 0x00000000; +SDRAM[3].Ch1EmcDllXformQUse1 = 0x00000000; +SDRAM[3].Ch1EmcDllXformQUse2 = 0x00000000; +SDRAM[3].Ch1EmcDllXformQUse3 = 0x00000000; +SDRAM[3].Ch1EmcDllXformQUse4 = 0x00000000; +SDRAM[3].Ch1EmcDllXformQUse5 = 0x00000000; +SDRAM[3].Ch1EmcDllXformQUse6 = 0x00000000; +SDRAM[3].Ch1EmcDllXformQUse7 = 0x00000000; +SDRAM[3].Ch1EmcDliTrimTxDqs0 = 0x00000000; +SDRAM[3].Ch1EmcDliTrimTxDqs1 = 0x00000000; +SDRAM[3].Ch1EmcDliTrimTxDqs2 = 0x00000000; +SDRAM[3].Ch1EmcDliTrimTxDqs3 = 0x00000000; +SDRAM[3].Ch1EmcDliTrimTxDqs4 = 0x00000000; +SDRAM[3].Ch1EmcDliTrimTxDqs5 = 0x00000000; +SDRAM[3].Ch1EmcDliTrimTxDqs6 = 0x00000000; +SDRAM[3].Ch1EmcDliTrimTxDqs7 = 0x00000000; +SDRAM[3].Ch1EmcDllXformDq0 = 0x0000000A; +SDRAM[3].Ch1EmcDllXformDq1 = 0x0000000A; +SDRAM[3].Ch1EmcDllXformDq2 = 0x0000000A; +SDRAM[3].Ch1EmcDllXformDq3 = 0x0000000A; +SDRAM[3].Ch1EmcSwizzleRank0ByteCfg = 0x000000d2; +SDRAM[3].Ch1EmcSwizzleRank0Byte0 = 0x51430267; +SDRAM[3].Ch1EmcSwizzleRank0Byte1 = 0x13072465; +SDRAM[3].Ch1EmcSwizzleRank0Byte2 = 0x72605314; +SDRAM[3].Ch1EmcSwizzleRank0Byte3 = 0x54073162; +SDRAM[3].Ch1EmcSwizzleRank1ByteCfg = 0x000000d2; +SDRAM[3].Ch1EmcSwizzleRank1Byte0 = 0x51430267; +SDRAM[3].Ch1EmcSwizzleRank1Byte1 = 0x13072465; +SDRAM[3].Ch1EmcSwizzleRank1Byte2 = 0x72605314; +SDRAM[3].Ch1EmcSwizzleRank1Byte3 = 0x54073162; +SDRAM[3].Ch1EmcAddrSwizzleStack1a = 0x79320a61; +SDRAM[3].Ch1EmcAddrSwizzleStack1b = 0x000b8450; +SDRAM[3].Ch1EmcAddrSwizzleStack2a = 0x07623014; +SDRAM[3].Ch1EmcAddrSwizzleStack2b = 0x00000589; +SDRAM[3].Ch1EmcAddrSwizzleStack3 = 0x00530124; +SDRAM[3].Ch1EmcAutoCalConfig = 0xa8f10f0f; +SDRAM[3].Ch1EmcAutoCalConfig2 = 0x00000000; +SDRAM[3].Ch1EmcAutoCalConfig3 = 0x00000000; +SDRAM[3].Ch1EmcCdbCntl1 = 0x00000000; +SDRAM[3].Ch1EmcDllXformAddr0 = 0x0000000D; +SDRAM[3].Ch1EmcDllXformAddr1 = 0x0000000D; +SDRAM[3].Ch1EmcDllXformAddr2 = 0x0000000D; +SDRAM[3].Ch1EmcFbioSpare = 0x02000000; +SDRAM[3].Ch1EmcXm2ClkPadCtrl = 0x77ffc084; +SDRAM[3].Ch1EmcXm2ClkPadCtrl2 = 0x00000b0b; +SDRAM[3].Ch1EmcXm2CmdPadCtrl2 = 0x770c0000; +SDRAM[3].Ch1EmcXm2CmdPadCtrl3 = 0x050c0000; +SDRAM[3].Ch1EmcXm2CmdPadCtrl4 = 0x00000000; +SDRAM[3].Ch1EmcXm2DqPadCtrl = 0x770c2990; +SDRAM[3].Ch1EmcXm2DqPadCtrl2 = 0x00000000; +SDRAM[3].Ch1EmcXm2DqsPadCtrl = 0x770c1515; +SDRAM[3].Ch1EmcXm2DqsPadCtrl3 = 0x10410400; +SDRAM[3].Ch1EmcXm2DqsPadCtrl4 = 0x00249249; diff --git a/tegra114/nvidia/dalmore/E1611_Hynix_2GB_H5TC4G63MFR-PBA_792Mhz_r403_v05.bct.cfg b/tegra114/nvidia/dalmore/E1611_Hynix_2GB_H5TC4G63MFR-PBA_792Mhz_r403_v05.bct.cfg new file mode 100644 index 0000000..ebce4be --- /dev/null +++ b/tegra114/nvidia/dalmore/E1611_Hynix_2GB_H5TC4G63MFR-PBA_792Mhz_r403_v05.bct.cfg @@ -0,0 +1,1273 @@ +# Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. +# +# This software is provided 'as-is', without any express or implied +# warranty. In no event will the authors be held liable for any damages +# arising from the use of this software. +# +# Permission is granted to anyone to use this software for any purpose, +# including commercial applications, and to alter it and redistribute it +# freely, subject to the following restrictions: +# +# 1. The origin of this software must not be misrepresented; you must not +# claim that you wrote the original software. If you use this software +# in a product, an acknowledgment in the product documentation would be +# appreciated but is not required. +# 2. Altered source versions must be plainly marked as such, and must not be +# misrepresented as being the original software. +# 3. This notice may not be removed or altered from any source distribution. + +Version = 0x00350001; +BlockSize = 0x00004000; +PageSize = 0x00000200; +PartitionSize = 0x01000000; +OdmData = 0x800d8000; + +DevType[0] = NvBootDevType_Sdmmc; +DeviceParam[0].SdmmcParams.ClockDivider = 0x00000009; +DeviceParam[0].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_8Bit; +DeviceParam[0].SdmmcParams.MaxPowerClassSupported = 0x00000000; +DeviceParam[0].SdmmcParams.MultiPageSupport = 0x00000000; + +SDRAM[0].MemoryType = NvBootMemoryType_Ddr3; +SDRAM[0].PllMInputDivider = 0x00000001; +SDRAM[0].PllMFeedbackDivider = 0x00000042; +SDRAM[0].PllMStableTime = 0x0000012c; +SDRAM[0].PllMSetupControl = 0x00000000; +SDRAM[0].PllMSelectDiv2 = 0x00000000; +SDRAM[0].PllMPDLshiftPh45 = 0x00000000; +SDRAM[0].PllMPDLshiftPh90 = 0x00000000; +SDRAM[0].PllMPDLshiftPh135 = 0x00000000; +SDRAM[0].PllMKCP = 0x00000000; +SDRAM[0].PllMKVCO = 0x00000000; +SDRAM[0].EmcBctSpare0 = 0x00000bad; +SDRAM[0].EmcClockSource = 0x80000000; +SDRAM[0].EmcAutoCalInterval = 0x001fffff; +SDRAM[0].EmcAutoCalConfig = 0xa0f10f0f; +SDRAM[0].EmcAutoCalConfig2 = 0x00000000; +SDRAM[0].EmcAutoCalConfig3 = 0x00000000; +SDRAM[0].EmcAutoCalWait = 0x00000064; +SDRAM[0].EmcAdrCfg = 0x00000000; +SDRAM[0].EmcPinProgramWait = 0x00000001; +SDRAM[0].EmcPinExtraWait = 0x00000000; +SDRAM[0].EmcTimingControlWait = 0x00000001; +SDRAM[0].EmcRc = 0x00000024; +SDRAM[0].EmcRfc = 0x000000cd; +SDRAM[0].EmcRfcSlr = 0x00000000; +SDRAM[0].EmcRas = 0x00000019; +SDRAM[0].EmcRp = 0x0000000a; +SDRAM[0].EmcR2r = 0x00000000; +SDRAM[0].EmcW2w = 0x00000000; +SDRAM[0].EmcR2w = 0x00000009; +SDRAM[0].EmcW2r = 0x0000000d; +SDRAM[0].EmcR2p = 0x00000004; +SDRAM[0].EmcW2p = 0x00000013; +SDRAM[0].EmcRdRcd = 0x0000000a; +SDRAM[0].EmcWrRcd = 0x0000000a; +SDRAM[0].EmcRrd = 0x00000003; +SDRAM[0].EmcRext = 0x00000001; +SDRAM[0].EmcWext = 0x00000000; +SDRAM[0].EmcWdv = 0x00000006; +SDRAM[0].EmcWdvMask = 0x00000006; +SDRAM[0].EmcQUse = 0x0000000b; +SDRAM[0].EmcIbdly = 0x0000000b; +SDRAM[0].EmcEInput = 0x00000008; +SDRAM[0].EmcEInputDuration = 0x00000006; +SDRAM[0].EmcPutermExtra = 0x000d000a; +SDRAM[0].EmcCdbCntl1 = 0x00000000; +SDRAM[0].EmcCdbCntl2 = 0x00000000; +SDRAM[0].EmcQRst = 0x00000008; +SDRAM[0].EmcQSafe = 0x0000000d; +SDRAM[0].EmcRdv = 0x00000014; +SDRAM[0].EmcRdvMask = 0x00000014; +SDRAM[0].EmcCtt = 0x00000000; +SDRAM[0].EmcCttDuration = 0x00000000; +SDRAM[0].EmcRefresh = 0x000017e4; +SDRAM[0].EmcBurstRefreshNum = 0x00000000; +SDRAM[0].EmcPreRefreshReqCnt = 0x000005f9; +SDRAM[0].EmcPdEx2Wr = 0x00000003; +SDRAM[0].EmcPdEx2Rd = 0x00000012; +SDRAM[0].EmcPChg2Pden = 0x00000001; +SDRAM[0].EmcAct2Pden = 0x00000000; +SDRAM[0].EmcAr2Pden = 0x000000c6; +SDRAM[0].EmcRw2Pden = 0x00000018; +SDRAM[0].EmcTxsr = 0x000000d6; +SDRAM[0].EmcTxsrDll = 0x00000200; +SDRAM[0].EmcTcke = 0x00000005; +SDRAM[0].EmcTckesr = 0x00000005; +SDRAM[0].EmcTpd = 0x00000005; +SDRAM[0].EmcTfaw = 0x00000020; +SDRAM[0].EmcTrpab = 0x00000000; +SDRAM[0].EmcTClkStable = 0x00000007; +SDRAM[0].EmcTClkStop = 0x00000008; +SDRAM[0].EmcTRefBw = 0x00001825; +SDRAM[0].EmcQUseExtra = 0x0000000a; +SDRAM[0].EmcFbioCfg5 = 0x0000ba88; +SDRAM[0].EmcFbioCfg6 = 0x00000006; +SDRAM[0].EmcFbioSpare = 0x02000000; +SDRAM[0].EmcCfgRsv = 0xff00ff00; +SDRAM[0].EmcMrs = 0x80000d71; +SDRAM[0].EmcEmrs = 0x80100002; +SDRAM[0].EmcEmrs2 = 0x80200218; +SDRAM[0].EmcEmrs3 = 0x80300000; +SDRAM[0].EmcMrw1 = 0x00000000; +SDRAM[0].EmcMrw2 = 0x00000000; +SDRAM[0].EmcMrw3 = 0x00000000; +SDRAM[0].EmcMrw4 = 0x00000000; +SDRAM[0].EmcMrwExtra = 0x00000000; +SDRAM[0].EmcWarmBootMrwExtra = 0x00000000; +SDRAM[0].EmcWarmBootExtraModeRegWriteEnable = 0x00000000; +SDRAM[0].EmcExtraModeRegWriteEnable = 0x00000000; +SDRAM[0].EmcMrwResetCommand = 0x00000000; +SDRAM[0].EmcMrwResetNInitWait = 0x00000000; +SDRAM[0].EmcMrsWaitCnt = 0x00f8000f; +SDRAM[0].EmcMrsWaitCnt2 = 0x00f8000f; +SDRAM[0].EmcCfg = 0x73000000; +SDRAM[0].EmcCfg2 = 0x008008c1; +SDRAM[0].EmcDbg = 0x01000400; +SDRAM[0].EmcCmdQ = 0x10004408; +SDRAM[0].EmcMc2EmcQ = 0x06000404; +SDRAM[0].EmcDynSelfRefControl = 0x80003018; +SDRAM[0].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; +SDRAM[0].EmcCfgDigDll = 0xf0070191; +SDRAM[0].EmcCfgDigDllPeriod = 0x00008000; +SDRAM[0].EmcDevSelect = 0x00000002; +SDRAM[0].EmcSelDpdCtrl = 0x00040000; +SDRAM[0].EmcDllXformDqs0 = 0x00000008; +SDRAM[0].EmcDllXformDqs1 = 0x00000008; +SDRAM[0].EmcDllXformDqs2 = 0x00000008; +SDRAM[0].EmcDllXformDqs3 = 0x00000008; +SDRAM[0].EmcDllXformDqs4 = 0x00000008; +SDRAM[0].EmcDllXformDqs5 = 0x00000008; +SDRAM[0].EmcDllXformDqs6 = 0x00000008; +SDRAM[0].EmcDllXformDqs7 = 0x00000008; +SDRAM[0].EmcDllXformQUse0 = 0x00000000; +SDRAM[0].EmcDllXformQUse1 = 0x00000000; +SDRAM[0].EmcDllXformQUse2 = 0x00000000; +SDRAM[0].EmcDllXformQUse3 = 0x00000000; +SDRAM[0].EmcDllXformQUse4 = 0x00000000; +SDRAM[0].EmcDllXformQUse5 = 0x00000000; +SDRAM[0].EmcDllXformQUse6 = 0x00000000; +SDRAM[0].EmcDllXformQUse7 = 0x00000000; +SDRAM[0].EmcDllXformAddr0 = 0x007FC00D; +SDRAM[0].EmcDllXformAddr1 = 0x007FC00D; +SDRAM[0].EmcDllXformAddr2 = 0x007FC00D; +SDRAM[0].EmcDliTrimTxDqs0 = 0x00000000; +SDRAM[0].EmcDliTrimTxDqs1 = 0x00000000; +SDRAM[0].EmcDliTrimTxDqs2 = 0x00000000; +SDRAM[0].EmcDliTrimTxDqs3 = 0x00000000; +SDRAM[0].EmcDliTrimTxDqs4 = 0x00000000; +SDRAM[0].EmcDliTrimTxDqs5 = 0x00000000; +SDRAM[0].EmcDliTrimTxDqs6 = 0x00000000; +SDRAM[0].EmcDliTrimTxDqs7 = 0x00000000; +SDRAM[0].EmcDllXformDq0 = 0x007FC00A; +SDRAM[0].EmcDllXformDq1 = 0x007FC00A; +SDRAM[0].EmcDllXformDq2 = 0x007FC00A; +SDRAM[0].EmcDllXformDq3 = 0x007FC00A; +SDRAM[0].WarmBootWait = 0x00000002; +SDRAM[0].EmcCttTermCtrl = 0x00000802; +SDRAM[0].EmcOdtWrite = 0x80000020; +SDRAM[0].EmcOdtRead = 0x00000000; +SDRAM[0].EmcZcalInterval = 0x00020000; +SDRAM[0].EmcZcalWaitCnt = 0x00000042; +SDRAM[0].EmcZcalMrwCmd = 0x80000000; +SDRAM[0].EmcMrsResetDll = 0x00000000; +SDRAM[0].EmcZcalInitDev0 = 0x80000011; +SDRAM[0].EmcZcalInitDev1 = 0x00000000; +SDRAM[0].EmcZcalInitWait = 0x00000001; +SDRAM[0].EmcZcalWarmColdBootEnables = 0x00000003; +SDRAM[0].EmcMrwLpddr2ZcalWarmBoot = 0x000a00ab; +SDRAM[0].EmcZqCalDdr3WarmBoot = 0x00000011; +SDRAM[0].EmcZcalWarmBootWait = 0x00000001; +SDRAM[0].EmcMrsWarmBootEnable = 0x00000001; +SDRAM[0].EmcMrsResetDllWait = 0x00000000; +SDRAM[0].EmcMrsExtra = 0x80000d05; +SDRAM[0].EmcWarmBootMrsExtra = 0x80100002; +SDRAM[0].EmcEmrsDdr2DllEnable = 0x00000000; +SDRAM[0].EmcMrsDdr2DllReset = 0x00000000; +SDRAM[0].EmcEmrsDdr2OcdCalib = 0x00000000; +SDRAM[0].EmcDdr2Wait = 0x00000000; +SDRAM[0].EmcClkenOverride = 0x00000000; +SDRAM[0].EmcExtraRefreshNum = 0x00000002; +SDRAM[0].EmcClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[0].McClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[0].EmcCfgDigDllPeriodWarmBoot = 0x00000003; +SDRAM[0].PmcVddpSel = 0x00000002; +SDRAM[0].PmcDdrPwr = 0x00000003; +SDRAM[0].PmcDdrCfg = 0x00000092; +SDRAM[0].PmcIoDpdReq = 0x80800000; +SDRAM[0].PmcIoDpd2Req = 0x00000000; +SDRAM[0].PmcRegShort = 0x00000000; +SDRAM[0].PmcENoVttGen = 0x00000000; +SDRAM[0].PmcNoIoPower = 0x00000000; +SDRAM[0].EmcXm2CmdPadCtrl = 0x001112a0; +SDRAM[0].EmcXm2CmdPadCtrl2 = 0x770c0000; +SDRAM[0].EmcXm2CmdPadCtrl3 = 0x050c0000; +SDRAM[0].EmcXm2CmdPadCtrl4 = 0x00000000; +SDRAM[0].EmcXm2DqsPadCtrl = 0x770c1414; +SDRAM[0].EmcXm2DqsPadCtrl2 = 0x0000013d; +SDRAM[0].EmcXm2DqsPadCtrl3 = 0x10410400; +SDRAM[0].EmcXm2DqsPadCtrl4 = 0x00249249; +SDRAM[0].EmcXm2DqPadCtrl = 0x770c2990; +SDRAM[0].EmcXm2DqPadCtrl2 = 0x00000000; +SDRAM[0].EmcXm2ClkPadCtrl = 0x77ffc084; +SDRAM[0].EmcXm2ClkPadCtrl2 = 0x00000b0b; +SDRAM[0].EmcXm2CompPadCtrl = 0x81f1f508; +SDRAM[0].EmcXm2VttGenPadCtrl = 0x07076604; +SDRAM[0].EmcXm2VttGenPadCtrl2 = 0x00000000; +SDRAM[0].EmcAcpdControl = 0x00000000; +SDRAM[0].EmcSwizzleRank0ByteCfg = 0x00000087; +SDRAM[0].EmcSwizzleRank0Byte0 = 0x53614207; +SDRAM[0].EmcSwizzleRank0Byte1 = 0x26043715; +SDRAM[0].EmcSwizzleRank0Byte2 = 0x40517236; +SDRAM[0].EmcSwizzleRank0Byte3 = 0x45370612; +SDRAM[0].EmcSwizzleRank1ByteCfg = 0x00000087; +SDRAM[0].EmcSwizzleRank1Byte0 = 0x53614207; +SDRAM[0].EmcSwizzleRank1Byte1 = 0x26043715; +SDRAM[0].EmcSwizzleRank1Byte2 = 0x40517236; +SDRAM[0].EmcSwizzleRank1Byte3 = 0x45370612; +SDRAM[0].EmcAddrSwizzleStack1a = 0x0396071a; +SDRAM[0].EmcAddrSwizzleStack1b = 0x000425b8; +SDRAM[0].EmcAddrSwizzleStack2a = 0x07412306; +SDRAM[0].EmcAddrSwizzleStack2b = 0x00000598; +SDRAM[0].EmcAddrSwizzleStack3 = 0x00534012; +SDRAM[0].EmcDsrVttgenDrv = 0x0000003f; +SDRAM[0].EmcTxdsrvttgen = 0x00000000; +SDRAM[0].McEmemAdrCfg = 0x00000000; +SDRAM[0].McEmemAdrCfgDev0 = 0x00080303; +SDRAM[0].McEmemAdrCfgDev1 = 0x00080303; +SDRAM[0].McEmemAdrCfgChannelMask = 0x00000640; +SDRAM[0].McEmemAdrCfgChannelMaskPropagationCount = 0x00000008; +SDRAM[0].McEmemAdrCfgBankMask0 = 0x69248003; +SDRAM[0].McEmemAdrCfgBankMask1 = 0x24928000; +SDRAM[0].McEmemAdrCfgBankMask2 = 0x92c94c00; +SDRAM[0].McEmemCfg = 0x00000800; +SDRAM[0].McEmemArbCfg = 0x0e00000b; +SDRAM[0].McEmemArbOutstandingReq = 0x80000190; +SDRAM[0].McEmemArbTimingRcd = 0x00000004; +SDRAM[0].McEmemArbTimingRp = 0x00000005; +SDRAM[0].McEmemArbTimingRc = 0x00000013; +SDRAM[0].McEmemArbTimingRas = 0x0000000c; +SDRAM[0].McEmemArbTimingFaw = 0x0000000f; +SDRAM[0].McEmemArbTimingRrd = 0x00000002; +SDRAM[0].McEmemArbTimingRap2Pre = 0x00000003; +SDRAM[0].McEmemArbTimingWap2Pre = 0x0000000c; +SDRAM[0].McEmemArbTimingR2R = 0x00000002; +SDRAM[0].McEmemArbTimingW2W = 0x00000002; +SDRAM[0].McEmemArbTimingR2W = 0x00000006; +SDRAM[0].McEmemArbTimingW2R = 0x00000008; +SDRAM[0].McEmemArbDaTurns = 0x08060202; +SDRAM[0].McEmemArbDaCovers = 0x00170e13; +SDRAM[0].McEmemArbMisc0 = 0x734c2414; +SDRAM[0].McEmemArbMisc1 = 0x78000000; +SDRAM[0].McEmemArbRing1Throttle = 0x001f0000; +SDRAM[0].McEmemArbOverride = 0x00000083; +SDRAM[0].McEmemArbRsv = 0xff00ff00; +SDRAM[0].McClkenOverride = 0x00000000; +SDRAM[0].McEmcRegMode = 0x00000002; +SDRAM[0].McVideoProtectBom = 0xfff00000; +SDRAM[0].McVideoProtectSizeMb = 0x00000000; +SDRAM[0].McVideoProtectVprOverride = 0x009a4752; +SDRAM[0].McSecCarveoutBom = 0xfff00000; +SDRAM[0].McSecCarveoutSizeMb = 0x00000000; +SDRAM[0].McVideoProtectWriteAccess = 0x00000000; +SDRAM[0].McSecCarveoutProtectWriteAccess = 0x00000000; +SDRAM[0].EmcCaTrainingEnable = 0x00000000; +SDRAM[0].EmcCaTrainingTimingCntl1 = 0x1f7df7df; +SDRAM[0].EmcCaTrainingTimingCntl2 = 0x0000001f; +SDRAM[0].SwizzleRankByteEncode = 0x000022aa; +SDRAM[0].BootRomPatchControl = 0x00000000; +SDRAM[0].BootRomPatchData = 0x00000000; +SDRAM[0].Ch1EmcDllXformDqs0 = 0x00000008; +SDRAM[0].Ch1EmcDllXformDqs1 = 0x00000008; +SDRAM[0].Ch1EmcDllXformDqs2 = 0x00000008; +SDRAM[0].Ch1EmcDllXformDqs3 = 0x00000008; +SDRAM[0].Ch1EmcDllXformDqs4 = 0x00000008; +SDRAM[0].Ch1EmcDllXformDqs5 = 0x00000008; +SDRAM[0].Ch1EmcDllXformDqs6 = 0x00000008; +SDRAM[0].Ch1EmcDllXformDqs7 = 0x00000008; +SDRAM[0].Ch1EmcDllXformQUse0 = 0x00000000; +SDRAM[0].Ch1EmcDllXformQUse1 = 0x00000000; +SDRAM[0].Ch1EmcDllXformQUse2 = 0x00000000; +SDRAM[0].Ch1EmcDllXformQUse3 = 0x00000000; +SDRAM[0].Ch1EmcDllXformQUse4 = 0x00000000; +SDRAM[0].Ch1EmcDllXformQUse5 = 0x00000000; +SDRAM[0].Ch1EmcDllXformQUse6 = 0x00000000; +SDRAM[0].Ch1EmcDllXformQUse7 = 0x00000000; +SDRAM[0].Ch1EmcDliTrimTxDqs0 = 0x00000000; +SDRAM[0].Ch1EmcDliTrimTxDqs1 = 0x00000000; +SDRAM[0].Ch1EmcDliTrimTxDqs2 = 0x00000000; +SDRAM[0].Ch1EmcDliTrimTxDqs3 = 0x00000000; +SDRAM[0].Ch1EmcDliTrimTxDqs4 = 0x00000000; +SDRAM[0].Ch1EmcDliTrimTxDqs5 = 0x00000000; +SDRAM[0].Ch1EmcDliTrimTxDqs6 = 0x00000000; +SDRAM[0].Ch1EmcDliTrimTxDqs7 = 0x00000000; +SDRAM[0].Ch1EmcDllXformDq0 = 0x007FC00A; +SDRAM[0].Ch1EmcDllXformDq1 = 0x007FC00A; +SDRAM[0].Ch1EmcDllXformDq2 = 0x007FC00A; +SDRAM[0].Ch1EmcDllXformDq3 = 0x007FC00A; +SDRAM[0].Ch1EmcSwizzleRank0ByteCfg = 0x000000d2; +SDRAM[0].Ch1EmcSwizzleRank0Byte0 = 0x51430267; +SDRAM[0].Ch1EmcSwizzleRank0Byte1 = 0x13072465; +SDRAM[0].Ch1EmcSwizzleRank0Byte2 = 0x72605314; +SDRAM[0].Ch1EmcSwizzleRank0Byte3 = 0x54073162; +SDRAM[0].Ch1EmcSwizzleRank1ByteCfg = 0x000000d2; +SDRAM[0].Ch1EmcSwizzleRank1Byte0 = 0x51430267; +SDRAM[0].Ch1EmcSwizzleRank1Byte1 = 0x13072465; +SDRAM[0].Ch1EmcSwizzleRank1Byte2 = 0x72605314; +SDRAM[0].Ch1EmcSwizzleRank1Byte3 = 0x54073162; +SDRAM[0].Ch1EmcAddrSwizzleStack1a = 0x79320a61; +SDRAM[0].Ch1EmcAddrSwizzleStack1b = 0x000b8450; +SDRAM[0].Ch1EmcAddrSwizzleStack2a = 0x07623014; +SDRAM[0].Ch1EmcAddrSwizzleStack2b = 0x00000589; +SDRAM[0].Ch1EmcAddrSwizzleStack3 = 0x00530124; +SDRAM[0].Ch1EmcAutoCalConfig = 0xa8f10f0f; +SDRAM[0].Ch1EmcAutoCalConfig2 = 0x00000000; +SDRAM[0].Ch1EmcAutoCalConfig3 = 0x00000000; +SDRAM[0].Ch1EmcCdbCntl1 = 0x00000000; +SDRAM[0].Ch1EmcDllXformAddr0 = 0x007FC00D; +SDRAM[0].Ch1EmcDllXformAddr1 = 0x007FC00D; +SDRAM[0].Ch1EmcDllXformAddr2 = 0x007FC00D; +SDRAM[0].Ch1EmcFbioSpare = 0x02000000; +SDRAM[0].Ch1EmcXm2ClkPadCtrl = 0x77ffc084; +SDRAM[0].Ch1EmcXm2ClkPadCtrl2 = 0x00000b0b; +SDRAM[0].Ch1EmcXm2CmdPadCtrl2 = 0x770c0000; +SDRAM[0].Ch1EmcXm2CmdPadCtrl3 = 0x050c0000; +SDRAM[0].Ch1EmcXm2CmdPadCtrl4 = 0x00000000; +SDRAM[0].Ch1EmcXm2DqPadCtrl = 0x770c2990; +SDRAM[0].Ch1EmcXm2DqPadCtrl2 = 0x00000000; +SDRAM[0].Ch1EmcXm2DqsPadCtrl = 0x770c1515; +SDRAM[0].Ch1EmcXm2DqsPadCtrl3 = 0x10410400; +SDRAM[0].Ch1EmcXm2DqsPadCtrl4 = 0x00249249; + +SDRAM[1].MemoryType = NvBootMemoryType_Ddr3; +SDRAM[1].PllMInputDivider = 0x00000001; +SDRAM[1].PllMFeedbackDivider = 0x00000042; +SDRAM[1].PllMStableTime = 0x0000012c; +SDRAM[1].PllMSetupControl = 0x00000000; +SDRAM[1].PllMSelectDiv2 = 0x00000000; +SDRAM[1].PllMPDLshiftPh45 = 0x00000000; +SDRAM[1].PllMPDLshiftPh90 = 0x00000000; +SDRAM[1].PllMPDLshiftPh135 = 0x00000000; +SDRAM[1].PllMKCP = 0x00000000; +SDRAM[1].PllMKVCO = 0x00000000; +SDRAM[1].EmcBctSpare0 = 0x00000bad; +SDRAM[1].EmcClockSource = 0x80000000; +SDRAM[1].EmcAutoCalInterval = 0x001fffff; +SDRAM[1].EmcAutoCalConfig = 0xa0f10f0f; +SDRAM[1].EmcAutoCalConfig2 = 0x00000000; +SDRAM[1].EmcAutoCalConfig3 = 0x00000000; +SDRAM[1].EmcAutoCalWait = 0x00000064; +SDRAM[1].EmcAdrCfg = 0x00000000; +SDRAM[1].EmcPinProgramWait = 0x00000001; +SDRAM[1].EmcPinExtraWait = 0x00000000; +SDRAM[1].EmcTimingControlWait = 0x00000001; +SDRAM[1].EmcRc = 0x00000024; +SDRAM[1].EmcRfc = 0x000000cd; +SDRAM[1].EmcRfcSlr = 0x00000000; +SDRAM[1].EmcRas = 0x00000019; +SDRAM[1].EmcRp = 0x0000000a; +SDRAM[1].EmcR2r = 0x00000000; +SDRAM[1].EmcW2w = 0x00000000; +SDRAM[1].EmcR2w = 0x00000009; +SDRAM[1].EmcW2r = 0x0000000d; +SDRAM[1].EmcR2p = 0x00000004; +SDRAM[1].EmcW2p = 0x00000013; +SDRAM[1].EmcRdRcd = 0x0000000a; +SDRAM[1].EmcWrRcd = 0x0000000a; +SDRAM[1].EmcRrd = 0x00000003; +SDRAM[1].EmcRext = 0x00000001; +SDRAM[1].EmcWext = 0x00000000; +SDRAM[1].EmcWdv = 0x00000006; +SDRAM[1].EmcWdvMask = 0x00000006; +SDRAM[1].EmcQUse = 0x0000000b; +SDRAM[1].EmcIbdly = 0x0000000b; +SDRAM[1].EmcEInput = 0x00000008; +SDRAM[1].EmcEInputDuration = 0x00000006; +SDRAM[1].EmcPutermExtra = 0x000d000a; +SDRAM[1].EmcCdbCntl1 = 0x00000000; +SDRAM[1].EmcCdbCntl2 = 0x00000000; +SDRAM[1].EmcQRst = 0x00000008; +SDRAM[1].EmcQSafe = 0x0000000d; +SDRAM[1].EmcRdv = 0x00000014; +SDRAM[1].EmcRdvMask = 0x00000014; +SDRAM[1].EmcCtt = 0x00000000; +SDRAM[1].EmcCttDuration = 0x00000000; +SDRAM[1].EmcRefresh = 0x000017e4; +SDRAM[1].EmcBurstRefreshNum = 0x00000000; +SDRAM[1].EmcPreRefreshReqCnt = 0x000005f9; +SDRAM[1].EmcPdEx2Wr = 0x00000003; +SDRAM[1].EmcPdEx2Rd = 0x00000012; +SDRAM[1].EmcPChg2Pden = 0x00000001; +SDRAM[1].EmcAct2Pden = 0x00000000; +SDRAM[1].EmcAr2Pden = 0x000000c6; +SDRAM[1].EmcRw2Pden = 0x00000018; +SDRAM[1].EmcTxsr = 0x000000d6; +SDRAM[1].EmcTxsrDll = 0x00000200; +SDRAM[1].EmcTcke = 0x00000005; +SDRAM[1].EmcTckesr = 0x00000005; +SDRAM[1].EmcTpd = 0x00000005; +SDRAM[1].EmcTfaw = 0x00000020; +SDRAM[1].EmcTrpab = 0x00000000; +SDRAM[1].EmcTClkStable = 0x00000007; +SDRAM[1].EmcTClkStop = 0x00000008; +SDRAM[1].EmcTRefBw = 0x00001825; +SDRAM[1].EmcQUseExtra = 0x0000000a; +SDRAM[1].EmcFbioCfg5 = 0x0000ba88; +SDRAM[1].EmcFbioCfg6 = 0x00000006; +SDRAM[1].EmcFbioSpare = 0x02000000; +SDRAM[1].EmcCfgRsv = 0xff00ff00; +SDRAM[1].EmcMrs = 0x80000d71; +SDRAM[1].EmcEmrs = 0x80100002; +SDRAM[1].EmcEmrs2 = 0x80200218; +SDRAM[1].EmcEmrs3 = 0x80300000; +SDRAM[1].EmcMrw1 = 0x00000000; +SDRAM[1].EmcMrw2 = 0x00000000; +SDRAM[1].EmcMrw3 = 0x00000000; +SDRAM[1].EmcMrw4 = 0x00000000; +SDRAM[1].EmcMrwExtra = 0x00000000; +SDRAM[1].EmcWarmBootMrwExtra = 0x00000000; +SDRAM[1].EmcWarmBootExtraModeRegWriteEnable = 0x00000000; +SDRAM[1].EmcExtraModeRegWriteEnable = 0x00000000; +SDRAM[1].EmcMrwResetCommand = 0x00000000; +SDRAM[1].EmcMrwResetNInitWait = 0x00000000; +SDRAM[1].EmcMrsWaitCnt = 0x00f8000f; +SDRAM[1].EmcMrsWaitCnt2 = 0x00f8000f; +SDRAM[1].EmcCfg = 0x73000000; +SDRAM[1].EmcCfg2 = 0x008008c1; +SDRAM[1].EmcDbg = 0x01000400; +SDRAM[1].EmcCmdQ = 0x10004408; +SDRAM[1].EmcMc2EmcQ = 0x06000404; +SDRAM[1].EmcDynSelfRefControl = 0x80003018; +SDRAM[1].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; +SDRAM[1].EmcCfgDigDll = 0xf0070191; +SDRAM[1].EmcCfgDigDllPeriod = 0x00008000; +SDRAM[1].EmcDevSelect = 0x00000002; +SDRAM[1].EmcSelDpdCtrl = 0x00040000; +SDRAM[1].EmcDllXformDqs0 = 0x00000008; +SDRAM[1].EmcDllXformDqs1 = 0x00000008; +SDRAM[1].EmcDllXformDqs2 = 0x00000008; +SDRAM[1].EmcDllXformDqs3 = 0x00000008; +SDRAM[1].EmcDllXformDqs4 = 0x00000008; +SDRAM[1].EmcDllXformDqs5 = 0x00000008; +SDRAM[1].EmcDllXformDqs6 = 0x00000008; +SDRAM[1].EmcDllXformDqs7 = 0x00000008; +SDRAM[1].EmcDllXformQUse0 = 0x00000000; +SDRAM[1].EmcDllXformQUse1 = 0x00000000; +SDRAM[1].EmcDllXformQUse2 = 0x00000000; +SDRAM[1].EmcDllXformQUse3 = 0x00000000; +SDRAM[1].EmcDllXformQUse4 = 0x00000000; +SDRAM[1].EmcDllXformQUse5 = 0x00000000; +SDRAM[1].EmcDllXformQUse6 = 0x00000000; +SDRAM[1].EmcDllXformQUse7 = 0x00000000; +SDRAM[1].EmcDllXformAddr0 = 0x007FC00D; +SDRAM[1].EmcDllXformAddr1 = 0x007FC00D; +SDRAM[1].EmcDllXformAddr2 = 0x007FC00D; +SDRAM[1].EmcDliTrimTxDqs0 = 0x00000000; +SDRAM[1].EmcDliTrimTxDqs1 = 0x00000000; +SDRAM[1].EmcDliTrimTxDqs2 = 0x00000000; +SDRAM[1].EmcDliTrimTxDqs3 = 0x00000000; +SDRAM[1].EmcDliTrimTxDqs4 = 0x00000000; +SDRAM[1].EmcDliTrimTxDqs5 = 0x00000000; +SDRAM[1].EmcDliTrimTxDqs6 = 0x00000000; +SDRAM[1].EmcDliTrimTxDqs7 = 0x00000000; +SDRAM[1].EmcDllXformDq0 = 0x007FC00A; +SDRAM[1].EmcDllXformDq1 = 0x007FC00A; +SDRAM[1].EmcDllXformDq2 = 0x007FC00A; +SDRAM[1].EmcDllXformDq3 = 0x007FC00A; +SDRAM[1].WarmBootWait = 0x00000002; +SDRAM[1].EmcCttTermCtrl = 0x00000802; +SDRAM[1].EmcOdtWrite = 0x80000020; +SDRAM[1].EmcOdtRead = 0x00000000; +SDRAM[1].EmcZcalInterval = 0x00020000; +SDRAM[1].EmcZcalWaitCnt = 0x00000042; +SDRAM[1].EmcZcalMrwCmd = 0x80000000; +SDRAM[1].EmcMrsResetDll = 0x00000000; +SDRAM[1].EmcZcalInitDev0 = 0x80000011; +SDRAM[1].EmcZcalInitDev1 = 0x00000000; +SDRAM[1].EmcZcalInitWait = 0x00000001; +SDRAM[1].EmcZcalWarmColdBootEnables = 0x00000003; +SDRAM[1].EmcMrwLpddr2ZcalWarmBoot = 0x000a00ab; +SDRAM[1].EmcZqCalDdr3WarmBoot = 0x00000011; +SDRAM[1].EmcZcalWarmBootWait = 0x00000001; +SDRAM[1].EmcMrsWarmBootEnable = 0x00000001; +SDRAM[1].EmcMrsResetDllWait = 0x00000000; +SDRAM[1].EmcMrsExtra = 0x80000d05; +SDRAM[1].EmcWarmBootMrsExtra = 0x80100002; +SDRAM[1].EmcEmrsDdr2DllEnable = 0x00000000; +SDRAM[1].EmcMrsDdr2DllReset = 0x00000000; +SDRAM[1].EmcEmrsDdr2OcdCalib = 0x00000000; +SDRAM[1].EmcDdr2Wait = 0x00000000; +SDRAM[1].EmcClkenOverride = 0x00000000; +SDRAM[1].EmcExtraRefreshNum = 0x00000002; +SDRAM[1].EmcClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[1].McClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[1].EmcCfgDigDllPeriodWarmBoot = 0x00000003; +SDRAM[1].PmcVddpSel = 0x00000002; +SDRAM[1].PmcDdrPwr = 0x00000003; +SDRAM[1].PmcDdrCfg = 0x00000092; +SDRAM[1].PmcIoDpdReq = 0x80800000; +SDRAM[1].PmcIoDpd2Req = 0x00000000; +SDRAM[1].PmcRegShort = 0x00000000; +SDRAM[1].PmcENoVttGen = 0x00000000; +SDRAM[1].PmcNoIoPower = 0x00000000; +SDRAM[1].EmcXm2CmdPadCtrl = 0x001112a0; +SDRAM[1].EmcXm2CmdPadCtrl2 = 0x770c0000; +SDRAM[1].EmcXm2CmdPadCtrl3 = 0x050c0000; +SDRAM[1].EmcXm2CmdPadCtrl4 = 0x00000000; +SDRAM[1].EmcXm2DqsPadCtrl = 0x770c1414; +SDRAM[1].EmcXm2DqsPadCtrl2 = 0x0000013d; +SDRAM[1].EmcXm2DqsPadCtrl3 = 0x10410400; +SDRAM[1].EmcXm2DqsPadCtrl4 = 0x00249249; +SDRAM[1].EmcXm2DqPadCtrl = 0x770c2990; +SDRAM[1].EmcXm2DqPadCtrl2 = 0x00000000; +SDRAM[1].EmcXm2ClkPadCtrl = 0x77ffc084; +SDRAM[1].EmcXm2ClkPadCtrl2 = 0x00000b0b; +SDRAM[1].EmcXm2CompPadCtrl = 0x81f1f508; +SDRAM[1].EmcXm2VttGenPadCtrl = 0x07076604; +SDRAM[1].EmcXm2VttGenPadCtrl2 = 0x00000000; +SDRAM[1].EmcAcpdControl = 0x00000000; +SDRAM[1].EmcSwizzleRank0ByteCfg = 0x00000087; +SDRAM[1].EmcSwizzleRank0Byte0 = 0x53614207; +SDRAM[1].EmcSwizzleRank0Byte1 = 0x26043715; +SDRAM[1].EmcSwizzleRank0Byte2 = 0x40517236; +SDRAM[1].EmcSwizzleRank0Byte3 = 0x45370612; +SDRAM[1].EmcSwizzleRank1ByteCfg = 0x00000087; +SDRAM[1].EmcSwizzleRank1Byte0 = 0x53614207; +SDRAM[1].EmcSwizzleRank1Byte1 = 0x26043715; +SDRAM[1].EmcSwizzleRank1Byte2 = 0x40517236; +SDRAM[1].EmcSwizzleRank1Byte3 = 0x45370612; +SDRAM[1].EmcAddrSwizzleStack1a = 0x0396071a; +SDRAM[1].EmcAddrSwizzleStack1b = 0x000425b8; +SDRAM[1].EmcAddrSwizzleStack2a = 0x07412306; +SDRAM[1].EmcAddrSwizzleStack2b = 0x00000598; +SDRAM[1].EmcAddrSwizzleStack3 = 0x00534012; +SDRAM[1].EmcDsrVttgenDrv = 0x0000003f; +SDRAM[1].EmcTxdsrvttgen = 0x00000000; +SDRAM[1].McEmemAdrCfg = 0x00000000; +SDRAM[1].McEmemAdrCfgDev0 = 0x00080303; +SDRAM[1].McEmemAdrCfgDev1 = 0x00080303; +SDRAM[1].McEmemAdrCfgChannelMask = 0x00000640; +SDRAM[1].McEmemAdrCfgChannelMaskPropagationCount = 0x00000008; +SDRAM[1].McEmemAdrCfgBankMask0 = 0x69248003; +SDRAM[1].McEmemAdrCfgBankMask1 = 0x24928000; +SDRAM[1].McEmemAdrCfgBankMask2 = 0x92c94c00; +SDRAM[1].McEmemCfg = 0x00000800; +SDRAM[1].McEmemArbCfg = 0x0e00000b; +SDRAM[1].McEmemArbOutstandingReq = 0x80000190; +SDRAM[1].McEmemArbTimingRcd = 0x00000004; +SDRAM[1].McEmemArbTimingRp = 0x00000005; +SDRAM[1].McEmemArbTimingRc = 0x00000013; +SDRAM[1].McEmemArbTimingRas = 0x0000000c; +SDRAM[1].McEmemArbTimingFaw = 0x0000000f; +SDRAM[1].McEmemArbTimingRrd = 0x00000002; +SDRAM[1].McEmemArbTimingRap2Pre = 0x00000003; +SDRAM[1].McEmemArbTimingWap2Pre = 0x0000000c; +SDRAM[1].McEmemArbTimingR2R = 0x00000002; +SDRAM[1].McEmemArbTimingW2W = 0x00000002; +SDRAM[1].McEmemArbTimingR2W = 0x00000006; +SDRAM[1].McEmemArbTimingW2R = 0x00000008; +SDRAM[1].McEmemArbDaTurns = 0x08060202; +SDRAM[1].McEmemArbDaCovers = 0x00170e13; +SDRAM[1].McEmemArbMisc0 = 0x734c2414; +SDRAM[1].McEmemArbMisc1 = 0x78000000; +SDRAM[1].McEmemArbRing1Throttle = 0x001f0000; +SDRAM[1].McEmemArbOverride = 0x00000083; +SDRAM[1].McEmemArbRsv = 0xff00ff00; +SDRAM[1].McClkenOverride = 0x00000000; +SDRAM[1].McEmcRegMode = 0x00000002; +SDRAM[1].McVideoProtectBom = 0xfff00000; +SDRAM[1].McVideoProtectSizeMb = 0x00000000; +SDRAM[1].McVideoProtectVprOverride = 0x009a4752; +SDRAM[1].McSecCarveoutBom = 0xfff00000; +SDRAM[1].McSecCarveoutSizeMb = 0x00000000; +SDRAM[1].McVideoProtectWriteAccess = 0x00000000; +SDRAM[1].McSecCarveoutProtectWriteAccess = 0x00000000; +SDRAM[1].EmcCaTrainingEnable = 0x00000000; +SDRAM[1].EmcCaTrainingTimingCntl1 = 0x1f7df7df; +SDRAM[1].EmcCaTrainingTimingCntl2 = 0x0000001f; +SDRAM[1].SwizzleRankByteEncode = 0x000022aa; +SDRAM[1].BootRomPatchControl = 0x00000000; +SDRAM[1].BootRomPatchData = 0x00000000; +SDRAM[1].Ch1EmcDllXformDqs0 = 0x00000008; +SDRAM[1].Ch1EmcDllXformDqs1 = 0x00000008; +SDRAM[1].Ch1EmcDllXformDqs2 = 0x00000008; +SDRAM[1].Ch1EmcDllXformDqs3 = 0x00000008; +SDRAM[1].Ch1EmcDllXformDqs4 = 0x00000008; +SDRAM[1].Ch1EmcDllXformDqs5 = 0x00000008; +SDRAM[1].Ch1EmcDllXformDqs6 = 0x00000008; +SDRAM[1].Ch1EmcDllXformDqs7 = 0x00000008; +SDRAM[1].Ch1EmcDllXformQUse0 = 0x00000000; +SDRAM[1].Ch1EmcDllXformQUse1 = 0x00000000; +SDRAM[1].Ch1EmcDllXformQUse2 = 0x00000000; +SDRAM[1].Ch1EmcDllXformQUse3 = 0x00000000; +SDRAM[1].Ch1EmcDllXformQUse4 = 0x00000000; +SDRAM[1].Ch1EmcDllXformQUse5 = 0x00000000; +SDRAM[1].Ch1EmcDllXformQUse6 = 0x00000000; +SDRAM[1].Ch1EmcDllXformQUse7 = 0x00000000; +SDRAM[1].Ch1EmcDliTrimTxDqs0 = 0x00000000; +SDRAM[1].Ch1EmcDliTrimTxDqs1 = 0x00000000; +SDRAM[1].Ch1EmcDliTrimTxDqs2 = 0x00000000; +SDRAM[1].Ch1EmcDliTrimTxDqs3 = 0x00000000; +SDRAM[1].Ch1EmcDliTrimTxDqs4 = 0x00000000; +SDRAM[1].Ch1EmcDliTrimTxDqs5 = 0x00000000; +SDRAM[1].Ch1EmcDliTrimTxDqs6 = 0x00000000; +SDRAM[1].Ch1EmcDliTrimTxDqs7 = 0x00000000; +SDRAM[1].Ch1EmcDllXformDq0 = 0x007FC00A; +SDRAM[1].Ch1EmcDllXformDq1 = 0x007FC00A; +SDRAM[1].Ch1EmcDllXformDq2 = 0x007FC00A; +SDRAM[1].Ch1EmcDllXformDq3 = 0x007FC00A; +SDRAM[1].Ch1EmcSwizzleRank0ByteCfg = 0x000000d2; +SDRAM[1].Ch1EmcSwizzleRank0Byte0 = 0x51430267; +SDRAM[1].Ch1EmcSwizzleRank0Byte1 = 0x13072465; +SDRAM[1].Ch1EmcSwizzleRank0Byte2 = 0x72605314; +SDRAM[1].Ch1EmcSwizzleRank0Byte3 = 0x54073162; +SDRAM[1].Ch1EmcSwizzleRank1ByteCfg = 0x000000d2; +SDRAM[1].Ch1EmcSwizzleRank1Byte0 = 0x51430267; +SDRAM[1].Ch1EmcSwizzleRank1Byte1 = 0x13072465; +SDRAM[1].Ch1EmcSwizzleRank1Byte2 = 0x72605314; +SDRAM[1].Ch1EmcSwizzleRank1Byte3 = 0x54073162; +SDRAM[1].Ch1EmcAddrSwizzleStack1a = 0x79320a61; +SDRAM[1].Ch1EmcAddrSwizzleStack1b = 0x000b8450; +SDRAM[1].Ch1EmcAddrSwizzleStack2a = 0x07623014; +SDRAM[1].Ch1EmcAddrSwizzleStack2b = 0x00000589; +SDRAM[1].Ch1EmcAddrSwizzleStack3 = 0x00530124; +SDRAM[1].Ch1EmcAutoCalConfig = 0xa8f10f0f; +SDRAM[1].Ch1EmcAutoCalConfig2 = 0x00000000; +SDRAM[1].Ch1EmcAutoCalConfig3 = 0x00000000; +SDRAM[1].Ch1EmcCdbCntl1 = 0x00000000; +SDRAM[1].Ch1EmcDllXformAddr0 = 0x007FC00D; +SDRAM[1].Ch1EmcDllXformAddr1 = 0x007FC00D; +SDRAM[1].Ch1EmcDllXformAddr2 = 0x007FC00D; +SDRAM[1].Ch1EmcFbioSpare = 0x02000000; +SDRAM[1].Ch1EmcXm2ClkPadCtrl = 0x77ffc084; +SDRAM[1].Ch1EmcXm2ClkPadCtrl2 = 0x00000b0b; +SDRAM[1].Ch1EmcXm2CmdPadCtrl2 = 0x770c0000; +SDRAM[1].Ch1EmcXm2CmdPadCtrl3 = 0x050c0000; +SDRAM[1].Ch1EmcXm2CmdPadCtrl4 = 0x00000000; +SDRAM[1].Ch1EmcXm2DqPadCtrl = 0x770c2990; +SDRAM[1].Ch1EmcXm2DqPadCtrl2 = 0x00000000; +SDRAM[1].Ch1EmcXm2DqsPadCtrl = 0x770c1515; +SDRAM[1].Ch1EmcXm2DqsPadCtrl3 = 0x10410400; +SDRAM[1].Ch1EmcXm2DqsPadCtrl4 = 0x00249249; + +SDRAM[2].MemoryType = NvBootMemoryType_Ddr3; +SDRAM[2].PllMInputDivider = 0x00000001; +SDRAM[2].PllMFeedbackDivider = 0x00000042; +SDRAM[2].PllMStableTime = 0x0000012c; +SDRAM[2].PllMSetupControl = 0x00000000; +SDRAM[2].PllMSelectDiv2 = 0x00000000; +SDRAM[2].PllMPDLshiftPh45 = 0x00000000; +SDRAM[2].PllMPDLshiftPh90 = 0x00000000; +SDRAM[2].PllMPDLshiftPh135 = 0x00000000; +SDRAM[2].PllMKCP = 0x00000000; +SDRAM[2].PllMKVCO = 0x00000000; +SDRAM[2].EmcBctSpare0 = 0x00000bad; +SDRAM[2].EmcClockSource = 0x80000000; +SDRAM[2].EmcAutoCalInterval = 0x001fffff; +SDRAM[2].EmcAutoCalConfig = 0xa0f10f0f; +SDRAM[2].EmcAutoCalConfig2 = 0x00000000; +SDRAM[2].EmcAutoCalConfig3 = 0x00000000; +SDRAM[2].EmcAutoCalWait = 0x00000064; +SDRAM[2].EmcAdrCfg = 0x00000000; +SDRAM[2].EmcPinProgramWait = 0x00000001; +SDRAM[2].EmcPinExtraWait = 0x00000000; +SDRAM[2].EmcTimingControlWait = 0x00000001; +SDRAM[2].EmcRc = 0x00000024; +SDRAM[2].EmcRfc = 0x000000cd; +SDRAM[2].EmcRfcSlr = 0x00000000; +SDRAM[2].EmcRas = 0x00000019; +SDRAM[2].EmcRp = 0x0000000a; +SDRAM[2].EmcR2r = 0x00000000; +SDRAM[2].EmcW2w = 0x00000000; +SDRAM[2].EmcR2w = 0x00000009; +SDRAM[2].EmcW2r = 0x0000000d; +SDRAM[2].EmcR2p = 0x00000004; +SDRAM[2].EmcW2p = 0x00000013; +SDRAM[2].EmcRdRcd = 0x0000000a; +SDRAM[2].EmcWrRcd = 0x0000000a; +SDRAM[2].EmcRrd = 0x00000003; +SDRAM[2].EmcRext = 0x00000001; +SDRAM[2].EmcWext = 0x00000000; +SDRAM[2].EmcWdv = 0x00000006; +SDRAM[2].EmcWdvMask = 0x00000006; +SDRAM[2].EmcQUse = 0x0000000b; +SDRAM[2].EmcIbdly = 0x0000000b; +SDRAM[2].EmcEInput = 0x00000008; +SDRAM[2].EmcEInputDuration = 0x00000006; +SDRAM[2].EmcPutermExtra = 0x000d000a; +SDRAM[2].EmcCdbCntl1 = 0x00000000; +SDRAM[2].EmcCdbCntl2 = 0x00000000; +SDRAM[2].EmcQRst = 0x00000008; +SDRAM[2].EmcQSafe = 0x0000000d; +SDRAM[2].EmcRdv = 0x00000014; +SDRAM[2].EmcRdvMask = 0x00000014; +SDRAM[2].EmcCtt = 0x00000000; +SDRAM[2].EmcCttDuration = 0x00000000; +SDRAM[2].EmcRefresh = 0x000017e4; +SDRAM[2].EmcBurstRefreshNum = 0x00000000; +SDRAM[2].EmcPreRefreshReqCnt = 0x000005f9; +SDRAM[2].EmcPdEx2Wr = 0x00000003; +SDRAM[2].EmcPdEx2Rd = 0x00000012; +SDRAM[2].EmcPChg2Pden = 0x00000001; +SDRAM[2].EmcAct2Pden = 0x00000000; +SDRAM[2].EmcAr2Pden = 0x000000c6; +SDRAM[2].EmcRw2Pden = 0x00000018; +SDRAM[2].EmcTxsr = 0x000000d6; +SDRAM[2].EmcTxsrDll = 0x00000200; +SDRAM[2].EmcTcke = 0x00000005; +SDRAM[2].EmcTckesr = 0x00000005; +SDRAM[2].EmcTpd = 0x00000005; +SDRAM[2].EmcTfaw = 0x00000020; +SDRAM[2].EmcTrpab = 0x00000000; +SDRAM[2].EmcTClkStable = 0x00000007; +SDRAM[2].EmcTClkStop = 0x00000008; +SDRAM[2].EmcTRefBw = 0x00001825; +SDRAM[2].EmcQUseExtra = 0x0000000a; +SDRAM[2].EmcFbioCfg5 = 0x0000ba88; +SDRAM[2].EmcFbioCfg6 = 0x00000006; +SDRAM[2].EmcFbioSpare = 0x02000000; +SDRAM[2].EmcCfgRsv = 0xff00ff00; +SDRAM[2].EmcMrs = 0x80000d71; +SDRAM[2].EmcEmrs = 0x80100002; +SDRAM[2].EmcEmrs2 = 0x80200218; +SDRAM[2].EmcEmrs3 = 0x80300000; +SDRAM[2].EmcMrw1 = 0x00000000; +SDRAM[2].EmcMrw2 = 0x00000000; +SDRAM[2].EmcMrw3 = 0x00000000; +SDRAM[2].EmcMrw4 = 0x00000000; +SDRAM[2].EmcMrwExtra = 0x00000000; +SDRAM[2].EmcWarmBootMrwExtra = 0x00000000; +SDRAM[2].EmcWarmBootExtraModeRegWriteEnable = 0x00000000; +SDRAM[2].EmcExtraModeRegWriteEnable = 0x00000000; +SDRAM[2].EmcMrwResetCommand = 0x00000000; +SDRAM[2].EmcMrwResetNInitWait = 0x00000000; +SDRAM[2].EmcMrsWaitCnt = 0x00f8000f; +SDRAM[2].EmcMrsWaitCnt2 = 0x00f8000f; +SDRAM[2].EmcCfg = 0x73000000; +SDRAM[2].EmcCfg2 = 0x008008c1; +SDRAM[2].EmcDbg = 0x01000400; +SDRAM[2].EmcCmdQ = 0x10004408; +SDRAM[2].EmcMc2EmcQ = 0x06000404; +SDRAM[2].EmcDynSelfRefControl = 0x80003018; +SDRAM[2].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; +SDRAM[2].EmcCfgDigDll = 0xf0070191; +SDRAM[2].EmcCfgDigDllPeriod = 0x00008000; +SDRAM[2].EmcDevSelect = 0x00000002; +SDRAM[2].EmcSelDpdCtrl = 0x00040000; +SDRAM[2].EmcDllXformDqs0 = 0x00000008; +SDRAM[2].EmcDllXformDqs1 = 0x00000008; +SDRAM[2].EmcDllXformDqs2 = 0x00000008; +SDRAM[2].EmcDllXformDqs3 = 0x00000008; +SDRAM[2].EmcDllXformDqs4 = 0x00000008; +SDRAM[2].EmcDllXformDqs5 = 0x00000008; +SDRAM[2].EmcDllXformDqs6 = 0x00000008; +SDRAM[2].EmcDllXformDqs7 = 0x00000008; +SDRAM[2].EmcDllXformQUse0 = 0x00000000; +SDRAM[2].EmcDllXformQUse1 = 0x00000000; +SDRAM[2].EmcDllXformQUse2 = 0x00000000; +SDRAM[2].EmcDllXformQUse3 = 0x00000000; +SDRAM[2].EmcDllXformQUse4 = 0x00000000; +SDRAM[2].EmcDllXformQUse5 = 0x00000000; +SDRAM[2].EmcDllXformQUse6 = 0x00000000; +SDRAM[2].EmcDllXformQUse7 = 0x00000000; +SDRAM[2].EmcDllXformAddr0 = 0x007FC00D; +SDRAM[2].EmcDllXformAddr1 = 0x007FC00D; +SDRAM[2].EmcDllXformAddr2 = 0x007FC00D; +SDRAM[2].EmcDliTrimTxDqs0 = 0x00000000; +SDRAM[2].EmcDliTrimTxDqs1 = 0x00000000; +SDRAM[2].EmcDliTrimTxDqs2 = 0x00000000; +SDRAM[2].EmcDliTrimTxDqs3 = 0x00000000; +SDRAM[2].EmcDliTrimTxDqs4 = 0x00000000; +SDRAM[2].EmcDliTrimTxDqs5 = 0x00000000; +SDRAM[2].EmcDliTrimTxDqs6 = 0x00000000; +SDRAM[2].EmcDliTrimTxDqs7 = 0x00000000; +SDRAM[2].EmcDllXformDq0 = 0x007FC00A; +SDRAM[2].EmcDllXformDq1 = 0x007FC00A; +SDRAM[2].EmcDllXformDq2 = 0x007FC00A; +SDRAM[2].EmcDllXformDq3 = 0x007FC00A; +SDRAM[2].WarmBootWait = 0x00000002; +SDRAM[2].EmcCttTermCtrl = 0x00000802; +SDRAM[2].EmcOdtWrite = 0x80000020; +SDRAM[2].EmcOdtRead = 0x00000000; +SDRAM[2].EmcZcalInterval = 0x00020000; +SDRAM[2].EmcZcalWaitCnt = 0x00000042; +SDRAM[2].EmcZcalMrwCmd = 0x80000000; +SDRAM[2].EmcMrsResetDll = 0x00000000; +SDRAM[2].EmcZcalInitDev0 = 0x80000011; +SDRAM[2].EmcZcalInitDev1 = 0x00000000; +SDRAM[2].EmcZcalInitWait = 0x00000001; +SDRAM[2].EmcZcalWarmColdBootEnables = 0x00000003; +SDRAM[2].EmcMrwLpddr2ZcalWarmBoot = 0x000a00ab; +SDRAM[2].EmcZqCalDdr3WarmBoot = 0x00000011; +SDRAM[2].EmcZcalWarmBootWait = 0x00000001; +SDRAM[2].EmcMrsWarmBootEnable = 0x00000001; +SDRAM[2].EmcMrsResetDllWait = 0x00000000; +SDRAM[2].EmcMrsExtra = 0x80000d05; +SDRAM[2].EmcWarmBootMrsExtra = 0x80100002; +SDRAM[2].EmcEmrsDdr2DllEnable = 0x00000000; +SDRAM[2].EmcMrsDdr2DllReset = 0x00000000; +SDRAM[2].EmcEmrsDdr2OcdCalib = 0x00000000; +SDRAM[2].EmcDdr2Wait = 0x00000000; +SDRAM[2].EmcClkenOverride = 0x00000000; +SDRAM[2].EmcExtraRefreshNum = 0x00000002; +SDRAM[2].EmcClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[2].McClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[2].EmcCfgDigDllPeriodWarmBoot = 0x00000003; +SDRAM[2].PmcVddpSel = 0x00000002; +SDRAM[2].PmcDdrPwr = 0x00000003; +SDRAM[2].PmcDdrCfg = 0x00000092; +SDRAM[2].PmcIoDpdReq = 0x80800000; +SDRAM[2].PmcIoDpd2Req = 0x00000000; +SDRAM[2].PmcRegShort = 0x00000000; +SDRAM[2].PmcENoVttGen = 0x00000000; +SDRAM[2].PmcNoIoPower = 0x00000000; +SDRAM[2].EmcXm2CmdPadCtrl = 0x001112a0; +SDRAM[2].EmcXm2CmdPadCtrl2 = 0x770c0000; +SDRAM[2].EmcXm2CmdPadCtrl3 = 0x050c0000; +SDRAM[2].EmcXm2CmdPadCtrl4 = 0x00000000; +SDRAM[2].EmcXm2DqsPadCtrl = 0x770c1414; +SDRAM[2].EmcXm2DqsPadCtrl2 = 0x0000013d; +SDRAM[2].EmcXm2DqsPadCtrl3 = 0x10410400; +SDRAM[2].EmcXm2DqsPadCtrl4 = 0x00249249; +SDRAM[2].EmcXm2DqPadCtrl = 0x770c2990; +SDRAM[2].EmcXm2DqPadCtrl2 = 0x00000000; +SDRAM[2].EmcXm2ClkPadCtrl = 0x77ffc084; +SDRAM[2].EmcXm2ClkPadCtrl2 = 0x00000b0b; +SDRAM[2].EmcXm2CompPadCtrl = 0x81f1f508; +SDRAM[2].EmcXm2VttGenPadCtrl = 0x07076604; +SDRAM[2].EmcXm2VttGenPadCtrl2 = 0x00000000; +SDRAM[2].EmcAcpdControl = 0x00000000; +SDRAM[2].EmcSwizzleRank0ByteCfg = 0x00000087; +SDRAM[2].EmcSwizzleRank0Byte0 = 0x53614207; +SDRAM[2].EmcSwizzleRank0Byte1 = 0x26043715; +SDRAM[2].EmcSwizzleRank0Byte2 = 0x40517236; +SDRAM[2].EmcSwizzleRank0Byte3 = 0x45370612; +SDRAM[2].EmcSwizzleRank1ByteCfg = 0x00000087; +SDRAM[2].EmcSwizzleRank1Byte0 = 0x53614207; +SDRAM[2].EmcSwizzleRank1Byte1 = 0x26043715; +SDRAM[2].EmcSwizzleRank1Byte2 = 0x40517236; +SDRAM[2].EmcSwizzleRank1Byte3 = 0x45370612; +SDRAM[2].EmcAddrSwizzleStack1a = 0x0396071a; +SDRAM[2].EmcAddrSwizzleStack1b = 0x000425b8; +SDRAM[2].EmcAddrSwizzleStack2a = 0x07412306; +SDRAM[2].EmcAddrSwizzleStack2b = 0x00000598; +SDRAM[2].EmcAddrSwizzleStack3 = 0x00534012; +SDRAM[2].EmcDsrVttgenDrv = 0x0000003f; +SDRAM[2].EmcTxdsrvttgen = 0x00000000; +SDRAM[2].McEmemAdrCfg = 0x00000000; +SDRAM[2].McEmemAdrCfgDev0 = 0x00080303; +SDRAM[2].McEmemAdrCfgDev1 = 0x00080303; +SDRAM[2].McEmemAdrCfgChannelMask = 0x00000640; +SDRAM[2].McEmemAdrCfgChannelMaskPropagationCount = 0x00000008; +SDRAM[2].McEmemAdrCfgBankMask0 = 0x69248003; +SDRAM[2].McEmemAdrCfgBankMask1 = 0x24928000; +SDRAM[2].McEmemAdrCfgBankMask2 = 0x92c94c00; +SDRAM[2].McEmemCfg = 0x00000800; +SDRAM[2].McEmemArbCfg = 0x0e00000b; +SDRAM[2].McEmemArbOutstandingReq = 0x80000190; +SDRAM[2].McEmemArbTimingRcd = 0x00000004; +SDRAM[2].McEmemArbTimingRp = 0x00000005; +SDRAM[2].McEmemArbTimingRc = 0x00000013; +SDRAM[2].McEmemArbTimingRas = 0x0000000c; +SDRAM[2].McEmemArbTimingFaw = 0x0000000f; +SDRAM[2].McEmemArbTimingRrd = 0x00000002; +SDRAM[2].McEmemArbTimingRap2Pre = 0x00000003; +SDRAM[2].McEmemArbTimingWap2Pre = 0x0000000c; +SDRAM[2].McEmemArbTimingR2R = 0x00000002; +SDRAM[2].McEmemArbTimingW2W = 0x00000002; +SDRAM[2].McEmemArbTimingR2W = 0x00000006; +SDRAM[2].McEmemArbTimingW2R = 0x00000008; +SDRAM[2].McEmemArbDaTurns = 0x08060202; +SDRAM[2].McEmemArbDaCovers = 0x00170e13; +SDRAM[2].McEmemArbMisc0 = 0x734c2414; +SDRAM[2].McEmemArbMisc1 = 0x78000000; +SDRAM[2].McEmemArbRing1Throttle = 0x001f0000; +SDRAM[2].McEmemArbOverride = 0x00000083; +SDRAM[2].McEmemArbRsv = 0xff00ff00; +SDRAM[2].McClkenOverride = 0x00000000; +SDRAM[2].McEmcRegMode = 0x00000002; +SDRAM[2].McVideoProtectBom = 0xfff00000; +SDRAM[2].McVideoProtectSizeMb = 0x00000000; +SDRAM[2].McVideoProtectVprOverride = 0x009a4752; +SDRAM[2].McSecCarveoutBom = 0xfff00000; +SDRAM[2].McSecCarveoutSizeMb = 0x00000000; +SDRAM[2].McVideoProtectWriteAccess = 0x00000000; +SDRAM[2].McSecCarveoutProtectWriteAccess = 0x00000000; +SDRAM[2].EmcCaTrainingEnable = 0x00000000; +SDRAM[2].EmcCaTrainingTimingCntl1 = 0x1f7df7df; +SDRAM[2].EmcCaTrainingTimingCntl2 = 0x0000001f; +SDRAM[2].SwizzleRankByteEncode = 0x000022aa; +SDRAM[2].BootRomPatchControl = 0x00000000; +SDRAM[2].BootRomPatchData = 0x00000000; +SDRAM[2].Ch1EmcDllXformDqs0 = 0x00000008; +SDRAM[2].Ch1EmcDllXformDqs1 = 0x00000008; +SDRAM[2].Ch1EmcDllXformDqs2 = 0x00000008; +SDRAM[2].Ch1EmcDllXformDqs3 = 0x00000008; +SDRAM[2].Ch1EmcDllXformDqs4 = 0x00000008; +SDRAM[2].Ch1EmcDllXformDqs5 = 0x00000008; +SDRAM[2].Ch1EmcDllXformDqs6 = 0x00000008; +SDRAM[2].Ch1EmcDllXformDqs7 = 0x00000008; +SDRAM[2].Ch1EmcDllXformQUse0 = 0x00000000; +SDRAM[2].Ch1EmcDllXformQUse1 = 0x00000000; +SDRAM[2].Ch1EmcDllXformQUse2 = 0x00000000; +SDRAM[2].Ch1EmcDllXformQUse3 = 0x00000000; +SDRAM[2].Ch1EmcDllXformQUse4 = 0x00000000; +SDRAM[2].Ch1EmcDllXformQUse5 = 0x00000000; +SDRAM[2].Ch1EmcDllXformQUse6 = 0x00000000; +SDRAM[2].Ch1EmcDllXformQUse7 = 0x00000000; +SDRAM[2].Ch1EmcDliTrimTxDqs0 = 0x00000000; +SDRAM[2].Ch1EmcDliTrimTxDqs1 = 0x00000000; +SDRAM[2].Ch1EmcDliTrimTxDqs2 = 0x00000000; +SDRAM[2].Ch1EmcDliTrimTxDqs3 = 0x00000000; +SDRAM[2].Ch1EmcDliTrimTxDqs4 = 0x00000000; +SDRAM[2].Ch1EmcDliTrimTxDqs5 = 0x00000000; +SDRAM[2].Ch1EmcDliTrimTxDqs6 = 0x00000000; +SDRAM[2].Ch1EmcDliTrimTxDqs7 = 0x00000000; +SDRAM[2].Ch1EmcDllXformDq0 = 0x007FC00A; +SDRAM[2].Ch1EmcDllXformDq1 = 0x007FC00A; +SDRAM[2].Ch1EmcDllXformDq2 = 0x007FC00A; +SDRAM[2].Ch1EmcDllXformDq3 = 0x007FC00A; +SDRAM[2].Ch1EmcSwizzleRank0ByteCfg = 0x000000d2; +SDRAM[2].Ch1EmcSwizzleRank0Byte0 = 0x51430267; +SDRAM[2].Ch1EmcSwizzleRank0Byte1 = 0x13072465; +SDRAM[2].Ch1EmcSwizzleRank0Byte2 = 0x72605314; +SDRAM[2].Ch1EmcSwizzleRank0Byte3 = 0x54073162; +SDRAM[2].Ch1EmcSwizzleRank1ByteCfg = 0x000000d2; +SDRAM[2].Ch1EmcSwizzleRank1Byte0 = 0x51430267; +SDRAM[2].Ch1EmcSwizzleRank1Byte1 = 0x13072465; +SDRAM[2].Ch1EmcSwizzleRank1Byte2 = 0x72605314; +SDRAM[2].Ch1EmcSwizzleRank1Byte3 = 0x54073162; +SDRAM[2].Ch1EmcAddrSwizzleStack1a = 0x79320a61; +SDRAM[2].Ch1EmcAddrSwizzleStack1b = 0x000b8450; +SDRAM[2].Ch1EmcAddrSwizzleStack2a = 0x07623014; +SDRAM[2].Ch1EmcAddrSwizzleStack2b = 0x00000589; +SDRAM[2].Ch1EmcAddrSwizzleStack3 = 0x00530124; +SDRAM[2].Ch1EmcAutoCalConfig = 0xa8f10f0f; +SDRAM[2].Ch1EmcAutoCalConfig2 = 0x00000000; +SDRAM[2].Ch1EmcAutoCalConfig3 = 0x00000000; +SDRAM[2].Ch1EmcCdbCntl1 = 0x00000000; +SDRAM[2].Ch1EmcDllXformAddr0 = 0x007FC00D; +SDRAM[2].Ch1EmcDllXformAddr1 = 0x007FC00D; +SDRAM[2].Ch1EmcDllXformAddr2 = 0x007FC00D; +SDRAM[2].Ch1EmcFbioSpare = 0x02000000; +SDRAM[2].Ch1EmcXm2ClkPadCtrl = 0x77ffc084; +SDRAM[2].Ch1EmcXm2ClkPadCtrl2 = 0x00000b0b; +SDRAM[2].Ch1EmcXm2CmdPadCtrl2 = 0x770c0000; +SDRAM[2].Ch1EmcXm2CmdPadCtrl3 = 0x050c0000; +SDRAM[2].Ch1EmcXm2CmdPadCtrl4 = 0x00000000; +SDRAM[2].Ch1EmcXm2DqPadCtrl = 0x770c2990; +SDRAM[2].Ch1EmcXm2DqPadCtrl2 = 0x00000000; +SDRAM[2].Ch1EmcXm2DqsPadCtrl = 0x770c1515; +SDRAM[2].Ch1EmcXm2DqsPadCtrl3 = 0x10410400; +SDRAM[2].Ch1EmcXm2DqsPadCtrl4 = 0x00249249; + +SDRAM[3].MemoryType = NvBootMemoryType_Ddr3; +SDRAM[3].PllMInputDivider = 0x00000001; +SDRAM[3].PllMFeedbackDivider = 0x00000042; +SDRAM[3].PllMStableTime = 0x0000012c; +SDRAM[3].PllMSetupControl = 0x00000000; +SDRAM[3].PllMSelectDiv2 = 0x00000000; +SDRAM[3].PllMPDLshiftPh45 = 0x00000000; +SDRAM[3].PllMPDLshiftPh90 = 0x00000000; +SDRAM[3].PllMPDLshiftPh135 = 0x00000000; +SDRAM[3].PllMKCP = 0x00000000; +SDRAM[3].PllMKVCO = 0x00000000; +SDRAM[3].EmcBctSpare0 = 0x00000bad; +SDRAM[3].EmcClockSource = 0x80000000; +SDRAM[3].EmcAutoCalInterval = 0x001fffff; +SDRAM[3].EmcAutoCalConfig = 0xa0f10f0f; +SDRAM[3].EmcAutoCalConfig2 = 0x00000000; +SDRAM[3].EmcAutoCalConfig3 = 0x00000000; +SDRAM[3].EmcAutoCalWait = 0x00000064; +SDRAM[3].EmcAdrCfg = 0x00000000; +SDRAM[3].EmcPinProgramWait = 0x00000001; +SDRAM[3].EmcPinExtraWait = 0x00000000; +SDRAM[3].EmcTimingControlWait = 0x00000001; +SDRAM[3].EmcRc = 0x00000024; +SDRAM[3].EmcRfc = 0x000000cd; +SDRAM[3].EmcRfcSlr = 0x00000000; +SDRAM[3].EmcRas = 0x00000019; +SDRAM[3].EmcRp = 0x0000000a; +SDRAM[3].EmcR2r = 0x00000000; +SDRAM[3].EmcW2w = 0x00000000; +SDRAM[3].EmcR2w = 0x00000009; +SDRAM[3].EmcW2r = 0x0000000d; +SDRAM[3].EmcR2p = 0x00000004; +SDRAM[3].EmcW2p = 0x00000013; +SDRAM[3].EmcRdRcd = 0x0000000a; +SDRAM[3].EmcWrRcd = 0x0000000a; +SDRAM[3].EmcRrd = 0x00000003; +SDRAM[3].EmcRext = 0x00000001; +SDRAM[3].EmcWext = 0x00000000; +SDRAM[3].EmcWdv = 0x00000006; +SDRAM[3].EmcWdvMask = 0x00000006; +SDRAM[3].EmcQUse = 0x0000000b; +SDRAM[3].EmcIbdly = 0x0000000b; +SDRAM[3].EmcEInput = 0x00000008; +SDRAM[3].EmcEInputDuration = 0x00000006; +SDRAM[3].EmcPutermExtra = 0x000d000a; +SDRAM[3].EmcCdbCntl1 = 0x00000000; +SDRAM[3].EmcCdbCntl2 = 0x00000000; +SDRAM[3].EmcQRst = 0x00000008; +SDRAM[3].EmcQSafe = 0x0000000d; +SDRAM[3].EmcRdv = 0x00000014; +SDRAM[3].EmcRdvMask = 0x00000014; +SDRAM[3].EmcCtt = 0x00000000; +SDRAM[3].EmcCttDuration = 0x00000000; +SDRAM[3].EmcRefresh = 0x000017e4; +SDRAM[3].EmcBurstRefreshNum = 0x00000000; +SDRAM[3].EmcPreRefreshReqCnt = 0x000005f9; +SDRAM[3].EmcPdEx2Wr = 0x00000003; +SDRAM[3].EmcPdEx2Rd = 0x00000012; +SDRAM[3].EmcPChg2Pden = 0x00000001; +SDRAM[3].EmcAct2Pden = 0x00000000; +SDRAM[3].EmcAr2Pden = 0x000000c6; +SDRAM[3].EmcRw2Pden = 0x00000018; +SDRAM[3].EmcTxsr = 0x000000d6; +SDRAM[3].EmcTxsrDll = 0x00000200; +SDRAM[3].EmcTcke = 0x00000005; +SDRAM[3].EmcTckesr = 0x00000005; +SDRAM[3].EmcTpd = 0x00000005; +SDRAM[3].EmcTfaw = 0x00000020; +SDRAM[3].EmcTrpab = 0x00000000; +SDRAM[3].EmcTClkStable = 0x00000007; +SDRAM[3].EmcTClkStop = 0x00000008; +SDRAM[3].EmcTRefBw = 0x00001825; +SDRAM[3].EmcQUseExtra = 0x0000000a; +SDRAM[3].EmcFbioCfg5 = 0x0000ba88; +SDRAM[3].EmcFbioCfg6 = 0x00000006; +SDRAM[3].EmcFbioSpare = 0x02000000; +SDRAM[3].EmcCfgRsv = 0xff00ff00; +SDRAM[3].EmcMrs = 0x80000d71; +SDRAM[3].EmcEmrs = 0x80100002; +SDRAM[3].EmcEmrs2 = 0x80200218; +SDRAM[3].EmcEmrs3 = 0x80300000; +SDRAM[3].EmcMrw1 = 0x00000000; +SDRAM[3].EmcMrw2 = 0x00000000; +SDRAM[3].EmcMrw3 = 0x00000000; +SDRAM[3].EmcMrw4 = 0x00000000; +SDRAM[3].EmcMrwExtra = 0x00000000; +SDRAM[3].EmcWarmBootMrwExtra = 0x00000000; +SDRAM[3].EmcWarmBootExtraModeRegWriteEnable = 0x00000000; +SDRAM[3].EmcExtraModeRegWriteEnable = 0x00000000; +SDRAM[3].EmcMrwResetCommand = 0x00000000; +SDRAM[3].EmcMrwResetNInitWait = 0x00000000; +SDRAM[3].EmcMrsWaitCnt = 0x00f8000f; +SDRAM[3].EmcMrsWaitCnt2 = 0x00f8000f; +SDRAM[3].EmcCfg = 0x73000000; +SDRAM[3].EmcCfg2 = 0x008008c1; +SDRAM[3].EmcDbg = 0x01000400; +SDRAM[3].EmcCmdQ = 0x10004408; +SDRAM[3].EmcMc2EmcQ = 0x06000404; +SDRAM[3].EmcDynSelfRefControl = 0x80003018; +SDRAM[3].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; +SDRAM[3].EmcCfgDigDll = 0xf0070191; +SDRAM[3].EmcCfgDigDllPeriod = 0x00008000; +SDRAM[3].EmcDevSelect = 0x00000002; +SDRAM[3].EmcSelDpdCtrl = 0x00040000; +SDRAM[3].EmcDllXformDqs0 = 0x00000008; +SDRAM[3].EmcDllXformDqs1 = 0x00000008; +SDRAM[3].EmcDllXformDqs2 = 0x00000008; +SDRAM[3].EmcDllXformDqs3 = 0x00000008; +SDRAM[3].EmcDllXformDqs4 = 0x00000008; +SDRAM[3].EmcDllXformDqs5 = 0x00000008; +SDRAM[3].EmcDllXformDqs6 = 0x00000008; +SDRAM[3].EmcDllXformDqs7 = 0x00000008; +SDRAM[3].EmcDllXformQUse0 = 0x00000000; +SDRAM[3].EmcDllXformQUse1 = 0x00000000; +SDRAM[3].EmcDllXformQUse2 = 0x00000000; +SDRAM[3].EmcDllXformQUse3 = 0x00000000; +SDRAM[3].EmcDllXformQUse4 = 0x00000000; +SDRAM[3].EmcDllXformQUse5 = 0x00000000; +SDRAM[3].EmcDllXformQUse6 = 0x00000000; +SDRAM[3].EmcDllXformQUse7 = 0x00000000; +SDRAM[3].EmcDllXformAddr0 = 0x007FC00D; +SDRAM[3].EmcDllXformAddr1 = 0x007FC00D; +SDRAM[3].EmcDllXformAddr2 = 0x007FC00D; +SDRAM[3].EmcDliTrimTxDqs0 = 0x00000000; +SDRAM[3].EmcDliTrimTxDqs1 = 0x00000000; +SDRAM[3].EmcDliTrimTxDqs2 = 0x00000000; +SDRAM[3].EmcDliTrimTxDqs3 = 0x00000000; +SDRAM[3].EmcDliTrimTxDqs4 = 0x00000000; +SDRAM[3].EmcDliTrimTxDqs5 = 0x00000000; +SDRAM[3].EmcDliTrimTxDqs6 = 0x00000000; +SDRAM[3].EmcDliTrimTxDqs7 = 0x00000000; +SDRAM[3].EmcDllXformDq0 = 0x007FC00A; +SDRAM[3].EmcDllXformDq1 = 0x007FC00A; +SDRAM[3].EmcDllXformDq2 = 0x007FC00A; +SDRAM[3].EmcDllXformDq3 = 0x007FC00A; +SDRAM[3].WarmBootWait = 0x00000002; +SDRAM[3].EmcCttTermCtrl = 0x00000802; +SDRAM[3].EmcOdtWrite = 0x80000020; +SDRAM[3].EmcOdtRead = 0x00000000; +SDRAM[3].EmcZcalInterval = 0x00020000; +SDRAM[3].EmcZcalWaitCnt = 0x00000042; +SDRAM[3].EmcZcalMrwCmd = 0x80000000; +SDRAM[3].EmcMrsResetDll = 0x00000000; +SDRAM[3].EmcZcalInitDev0 = 0x80000011; +SDRAM[3].EmcZcalInitDev1 = 0x00000000; +SDRAM[3].EmcZcalInitWait = 0x00000001; +SDRAM[3].EmcZcalWarmColdBootEnables = 0x00000003; +SDRAM[3].EmcMrwLpddr2ZcalWarmBoot = 0x000a00ab; +SDRAM[3].EmcZqCalDdr3WarmBoot = 0x00000011; +SDRAM[3].EmcZcalWarmBootWait = 0x00000001; +SDRAM[3].EmcMrsWarmBootEnable = 0x00000001; +SDRAM[3].EmcMrsResetDllWait = 0x00000000; +SDRAM[3].EmcMrsExtra = 0x80000d05; +SDRAM[3].EmcWarmBootMrsExtra = 0x80100002; +SDRAM[3].EmcEmrsDdr2DllEnable = 0x00000000; +SDRAM[3].EmcMrsDdr2DllReset = 0x00000000; +SDRAM[3].EmcEmrsDdr2OcdCalib = 0x00000000; +SDRAM[3].EmcDdr2Wait = 0x00000000; +SDRAM[3].EmcClkenOverride = 0x00000000; +SDRAM[3].EmcExtraRefreshNum = 0x00000002; +SDRAM[3].EmcClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[3].McClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[3].EmcCfgDigDllPeriodWarmBoot = 0x00000003; +SDRAM[3].PmcVddpSel = 0x00000002; +SDRAM[3].PmcDdrPwr = 0x00000003; +SDRAM[3].PmcDdrCfg = 0x00000092; +SDRAM[3].PmcIoDpdReq = 0x80800000; +SDRAM[3].PmcIoDpd2Req = 0x00000000; +SDRAM[3].PmcRegShort = 0x00000000; +SDRAM[3].PmcENoVttGen = 0x00000000; +SDRAM[3].PmcNoIoPower = 0x00000000; +SDRAM[3].EmcXm2CmdPadCtrl = 0x001112a0; +SDRAM[3].EmcXm2CmdPadCtrl2 = 0x770c0000; +SDRAM[3].EmcXm2CmdPadCtrl3 = 0x050c0000; +SDRAM[3].EmcXm2CmdPadCtrl4 = 0x00000000; +SDRAM[3].EmcXm2DqsPadCtrl = 0x770c1414; +SDRAM[3].EmcXm2DqsPadCtrl2 = 0x0000013d; +SDRAM[3].EmcXm2DqsPadCtrl3 = 0x10410400; +SDRAM[3].EmcXm2DqsPadCtrl4 = 0x00249249; +SDRAM[3].EmcXm2DqPadCtrl = 0x770c2990; +SDRAM[3].EmcXm2DqPadCtrl2 = 0x00000000; +SDRAM[3].EmcXm2ClkPadCtrl = 0x77ffc084; +SDRAM[3].EmcXm2ClkPadCtrl2 = 0x00000b0b; +SDRAM[3].EmcXm2CompPadCtrl = 0x81f1f508; +SDRAM[3].EmcXm2VttGenPadCtrl = 0x07076604; +SDRAM[3].EmcXm2VttGenPadCtrl2 = 0x00000000; +SDRAM[3].EmcAcpdControl = 0x00000000; +SDRAM[3].EmcSwizzleRank0ByteCfg = 0x00000087; +SDRAM[3].EmcSwizzleRank0Byte0 = 0x53614207; +SDRAM[3].EmcSwizzleRank0Byte1 = 0x26043715; +SDRAM[3].EmcSwizzleRank0Byte2 = 0x40517236; +SDRAM[3].EmcSwizzleRank0Byte3 = 0x45370612; +SDRAM[3].EmcSwizzleRank1ByteCfg = 0x00000087; +SDRAM[3].EmcSwizzleRank1Byte0 = 0x53614207; +SDRAM[3].EmcSwizzleRank1Byte1 = 0x26043715; +SDRAM[3].EmcSwizzleRank1Byte2 = 0x40517236; +SDRAM[3].EmcSwizzleRank1Byte3 = 0x45370612; +SDRAM[3].EmcAddrSwizzleStack1a = 0x0396071a; +SDRAM[3].EmcAddrSwizzleStack1b = 0x000425b8; +SDRAM[3].EmcAddrSwizzleStack2a = 0x07412306; +SDRAM[3].EmcAddrSwizzleStack2b = 0x00000598; +SDRAM[3].EmcAddrSwizzleStack3 = 0x00534012; +SDRAM[3].EmcDsrVttgenDrv = 0x0000003f; +SDRAM[3].EmcTxdsrvttgen = 0x00000000; +SDRAM[3].McEmemAdrCfg = 0x00000000; +SDRAM[3].McEmemAdrCfgDev0 = 0x00080303; +SDRAM[3].McEmemAdrCfgDev1 = 0x00080303; +SDRAM[3].McEmemAdrCfgChannelMask = 0x00000640; +SDRAM[3].McEmemAdrCfgChannelMaskPropagationCount = 0x00000008; +SDRAM[3].McEmemAdrCfgBankMask0 = 0x69248003; +SDRAM[3].McEmemAdrCfgBankMask1 = 0x24928000; +SDRAM[3].McEmemAdrCfgBankMask2 = 0x92c94c00; +SDRAM[3].McEmemCfg = 0x00000800; +SDRAM[3].McEmemArbCfg = 0x0e00000b; +SDRAM[3].McEmemArbOutstandingReq = 0x80000190; +SDRAM[3].McEmemArbTimingRcd = 0x00000004; +SDRAM[3].McEmemArbTimingRp = 0x00000005; +SDRAM[3].McEmemArbTimingRc = 0x00000013; +SDRAM[3].McEmemArbTimingRas = 0x0000000c; +SDRAM[3].McEmemArbTimingFaw = 0x0000000f; +SDRAM[3].McEmemArbTimingRrd = 0x00000002; +SDRAM[3].McEmemArbTimingRap2Pre = 0x00000003; +SDRAM[3].McEmemArbTimingWap2Pre = 0x0000000c; +SDRAM[3].McEmemArbTimingR2R = 0x00000002; +SDRAM[3].McEmemArbTimingW2W = 0x00000002; +SDRAM[3].McEmemArbTimingR2W = 0x00000006; +SDRAM[3].McEmemArbTimingW2R = 0x00000008; +SDRAM[3].McEmemArbDaTurns = 0x08060202; +SDRAM[3].McEmemArbDaCovers = 0x00170e13; +SDRAM[3].McEmemArbMisc0 = 0x734c2414; +SDRAM[3].McEmemArbMisc1 = 0x78000000; +SDRAM[3].McEmemArbRing1Throttle = 0x001f0000; +SDRAM[3].McEmemArbOverride = 0x00000083; +SDRAM[3].McEmemArbRsv = 0xff00ff00; +SDRAM[3].McClkenOverride = 0x00000000; +SDRAM[3].McEmcRegMode = 0x00000002; +SDRAM[3].McVideoProtectBom = 0xfff00000; +SDRAM[3].McVideoProtectSizeMb = 0x00000000; +SDRAM[3].McVideoProtectVprOverride = 0x009a4752; +SDRAM[3].McSecCarveoutBom = 0xfff00000; +SDRAM[3].McSecCarveoutSizeMb = 0x00000000; +SDRAM[3].McVideoProtectWriteAccess = 0x00000000; +SDRAM[3].McSecCarveoutProtectWriteAccess = 0x00000000; +SDRAM[3].EmcCaTrainingEnable = 0x00000000; +SDRAM[3].EmcCaTrainingTimingCntl1 = 0x1f7df7df; +SDRAM[3].EmcCaTrainingTimingCntl2 = 0x0000001f; +SDRAM[3].SwizzleRankByteEncode = 0x000022aa; +SDRAM[3].BootRomPatchControl = 0x00000000; +SDRAM[3].BootRomPatchData = 0x00000000; +SDRAM[3].Ch1EmcDllXformDqs0 = 0x00000008; +SDRAM[3].Ch1EmcDllXformDqs1 = 0x00000008; +SDRAM[3].Ch1EmcDllXformDqs2 = 0x00000008; +SDRAM[3].Ch1EmcDllXformDqs3 = 0x00000008; +SDRAM[3].Ch1EmcDllXformDqs4 = 0x00000008; +SDRAM[3].Ch1EmcDllXformDqs5 = 0x00000008; +SDRAM[3].Ch1EmcDllXformDqs6 = 0x00000008; +SDRAM[3].Ch1EmcDllXformDqs7 = 0x00000008; +SDRAM[3].Ch1EmcDllXformQUse0 = 0x00000000; +SDRAM[3].Ch1EmcDllXformQUse1 = 0x00000000; +SDRAM[3].Ch1EmcDllXformQUse2 = 0x00000000; +SDRAM[3].Ch1EmcDllXformQUse3 = 0x00000000; +SDRAM[3].Ch1EmcDllXformQUse4 = 0x00000000; +SDRAM[3].Ch1EmcDllXformQUse5 = 0x00000000; +SDRAM[3].Ch1EmcDllXformQUse6 = 0x00000000; +SDRAM[3].Ch1EmcDllXformQUse7 = 0x00000000; +SDRAM[3].Ch1EmcDliTrimTxDqs0 = 0x00000000; +SDRAM[3].Ch1EmcDliTrimTxDqs1 = 0x00000000; +SDRAM[3].Ch1EmcDliTrimTxDqs2 = 0x00000000; +SDRAM[3].Ch1EmcDliTrimTxDqs3 = 0x00000000; +SDRAM[3].Ch1EmcDliTrimTxDqs4 = 0x00000000; +SDRAM[3].Ch1EmcDliTrimTxDqs5 = 0x00000000; +SDRAM[3].Ch1EmcDliTrimTxDqs6 = 0x00000000; +SDRAM[3].Ch1EmcDliTrimTxDqs7 = 0x00000000; +SDRAM[3].Ch1EmcDllXformDq0 = 0x007FC00A; +SDRAM[3].Ch1EmcDllXformDq1 = 0x007FC00A; +SDRAM[3].Ch1EmcDllXformDq2 = 0x007FC00A; +SDRAM[3].Ch1EmcDllXformDq3 = 0x007FC00A; +SDRAM[3].Ch1EmcSwizzleRank0ByteCfg = 0x000000d2; +SDRAM[3].Ch1EmcSwizzleRank0Byte0 = 0x51430267; +SDRAM[3].Ch1EmcSwizzleRank0Byte1 = 0x13072465; +SDRAM[3].Ch1EmcSwizzleRank0Byte2 = 0x72605314; +SDRAM[3].Ch1EmcSwizzleRank0Byte3 = 0x54073162; +SDRAM[3].Ch1EmcSwizzleRank1ByteCfg = 0x000000d2; +SDRAM[3].Ch1EmcSwizzleRank1Byte0 = 0x51430267; +SDRAM[3].Ch1EmcSwizzleRank1Byte1 = 0x13072465; +SDRAM[3].Ch1EmcSwizzleRank1Byte2 = 0x72605314; +SDRAM[3].Ch1EmcSwizzleRank1Byte3 = 0x54073162; +SDRAM[3].Ch1EmcAddrSwizzleStack1a = 0x79320a61; +SDRAM[3].Ch1EmcAddrSwizzleStack1b = 0x000b8450; +SDRAM[3].Ch1EmcAddrSwizzleStack2a = 0x07623014; +SDRAM[3].Ch1EmcAddrSwizzleStack2b = 0x00000589; +SDRAM[3].Ch1EmcAddrSwizzleStack3 = 0x00530124; +SDRAM[3].Ch1EmcAutoCalConfig = 0xa8f10f0f; +SDRAM[3].Ch1EmcAutoCalConfig2 = 0x00000000; +SDRAM[3].Ch1EmcAutoCalConfig3 = 0x00000000; +SDRAM[3].Ch1EmcCdbCntl1 = 0x00000000; +SDRAM[3].Ch1EmcDllXformAddr0 = 0x007FC00D; +SDRAM[3].Ch1EmcDllXformAddr1 = 0x007FC00D; +SDRAM[3].Ch1EmcDllXformAddr2 = 0x007FC00D; +SDRAM[3].Ch1EmcFbioSpare = 0x02000000; +SDRAM[3].Ch1EmcXm2ClkPadCtrl = 0x77ffc084; +SDRAM[3].Ch1EmcXm2ClkPadCtrl2 = 0x00000b0b; +SDRAM[3].Ch1EmcXm2CmdPadCtrl2 = 0x770c0000; +SDRAM[3].Ch1EmcXm2CmdPadCtrl3 = 0x050c0000; +SDRAM[3].Ch1EmcXm2CmdPadCtrl4 = 0x00000000; +SDRAM[3].Ch1EmcXm2DqPadCtrl = 0x770c2990; +SDRAM[3].Ch1EmcXm2DqPadCtrl2 = 0x00000000; +SDRAM[3].Ch1EmcXm2DqsPadCtrl = 0x770c1515; +SDRAM[3].Ch1EmcXm2DqsPadCtrl3 = 0x10410400; +SDRAM[3].Ch1EmcXm2DqsPadCtrl4 = 0x00249249; diff --git a/tegra114/nvidia/dalmore/README.txt b/tegra114/nvidia/dalmore/README.txt new file mode 100644 index 0000000..b7d8ff8 --- /dev/null +++ b/tegra114/nvidia/dalmore/README.txt @@ -0,0 +1,7 @@ +Three different BCTs exist for Dalmore. To determine which to use, please +determine your SoC SKU (T40X or T40S), and SDRAM frequency (1866MHz, or +1600MHz). + +The image filenames (*.img.cfg) are named based on which SoC SKU and SDRAM +frequency they support. You can look inside these files, at the Bctfile line, +to determine which BCT to use for each configuration. diff --git a/tegra114/nvidia/dalmore/build.sh b/tegra114/nvidia/dalmore/build.sh new file mode 100755 index 0000000..bac5651 --- /dev/null +++ b/tegra114/nvidia/dalmore/build.sh @@ -0,0 +1,37 @@ +#!/bin/sh + +# Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. +# +# This software is provided 'as-is', without any express or implied +# warranty. In no event will the authors be held liable for any damages +# arising from the use of this software. +# +# Permission is granted to anyone to use this software for any purpose, +# including commercial applications, and to alter it and redistribute it +# freely, subject to the following restrictions: +# +# 1. The origin of this software must not be misrepresented; you must not +# claim that you wrote the original software. If you use this software +# in a product, an acknowledgment in the product documentation would be +# appreciated but is not required. +# 2. Altered source versions must be plainly marked as such, and must not be +# misrepresented as being the original software. +# 3. This notice may not be removed or altered from any source distribution. + +set -e +set -x + +cbootimage -t114 -gbct \ + E1611_Hynix_2GB_H5TC4G63AFR-RDA_792MHz_r403_v03.bct.cfg \ + E1611_Hynix_2GB_H5TC4G63AFR-RDA_792MHz_r403_v03.bct +cbootimage -t114 dalmore-t40x-1866.img.cfg dalmore-t40x-1866.img + +cbootimage -t114 -gbct \ + E1611_Hynix_2GB_H5TC4G63AFR-RDA_792Mhz_r403_v2.bct.cfg \ + E1611_Hynix_2GB_H5TC4G63AFR-RDA_792Mhz_r403_v2.bct +cbootimage -t114 dalmore-t40s-1866.img.cfg dalmore-t40s-1866.img + +cbootimage -t114 -gbct \ + E1611_Hynix_2GB_H5TC4G63MFR-PBA_792Mhz_r403_v05.bct.cfg \ + E1611_Hynix_2GB_H5TC4G63MFR-PBA_792Mhz_r403_v05.bct +cbootimage -t114 dalmore-t40s-1600.img.cfg dalmore-t40s-1600.img diff --git a/tegra114/nvidia/dalmore/dalmore-t40s-1600.img.cfg b/tegra114/nvidia/dalmore/dalmore-t40s-1600.img.cfg new file mode 100644 index 0000000..5500798 --- /dev/null +++ b/tegra114/nvidia/dalmore/dalmore-t40s-1600.img.cfg @@ -0,0 +1,22 @@ +# Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. +# +# This software is provided 'as-is', without any express or implied +# warranty. In no event will the authors be held liable for any damages +# arising from the use of this software. +# +# Permission is granted to anyone to use this software for any purpose, +# including commercial applications, and to alter it and redistribute it +# freely, subject to the following restrictions: +# +# 1. The origin of this software must not be misrepresented; you must not +# claim that you wrote the original software. If you use this software +# in a product, an acknowledgment in the product documentation would be +# appreciated but is not required. +# 2. Altered source versions must be plainly marked as such, and must not be +# misrepresented as being the original software. +# 3. This notice may not be removed or altered from any source distribution. + +Version = 0x00350001; +Bctcopy = 1; +Bctfile = E1611_Hynix_2GB_H5TC4G63MFR-PBA_792Mhz_r403_v05.bct; +BootLoader = u-boot.bin,0x80108000,0x80108000,Complete; diff --git a/tegra114/nvidia/dalmore/dalmore-t40s-1866.img.cfg b/tegra114/nvidia/dalmore/dalmore-t40s-1866.img.cfg new file mode 100644 index 0000000..ef5f7ea --- /dev/null +++ b/tegra114/nvidia/dalmore/dalmore-t40s-1866.img.cfg @@ -0,0 +1,22 @@ +# Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. +# +# This software is provided 'as-is', without any express or implied +# warranty. In no event will the authors be held liable for any damages +# arising from the use of this software. +# +# Permission is granted to anyone to use this software for any purpose, +# including commercial applications, and to alter it and redistribute it +# freely, subject to the following restrictions: +# +# 1. The origin of this software must not be misrepresented; you must not +# claim that you wrote the original software. If you use this software +# in a product, an acknowledgment in the product documentation would be +# appreciated but is not required. +# 2. Altered source versions must be plainly marked as such, and must not be +# misrepresented as being the original software. +# 3. This notice may not be removed or altered from any source distribution. + +Version = 0x00350001; +Bctcopy = 1; +Bctfile = E1611_Hynix_2GB_H5TC4G63AFR-RDA_792Mhz_r403_v2.bct; +BootLoader = u-boot.bin,0x80108000,0x80108000,Complete; diff --git a/tegra114/nvidia/dalmore/dalmore-t40x-1866.img.cfg b/tegra114/nvidia/dalmore/dalmore-t40x-1866.img.cfg new file mode 100644 index 0000000..d956fd5 --- /dev/null +++ b/tegra114/nvidia/dalmore/dalmore-t40x-1866.img.cfg @@ -0,0 +1,22 @@ +# Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. +# +# This software is provided 'as-is', without any express or implied +# warranty. In no event will the authors be held liable for any damages +# arising from the use of this software. +# +# Permission is granted to anyone to use this software for any purpose, +# including commercial applications, and to alter it and redistribute it +# freely, subject to the following restrictions: +# +# 1. The origin of this software must not be misrepresented; you must not +# claim that you wrote the original software. If you use this software +# in a product, an acknowledgment in the product documentation would be +# appreciated but is not required. +# 2. Altered source versions must be plainly marked as such, and must not be +# misrepresented as being the original software. +# 3. This notice may not be removed or altered from any source distribution. + +Version = 0x00350001; +Bctcopy = 1; +Bctfile = E1611_Hynix_2GB_H5TC4G63AFR-RDA_792MHz_r403_v03.bct; +BootLoader = u-boot.bin,0x80108000,0x80108000,Complete; diff --git a/tegra20/avionic-design/medcom-wide/build.sh b/tegra20/avionic-design/medcom-wide/build.sh new file mode 100755 index 0000000..9fa70e5 --- /dev/null +++ b/tegra20/avionic-design/medcom-wide/build.sh @@ -0,0 +1,27 @@ +#!/bin/sh + +# Copyright (C) 2013 Avionic Design GmbH +# +# This software is provided 'as-is', without any express or implied +# warranty. In no event will the authors be held liable for any damages +# arising from the use of this software. +# +# Permission is granted to anyone to use this software for any purpose, +# including commercial applications, and to alter it and redistribute it +# freely, subject to the following restrictions: +# +# 1. The origin of this software must not be misrepresented; you must not +# claim that you wrote the original software. If you use this software +# in a product, an acknowledgment in the product documentation would be +# appreciated but is not required. +# 2. Altered source versions must be plainly marked as such, and must not be +# misrepresented as being the original software. +# 3. This notice may not be removed or altered from any source distribution. + +set -e +set -x + +cbootimage -t20 -gbct \ + ../tamonten/Tamonten_T2_512MB_MEM2G16D2D-ABG-25_366MHz.bct.cfg \ + Tamonten_T2_512MB_MEM2G16D2D-ABG-25_366MHz.bct +cbootimage -t20 ../tamonten/tegra20.img.cfg tegra20-medcom-wide.img diff --git a/tegra20/avionic-design/plutux/build.sh b/tegra20/avionic-design/plutux/build.sh new file mode 100755 index 0000000..382e451 --- /dev/null +++ b/tegra20/avionic-design/plutux/build.sh @@ -0,0 +1,27 @@ +#!/bin/sh + +# Copyright (C) 2013 Avionic Design GmbH +# +# This software is provided 'as-is', without any express or implied +# warranty. In no event will the authors be held liable for any damages +# arising from the use of this software. +# +# Permission is granted to anyone to use this software for any purpose, +# including commercial applications, and to alter it and redistribute it +# freely, subject to the following restrictions: +# +# 1. The origin of this software must not be misrepresented; you must not +# claim that you wrote the original software. If you use this software +# in a product, an acknowledgment in the product documentation would be +# appreciated but is not required. +# 2. Altered source versions must be plainly marked as such, and must not be +# misrepresented as being the original software. +# 3. This notice may not be removed or altered from any source distribution. + +set -e +set -x + +cbootimage -t20 -gbct \ + ../tamonten/Tamonten_T2_512MB_MEM2G16D2D-ABG-25_366MHz.bct.cfg \ + Tamonten_T2_512MB_MEM2G16D2D-ABG-25_366MHz.bct +cbootimage -t20 ../tamonten/tegra20.img.cfg tegra20-plutux.img diff --git a/tegra20/avionic-design/tamonten/Tamonten_T2_512MB_MEM2G16D2D-ABG-25_366MHz.bct.cfg b/tegra20/avionic-design/tamonten/Tamonten_T2_512MB_MEM2G16D2D-ABG-25_366MHz.bct.cfg new file mode 100644 index 0000000..16ff9af --- /dev/null +++ b/tegra20/avionic-design/tamonten/Tamonten_T2_512MB_MEM2G16D2D-ABG-25_366MHz.bct.cfg @@ -0,0 +1,132 @@ +# Copyright (C) 2011-2013 Avionic Design GmbH +# +# This software is provided 'as-is', without any express or implied +# warranty. In no event will the authors be held liable for any damages +# arising from the use of this software. +# +# Permission is granted to anyone to use this software for any purpose, +# including commercial applications, and to alter it and redistribute it +# freely, subject to the following restrictions: +# +# 1. The origin of this software must not be misrepresented; you must not +# claim that you wrote the original software. If you use this software +# in a product, an acknowledgment in the product documentation would be +# appreciated but is not required. +# 2. Altered source versions must be plainly marked as such, and must not be +# misrepresented as being the original software. +# 3. This notice may not be removed or altered from any source distribution. + +Version = 0x00020001; +BlockSize = 0x00020000; +PageSize = 0x00000800; +PartitionSize = 0x01000000; +OdmData = 0x2b2d8011; + +DevType[0] = NvBootDevType_Nand; +DeviceParam[0].NandParams.ClockDivider = 0x00000004; +DeviceParam[0].NandParams.NandTiming2 = 0x0000000a; +DeviceParam[0].NandParams.NandTiming = 0x3b269213; +DeviceParam[0].NandParams.BlockSizeLog2 = 0x00000000; +DeviceParam[0].NandParams.PageSizeLog2 = 0x00000000; + +SDRAM[0].MemoryType = NvBootMemoryType_Ddr2; +SDRAM[0].PllMChargePumpSetupControl = 0x00000008; +SDRAM[0].PllMLoopFilterSetupControl = 0x00000000; +SDRAM[0].PllMInputDivider = 0x0000000c; +SDRAM[0].PllMFeedbackDivider = 0x0000029a; +SDRAM[0].PllMPostDivider = 0x00000000; +SDRAM[0].PllMStableTime = 0x0000012c; +SDRAM[0].EmcClockDivider = 0x00000001; +SDRAM[0].EmcAutoCalInterval = 0x00000000; +SDRAM[0].EmcAutoCalConfig = 0xe0a61111; +SDRAM[0].EmcAutoCalWait = 0x00000000; +SDRAM[0].EmcPinProgramWait = 0x00000000; +SDRAM[0].EmcRc = 0x00000014; +SDRAM[0].EmcRfc = 0x00000041; +SDRAM[0].EmcRas = 0x0000000f; +SDRAM[0].EmcRp = 0x00000005; +SDRAM[0].EmcR2w = 0x00000004; +SDRAM[0].EmcW2r = 0x00000005; +SDRAM[0].EmcR2p = 0x00000003; +SDRAM[0].EmcW2p = 0x0000000b; +SDRAM[0].EmcRrd = 0x00000004; +SDRAM[0].EmcRdRcd = 0x00000005; +SDRAM[0].EmcWrRcd = 0x00000005; +SDRAM[0].EmcRext = 0x00000001; +SDRAM[0].EmcWdv = 0x00000003; +SDRAM[0].EmcQUseExtra = 0x00000000; +SDRAM[0].EmcQUse = 0x00000004; +SDRAM[0].EmcQRst = 0x00000003; +SDRAM[0].EmcQSafe = 0x00000009; +SDRAM[0].EmcRdv = 0x0000000c; +SDRAM[0].EmcRefresh = 0x000004df; +SDRAM[0].EmcBurstRefreshNum = 0x00000000; +SDRAM[0].EmcPdEx2Wr = 0x00000003; +SDRAM[0].EmcPdEx2Rd = 0x00000003; +SDRAM[0].EmcPChg2Pden = 0x00000005; +SDRAM[0].EmcAct2Pden = 0x00000005; +SDRAM[0].EmcAr2Pden = 0x00000001; +SDRAM[0].EmcRw2Pden = 0x0000000e; +SDRAM[0].EmcTxsr = 0x000000c8; +SDRAM[0].EmcTcke = 0x00000003; +SDRAM[0].EmcTfaw = 0x0000000f; +SDRAM[0].EmcTrpab = 0x00000006; +SDRAM[0].EmcTClkStable = 0x0000000f; +SDRAM[0].EmcTClkStop = 0x00000002; +SDRAM[0].EmcTRefBw = 0x00000000; +SDRAM[0].EmcFbioCfg1 = 0x00000000; +SDRAM[0].EmcFbioDqsibDlyMsb = 0x00000000; +SDRAM[0].EmcFbioDqsibDly = 0x2f2f2f2f; +SDRAM[0].EmcFbioQuseDlyMsb = 0x00000000; +SDRAM[0].EmcFbioQuseDly = 0x2f2f2f2f; +SDRAM[0].EmcFbioCfg5 = 0x00000083; +SDRAM[0].EmcFbioCfg6 = 0x00000002; +SDRAM[0].EmcFbioSpare = 0x00000000; +SDRAM[0].EmcMrsResetDllWait = 0x00000000; +SDRAM[0].EmcMrsResetDll = 0x00000000; +SDRAM[0].EmcMrsDdr2DllReset = 0x00000100; +SDRAM[0].EmcMrs = 0x00000a5a; +SDRAM[0].EmcEmrsEmr2 = 0x00200000; +SDRAM[0].EmcEmrsEmr3 = 0x00300000; +SDRAM[0].EmcEmrsDdr2DllEnable = 0x00100000; +SDRAM[0].EmcEmrsDdr2OcdCalib = 0x00100382; +SDRAM[0].EmcEmrs = 0x00100002; +SDRAM[0].EmcMrw1 = 0x00000000; +SDRAM[0].EmcMrw2 = 0x00000000; +SDRAM[0].EmcMrw3 = 0x00000000; +SDRAM[0].EmcMrwResetCommand = 0x00000000; +SDRAM[0].EmcMrwResetNInitWait = 0x00000000; +SDRAM[0].EmcAdrCfg1 = 0x00070303; +SDRAM[0].EmcAdrCfg = 0x00070303; +SDRAM[0].McEmemCfg = 0x00080000; +SDRAM[0].McLowLatencyConfig = 0x80000003; +SDRAM[0].EmcCfg2 = 0x00000405; +SDRAM[0].EmcCfgDigDll = 0x00380006; +SDRAM[0].EmcCfgClktrim0 = 0x00000000; +SDRAM[0].EmcCfgClktrim1 = 0x00000000; +SDRAM[0].EmcCfgClktrim2 = 0x00000000; +SDRAM[0].EmcCfg = 0x0001ff00; +SDRAM[0].EmcDbg = 0x01000000; +SDRAM[0].AhbArbitrationXbarCtrl = 0x00010000; +SDRAM[0].EmcDllXformDqs = 0x00000010; +SDRAM[0].EmcDllXformQUse = 0x00000008; +SDRAM[0].WarmBootWait = 0x00000002; +SDRAM[0].EmcCttTermCtrl = 0x00000802; +SDRAM[0].EmcOdtWrite = 0x00000000; +SDRAM[0].EmcOdtRead = 0x00000000; +SDRAM[0].EmcZcalRefCnt = 0x00000000; +SDRAM[0].EmcZcalWaitCnt = 0x00000000; +SDRAM[0].EmcZcalMrwCmd = 0x00000000; +SDRAM[0].EmcMrwZqInitDev0 = 0x00000000; +SDRAM[0].EmcMrwZqInitDev1 = 0x00000000; +SDRAM[0].EmcMrwZqInitWait = 0x00000000; +SDRAM[0].EmcDdr2Wait = 0x00000002; +SDRAM[0].PmcDdrPwr = 0x00000001; +SDRAM[0].ApbMiscGpXm2CfgAPadCtrl = 0x77ffc000; +SDRAM[0].ApbMiscGpXm2CfgCPadCtrl2 = 0x08080079; +SDRAM[0].ApbMiscGpXm2CfgCPadCtrl = 0x77fffff0; +SDRAM[0].ApbMiscGpXm2CfgDPadCtrl2 = 0x44440009; +SDRAM[0].ApbMiscGpXm2CfgDPadCtrl = 0x77fffff0; +SDRAM[0].ApbMiscGpXm2ClkCfgPadCtrl = 0x77ffc000; +SDRAM[0].ApbMiscGpXm2CompPadCtrl = 0x01f1f008; +SDRAM[0].ApbMiscGpXm2VttGenPadCtrl = 0x07076600; diff --git a/tegra20/avionic-design/tamonten/tegra20.img.cfg b/tegra20/avionic-design/tamonten/tegra20.img.cfg new file mode 100644 index 0000000..f37614d --- /dev/null +++ b/tegra20/avionic-design/tamonten/tegra20.img.cfg @@ -0,0 +1,22 @@ +# Copyright (C) 2013 Avionic Design GmbH +# +# This software is provided 'as-is', without any express or implied +# warranty. In no event will the authors be held liable for any damages +# arising from the use of this software. +# +# Permission is granted to anyone to use this software for any purpose, +# including commercial applications, and to alter it and redistribute it +# freely, subject to the following restrictions: +# +# 1. The origin of this software must not be misrepresented; you must not +# claim that you wrote the original software. If you use this software +# in a product, an acknowledgment in the product documentation would be +# appreciated but is not required. +# 2. Altered source versions must be plainly marked as such, and must not be +# misrepresented as being the original software. +# 3. This notice may not be removed or altered from any source distribution. + +Version = 0x00020001; +Bctcopy = 1; +Bctfile = Tamonten_T2_512MB_MEM2G16D2D-ABG-25_366MHz.bct; +BootLoader = u-boot.bin,0x00108000,0x00108000,Complete; diff --git a/tegra20/avionic-design/tec/build.sh b/tegra20/avionic-design/tec/build.sh new file mode 100755 index 0000000..2a49fdd --- /dev/null +++ b/tegra20/avionic-design/tec/build.sh @@ -0,0 +1,27 @@ +#!/bin/sh + +# Copyright (C) 2013 Avionic Design GmbH +# +# This software is provided 'as-is', without any express or implied +# warranty. In no event will the authors be held liable for any damages +# arising from the use of this software. +# +# Permission is granted to anyone to use this software for any purpose, +# including commercial applications, and to alter it and redistribute it +# freely, subject to the following restrictions: +# +# 1. The origin of this software must not be misrepresented; you must not +# claim that you wrote the original software. If you use this software +# in a product, an acknowledgment in the product documentation would be +# appreciated but is not required. +# 2. Altered source versions must be plainly marked as such, and must not be +# misrepresented as being the original software. +# 3. This notice may not be removed or altered from any source distribution. + +set -e +set -x + +cbootimage -t20 -gbct \ + ../tamonten/Tamonten_T2_512MB_MEM2G16D2D-ABG-25_366MHz.bct.cfg \ + Tamonten_T2_512MB_MEM2G16D2D-ABG-25_366MHz.bct +cbootimage -t20 ../tamonten/tegra20.img.cfg tegra20-tec.img diff --git a/tegra20/compulab/trimslice/README.txt b/tegra20/compulab/trimslice/README.txt new file mode 100644 index 0000000..6d9facd --- /dev/null +++ b/tegra20/compulab/trimslice/README.txt @@ -0,0 +1,25 @@ +The TrimSlice board is designed and sold by CompuLab, and is not an NVIDIA +reference board. The configuration files here are graciously provided by +CompuLab and relicensed with their permission for inclusion in this +repository. + +The files in this directory were derived from CompuLab's repository, +available at: + +git://gitorious.org/cbootimage/cbootimage-scripts.git + +The following repository also contains similar content: + +git://gitorious.org/cbootimage/cbootimage.git (branch trimslice) + +Changes made relative to cbootimage-scripts.git were: +* Merged separate DDR and MMC, or DDR and SPI, config files into combined + files to simplify their usage, and added header variables such as Version, + BlockSize, etc. +* Created image-generation config files. +* Added OdmData, based on Compulab's U-Boot code, with debug UART value fixed + to be UART A not UART D. +* Switched U-Boot load/entry address from 0x00e08000 to 0x00108000 to match + upstream U-Boot. +* Set PreBctPadBlocks and Bctcopy for MMC, to match the recovery images + provided by Compulab. diff --git a/tegra20/compulab/trimslice/build.sh b/tegra20/compulab/trimslice/build.sh new file mode 100755 index 0000000..9b730c6 --- /dev/null +++ b/tegra20/compulab/trimslice/build.sh @@ -0,0 +1,28 @@ +#!/bin/sh + +# Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. +# +# This software is provided 'as-is', without any express or implied +# warranty. In no event will the authors be held liable for any damages +# arising from the use of this software. +# +# Permission is granted to anyone to use this software for any purpose, +# including commercial applications, and to alter it and redistribute it +# freely, subject to the following restrictions: +# +# 1. The origin of this software must not be misrepresented; you must not +# claim that you wrote the original software. If you use this software +# in a product, an acknowledgment in the product documentation would be +# appreciated but is not required. +# 2. Altered source versions must be plainly marked as such, and must not be +# misrepresented as being the original software. +# 3. This notice may not be removed or altered from any source distribution. + +set -e +set -x + +cbootimage -gbct trimslice-mmc.bct.cfg trimslice-mmc.bct +cbootimage trimslice-mmc.img.cfg trimslice-mmc.img + +cbootimage -gbct trimslice-spi.bct.cfg trimslice-spi.bct +cbootimage trimslice-spi.img.cfg trimslice-spi.img diff --git a/tegra20/compulab/trimslice/trimslice-mmc.bct.cfg b/tegra20/compulab/trimslice/trimslice-mmc.bct.cfg new file mode 100644 index 0000000..7926aa0 --- /dev/null +++ b/tegra20/compulab/trimslice/trimslice-mmc.bct.cfg @@ -0,0 +1,149 @@ +# Copyright (c) 2013, CompuLab Ltd. All rights reserved. +# +# Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. +# See README.txt for a description of NVIDIA's changes relative to CompuLab's +# original. +# +# This software is provided 'as-is', without any express or implied +# warranty. In no event will the authors be held liable for any damages +# arising from the use of this software. +# +# Permission is granted to anyone to use this software for any purpose, +# including commercial applications, and to alter it and redistribute it +# freely, subject to the following restrictions: +# +# 1. The origin of this software must not be misrepresented; you must not +# claim that you wrote the original software. If you use this software +# in a product, an acknowledgment in the product documentation would be +# appreciated but is not required. +# 2. Altered source versions must be plainly marked as such, and must not be +# misrepresented as being the original software. +# 3. This notice may not be removed or altered from any source distribution. + +Version = 0x00020001; +BlockSize = 0x00004000; +PageSize = 0x00000200; +PartitionSize = 0x01000000; +OdmData = 0x300c0000; + +DevType[0] = NvBootDevType_Sdmmc; +DeviceParam[0].SdmmcParams.ClockDivider = 0x0000000c; +DeviceParam[0].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_4Bit; +DeviceParam[0].SdmmcParams.MaxPowerClassSupported = 0x00000000; + +DevType[1] = NvBootDevType_Sdmmc; +DeviceParam[1].SdmmcParams.ClockDivider = 0x0000000c; +DeviceParam[1].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_4Bit; +DeviceParam[1].SdmmcParams.MaxPowerClassSupported = 0x00000000; + +DevType[2] = NvBootDevType_Sdmmc; +DeviceParam[2].SdmmcParams.ClockDivider = 0x0000000c; +DeviceParam[2].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_4Bit; +DeviceParam[2].SdmmcParams.MaxPowerClassSupported = 0x00000000; + +DevType[3] = NvBootDevType_Sdmmc; +DeviceParam[3].SdmmcParams.ClockDivider = 0x0000000c; +DeviceParam[3].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_4Bit; +DeviceParam[3].SdmmcParams.MaxPowerClassSupported = 0x00000000; + +SDRAM[0].MemoryType = NvBootMemoryType_Ddr2; +SDRAM[0].PllMChargePumpSetupControl = 0x00000008; +SDRAM[0].PllMLoopFilterSetupControl = 0x00000000; +SDRAM[0].PllMInputDivider = 0x0000000c; +SDRAM[0].PllMFeedbackDivider = 0x0000029a; +SDRAM[0].PllMPostDivider = 0x00000000; +SDRAM[0].PllMStableTime = 0x0000012c; +SDRAM[0].EmcClockDivider = 0x00000001; +SDRAM[0].EmcAutoCalInterval = 0x00000000; +SDRAM[0].EmcAutoCalConfig = 0xe0a61818; +SDRAM[0].EmcAutoCalWait = 0x00000000; +SDRAM[0].EmcPinProgramWait = 0x00000000; +SDRAM[0].EmcRc = 0x00000014; +SDRAM[0].EmcRfc = 0x0000002b; +SDRAM[0].EmcRas = 0x0000000f; +SDRAM[0].EmcRp = 0x00000005; +SDRAM[0].EmcR2w = 0x00000004; +SDRAM[0].EmcW2r = 0x00000005; +SDRAM[0].EmcR2p = 0x00000003; +SDRAM[0].EmcW2p = 0x0000000c; +SDRAM[0].EmcRrd = 0x00000003; +SDRAM[0].EmcRdRcd = 0x00000005; +SDRAM[0].EmcWrRcd = 0x00000005; +SDRAM[0].EmcRext = 0x00000001; +SDRAM[0].EmcWdv = 0x00000004; +SDRAM[0].EmcQUseExtra = 0x00000000; +SDRAM[0].EmcQUse = 0x00000005; +SDRAM[0].EmcQRst = 0x00000004; +SDRAM[0].EmcQSafe = 0x00000009; +SDRAM[0].EmcRdv = 0x0000000d; +SDRAM[0].EmcRefresh = 0x000009ff; +SDRAM[0].EmcBurstRefreshNum = 0x00000000; +SDRAM[0].EmcPdEx2Wr = 0x00000003; +SDRAM[0].EmcPdEx2Rd = 0x00000003; +SDRAM[0].EmcPChg2Pden = 0x00000005; +SDRAM[0].EmcAct2Pden = 0x00000005; +SDRAM[0].EmcAr2Pden = 0x00000001; +SDRAM[0].EmcRw2Pden = 0x0000000f; +SDRAM[0].EmcTxsr = 0x000000c8; +SDRAM[0].EmcTcke = 0x00000003; +SDRAM[0].EmcTfaw = 0x0000000c; +SDRAM[0].EmcTrpab = 0x00000006; +SDRAM[0].EmcTClkStable = 0x00000008; +SDRAM[0].EmcTClkStop = 0x00000002; +SDRAM[0].EmcTRefBw = 0x00000000; +SDRAM[0].EmcFbioCfg1 = 0x00000000; +SDRAM[0].EmcFbioDqsibDlyMsb = 0x00000000; +SDRAM[0].EmcFbioDqsibDly = 0x1c1c2020; +SDRAM[0].EmcFbioQuseDlyMsb = 0x00000000; +SDRAM[0].EmcFbioQuseDly = 0x5a504646; +SDRAM[0].EmcFbioCfg5 = 0x00000083; +SDRAM[0].EmcFbioCfg6 = 0x00000002; +SDRAM[0].EmcFbioSpare = 0x00000000; +SDRAM[0].EmcMrsResetDllWait = 0x00000000; +SDRAM[0].EmcMrsResetDll = 0x00000000; +SDRAM[0].EmcMrsDdr2DllReset = 0x00000100; +SDRAM[0].EmcMrs = 0x00000a6a; +SDRAM[0].EmcEmrsEmr2 = 0x00200000; +SDRAM[0].EmcEmrsEmr3 = 0x00300000; +SDRAM[0].EmcEmrsDdr2DllEnable = 0x00100000; +SDRAM[0].EmcEmrsDdr2OcdCalib = 0x00100384; +SDRAM[0].EmcEmrs = 0x00100004; +SDRAM[0].EmcMrw1 = 0x00000000; +SDRAM[0].EmcMrw2 = 0x00000000; +SDRAM[0].EmcMrw3 = 0x00000000; +SDRAM[0].EmcMrwResetCommand = 0x00000000; +SDRAM[0].EmcMrwResetNInitWait = 0x00000000; +SDRAM[0].EmcAdrCfg1 = 0x00070303; +SDRAM[0].EmcAdrCfg = 0x01070303; +SDRAM[0].McEmemCfg = 0x00100000; +SDRAM[0].McLowLatencyConfig = 0x80000003; +SDRAM[0].EmcCfg2 = 0x00000405; +SDRAM[0].EmcCfgDigDll = 0xf0000313; +SDRAM[0].EmcCfgClktrim0 = 0x00000000; +SDRAM[0].EmcCfgClktrim1 = 0x00000000; +SDRAM[0].EmcCfgClktrim2 = 0x00000000; +SDRAM[0].EmcCfg = 0x2001ff01; +SDRAM[0].EmcDbg = 0x01000000; +SDRAM[0].AhbArbitrationXbarCtrl = 0x00010000; +SDRAM[0].EmcDllXformDqs = 0x00000010; +SDRAM[0].EmcDllXformQUse = 0x00000008; +SDRAM[0].WarmBootWait = 0x00000002; +SDRAM[0].EmcCttTermCtrl = 0x00000802; +SDRAM[0].EmcOdtWrite = 0x00000000; +SDRAM[0].EmcOdtRead = 0x00000000; +SDRAM[0].EmcZcalRefCnt = 0x00000000; +SDRAM[0].EmcZcalWaitCnt = 0x00000000; +SDRAM[0].EmcZcalMrwCmd = 0x00000000; +SDRAM[0].EmcMrwZqInitDev0 = 0x00000000; +SDRAM[0].EmcMrwZqInitDev1 = 0x00000000; +SDRAM[0].EmcMrwZqInitWait = 0x00000000; +SDRAM[0].EmcDdr2Wait = 0x00000002; +SDRAM[0].PmcDdrPwr = 0x00000001; +SDRAM[0].ApbMiscGpXm2CfgAPadCtrl = 0x77ffc000; +SDRAM[0].ApbMiscGpXm2CfgCPadCtrl2 = 0x08080079; +SDRAM[0].ApbMiscGpXm2CfgCPadCtrl = 0x77fffff0; +SDRAM[0].ApbMiscGpXm2CfgDPadCtrl2 = 0x44440009; +SDRAM[0].ApbMiscGpXm2CfgDPadCtrl = 0x77fffff0; +SDRAM[0].ApbMiscGpXm2ClkCfgPadCtrl = 0x77ffc000; +SDRAM[0].ApbMiscGpXm2CompPadCtrl = 0x01f1f008; +SDRAM[0].ApbMiscGpXm2VttGenPadCtrl = 0x07076600; diff --git a/tegra20/compulab/trimslice/trimslice-mmc.img.cfg b/tegra20/compulab/trimslice/trimslice-mmc.img.cfg new file mode 100644 index 0000000..95c4bdf --- /dev/null +++ b/tegra20/compulab/trimslice/trimslice-mmc.img.cfg @@ -0,0 +1,23 @@ +# Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. +# +# This software is provided 'as-is', without any express or implied +# warranty. In no event will the authors be held liable for any damages +# arising from the use of this software. +# +# Permission is granted to anyone to use this software for any purpose, +# including commercial applications, and to alter it and redistribute it +# freely, subject to the following restrictions: +# +# 1. The origin of this software must not be misrepresented; you must not +# claim that you wrote the original software. If you use this software +# in a product, an acknowledgment in the product documentation would be +# appreciated but is not required. +# 2. Altered source versions must be plainly marked as such, and must not be +# misrepresented as being the original software. +# 3. This notice may not be removed or altered from any source distribution. + +Version = 0x00020001; +PreBctPadBlocks = 8; +Bctcopy = 1; +Bctfile = trimslice-mmc.bct; +BootLoader = u-boot.bin,0x00108000,0x00108000,Complete; diff --git a/tegra20/compulab/trimslice/trimslice-spi.bct.cfg b/tegra20/compulab/trimslice/trimslice-spi.bct.cfg new file mode 100644 index 0000000..955100c --- /dev/null +++ b/tegra20/compulab/trimslice/trimslice-spi.bct.cfg @@ -0,0 +1,134 @@ +# Copyright (c) 2012, CompuLab Ltd. All rights reserved. +# +# Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. +# See README.txt for a description of NVIDIA's changes relative to CompuLab's +# original. +# +# This software is provided 'as-is', without any express or implied +# warranty. In no event will the authors be held liable for any damages +# arising from the use of this software. +# +# Permission is granted to anyone to use this software for any purpose, +# including commercial applications, and to alter it and redistribute it +# freely, subject to the following restrictions: +# +# 1. The origin of this software must not be misrepresented; you must not +# claim that you wrote the original software. If you use this software +# in a product, an acknowledgment in the product documentation would be +# appreciated but is not required. +# 2. Altered source versions must be plainly marked as such, and must not be +# misrepresented as being the original software. +# 3. This notice may not be removed or altered from any source distribution. + +Version = 0x00020001; +BlockSize = 0x00008000; +PageSize = 0x00000800; +PartitionSize = 0x01000000; +OdmData = 0x300c0000; + +DevType[0] = NvBootDevType_Spi; +DeviceParam[0].SpiFlashParams.ReadCommandTypeFast = 0; +DeviceParam[0].SpiFlashParams.ClockDivider = 12; +DeviceParam[0].SpiFlashParams.ClockSource = NvBootSpiClockSource_PllPOut0; + +SDRAM[0].MemoryType = NvBootMemoryType_Ddr2; +SDRAM[0].PllMChargePumpSetupControl = 0x00000008; +SDRAM[0].PllMLoopFilterSetupControl = 0x00000000; +SDRAM[0].PllMInputDivider = 0x0000000c; +SDRAM[0].PllMFeedbackDivider = 0x0000029a; +SDRAM[0].PllMPostDivider = 0x00000000; +SDRAM[0].PllMStableTime = 0x0000012c; +SDRAM[0].EmcClockDivider = 0x00000001; +SDRAM[0].EmcAutoCalInterval = 0x00000000; +SDRAM[0].EmcAutoCalConfig = 0xe0a61818; +SDRAM[0].EmcAutoCalWait = 0x00000000; +SDRAM[0].EmcPinProgramWait = 0x00000000; +SDRAM[0].EmcRc = 0x00000014; +SDRAM[0].EmcRfc = 0x0000002b; +SDRAM[0].EmcRas = 0x0000000f; +SDRAM[0].EmcRp = 0x00000005; +SDRAM[0].EmcR2w = 0x00000004; +SDRAM[0].EmcW2r = 0x00000005; +SDRAM[0].EmcR2p = 0x00000003; +SDRAM[0].EmcW2p = 0x0000000c; +SDRAM[0].EmcRrd = 0x00000003; +SDRAM[0].EmcRdRcd = 0x00000005; +SDRAM[0].EmcWrRcd = 0x00000005; +SDRAM[0].EmcRext = 0x00000001; +SDRAM[0].EmcWdv = 0x00000004; +SDRAM[0].EmcQUseExtra = 0x00000000; +SDRAM[0].EmcQUse = 0x00000005; +SDRAM[0].EmcQRst = 0x00000004; +SDRAM[0].EmcQSafe = 0x00000009; +SDRAM[0].EmcRdv = 0x0000000d; +SDRAM[0].EmcRefresh = 0x000009ff; +SDRAM[0].EmcBurstRefreshNum = 0x00000000; +SDRAM[0].EmcPdEx2Wr = 0x00000003; +SDRAM[0].EmcPdEx2Rd = 0x00000003; +SDRAM[0].EmcPChg2Pden = 0x00000005; +SDRAM[0].EmcAct2Pden = 0x00000005; +SDRAM[0].EmcAr2Pden = 0x00000001; +SDRAM[0].EmcRw2Pden = 0x0000000f; +SDRAM[0].EmcTxsr = 0x000000c8; +SDRAM[0].EmcTcke = 0x00000003; +SDRAM[0].EmcTfaw = 0x0000000c; +SDRAM[0].EmcTrpab = 0x00000006; +SDRAM[0].EmcTClkStable = 0x00000008; +SDRAM[0].EmcTClkStop = 0x00000002; +SDRAM[0].EmcTRefBw = 0x00000000; +SDRAM[0].EmcFbioCfg1 = 0x00000000; +SDRAM[0].EmcFbioDqsibDlyMsb = 0x00000000; +SDRAM[0].EmcFbioDqsibDly = 0x1c1c2020; +SDRAM[0].EmcFbioQuseDlyMsb = 0x00000000; +SDRAM[0].EmcFbioQuseDly = 0x5a504646; +SDRAM[0].EmcFbioCfg5 = 0x00000083; +SDRAM[0].EmcFbioCfg6 = 0x00000002; +SDRAM[0].EmcFbioSpare = 0x00000000; +SDRAM[0].EmcMrsResetDllWait = 0x00000000; +SDRAM[0].EmcMrsResetDll = 0x00000000; +SDRAM[0].EmcMrsDdr2DllReset = 0x00000100; +SDRAM[0].EmcMrs = 0x00000a6a; +SDRAM[0].EmcEmrsEmr2 = 0x00200000; +SDRAM[0].EmcEmrsEmr3 = 0x00300000; +SDRAM[0].EmcEmrsDdr2DllEnable = 0x00100000; +SDRAM[0].EmcEmrsDdr2OcdCalib = 0x00100384; +SDRAM[0].EmcEmrs = 0x00100004; +SDRAM[0].EmcMrw1 = 0x00000000; +SDRAM[0].EmcMrw2 = 0x00000000; +SDRAM[0].EmcMrw3 = 0x00000000; +SDRAM[0].EmcMrwResetCommand = 0x00000000; +SDRAM[0].EmcMrwResetNInitWait = 0x00000000; +SDRAM[0].EmcAdrCfg1 = 0x00070303; +SDRAM[0].EmcAdrCfg = 0x01070303; +SDRAM[0].McEmemCfg = 0x00100000; +SDRAM[0].McLowLatencyConfig = 0x80000003; +SDRAM[0].EmcCfg2 = 0x00000405; +SDRAM[0].EmcCfgDigDll = 0xf0000313; +SDRAM[0].EmcCfgClktrim0 = 0x00000000; +SDRAM[0].EmcCfgClktrim1 = 0x00000000; +SDRAM[0].EmcCfgClktrim2 = 0x00000000; +SDRAM[0].EmcCfg = 0x2001ff01; +SDRAM[0].EmcDbg = 0x01000000; +SDRAM[0].AhbArbitrationXbarCtrl = 0x00010000; +SDRAM[0].EmcDllXformDqs = 0x00000010; +SDRAM[0].EmcDllXformQUse = 0x00000008; +SDRAM[0].WarmBootWait = 0x00000002; +SDRAM[0].EmcCttTermCtrl = 0x00000802; +SDRAM[0].EmcOdtWrite = 0x00000000; +SDRAM[0].EmcOdtRead = 0x00000000; +SDRAM[0].EmcZcalRefCnt = 0x00000000; +SDRAM[0].EmcZcalWaitCnt = 0x00000000; +SDRAM[0].EmcZcalMrwCmd = 0x00000000; +SDRAM[0].EmcMrwZqInitDev0 = 0x00000000; +SDRAM[0].EmcMrwZqInitDev1 = 0x00000000; +SDRAM[0].EmcMrwZqInitWait = 0x00000000; +SDRAM[0].EmcDdr2Wait = 0x00000002; +SDRAM[0].PmcDdrPwr = 0x00000001; +SDRAM[0].ApbMiscGpXm2CfgAPadCtrl = 0x77ffc000; +SDRAM[0].ApbMiscGpXm2CfgCPadCtrl2 = 0x08080079; +SDRAM[0].ApbMiscGpXm2CfgCPadCtrl = 0x77fffff0; +SDRAM[0].ApbMiscGpXm2CfgDPadCtrl2 = 0x44440009; +SDRAM[0].ApbMiscGpXm2CfgDPadCtrl = 0x77fffff0; +SDRAM[0].ApbMiscGpXm2ClkCfgPadCtrl = 0x77ffc000; +SDRAM[0].ApbMiscGpXm2CompPadCtrl = 0x01f1f008; +SDRAM[0].ApbMiscGpXm2VttGenPadCtrl = 0x07076600; diff --git a/tegra20/compulab/trimslice/trimslice-spi.img.cfg b/tegra20/compulab/trimslice/trimslice-spi.img.cfg new file mode 100644 index 0000000..2a2e685 --- /dev/null +++ b/tegra20/compulab/trimslice/trimslice-spi.img.cfg @@ -0,0 +1,21 @@ +# Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. +# +# This software is provided 'as-is', without any express or implied +# warranty. In no event will the authors be held liable for any damages +# arising from the use of this software. +# +# Permission is granted to anyone to use this software for any purpose, +# including commercial applications, and to alter it and redistribute it +# freely, subject to the following restrictions: +# +# 1. The origin of this software must not be misrepresented; you must not +# claim that you wrote the original software. If you use this software +# in a product, an acknowledgment in the product documentation would be +# appreciated but is not required. +# 2. Altered source versions must be plainly marked as such, and must not be +# misrepresented as being the original software. +# 3. This notice may not be removed or altered from any source distribution. + +Version = 0x00020001; +Bctfile = trimslice-spi.bct; +BootLoader = u-boot.bin,0x00108000,0x00108000,Complete; diff --git a/tegra20/nvidia/harmony/build.sh b/tegra20/nvidia/harmony/build.sh new file mode 100755 index 0000000..2209860 --- /dev/null +++ b/tegra20/nvidia/harmony/build.sh @@ -0,0 +1,27 @@ +#!/bin/sh + +# Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. +# +# This software is provided 'as-is', without any express or implied +# warranty. In no event will the authors be held liable for any damages +# arising from the use of this software. +# +# Permission is granted to anyone to use this software for any purpose, +# including commercial applications, and to alter it and redistribute it +# freely, subject to the following restrictions: +# +# 1. The origin of this software must not be misrepresented; you must not +# claim that you wrote the original software. If you use this software +# in a product, an acknowledgment in the product documentation would be +# appreciated but is not required. +# 2. Altered source versions must be plainly marked as such, and must not be +# misrepresented as being the original software. +# 3. This notice may not be removed or altered from any source distribution. + +set -e +set -x + +cbootimage -gbct \ + harmony_a02_12Mhz_H5PS1G83EFR-S6C_333Mhz_1GB_2K8Nand_HY27UF084G2B-TP.bct.cfg \ + harmony_a02_12Mhz_H5PS1G83EFR-S6C_333Mhz_1GB_2K8Nand_HY27UF084G2B-TP.bct +cbootimage harmony-nand.img.cfg harmony-nand.img diff --git a/tegra20/nvidia/harmony/harmony-nand.img.cfg b/tegra20/nvidia/harmony/harmony-nand.img.cfg new file mode 100644 index 0000000..ac2bc51 --- /dev/null +++ b/tegra20/nvidia/harmony/harmony-nand.img.cfg @@ -0,0 +1,22 @@ +# Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. +# +# This software is provided 'as-is', without any express or implied +# warranty. In no event will the authors be held liable for any damages +# arising from the use of this software. +# +# Permission is granted to anyone to use this software for any purpose, +# including commercial applications, and to alter it and redistribute it +# freely, subject to the following restrictions: +# +# 1. The origin of this software must not be misrepresented; you must not +# claim that you wrote the original software. If you use this software +# in a product, an acknowledgment in the product documentation would be +# appreciated but is not required. +# 2. Altered source versions must be plainly marked as such, and must not be +# misrepresented as being the original software. +# 3. This notice may not be removed or altered from any source distribution. + +Version = 0x00020001; +Bctcopy = 1; +Bctfile = harmony_a02_12Mhz_H5PS1G83EFR-S6C_333Mhz_1GB_2K8Nand_HY27UF084G2B-TP.bct; +BootLoader = u-boot.bin,0x00108000,0x00108000,Complete; diff --git a/tegra20/nvidia/harmony/harmony_a02_12Mhz_H5PS1G83EFR-S6C_333Mhz_1GB_2K8Nand_HY27UF084G2B-TP.bct.cfg b/tegra20/nvidia/harmony/harmony_a02_12Mhz_H5PS1G83EFR-S6C_333Mhz_1GB_2K8Nand_HY27UF084G2B-TP.bct.cfg new file mode 100644 index 0000000..f948be1 --- /dev/null +++ b/tegra20/nvidia/harmony/harmony_a02_12Mhz_H5PS1G83EFR-S6C_333Mhz_1GB_2K8Nand_HY27UF084G2B-TP.bct.cfg @@ -0,0 +1,153 @@ +# Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. +# +# This software is provided 'as-is', without any express or implied +# warranty. In no event will the authors be held liable for any damages +# arising from the use of this software. +# +# Permission is granted to anyone to use this software for any purpose, +# including commercial applications, and to alter it and redistribute it +# freely, subject to the following restrictions: +# +# 1. The origin of this software must not be misrepresented; you must not +# claim that you wrote the original software. If you use this software +# in a product, an acknowledgment in the product documentation would be +# appreciated but is not required. +# 2. Altered source versions must be plainly marked as such, and must not be +# misrepresented as being the original software. +# 3. This notice may not be removed or altered from any source distribution. + +Version = 0x00020001; +BlockSize = 0x00020000; +PageSize = 0x00000800; +PartitionSize = 0x01000000; +OdmData = 0x300d8000; + +DevType[0] = NvBootDevType_Nand; +DeviceParam[0].NandParams.ClockDivider = 0x00000004; +DeviceParam[0].NandParams.NandTiming2 = 0x0000000a; +DeviceParam[0].NandParams.NandTiming = 0x3b269213; +DeviceParam[0].NandParams.BlockSizeLog2 = 0x00000000; +DeviceParam[0].NandParams.PageSizeLog2 = 0x00000000; + +DevType[1] = NvBootDevType_Nand; +DeviceParam[1].NandParams.ClockDivider = 0x00000004; +DeviceParam[1].NandParams.NandTiming2 = 0x0000000a; +DeviceParam[1].NandParams.NandTiming = 0x3b269213; +DeviceParam[1].NandParams.BlockSizeLog2 = 0x00000000; +DeviceParam[1].NandParams.PageSizeLog2 = 0x00000000; + +DevType[2] = NvBootDevType_Nand; +DeviceParam[2].NandParams.ClockDivider = 0x00000004; +DeviceParam[2].NandParams.NandTiming2 = 0x0000000a; +DeviceParam[2].NandParams.NandTiming = 0x3b269213; +DeviceParam[2].NandParams.BlockSizeLog2 = 0x00000000; +DeviceParam[2].NandParams.PageSizeLog2 = 0x00000000; + +DevType[3] = NvBootDevType_Nand; +DeviceParam[3].NandParams.ClockDivider = 0x00000004; +DeviceParam[3].NandParams.NandTiming2 = 0x0000000a; +DeviceParam[3].NandParams.NandTiming = 0x3b269213; +DeviceParam[3].NandParams.BlockSizeLog2 = 0x00000000; +DeviceParam[3].NandParams.PageSizeLog2 = 0x00000000; + +SDRAM[0].MemoryType = NvBootMemoryType_Ddr2; +SDRAM[0].PllMChargePumpSetupControl = 0x00000008; +SDRAM[0].PllMLoopFilterSetupControl = 0x00000000; +SDRAM[0].PllMInputDivider = 0x0000000c; +SDRAM[0].PllMFeedbackDivider = 0x0000029a; +SDRAM[0].PllMPostDivider = 0x00000000; +SDRAM[0].PllMStableTime = 0x0000012c; +SDRAM[0].EmcClockDivider = 0x00000001; +SDRAM[0].EmcAutoCalInterval = 0x00000000; +SDRAM[0].EmcAutoCalConfig = 0xe0a61818; +SDRAM[0].EmcAutoCalWait = 0x00000000; +SDRAM[0].EmcPinProgramWait = 0x00000000; +SDRAM[0].EmcRc = 0x00000014; +SDRAM[0].EmcRfc = 0x0000002b; +SDRAM[0].EmcRas = 0x0000000f; +SDRAM[0].EmcRp = 0x00000005; +SDRAM[0].EmcR2w = 0x00000004; +SDRAM[0].EmcW2r = 0x00000005; +SDRAM[0].EmcR2p = 0x00000003; +SDRAM[0].EmcW2p = 0x0000000c; +SDRAM[0].EmcRrd = 0x00000003; +SDRAM[0].EmcRdRcd = 0x00000005; +SDRAM[0].EmcWrRcd = 0x00000005; +SDRAM[0].EmcRext = 0x00000001; +SDRAM[0].EmcWdv = 0x00000004; +SDRAM[0].EmcQUseExtra = 0x00000000; +SDRAM[0].EmcQUse = 0x00000005; +SDRAM[0].EmcQRst = 0x00000004; +SDRAM[0].EmcQSafe = 0x00000009; +SDRAM[0].EmcRdv = 0x0000000d; +SDRAM[0].EmcRefresh = 0x000009ff; +SDRAM[0].EmcBurstRefreshNum = 0x00000000; +SDRAM[0].EmcPdEx2Wr = 0x00000003; +SDRAM[0].EmcPdEx2Rd = 0x00000003; +SDRAM[0].EmcPChg2Pden = 0x00000005; +SDRAM[0].EmcAct2Pden = 0x00000005; +SDRAM[0].EmcAr2Pden = 0x00000001; +SDRAM[0].EmcRw2Pden = 0x0000000f; +SDRAM[0].EmcTxsr = 0x000000c8; +SDRAM[0].EmcTcke = 0x00000003; +SDRAM[0].EmcTfaw = 0x0000000c; +SDRAM[0].EmcTrpab = 0x00000006; +SDRAM[0].EmcTClkStable = 0x00000008; +SDRAM[0].EmcTClkStop = 0x00000002; +SDRAM[0].EmcTRefBw = 0x00000000; +SDRAM[0].EmcFbioCfg1 = 0x00000000; +SDRAM[0].EmcFbioDqsibDlyMsb = 0x00000000; +SDRAM[0].EmcFbioDqsibDly = 0x1c1c2020; +SDRAM[0].EmcFbioQuseDlyMsb = 0x00000000; +SDRAM[0].EmcFbioQuseDly = 0x5a504646; +SDRAM[0].EmcFbioCfg5 = 0x00000083; +SDRAM[0].EmcFbioCfg6 = 0x00000002; +SDRAM[0].EmcFbioSpare = 0x00000000; +SDRAM[0].EmcMrsResetDllWait = 0x00000000; +SDRAM[0].EmcMrsResetDll = 0x00000000; +SDRAM[0].EmcMrsDdr2DllReset = 0x00000100; +SDRAM[0].EmcMrs = 0x00000a6a; +SDRAM[0].EmcEmrsEmr2 = 0x00200000; +SDRAM[0].EmcEmrsEmr3 = 0x00300000; +SDRAM[0].EmcEmrsDdr2DllEnable = 0x00100000; +SDRAM[0].EmcEmrsDdr2OcdCalib = 0x00100384; +SDRAM[0].EmcEmrs = 0x00100004; +SDRAM[0].EmcMrw1 = 0x00000000; +SDRAM[0].EmcMrw2 = 0x00000000; +SDRAM[0].EmcMrw3 = 0x00000000; +SDRAM[0].EmcMrwResetCommand = 0x00000000; +SDRAM[0].EmcMrwResetNInitWait = 0x00000000; +SDRAM[0].EmcAdrCfg1 = 0x00070303; +SDRAM[0].EmcAdrCfg = 0x01070303; +SDRAM[0].McEmemCfg = 0x00100000; +SDRAM[0].McLowLatencyConfig = 0x80000003; +SDRAM[0].EmcCfg2 = 0x00000405; +SDRAM[0].EmcCfgDigDll = 0xf0000313; +SDRAM[0].EmcCfgClktrim0 = 0x00000000; +SDRAM[0].EmcCfgClktrim1 = 0x00000000; +SDRAM[0].EmcCfgClktrim2 = 0x00000000; +SDRAM[0].EmcCfg = 0x2001ff01; +SDRAM[0].EmcDbg = 0x01000000; +SDRAM[0].AhbArbitrationXbarCtrl = 0x00010000; +SDRAM[0].EmcDllXformDqs = 0x00000010; +SDRAM[0].EmcDllXformQUse = 0x00000008; +SDRAM[0].WarmBootWait = 0x00000002; +SDRAM[0].EmcCttTermCtrl = 0x00000802; +SDRAM[0].EmcOdtWrite = 0x00000000; +SDRAM[0].EmcOdtRead = 0x00000000; +SDRAM[0].EmcZcalRefCnt = 0x00000000; +SDRAM[0].EmcZcalWaitCnt = 0x00000000; +SDRAM[0].EmcZcalMrwCmd = 0x00000000; +SDRAM[0].EmcMrwZqInitDev0 = 0x00000000; +SDRAM[0].EmcMrwZqInitDev1 = 0x00000000; +SDRAM[0].EmcMrwZqInitWait = 0x00000000; +SDRAM[0].EmcDdr2Wait = 0x00000002; +SDRAM[0].PmcDdrPwr = 0x00000001; +SDRAM[0].ApbMiscGpXm2CfgAPadCtrl = 0x77ffc000; +SDRAM[0].ApbMiscGpXm2CfgCPadCtrl2 = 0x08080079; +SDRAM[0].ApbMiscGpXm2CfgCPadCtrl = 0x77fffff0; +SDRAM[0].ApbMiscGpXm2CfgDPadCtrl2 = 0x44440009; +SDRAM[0].ApbMiscGpXm2CfgDPadCtrl = 0x77fffff0; +SDRAM[0].ApbMiscGpXm2ClkCfgPadCtrl = 0x77ffc000; +SDRAM[0].ApbMiscGpXm2CompPadCtrl = 0x01f1f008; +SDRAM[0].ApbMiscGpXm2VttGenPadCtrl = 0x07076600; diff --git a/tegra20/nvidia/seaboard/PM282_Hynix_1GB_H5PS2G83AFR-S6C_380MHz_nand.bct.cfg b/tegra20/nvidia/seaboard/PM282_Hynix_1GB_H5PS2G83AFR-S6C_380MHz_nand.bct.cfg new file mode 100644 index 0000000..0e15eb7 --- /dev/null +++ b/tegra20/nvidia/seaboard/PM282_Hynix_1GB_H5PS2G83AFR-S6C_380MHz_nand.bct.cfg @@ -0,0 +1,153 @@ +# Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. +# +# This software is provided 'as-is', without any express or implied +# warranty. In no event will the authors be held liable for any damages +# arising from the use of this software. +# +# Permission is granted to anyone to use this software for any purpose, +# including commercial applications, and to alter it and redistribute it +# freely, subject to the following restrictions: +# +# 1. The origin of this software must not be misrepresented; you must not +# claim that you wrote the original software. If you use this software +# in a product, an acknowledgment in the product documentation would be +# appreciated but is not required. +# 2. Altered source versions must be plainly marked as such, and must not be +# misrepresented as being the original software. +# 3. This notice may not be removed or altered from any source distribution. + +Version = 0x00020001; +BlockSize = 0x00020000; +PageSize = 0x00000800; +PartitionSize = 0x01000000; +OdmData = 0x300d8000; + +DevType[0] = NvBootDevType_Nand; +DeviceParam[0].NandParams.ClockDivider = 0x00000004; +DeviceParam[0].NandParams.NandTiming2 = 0x0000000a; +DeviceParam[0].NandParams.NandTiming = 0x3b269213; +DeviceParam[0].NandParams.BlockSizeLog2 = 0x00000000; +DeviceParam[0].NandParams.PageSizeLog2 = 0x00000000; + +DevType[1] = NvBootDevType_Nand; +DeviceParam[1].NandParams.ClockDivider = 0x00000004; +DeviceParam[1].NandParams.NandTiming2 = 0x0000000a; +DeviceParam[1].NandParams.NandTiming = 0x3b269213; +DeviceParam[1].NandParams.BlockSizeLog2 = 0x00000000; +DeviceParam[1].NandParams.PageSizeLog2 = 0x00000000; + +DevType[2] = NvBootDevType_Nand; +DeviceParam[2].NandParams.ClockDivider = 0x00000004; +DeviceParam[2].NandParams.NandTiming2 = 0x0000000a; +DeviceParam[2].NandParams.NandTiming = 0x3b269213; +DeviceParam[2].NandParams.BlockSizeLog2 = 0x00000000; +DeviceParam[2].NandParams.PageSizeLog2 = 0x00000000; + +DevType[3] = NvBootDevType_Nand; +DeviceParam[3].NandParams.ClockDivider = 0x00000004; +DeviceParam[3].NandParams.NandTiming2 = 0x0000000a; +DeviceParam[3].NandParams.NandTiming = 0x3b269213; +DeviceParam[3].NandParams.BlockSizeLog2 = 0x00000000; +DeviceParam[3].NandParams.PageSizeLog2 = 0x00000000; + +SDRAM[0].MemoryType = NvBootMemoryType_Ddr2; +SDRAM[0].PllMChargePumpSetupControl = 0x00000008; +SDRAM[0].PllMLoopFilterSetupControl = 0x00000000; +SDRAM[0].PllMInputDivider = 0x0000000c; +SDRAM[0].PllMFeedbackDivider = 0x000002f8; +SDRAM[0].PllMPostDivider = 0x00000000; +SDRAM[0].PllMStableTime = 0x0000012c; +SDRAM[0].EmcClockDivider = 0x00000001; +SDRAM[0].EmcAutoCalInterval = 0x00000000; +SDRAM[0].EmcAutoCalConfig = 0xe0a61818; +SDRAM[0].EmcAutoCalWait = 0x00000000; +SDRAM[0].EmcPinProgramWait = 0x00000000; +SDRAM[0].EmcRc = 0x00000017; +SDRAM[0].EmcRfc = 0x0000004b; +SDRAM[0].EmcRas = 0x00000012; +SDRAM[0].EmcRp = 0x00000006; +SDRAM[0].EmcR2w = 0x00000004; +SDRAM[0].EmcW2r = 0x00000005; +SDRAM[0].EmcR2p = 0x00000003; +SDRAM[0].EmcW2p = 0x0000000c; +SDRAM[0].EmcRrd = 0x00000003; +SDRAM[0].EmcRdRcd = 0x00000006; +SDRAM[0].EmcWrRcd = 0x00000006; +SDRAM[0].EmcRext = 0x00000001; +SDRAM[0].EmcWdv = 0x00000004; +SDRAM[0].EmcQUseExtra = 0x00000000; +SDRAM[0].EmcQUse = 0x00000005; +SDRAM[0].EmcQRst = 0x00000004; +SDRAM[0].EmcQSafe = 0x00000009; +SDRAM[0].EmcRdv = 0x0000000d; +SDRAM[0].EmcRefresh = 0x00000b5f; +SDRAM[0].EmcBurstRefreshNum = 0x00000000; +SDRAM[0].EmcPdEx2Wr = 0x00000003; +SDRAM[0].EmcPdEx2Rd = 0x00000003; +SDRAM[0].EmcPChg2Pden = 0x00000006; +SDRAM[0].EmcAct2Pden = 0x00000006; +SDRAM[0].EmcAr2Pden = 0x00000001; +SDRAM[0].EmcRw2Pden = 0x00000011; +SDRAM[0].EmcTxsr = 0x000000c8; +SDRAM[0].EmcTcke = 0x00000003; +SDRAM[0].EmcTfaw = 0x0000000e; +SDRAM[0].EmcTrpab = 0x00000007; +SDRAM[0].EmcTClkStable = 0x0000000f; +SDRAM[0].EmcTClkStop = 0x00000002; +SDRAM[0].EmcTRefBw = 0x00000000; +SDRAM[0].EmcFbioCfg1 = 0x00000000; +SDRAM[0].EmcFbioDqsibDlyMsb = 0x00000000; +SDRAM[0].EmcFbioDqsibDly = 0x24242424; +SDRAM[0].EmcFbioQuseDlyMsb = 0x00000000; +SDRAM[0].EmcFbioQuseDly = 0x64646464; +SDRAM[0].EmcFbioCfg5 = 0x00000083; +SDRAM[0].EmcFbioCfg6 = 0x00000002; +SDRAM[0].EmcFbioSpare = 0x00000000; +SDRAM[0].EmcMrsResetDllWait = 0x00000000; +SDRAM[0].EmcMrsResetDll = 0x00000000; +SDRAM[0].EmcMrsDdr2DllReset = 0x00000100; +SDRAM[0].EmcMrs = 0x00000a6a; +SDRAM[0].EmcEmrsEmr2 = 0x00200000; +SDRAM[0].EmcEmrsEmr3 = 0x00300000; +SDRAM[0].EmcEmrsDdr2DllEnable = 0x00100000; +SDRAM[0].EmcEmrsDdr2OcdCalib = 0x00100380; +SDRAM[0].EmcEmrs = 0x00100000; +SDRAM[0].EmcMrw1 = 0x00000000; +SDRAM[0].EmcMrw2 = 0x00000000; +SDRAM[0].EmcMrw3 = 0x00000000; +SDRAM[0].EmcMrwResetCommand = 0x00000000; +SDRAM[0].EmcMrwResetNInitWait = 0x00000000; +SDRAM[0].EmcAdrCfg1 = 0x00080303; +SDRAM[0].EmcAdrCfg = 0x00080303; +SDRAM[0].McEmemCfg = 0x00100000; +SDRAM[0].McLowLatencyConfig = 0x80000003; +SDRAM[0].EmcCfg2 = 0x00000405; +SDRAM[0].EmcCfgDigDll = 0xf0000413; +SDRAM[0].EmcCfgClktrim0 = 0x00000000; +SDRAM[0].EmcCfgClktrim1 = 0x00000000; +SDRAM[0].EmcCfgClktrim2 = 0x00000000; +SDRAM[0].EmcCfg = 0x0001ff00; +SDRAM[0].EmcDbg = 0x01000000; +SDRAM[0].AhbArbitrationXbarCtrl = 0x00010000; +SDRAM[0].EmcDllXformDqs = 0x00000010; +SDRAM[0].EmcDllXformQUse = 0x00000008; +SDRAM[0].WarmBootWait = 0x00000002; +SDRAM[0].EmcCttTermCtrl = 0x00000802; +SDRAM[0].EmcOdtWrite = 0x00000000; +SDRAM[0].EmcOdtRead = 0x00000000; +SDRAM[0].EmcZcalRefCnt = 0x00000000; +SDRAM[0].EmcZcalWaitCnt = 0x00000000; +SDRAM[0].EmcZcalMrwCmd = 0x00000000; +SDRAM[0].EmcMrwZqInitDev0 = 0x00000000; +SDRAM[0].EmcMrwZqInitDev1 = 0x00000000; +SDRAM[0].EmcMrwZqInitWait = 0x00000000; +SDRAM[0].EmcDdr2Wait = 0x00000002; +SDRAM[0].PmcDdrPwr = 0x00000001; +SDRAM[0].ApbMiscGpXm2CfgAPadCtrl = 0x77ffc000; +SDRAM[0].ApbMiscGpXm2CfgCPadCtrl2 = 0x08080079; +SDRAM[0].ApbMiscGpXm2CfgCPadCtrl = 0x77fffff0; +SDRAM[0].ApbMiscGpXm2CfgDPadCtrl2 = 0x00000009; +SDRAM[0].ApbMiscGpXm2CfgDPadCtrl = 0x77fffff0; +SDRAM[0].ApbMiscGpXm2ClkCfgPadCtrl = 0x77ffc000; +SDRAM[0].ApbMiscGpXm2CompPadCtrl = 0x01f1f008; +SDRAM[0].ApbMiscGpXm2VttGenPadCtrl = 0x07076600; diff --git a/tegra20/nvidia/seaboard/build.sh b/tegra20/nvidia/seaboard/build.sh new file mode 100755 index 0000000..558a7ce --- /dev/null +++ b/tegra20/nvidia/seaboard/build.sh @@ -0,0 +1,27 @@ +#!/bin/sh + +# Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. +# +# This software is provided 'as-is', without any express or implied +# warranty. In no event will the authors be held liable for any damages +# arising from the use of this software. +# +# Permission is granted to anyone to use this software for any purpose, +# including commercial applications, and to alter it and redistribute it +# freely, subject to the following restrictions: +# +# 1. The origin of this software must not be misrepresented; you must not +# claim that you wrote the original software. If you use this software +# in a product, an acknowledgment in the product documentation would be +# appreciated but is not required. +# 2. Altered source versions must be plainly marked as such, and must not be +# misrepresented as being the original software. +# 3. This notice may not be removed or altered from any source distribution. + +set -e +set -x + +cbootimage -gbct \ + PM282_Hynix_1GB_H5PS2G83AFR-S6C_380MHz_nand.bct.cfg \ + PM282_Hynix_1GB_H5PS2G83AFR-S6C_380MHz_nand.bct +cbootimage seaboard-nand.img.cfg seaboard-nand.img diff --git a/tegra20/nvidia/seaboard/seaboard-nand.img.cfg b/tegra20/nvidia/seaboard/seaboard-nand.img.cfg new file mode 100644 index 0000000..82faac0 --- /dev/null +++ b/tegra20/nvidia/seaboard/seaboard-nand.img.cfg @@ -0,0 +1,22 @@ +# Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. +# +# This software is provided 'as-is', without any express or implied +# warranty. In no event will the authors be held liable for any damages +# arising from the use of this software. +# +# Permission is granted to anyone to use this software for any purpose, +# including commercial applications, and to alter it and redistribute it +# freely, subject to the following restrictions: +# +# 1. The origin of this software must not be misrepresented; you must not +# claim that you wrote the original software. If you use this software +# in a product, an acknowledgment in the product documentation would be +# appreciated but is not required. +# 2. Altered source versions must be plainly marked as such, and must not be +# misrepresented as being the original software. +# 3. This notice may not be removed or altered from any source distribution. + +Version = 0x00020001; +Bctcopy = 1; +Bctfile = PM282_Hynix_1GB_H5PS2G83AFR-S6C_380MHz_nand.bct; +BootLoader = u-boot.bin,0x00108000,0x00108000,Complete; diff --git a/tegra20/nvidia/ventana/build.sh b/tegra20/nvidia/ventana/build.sh new file mode 100755 index 0000000..e1a7681 --- /dev/null +++ b/tegra20/nvidia/ventana/build.sh @@ -0,0 +1,27 @@ +#!/bin/sh + +# Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. +# +# This software is provided 'as-is', without any express or implied +# warranty. In no event will the authors be held liable for any damages +# arising from the use of this software. +# +# Permission is granted to anyone to use this software for any purpose, +# including commercial applications, and to alter it and redistribute it +# freely, subject to the following restrictions: +# +# 1. The origin of this software must not be misrepresented; you must not +# claim that you wrote the original software. If you use this software +# in a product, an acknowledgment in the product documentation would be +# appreciated but is not required. +# 2. Altered source versions must be plainly marked as such, and must not be +# misrepresented as being the original software. +# 3. This notice may not be removed or altered from any source distribution. + +set -e +set -x + +cbootimage -gbct \ + ventana_A03_12MHz_EDB8132B1PB6DF_300Mhz_1GB_emmc_THGBM1G6D4EBAI4.bct.cfg \ + ventana_A03_12MHz_EDB8132B1PB6DF_300Mhz_1GB_emmc_THGBM1G6D4EBAI4.bct +cbootimage ventana-emmc.img.cfg ventana-emmc.img diff --git a/tegra20/nvidia/ventana/ventana-emmc.img.cfg b/tegra20/nvidia/ventana/ventana-emmc.img.cfg new file mode 100644 index 0000000..6aaee7f --- /dev/null +++ b/tegra20/nvidia/ventana/ventana-emmc.img.cfg @@ -0,0 +1,22 @@ +# Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. +# +# This software is provided 'as-is', without any express or implied +# warranty. In no event will the authors be held liable for any damages +# arising from the use of this software. +# +# Permission is granted to anyone to use this software for any purpose, +# including commercial applications, and to alter it and redistribute it +# freely, subject to the following restrictions: +# +# 1. The origin of this software must not be misrepresented; you must not +# claim that you wrote the original software. If you use this software +# in a product, an acknowledgment in the product documentation would be +# appreciated but is not required. +# 2. Altered source versions must be plainly marked as such, and must not be +# misrepresented as being the original software. +# 3. This notice may not be removed or altered from any source distribution. + +Version = 0x00020001; +Bctcopy = 1; +Bctfile = ventana_A03_12MHz_EDB8132B1PB6DF_300Mhz_1GB_emmc_THGBM1G6D4EBAI4.bct; +BootLoader = u-boot.bin,0x00108000,0x00108000,Complete; diff --git a/tegra20/nvidia/ventana/ventana_A03_12MHz_EDB8132B1PB6DF_300Mhz_1GB_emmc_THGBM1G6D4EBAI4.bct.cfg b/tegra20/nvidia/ventana/ventana_A03_12MHz_EDB8132B1PB6DF_300Mhz_1GB_emmc_THGBM1G6D4EBAI4.bct.cfg new file mode 100644 index 0000000..ebaf87e --- /dev/null +++ b/tegra20/nvidia/ventana/ventana_A03_12MHz_EDB8132B1PB6DF_300Mhz_1GB_emmc_THGBM1G6D4EBAI4.bct.cfg @@ -0,0 +1,145 @@ +# Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. +# +# This software is provided 'as-is', without any express or implied +# warranty. In no event will the authors be held liable for any damages +# arising from the use of this software. +# +# Permission is granted to anyone to use this software for any purpose, +# including commercial applications, and to alter it and redistribute it +# freely, subject to the following restrictions: +# +# 1. The origin of this software must not be misrepresented; you must not +# claim that you wrote the original software. If you use this software +# in a product, an acknowledgment in the product documentation would be +# appreciated but is not required. +# 2. Altered source versions must be plainly marked as such, and must not be +# misrepresented as being the original software. +# 3. This notice may not be removed or altered from any source distribution. + +Version = 0x00020001; +BlockSize = 0x00004000; +PageSize = 0x00000200; +PartitionSize = 0x01000000; +OdmData = 0x300d8000; + +DevType[0] = NvBootDevType_Sdmmc; +DeviceParam[0].SdmmcParams.ClockDivider = 0x0000000c; +DeviceParam[0].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_4Bit; +DeviceParam[0].SdmmcParams.MaxPowerClassSupported = 0x00000000; + +DevType[1] = NvBootDevType_Sdmmc; +DeviceParam[1].SdmmcParams.ClockDivider = 0x0000000c; +DeviceParam[1].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_4Bit; +DeviceParam[1].SdmmcParams.MaxPowerClassSupported = 0x00000000; + +DevType[2] = NvBootDevType_Sdmmc; +DeviceParam[2].SdmmcParams.ClockDivider = 0x0000000c; +DeviceParam[2].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_4Bit; +DeviceParam[2].SdmmcParams.MaxPowerClassSupported = 0x00000000; + +DevType[3] = NvBootDevType_Sdmmc; +DeviceParam[3].SdmmcParams.ClockDivider = 0x0000000c; +DeviceParam[3].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_4Bit; +DeviceParam[3].SdmmcParams.MaxPowerClassSupported = 0x00000000; + +SDRAM[0].MemoryType = NvBootMemoryType_LpDdr2; +SDRAM[0].PllMChargePumpSetupControl = 0x00000008; +SDRAM[0].PllMLoopFilterSetupControl = 0x00000000; +SDRAM[0].PllMInputDivider = 0x0000000c; +SDRAM[0].PllMFeedbackDivider = 0x00000258; +SDRAM[0].PllMPostDivider = 0x00000000; +SDRAM[0].PllMStableTime = 0x0000012c; +SDRAM[0].EmcClockDivider = 0x00000001; +SDRAM[0].EmcAutoCalInterval = 0x00000000; +SDRAM[0].EmcAutoCalConfig = 0xe0a61111; +SDRAM[0].EmcAutoCalWait = 0x00000000; +SDRAM[0].EmcPinProgramWait = 0x00000000; +SDRAM[0].EmcRc = 0x00000012; +SDRAM[0].EmcRfc = 0x00000027; +SDRAM[0].EmcRas = 0x0000000d; +SDRAM[0].EmcRp = 0x00000007; +SDRAM[0].EmcR2w = 0x00000007; +SDRAM[0].EmcW2r = 0x00000005; +SDRAM[0].EmcR2p = 0x00000003; +SDRAM[0].EmcW2p = 0x00000009; +SDRAM[0].EmcRrd = 0x00000003; +SDRAM[0].EmcRdRcd = 0x00000006; +SDRAM[0].EmcWrRcd = 0x00000006; +SDRAM[0].EmcRext = 0x00000003; +SDRAM[0].EmcWdv = 0x00000002; +SDRAM[0].EmcQUseExtra = 0x00000005; +SDRAM[0].EmcQUse = 0x00000006; +SDRAM[0].EmcQRst = 0x00000003; +SDRAM[0].EmcQSafe = 0x00000009; +SDRAM[0].EmcRdv = 0x0000000c; +SDRAM[0].EmcRefresh = 0x0000045f; +SDRAM[0].EmcBurstRefreshNum = 0x00000000; +SDRAM[0].EmcPdEx2Wr = 0x00000004; +SDRAM[0].EmcPdEx2Rd = 0x00000004; +SDRAM[0].EmcPChg2Pden = 0x00000007; +SDRAM[0].EmcAct2Pden = 0x00000006; +SDRAM[0].EmcAr2Pden = 0x00000001; +SDRAM[0].EmcRw2Pden = 0x0000000e; +SDRAM[0].EmcTxsr = 0x0000002a; +SDRAM[0].EmcTcke = 0x00000003; +SDRAM[0].EmcTfaw = 0x0000000f; +SDRAM[0].EmcTrpab = 0x00000008; +SDRAM[0].EmcTClkStable = 0x00000005; +SDRAM[0].EmcTClkStop = 0x00000002; +SDRAM[0].EmcTRefBw = 0x000004e0; +SDRAM[0].EmcFbioCfg1 = 0x00000000; +SDRAM[0].EmcFbioDqsibDlyMsb = 0x00000000; +SDRAM[0].EmcFbioDqsibDly = 0x383c443c; +SDRAM[0].EmcFbioQuseDlyMsb = 0x00000000; +SDRAM[0].EmcFbioQuseDly = 0x6e6e6e6e; +SDRAM[0].EmcFbioCfg5 = 0x00000282; +SDRAM[0].EmcFbioCfg6 = 0x00000002; +SDRAM[0].EmcFbioSpare = 0x00000000; +SDRAM[0].EmcMrsResetDllWait = 0x00000000; +SDRAM[0].EmcMrsResetDll = 0x00000000; +SDRAM[0].EmcMrsDdr2DllReset = 0x00000000; +SDRAM[0].EmcMrs = 0x00000000; +SDRAM[0].EmcEmrsEmr2 = 0x00000000; +SDRAM[0].EmcEmrsEmr3 = 0x00000000; +SDRAM[0].EmcEmrsDdr2DllEnable = 0x00000000; +SDRAM[0].EmcEmrsDdr2OcdCalib = 0x00000000; +SDRAM[0].EmcEmrs = 0x00000000; +SDRAM[0].EmcMrw1 = 0x0001006a; +SDRAM[0].EmcMrw2 = 0x00020003; +SDRAM[0].EmcMrw3 = 0x00030002; +SDRAM[0].EmcMrwResetCommand = 0x003f0000; +SDRAM[0].EmcMrwResetNInitWait = 0x0000000a; +SDRAM[0].EmcAdrCfg1 = 0x00070303; +SDRAM[0].EmcAdrCfg = 0x01070303; +SDRAM[0].McEmemCfg = 0x00100000; +SDRAM[0].McLowLatencyConfig = 0x80000003; +SDRAM[0].EmcCfg2 = 0x00000403; +SDRAM[0].EmcCfgDigDll = 0xe0000313; +SDRAM[0].EmcCfgClktrim0 = 0x00000000; +SDRAM[0].EmcCfgClktrim1 = 0x00000000; +SDRAM[0].EmcCfgClktrim2 = 0x00000000; +SDRAM[0].EmcCfg = 0x0001ff00; +SDRAM[0].EmcDbg = 0x01000020; +SDRAM[0].AhbArbitrationXbarCtrl = 0x00010000; +SDRAM[0].EmcDllXformDqs = 0x00000010; +SDRAM[0].EmcDllXformQUse = 0x00000008; +SDRAM[0].WarmBootWait = 0x00000001; +SDRAM[0].EmcCttTermCtrl = 0x00000802; +SDRAM[0].EmcOdtWrite = 0x00000000; +SDRAM[0].EmcOdtRead = 0x00000000; +SDRAM[0].EmcZcalRefCnt = 0x00000000; +SDRAM[0].EmcZcalWaitCnt = 0x0000001b; +SDRAM[0].EmcZcalMrwCmd = 0x000a0056; +SDRAM[0].EmcMrwZqInitDev0 = 0x800a00ff; +SDRAM[0].EmcMrwZqInitDev1 = 0x400a00ff; +SDRAM[0].EmcMrwZqInitWait = 0x00000001; +SDRAM[0].EmcDdr2Wait = 0x00000000; +SDRAM[0].PmcDdrPwr = 0x00000000; +SDRAM[0].ApbMiscGpXm2CfgAPadCtrl = 0x77ffc000; +SDRAM[0].ApbMiscGpXm2CfgCPadCtrl2 = 0x08080040; +SDRAM[0].ApbMiscGpXm2CfgCPadCtrl = 0x77fffff8; +SDRAM[0].ApbMiscGpXm2CfgDPadCtrl2 = 0x44440000; +SDRAM[0].ApbMiscGpXm2CfgDPadCtrl = 0x77fffff8; +SDRAM[0].ApbMiscGpXm2ClkCfgPadCtrl = 0x77ffc000; +SDRAM[0].ApbMiscGpXm2CompPadCtrl = 0x01f1f008; +SDRAM[0].ApbMiscGpXm2VttGenPadCtrl = 0x00005500; diff --git a/tegra20/nvidia/whistler/E1108_Elpida_512MB_EDB4032B2PB-6D-F_300MHz_40nm_emmc_x8.bct.cfg b/tegra20/nvidia/whistler/E1108_Elpida_512MB_EDB4032B2PB-6D-F_300MHz_40nm_emmc_x8.bct.cfg new file mode 100644 index 0000000..f4482a6 --- /dev/null +++ b/tegra20/nvidia/whistler/E1108_Elpida_512MB_EDB4032B2PB-6D-F_300MHz_40nm_emmc_x8.bct.cfg @@ -0,0 +1,145 @@ +# Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. +# +# This software is provided 'as-is', without any express or implied +# warranty. In no event will the authors be held liable for any damages +# arising from the use of this software. +# +# Permission is granted to anyone to use this software for any purpose, +# including commercial applications, and to alter it and redistribute it +# freely, subject to the following restrictions: +# +# 1. The origin of this software must not be misrepresented; you must not +# claim that you wrote the original software. If you use this software +# in a product, an acknowledgment in the product documentation would be +# appreciated but is not required. +# 2. Altered source versions must be plainly marked as such, and must not be +# misrepresented as being the original software. +# 3. This notice may not be removed or altered from any source distribution. + +Version = 0x00020001; +BlockSize = 0x00004000; +PageSize = 0x00000200; +PartitionSize = 0x01000000; +OdmData = 0x200c0000; + +DevType[0] = NvBootDevType_Sdmmc; +DeviceParam[0].SdmmcParams.ClockDivider = 0x0000000c; +DeviceParam[0].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_8Bit; +DeviceParam[0].SdmmcParams.MaxPowerClassSupported = 0x0000000f; + +DevType[1] = NvBootDevType_Sdmmc; +DeviceParam[1].SdmmcParams.ClockDivider = 0x0000000c; +DeviceParam[1].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_8Bit; +DeviceParam[1].SdmmcParams.MaxPowerClassSupported = 0x0000000f; + +DevType[2] = NvBootDevType_Sdmmc; +DeviceParam[2].SdmmcParams.ClockDivider = 0x0000000c; +DeviceParam[2].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_8Bit; +DeviceParam[2].SdmmcParams.MaxPowerClassSupported = 0x0000000f; + +DevType[3] = NvBootDevType_Sdmmc; +DeviceParam[3].SdmmcParams.ClockDivider = 0x0000000c; +DeviceParam[3].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_8Bit; +DeviceParam[3].SdmmcParams.MaxPowerClassSupported = 0x0000000f; + +SDRAM[0].MemoryType = NvBootMemoryType_LpDdr2; +SDRAM[0].PllMChargePumpSetupControl = 0x00000008; +SDRAM[0].PllMLoopFilterSetupControl = 0x00000000; +SDRAM[0].PllMInputDivider = 0x0000000c; +SDRAM[0].PllMFeedbackDivider = 0x00000258; +SDRAM[0].PllMPostDivider = 0x00000000; +SDRAM[0].PllMStableTime = 0x0000012c; +SDRAM[0].EmcClockDivider = 0x00000001; +SDRAM[0].EmcAutoCalInterval = 0x00000000; +SDRAM[0].EmcAutoCalConfig = 0xe0a61111; +SDRAM[0].EmcAutoCalWait = 0x00000000; +SDRAM[0].EmcPinProgramWait = 0x00000000; +SDRAM[0].EmcRc = 0x00000012; +SDRAM[0].EmcRfc = 0x00000027; +SDRAM[0].EmcRas = 0x0000000d; +SDRAM[0].EmcRp = 0x00000006; +SDRAM[0].EmcR2w = 0x00000007; +SDRAM[0].EmcW2r = 0x00000005; +SDRAM[0].EmcR2p = 0x00000003; +SDRAM[0].EmcW2p = 0x00000009; +SDRAM[0].EmcRrd = 0x00000003; +SDRAM[0].EmcRdRcd = 0x00000006; +SDRAM[0].EmcWrRcd = 0x00000006; +SDRAM[0].EmcRext = 0x00000003; +SDRAM[0].EmcWdv = 0x00000002; +SDRAM[0].EmcQUseExtra = 0x00000005; +SDRAM[0].EmcQUse = 0x00000006; +SDRAM[0].EmcQRst = 0x00000003; +SDRAM[0].EmcQSafe = 0x00000009; +SDRAM[0].EmcRdv = 0x0000000c; +SDRAM[0].EmcRefresh = 0x0000045f; +SDRAM[0].EmcBurstRefreshNum = 0x00000000; +SDRAM[0].EmcPdEx2Wr = 0x00000004; +SDRAM[0].EmcPdEx2Rd = 0x00000004; +SDRAM[0].EmcPChg2Pden = 0x00000006; +SDRAM[0].EmcAct2Pden = 0x00000008; +SDRAM[0].EmcAr2Pden = 0x00000001; +SDRAM[0].EmcRw2Pden = 0x0000000e; +SDRAM[0].EmcTxsr = 0x0000002a; +SDRAM[0].EmcTcke = 0x00000003; +SDRAM[0].EmcTfaw = 0x0000000f; +SDRAM[0].EmcTrpab = 0x00000007; +SDRAM[0].EmcTClkStable = 0x00000005; +SDRAM[0].EmcTClkStop = 0x00000002; +SDRAM[0].EmcTRefBw = 0x000004e0; +SDRAM[0].EmcFbioCfg1 = 0x00000000; +SDRAM[0].EmcFbioDqsibDlyMsb = 0x00000000; +SDRAM[0].EmcFbioDqsibDly = 0x28282828; +SDRAM[0].EmcFbioQuseDlyMsb = 0x00000000; +SDRAM[0].EmcFbioQuseDly = 0x00000000; +SDRAM[0].EmcFbioCfg5 = 0x00000282; +SDRAM[0].EmcFbioCfg6 = 0x00000002; +SDRAM[0].EmcFbioSpare = 0x00000000; +SDRAM[0].EmcMrsResetDllWait = 0x00000000; +SDRAM[0].EmcMrsResetDll = 0x00000000; +SDRAM[0].EmcMrsDdr2DllReset = 0x00000000; +SDRAM[0].EmcMrs = 0x00000000; +SDRAM[0].EmcEmrsEmr2 = 0x00000000; +SDRAM[0].EmcEmrsEmr3 = 0x00000000; +SDRAM[0].EmcEmrsDdr2DllEnable = 0x00000000; +SDRAM[0].EmcEmrsDdr2OcdCalib = 0x00000000; +SDRAM[0].EmcEmrs = 0x00000000; +SDRAM[0].EmcMrw1 = 0x0001006a; +SDRAM[0].EmcMrw2 = 0x00020003; +SDRAM[0].EmcMrw3 = 0x00030002; +SDRAM[0].EmcMrwResetCommand = 0x003f0000; +SDRAM[0].EmcMrwResetNInitWait = 0x0000000a; +SDRAM[0].EmcAdrCfg1 = 0x00060302; +SDRAM[0].EmcAdrCfg = 0x01060302; +SDRAM[0].McEmemCfg = 0x00080000; +SDRAM[0].McLowLatencyConfig = 0x80000003; +SDRAM[0].EmcCfg2 = 0x00000403; +SDRAM[0].EmcCfgDigDll = 0xe0000413; +SDRAM[0].EmcCfgClktrim0 = 0x00000000; +SDRAM[0].EmcCfgClktrim1 = 0x00000000; +SDRAM[0].EmcCfgClktrim2 = 0x00000000; +SDRAM[0].EmcCfg = 0x0001ff00; +SDRAM[0].EmcDbg = 0x01000020; +SDRAM[0].AhbArbitrationXbarCtrl = 0x00010000; +SDRAM[0].EmcDllXformDqs = 0x00000010; +SDRAM[0].EmcDllXformQUse = 0x00000008; +SDRAM[0].WarmBootWait = 0x00000001; +SDRAM[0].EmcCttTermCtrl = 0x00000802; +SDRAM[0].EmcOdtWrite = 0x00000000; +SDRAM[0].EmcOdtRead = 0x00000000; +SDRAM[0].EmcZcalRefCnt = 0x00000000; +SDRAM[0].EmcZcalWaitCnt = 0x0000001b; +SDRAM[0].EmcZcalMrwCmd = 0x000a0056; +SDRAM[0].EmcMrwZqInitDev0 = 0x800a00ff; +SDRAM[0].EmcMrwZqInitDev1 = 0x400a00ff; +SDRAM[0].EmcMrwZqInitWait = 0x00000001; +SDRAM[0].EmcDdr2Wait = 0x00000000; +SDRAM[0].PmcDdrPwr = 0x00000000; +SDRAM[0].ApbMiscGpXm2CfgAPadCtrl = 0x77ffc000; +SDRAM[0].ApbMiscGpXm2CfgCPadCtrl2 = 0x08080040; +SDRAM[0].ApbMiscGpXm2CfgCPadCtrl = 0x77fffff8; +SDRAM[0].ApbMiscGpXm2CfgDPadCtrl2 = 0x00000000; +SDRAM[0].ApbMiscGpXm2CfgDPadCtrl = 0x77fffff8; +SDRAM[0].ApbMiscGpXm2ClkCfgPadCtrl = 0x77ffc000; +SDRAM[0].ApbMiscGpXm2CompPadCtrl = 0x01f1f008; +SDRAM[0].ApbMiscGpXm2VttGenPadCtrl = 0x00005500; diff --git a/tegra20/nvidia/whistler/build.sh b/tegra20/nvidia/whistler/build.sh new file mode 100755 index 0000000..36d3665 --- /dev/null +++ b/tegra20/nvidia/whistler/build.sh @@ -0,0 +1,27 @@ +#!/bin/sh + +# Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. +# +# This software is provided 'as-is', without any express or implied +# warranty. In no event will the authors be held liable for any damages +# arising from the use of this software. +# +# Permission is granted to anyone to use this software for any purpose, +# including commercial applications, and to alter it and redistribute it +# freely, subject to the following restrictions: +# +# 1. The origin of this software must not be misrepresented; you must not +# claim that you wrote the original software. If you use this software +# in a product, an acknowledgment in the product documentation would be +# appreciated but is not required. +# 2. Altered source versions must be plainly marked as such, and must not be +# misrepresented as being the original software. +# 3. This notice may not be removed or altered from any source distribution. + +set -e +set -x + +cbootimage -gbct \ + E1108_Elpida_512MB_EDB4032B2PB-6D-F_300MHz_40nm_emmc_x8.bct.cfg \ + E1108_Elpida_512MB_EDB4032B2PB-6D-F_300MHz_40nm_emmc_x8.bct +cbootimage whistler-emmc.img.cfg whistler-emmc.img diff --git a/tegra20/nvidia/whistler/whistler-emmc.img.cfg b/tegra20/nvidia/whistler/whistler-emmc.img.cfg new file mode 100644 index 0000000..606612c --- /dev/null +++ b/tegra20/nvidia/whistler/whistler-emmc.img.cfg @@ -0,0 +1,22 @@ +# Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. +# +# This software is provided 'as-is', without any express or implied +# warranty. In no event will the authors be held liable for any damages +# arising from the use of this software. +# +# Permission is granted to anyone to use this software for any purpose, +# including commercial applications, and to alter it and redistribute it +# freely, subject to the following restrictions: +# +# 1. The origin of this software must not be misrepresented; you must not +# claim that you wrote the original software. If you use this software +# in a product, an acknowledgment in the product documentation would be +# appreciated but is not required. +# 2. Altered source versions must be plainly marked as such, and must not be +# misrepresented as being the original software. +# 3. This notice may not be removed or altered from any source distribution. + +Version = 0x00020001; +Bctcopy = 1; +Bctfile = E1108_Elpida_512MB_EDB4032B2PB-6D-F_300MHz_40nm_emmc_x8.bct; +BootLoader = u-boot.bin,0x00108000,0x00108000,Complete; diff --git a/tegra30/nvidia/beaver/Pm315_Hynix_2GB_H5TC4G83MFR-PBA_400MHz_120613_sdmmc4_x8.bct.cfg b/tegra30/nvidia/beaver/Pm315_Hynix_2GB_H5TC4G83MFR-PBA_400MHz_120613_sdmmc4_x8.bct.cfg new file mode 100644 index 0000000..49f302f --- /dev/null +++ b/tegra30/nvidia/beaver/Pm315_Hynix_2GB_H5TC4G83MFR-PBA_400MHz_120613_sdmmc4_x8.bct.cfg @@ -0,0 +1,819 @@ +# Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. +# +# This software is provided 'as-is', without any express or implied +# warranty. In no event will the authors be held liable for any damages +# arising from the use of this software. +# +# Permission is granted to anyone to use this software for any purpose, +# including commercial applications, and to alter it and redistribute it +# freely, subject to the following restrictions: +# +# 1. The origin of this software must not be misrepresented; you must not +# claim that you wrote the original software. If you use this software +# in a product, an acknowledgment in the product documentation would be +# appreciated but is not required. +# 2. Altered source versions must be plainly marked as such, and must not be +# misrepresented as being the original software. +# 3. This notice may not be removed or altered from any source distribution. + +Version = 0x00030001; +BlockSize = 0x00004000; +PageSize = 0x00000200; +PartitionSize = 0x02000000; +OdmData = 0x800c0000; + +DevType[0] = NvBootDevType_Sdmmc; +DeviceParam[0].SdmmcParams.ClockDivider = 0x00000009; +DeviceParam[0].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_8Bit; +DeviceParam[0].SdmmcParams.MaxPowerClassSupported = 0x00000000; +DeviceParam[0].SdmmcParams.SdController = 0x00000000; + +DevType[1] = NvBootDevType_Sdmmc; +DeviceParam[1].SdmmcParams.ClockDivider = 0x00000009; +DeviceParam[1].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_8Bit; +DeviceParam[1].SdmmcParams.MaxPowerClassSupported = 0x00000000; +DeviceParam[1].SdmmcParams.SdController = 0x00000000; + +DevType[2] = NvBootDevType_Sdmmc; +DeviceParam[2].SdmmcParams.ClockDivider = 0x00000009; +DeviceParam[2].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_8Bit; +DeviceParam[2].SdmmcParams.MaxPowerClassSupported = 0x00000000; +DeviceParam[2].SdmmcParams.SdController = 0x00000000; + +DevType[3] = NvBootDevType_Sdmmc; +DeviceParam[3].SdmmcParams.ClockDivider = 0x00000009; +DeviceParam[3].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_8Bit; +DeviceParam[3].SdmmcParams.MaxPowerClassSupported = 0x00000000; +DeviceParam[3].SdmmcParams.SdController = 0x00000000; + +SDRAM[0].MemoryType = NvBootMemoryType_Ddr3; +SDRAM[0].PllMChargePumpSetupControl = 0x00000008; +SDRAM[0].PllMLoopFilterSetupControl = 0x00000000; +SDRAM[0].PllMInputDivider = 0x0000000c; +SDRAM[0].PllMFeedbackDivider = 0x00000320; +SDRAM[0].PllMPostDivider = 0x00000000; +SDRAM[0].PllMStableTime = 0x0000012c; +SDRAM[0].EmcClockDivider = 0x00000002; +SDRAM[0].EmcAutoCalInterval = 0x001fffff; +SDRAM[0].EmcAutoCalConfig = 0xa0f10000; +SDRAM[0].EmcAutoCalWait = 0x00000064; +SDRAM[0].EmcPinProgramWait = 0x00000001; +SDRAM[0].EmcRc = 0x00000012; +SDRAM[0].EmcRfc = 0x00000066; +SDRAM[0].EmcRas = 0x0000000c; +SDRAM[0].EmcRp = 0x00000004; +SDRAM[0].EmcR2w = 0x00000003; +SDRAM[0].EmcW2r = 0x00000008; +SDRAM[0].EmcR2p = 0x00000002; +SDRAM[0].EmcW2p = 0x0000000a; +SDRAM[0].EmcRrd = 0x00000002; +SDRAM[0].EmcRdRcd = 0x00000004; +SDRAM[0].EmcWrRcd = 0x00000004; +SDRAM[0].EmcRext = 0x00000001; +SDRAM[0].EmcWdv = 0x00000004; +SDRAM[0].EmcQUseExtra = 0x00000000; +SDRAM[0].EmcQUse = 0x00000006; +SDRAM[0].EmcQRst = 0x00000004; +SDRAM[0].EmcQSafe = 0x0000000a; +SDRAM[0].EmcRdv = 0x0000000d; +SDRAM[0].EmcRefresh = 0x00000bf0; +SDRAM[0].EmcBurstRefreshNum = 0x00000000; +SDRAM[0].EmcPdEx2Wr = 0x00000001; +SDRAM[0].EmcPdEx2Rd = 0x00000008; +SDRAM[0].EmcPChg2Pden = 0x00000001; +SDRAM[0].EmcAct2Pden = 0x00000000; +SDRAM[0].EmcAr2Pden = 0x00000008; +SDRAM[0].EmcRw2Pden = 0x0000000f; +SDRAM[0].EmcTxsr = 0x0000006c; +SDRAM[0].EmcTcke = 0x00000004; +SDRAM[0].EmcTfaw = 0x0000000c; +SDRAM[0].EmcTrpab = 0x00000000; +SDRAM[0].EmcTClkStable = 0x00000004; +SDRAM[0].EmcTClkStop = 0x00000005; +SDRAM[0].EmcTRefBw = 0x00000c30; +SDRAM[0].EmcFbioCfg5 = 0x00007088; +SDRAM[0].EmcFbioCfg6 = 0x00000006; +SDRAM[0].EmcFbioSpare = 0xe8000000; +SDRAM[0].EmcMrsResetDllWait = 0x00000000; +SDRAM[0].EmcMrsResetDll = 0x00000000; +SDRAM[0].EmcMrsDdr2DllReset = 0x00000000; +SDRAM[0].EmcMrs = 0x80000521; +SDRAM[0].EmcEmrsEmr2 = 0x80200000; +SDRAM[0].EmcEmrsEmr3 = 0x80300000; +SDRAM[0].EmcEmrsDdr2DllEnable = 0x00000000; +SDRAM[0].EmcEmrsDdr2OcdCalib = 0x00000000; +SDRAM[0].EmcEmrs = 0x80100002; +SDRAM[0].EmcMrw1 = 0x00000000; +SDRAM[0].EmcMrw2 = 0x00000000; +SDRAM[0].EmcMrw3 = 0x00000000; +SDRAM[0].EmcMrwResetCommand = 0x00000000; +SDRAM[0].EmcMrwResetNInitWait = 0x00000000; +SDRAM[0].EmcAdrCfg = 0x00000080; +SDRAM[0].McEmemCfg = 0x00000800; +SDRAM[0].EmcCfg2 = 0x000c0099; +SDRAM[0].EmcCfgDigDll = 0x001d0084; +SDRAM[0].EmcCfgDigDllPeriod = 0x00008000; +SDRAM[0].EmcCfg = 0x23c00000; +SDRAM[0].EmcDbg = 0x01000400; +SDRAM[0].WarmBootWait = 0x00000002; +SDRAM[0].EmcCttTermCtrl = 0x00000802; +SDRAM[0].EmcOdtWrite = 0x00000000; +SDRAM[0].EmcOdtRead = 0x00000000; +SDRAM[0].EmcZcalWaitCnt = 0x00000040; +SDRAM[0].EmcZcalMrwCmd = 0x80000000; +SDRAM[0].EmcDdr2Wait = 0x00000000; +SDRAM[0].PmcDdrPwr = 0x00000003; +SDRAM[0].EmcClockSource = 0x00000000; +SDRAM[0].EmcClockUsePllMUD = 0x00000000; +SDRAM[0].EmcPinExtraWait = 0x00000000; +SDRAM[0].EmcTimingControlWait = 0x00000000; +SDRAM[0].EmcWext = 0x00000000; +SDRAM[0].EmcCtt = 0x00000000; +SDRAM[0].EmcCttDuration = 0x00000000; +SDRAM[0].EmcPreRefreshReqCnt = 0x000002fc; +SDRAM[0].EmcTxsrDll = 0x00000200; +SDRAM[0].EmcCfgRsv = 0xff00ff89; +SDRAM[0].EmcMrwExtra = 0x00000000; +SDRAM[0].EmcWarmBootMrw1 = 0x00000000; +SDRAM[0].EmcWarmBootMrw2 = 0x00000000; +SDRAM[0].EmcWarmBootMrw3 = 0x00000000; +SDRAM[0].EmcWarmBootMrwExtra = 0x00000000; +SDRAM[0].EmcWarmBootExtraModeRegWriteEnable = 0x00000000; +SDRAM[0].EmcExtraModeRegWriteEnable = 0x00000000; +SDRAM[0].EmcMrsWaitCnt = 0x0158000c; +SDRAM[0].EmcCmdQ = 0x10004408; +SDRAM[0].EmcMc2EmcQ = 0x06000404; +SDRAM[0].EmcDynSelfRefControl = 0x800018c8; +SDRAM[0].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; +SDRAM[0].EmcDevSelect = 0x00000002; +SDRAM[0].EmcSelDpdCtrl = 0x0004032c; +SDRAM[0].EmcDllXformDqs0 = 0x00038000; +SDRAM[0].EmcDllXformDqs1 = 0x00038000; +SDRAM[0].EmcDllXformDqs2 = 0x00038000; +SDRAM[0].EmcDllXformDqs3 = 0x00038000; +SDRAM[0].EmcDllXformDqs4 = 0x00038000; +SDRAM[0].EmcDllXformDqs5 = 0x00038000; +SDRAM[0].EmcDllXformDqs6 = 0x00038000; +SDRAM[0].EmcDllXformDqs7 = 0x00038000; +SDRAM[0].EmcDllXformQUse0 = 0x00000000; +SDRAM[0].EmcDllXformQUse1 = 0x00000000; +SDRAM[0].EmcDllXformQUse2 = 0x00000000; +SDRAM[0].EmcDllXformQUse3 = 0x00000000; +SDRAM[0].EmcDllXformQUse4 = 0x00000000; +SDRAM[0].EmcDllXformQUse5 = 0x00000000; +SDRAM[0].EmcDllXformQUse6 = 0x00000000; +SDRAM[0].EmcDllXformQUse7 = 0x00000000; +SDRAM[0].EmcDliTrimTxDqs0 = 0x00000000; +SDRAM[0].EmcDliTrimTxDqs1 = 0x00000000; +SDRAM[0].EmcDliTrimTxDqs2 = 0x00000000; +SDRAM[0].EmcDliTrimTxDqs3 = 0x00000000; +SDRAM[0].EmcDliTrimTxDqs4 = 0x00000000; +SDRAM[0].EmcDliTrimTxDqs5 = 0x00000000; +SDRAM[0].EmcDliTrimTxDqs6 = 0x00000000; +SDRAM[0].EmcDliTrimTxDqs7 = 0x00000000; +SDRAM[0].EmcDllXformDq0 = 0x00030000; +SDRAM[0].EmcDllXformDq1 = 0x00030000; +SDRAM[0].EmcDllXformDq2 = 0x00030000; +SDRAM[0].EmcDllXformDq3 = 0x00030000; +SDRAM[0].EmcZcalInterval = 0x00020000; +SDRAM[0].EmcZcalInitDev0 = 0x80000011; +SDRAM[0].EmcZcalInitDev1 = 0x00000000; +SDRAM[0].EmcZcalInitWait = 0x00000002; +SDRAM[0].EmcZcalColdBootEnable = 0x00000001; +SDRAM[0].EmcZcalWarmBootEnable = 0x00000001; +SDRAM[0].EmcMrwLpddr2ZcalWarmBoot = 0x000a00ab; +SDRAM[0].EmcZqCalDdr3WarmBoot = 0x00000011; +SDRAM[0].EmcZcalWarmBootWait = 0x00000001; +SDRAM[0].EmcMrsWarmBootEnable = 0x00000001; +SDRAM[0].EmcMrsExtra = 0x80000521; +SDRAM[0].EmcWarmBootMrs = 0x80100002; +SDRAM[0].EmcWarmBootEmrs = 0x80000521; +SDRAM[0].EmcWarmBootEmr2 = 0x80200000; +SDRAM[0].EmcWarmBootEmr3 = 0x80300000; +SDRAM[0].EmcWarmBootMrsExtra = 0x80100002; +SDRAM[0].EmcClkenOverride = 0x00000000; +SDRAM[0].EmcExtraRefreshNum = 0x00000002; +SDRAM[0].EmcClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[0].McClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[0].EmcCfgDigDllPeriodWarmBoot = 0x00000003; +SDRAM[0].PmcVddpSel = 0x00000002; +SDRAM[0].PmcDdrCfg = 0x00000002; +SDRAM[0].PmcIoDpdReq = 0x80800000; +SDRAM[0].PmcENoVttGen = 0x00000000; +SDRAM[0].PmcNoIoPower = 0x00000000; +SDRAM[0].EmcXm2CmdPadCtrl = 0x000002a0; +SDRAM[0].EmcXm2CmdPadCtrl2 = 0x770c0000; +SDRAM[0].EmcXm2DqsPadCtrl = 0x770c1414; +SDRAM[0].EmcXm2DqsPadCtrl2 = 0x0800013d; +SDRAM[0].EmcXm2DqsPadCtrl3 = 0x08000021; +SDRAM[0].EmcXm2DqPadCtrl = 0x770c2990; +SDRAM[0].EmcXm2DqPadCtrl2 = 0x00000000; +SDRAM[0].EmcXm2ClkPadCtrl = 0x77fff884; +SDRAM[0].EmcXm2CompPadCtrl = 0x01f1f508; +SDRAM[0].EmcXm2VttGenPadCtrl = 0x05057404; +SDRAM[0].EmcXm2VttGenPadCtrl2 = 0x54000007; +SDRAM[0].EmcXm2QUsePadCtrl = 0x080001e8; +SDRAM[0].McEmemAdrCfg = 0x00000000; +SDRAM[0].McEmemAdrCfgDev0 = 0x00090303; +SDRAM[0].McEmemAdrCfgDev1 = 0x00090303; +SDRAM[0].McEmemArbCfg = 0x00000006; +SDRAM[0].McEmemArbOutstandingReq = 0x80000048; +SDRAM[0].McEmemArbTimingRcd = 0x00000001; +SDRAM[0].McEmemArbTimingRp = 0x00000002; +SDRAM[0].McEmemArbTimingRc = 0x00000009; +SDRAM[0].McEmemArbTimingRas = 0x00000005; +SDRAM[0].McEmemArbTimingFaw = 0x00000005; +SDRAM[0].McEmemArbTimingRrd = 0x00000001; +SDRAM[0].McEmemArbTimingRap2Pre = 0x00000002; +SDRAM[0].McEmemArbTimingWap2Pre = 0x00000008; +SDRAM[0].McEmemArbTimingR2R = 0x00000002; +SDRAM[0].McEmemArbTimingW2W = 0x00000002; +SDRAM[0].McEmemArbTimingR2W = 0x00000003; +SDRAM[0].McEmemArbTimingW2R = 0x00000006; +SDRAM[0].McEmemArbDaTurns = 0x06030202; +SDRAM[0].McEmemArbDaCovers = 0x000d0709; +SDRAM[0].McEmemArbMisc0 = 0x7086120a; +SDRAM[0].McEmemArbMisc1 = 0x78000000; +SDRAM[0].McEmemArbRing1Throttle = 0x001f0000; +SDRAM[0].McEmemArbOverride = 0x00000080; +SDRAM[0].McEmemArbRsv = 0xff00ff00; +SDRAM[0].McClkenOverride = 0x00000000; + +SDRAM[1].MemoryType = NvBootMemoryType_Ddr3; +SDRAM[1].PllMChargePumpSetupControl = 0x00000008; +SDRAM[1].PllMLoopFilterSetupControl = 0x00000000; +SDRAM[1].PllMInputDivider = 0x0000000c; +SDRAM[1].PllMFeedbackDivider = 0x00000320; +SDRAM[1].PllMPostDivider = 0x00000000; +SDRAM[1].PllMStableTime = 0x0000012c; +SDRAM[1].EmcClockDivider = 0x00000002; +SDRAM[1].EmcAutoCalInterval = 0x001fffff; +SDRAM[1].EmcAutoCalConfig = 0xa0f10000; +SDRAM[1].EmcAutoCalWait = 0x00000064; +SDRAM[1].EmcPinProgramWait = 0x00000001; +SDRAM[1].EmcRc = 0x00000012; +SDRAM[1].EmcRfc = 0x00000066; +SDRAM[1].EmcRas = 0x0000000c; +SDRAM[1].EmcRp = 0x00000004; +SDRAM[1].EmcR2w = 0x00000003; +SDRAM[1].EmcW2r = 0x00000008; +SDRAM[1].EmcR2p = 0x00000002; +SDRAM[1].EmcW2p = 0x0000000a; +SDRAM[1].EmcRrd = 0x00000002; +SDRAM[1].EmcRdRcd = 0x00000004; +SDRAM[1].EmcWrRcd = 0x00000004; +SDRAM[1].EmcRext = 0x00000001; +SDRAM[1].EmcWdv = 0x00000004; +SDRAM[1].EmcQUseExtra = 0x00000000; +SDRAM[1].EmcQUse = 0x00000006; +SDRAM[1].EmcQRst = 0x00000004; +SDRAM[1].EmcQSafe = 0x0000000a; +SDRAM[1].EmcRdv = 0x0000000d; +SDRAM[1].EmcRefresh = 0x00000bf0; +SDRAM[1].EmcBurstRefreshNum = 0x00000000; +SDRAM[1].EmcPdEx2Wr = 0x00000001; +SDRAM[1].EmcPdEx2Rd = 0x00000008; +SDRAM[1].EmcPChg2Pden = 0x00000001; +SDRAM[1].EmcAct2Pden = 0x00000000; +SDRAM[1].EmcAr2Pden = 0x00000008; +SDRAM[1].EmcRw2Pden = 0x0000000f; +SDRAM[1].EmcTxsr = 0x0000006c; +SDRAM[1].EmcTcke = 0x00000004; +SDRAM[1].EmcTfaw = 0x0000000c; +SDRAM[1].EmcTrpab = 0x00000000; +SDRAM[1].EmcTClkStable = 0x00000004; +SDRAM[1].EmcTClkStop = 0x00000005; +SDRAM[1].EmcTRefBw = 0x00000c30; +SDRAM[1].EmcFbioCfg5 = 0x00007088; +SDRAM[1].EmcFbioCfg6 = 0x00000006; +SDRAM[1].EmcFbioSpare = 0xe8000000; +SDRAM[1].EmcMrsResetDllWait = 0x00000000; +SDRAM[1].EmcMrsResetDll = 0x00000000; +SDRAM[1].EmcMrsDdr2DllReset = 0x00000000; +SDRAM[1].EmcMrs = 0x80000521; +SDRAM[1].EmcEmrsEmr2 = 0x80200000; +SDRAM[1].EmcEmrsEmr3 = 0x80300000; +SDRAM[1].EmcEmrsDdr2DllEnable = 0x00000000; +SDRAM[1].EmcEmrsDdr2OcdCalib = 0x00000000; +SDRAM[1].EmcEmrs = 0x80100002; +SDRAM[1].EmcMrw1 = 0x00000000; +SDRAM[1].EmcMrw2 = 0x00000000; +SDRAM[1].EmcMrw3 = 0x00000000; +SDRAM[1].EmcMrwResetCommand = 0x00000000; +SDRAM[1].EmcMrwResetNInitWait = 0x00000000; +SDRAM[1].EmcAdrCfg = 0x00000080; +SDRAM[1].McEmemCfg = 0x00000800; +SDRAM[1].EmcCfg2 = 0x000c0099; +SDRAM[1].EmcCfgDigDll = 0x001d0084; +SDRAM[1].EmcCfgDigDllPeriod = 0x00008000; +SDRAM[1].EmcCfg = 0x23c00000; +SDRAM[1].EmcDbg = 0x01000400; +SDRAM[1].WarmBootWait = 0x00000002; +SDRAM[1].EmcCttTermCtrl = 0x00000802; +SDRAM[1].EmcOdtWrite = 0x00000000; +SDRAM[1].EmcOdtRead = 0x00000000; +SDRAM[1].EmcZcalWaitCnt = 0x00000040; +SDRAM[1].EmcZcalMrwCmd = 0x80000000; +SDRAM[1].EmcDdr2Wait = 0x00000000; +SDRAM[1].PmcDdrPwr = 0x00000003; +SDRAM[1].EmcClockSource = 0x00000000; +SDRAM[1].EmcClockUsePllMUD = 0x00000000; +SDRAM[1].EmcPinExtraWait = 0x00000000; +SDRAM[1].EmcTimingControlWait = 0x00000000; +SDRAM[1].EmcWext = 0x00000000; +SDRAM[1].EmcCtt = 0x00000000; +SDRAM[1].EmcCttDuration = 0x00000000; +SDRAM[1].EmcPreRefreshReqCnt = 0x000002fc; +SDRAM[1].EmcTxsrDll = 0x00000200; +SDRAM[1].EmcCfgRsv = 0xff00ff89; +SDRAM[1].EmcMrwExtra = 0x00000000; +SDRAM[1].EmcWarmBootMrw1 = 0x00000000; +SDRAM[1].EmcWarmBootMrw2 = 0x00000000; +SDRAM[1].EmcWarmBootMrw3 = 0x00000000; +SDRAM[1].EmcWarmBootMrwExtra = 0x00000000; +SDRAM[1].EmcWarmBootExtraModeRegWriteEnable = 0x00000000; +SDRAM[1].EmcExtraModeRegWriteEnable = 0x00000000; +SDRAM[1].EmcMrsWaitCnt = 0x0158000c; +SDRAM[1].EmcCmdQ = 0x10004408; +SDRAM[1].EmcMc2EmcQ = 0x06000404; +SDRAM[1].EmcDynSelfRefControl = 0x800018c8; +SDRAM[1].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; +SDRAM[1].EmcDevSelect = 0x00000002; +SDRAM[1].EmcSelDpdCtrl = 0x0004032c; +SDRAM[1].EmcDllXformDqs0 = 0x00038000; +SDRAM[1].EmcDllXformDqs1 = 0x00038000; +SDRAM[1].EmcDllXformDqs2 = 0x00038000; +SDRAM[1].EmcDllXformDqs3 = 0x00038000; +SDRAM[1].EmcDllXformDqs4 = 0x00038000; +SDRAM[1].EmcDllXformDqs5 = 0x00038000; +SDRAM[1].EmcDllXformDqs6 = 0x00038000; +SDRAM[1].EmcDllXformDqs7 = 0x00038000; +SDRAM[1].EmcDllXformQUse0 = 0x00000000; +SDRAM[1].EmcDllXformQUse1 = 0x00000000; +SDRAM[1].EmcDllXformQUse2 = 0x00000000; +SDRAM[1].EmcDllXformQUse3 = 0x00000000; +SDRAM[1].EmcDllXformQUse4 = 0x00000000; +SDRAM[1].EmcDllXformQUse5 = 0x00000000; +SDRAM[1].EmcDllXformQUse6 = 0x00000000; +SDRAM[1].EmcDllXformQUse7 = 0x00000000; +SDRAM[1].EmcDliTrimTxDqs0 = 0x00000000; +SDRAM[1].EmcDliTrimTxDqs1 = 0x00000000; +SDRAM[1].EmcDliTrimTxDqs2 = 0x00000000; +SDRAM[1].EmcDliTrimTxDqs3 = 0x00000000; +SDRAM[1].EmcDliTrimTxDqs4 = 0x00000000; +SDRAM[1].EmcDliTrimTxDqs5 = 0x00000000; +SDRAM[1].EmcDliTrimTxDqs6 = 0x00000000; +SDRAM[1].EmcDliTrimTxDqs7 = 0x00000000; +SDRAM[1].EmcDllXformDq0 = 0x00030000; +SDRAM[1].EmcDllXformDq1 = 0x00030000; +SDRAM[1].EmcDllXformDq2 = 0x00030000; +SDRAM[1].EmcDllXformDq3 = 0x00030000; +SDRAM[1].EmcZcalInterval = 0x00020000; +SDRAM[1].EmcZcalInitDev0 = 0x80000011; +SDRAM[1].EmcZcalInitDev1 = 0x00000000; +SDRAM[1].EmcZcalInitWait = 0x00000002; +SDRAM[1].EmcZcalColdBootEnable = 0x00000001; +SDRAM[1].EmcZcalWarmBootEnable = 0x00000001; +SDRAM[1].EmcMrwLpddr2ZcalWarmBoot = 0x000a00ab; +SDRAM[1].EmcZqCalDdr3WarmBoot = 0x00000011; +SDRAM[1].EmcZcalWarmBootWait = 0x00000001; +SDRAM[1].EmcMrsWarmBootEnable = 0x00000001; +SDRAM[1].EmcMrsExtra = 0x80000521; +SDRAM[1].EmcWarmBootMrs = 0x80100002; +SDRAM[1].EmcWarmBootEmrs = 0x80000521; +SDRAM[1].EmcWarmBootEmr2 = 0x80200000; +SDRAM[1].EmcWarmBootEmr3 = 0x80300000; +SDRAM[1].EmcWarmBootMrsExtra = 0x80100002; +SDRAM[1].EmcClkenOverride = 0x00000000; +SDRAM[1].EmcExtraRefreshNum = 0x00000002; +SDRAM[1].EmcClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[1].McClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[1].EmcCfgDigDllPeriodWarmBoot = 0x00000003; +SDRAM[1].PmcVddpSel = 0x00000002; +SDRAM[1].PmcDdrCfg = 0x00000002; +SDRAM[1].PmcIoDpdReq = 0x80800000; +SDRAM[1].PmcENoVttGen = 0x00000000; +SDRAM[1].PmcNoIoPower = 0x00000000; +SDRAM[1].EmcXm2CmdPadCtrl = 0x000002a0; +SDRAM[1].EmcXm2CmdPadCtrl2 = 0x770c0000; +SDRAM[1].EmcXm2DqsPadCtrl = 0x770c1414; +SDRAM[1].EmcXm2DqsPadCtrl2 = 0x0800013d; +SDRAM[1].EmcXm2DqsPadCtrl3 = 0x08000021; +SDRAM[1].EmcXm2DqPadCtrl = 0x770c2990; +SDRAM[1].EmcXm2DqPadCtrl2 = 0x00000000; +SDRAM[1].EmcXm2ClkPadCtrl = 0x77fff884; +SDRAM[1].EmcXm2CompPadCtrl = 0x01f1f508; +SDRAM[1].EmcXm2VttGenPadCtrl = 0x05057404; +SDRAM[1].EmcXm2VttGenPadCtrl2 = 0x54000007; +SDRAM[1].EmcXm2QUsePadCtrl = 0x080001e8; +SDRAM[1].McEmemAdrCfg = 0x00000000; +SDRAM[1].McEmemAdrCfgDev0 = 0x00090303; +SDRAM[1].McEmemAdrCfgDev1 = 0x00090303; +SDRAM[1].McEmemArbCfg = 0x00000006; +SDRAM[1].McEmemArbOutstandingReq = 0x80000048; +SDRAM[1].McEmemArbTimingRcd = 0x00000001; +SDRAM[1].McEmemArbTimingRp = 0x00000002; +SDRAM[1].McEmemArbTimingRc = 0x00000009; +SDRAM[1].McEmemArbTimingRas = 0x00000005; +SDRAM[1].McEmemArbTimingFaw = 0x00000005; +SDRAM[1].McEmemArbTimingRrd = 0x00000001; +SDRAM[1].McEmemArbTimingRap2Pre = 0x00000002; +SDRAM[1].McEmemArbTimingWap2Pre = 0x00000008; +SDRAM[1].McEmemArbTimingR2R = 0x00000002; +SDRAM[1].McEmemArbTimingW2W = 0x00000002; +SDRAM[1].McEmemArbTimingR2W = 0x00000003; +SDRAM[1].McEmemArbTimingW2R = 0x00000006; +SDRAM[1].McEmemArbDaTurns = 0x06030202; +SDRAM[1].McEmemArbDaCovers = 0x000d0709; +SDRAM[1].McEmemArbMisc0 = 0x7086120a; +SDRAM[1].McEmemArbMisc1 = 0x78000000; +SDRAM[1].McEmemArbRing1Throttle = 0x001f0000; +SDRAM[1].McEmemArbOverride = 0x00000080; +SDRAM[1].McEmemArbRsv = 0xff00ff00; +SDRAM[1].McClkenOverride = 0x00000000; + +SDRAM[2].MemoryType = NvBootMemoryType_Ddr3; +SDRAM[2].PllMChargePumpSetupControl = 0x00000008; +SDRAM[2].PllMLoopFilterSetupControl = 0x00000000; +SDRAM[2].PllMInputDivider = 0x0000000c; +SDRAM[2].PllMFeedbackDivider = 0x00000320; +SDRAM[2].PllMPostDivider = 0x00000000; +SDRAM[2].PllMStableTime = 0x0000012c; +SDRAM[2].EmcClockDivider = 0x00000002; +SDRAM[2].EmcAutoCalInterval = 0x001fffff; +SDRAM[2].EmcAutoCalConfig = 0xa0f10000; +SDRAM[2].EmcAutoCalWait = 0x00000064; +SDRAM[2].EmcPinProgramWait = 0x00000001; +SDRAM[2].EmcRc = 0x00000012; +SDRAM[2].EmcRfc = 0x00000066; +SDRAM[2].EmcRas = 0x0000000c; +SDRAM[2].EmcRp = 0x00000004; +SDRAM[2].EmcR2w = 0x00000003; +SDRAM[2].EmcW2r = 0x00000008; +SDRAM[2].EmcR2p = 0x00000002; +SDRAM[2].EmcW2p = 0x0000000a; +SDRAM[2].EmcRrd = 0x00000002; +SDRAM[2].EmcRdRcd = 0x00000004; +SDRAM[2].EmcWrRcd = 0x00000004; +SDRAM[2].EmcRext = 0x00000001; +SDRAM[2].EmcWdv = 0x00000004; +SDRAM[2].EmcQUseExtra = 0x00000000; +SDRAM[2].EmcQUse = 0x00000006; +SDRAM[2].EmcQRst = 0x00000004; +SDRAM[2].EmcQSafe = 0x0000000a; +SDRAM[2].EmcRdv = 0x0000000d; +SDRAM[2].EmcRefresh = 0x00000bf0; +SDRAM[2].EmcBurstRefreshNum = 0x00000000; +SDRAM[2].EmcPdEx2Wr = 0x00000001; +SDRAM[2].EmcPdEx2Rd = 0x00000008; +SDRAM[2].EmcPChg2Pden = 0x00000001; +SDRAM[2].EmcAct2Pden = 0x00000000; +SDRAM[2].EmcAr2Pden = 0x00000008; +SDRAM[2].EmcRw2Pden = 0x0000000f; +SDRAM[2].EmcTxsr = 0x0000006c; +SDRAM[2].EmcTcke = 0x00000004; +SDRAM[2].EmcTfaw = 0x0000000c; +SDRAM[2].EmcTrpab = 0x00000000; +SDRAM[2].EmcTClkStable = 0x00000004; +SDRAM[2].EmcTClkStop = 0x00000005; +SDRAM[2].EmcTRefBw = 0x00000c30; +SDRAM[2].EmcFbioCfg5 = 0x00007088; +SDRAM[2].EmcFbioCfg6 = 0x00000006; +SDRAM[2].EmcFbioSpare = 0xe8000000; +SDRAM[2].EmcMrsResetDllWait = 0x00000000; +SDRAM[2].EmcMrsResetDll = 0x00000000; +SDRAM[2].EmcMrsDdr2DllReset = 0x00000000; +SDRAM[2].EmcMrs = 0x80000521; +SDRAM[2].EmcEmrsEmr2 = 0x80200000; +SDRAM[2].EmcEmrsEmr3 = 0x80300000; +SDRAM[2].EmcEmrsDdr2DllEnable = 0x00000000; +SDRAM[2].EmcEmrsDdr2OcdCalib = 0x00000000; +SDRAM[2].EmcEmrs = 0x80100002; +SDRAM[2].EmcMrw1 = 0x00000000; +SDRAM[2].EmcMrw2 = 0x00000000; +SDRAM[2].EmcMrw3 = 0x00000000; +SDRAM[2].EmcMrwResetCommand = 0x00000000; +SDRAM[2].EmcMrwResetNInitWait = 0x00000000; +SDRAM[2].EmcAdrCfg = 0x00000080; +SDRAM[2].McEmemCfg = 0x00000800; +SDRAM[2].EmcCfg2 = 0x000c0099; +SDRAM[2].EmcCfgDigDll = 0x001d0084; +SDRAM[2].EmcCfgDigDllPeriod = 0x00008000; +SDRAM[2].EmcCfg = 0x23c00000; +SDRAM[2].EmcDbg = 0x01000400; +SDRAM[2].WarmBootWait = 0x00000002; +SDRAM[2].EmcCttTermCtrl = 0x00000802; +SDRAM[2].EmcOdtWrite = 0x00000000; +SDRAM[2].EmcOdtRead = 0x00000000; +SDRAM[2].EmcZcalWaitCnt = 0x00000040; +SDRAM[2].EmcZcalMrwCmd = 0x80000000; +SDRAM[2].EmcDdr2Wait = 0x00000000; +SDRAM[2].PmcDdrPwr = 0x00000003; +SDRAM[2].EmcClockSource = 0x00000000; +SDRAM[2].EmcClockUsePllMUD = 0x00000000; +SDRAM[2].EmcPinExtraWait = 0x00000000; +SDRAM[2].EmcTimingControlWait = 0x00000000; +SDRAM[2].EmcWext = 0x00000000; +SDRAM[2].EmcCtt = 0x00000000; +SDRAM[2].EmcCttDuration = 0x00000000; +SDRAM[2].EmcPreRefreshReqCnt = 0x000002fc; +SDRAM[2].EmcTxsrDll = 0x00000200; +SDRAM[2].EmcCfgRsv = 0xff00ff89; +SDRAM[2].EmcMrwExtra = 0x00000000; +SDRAM[2].EmcWarmBootMrw1 = 0x00000000; +SDRAM[2].EmcWarmBootMrw2 = 0x00000000; +SDRAM[2].EmcWarmBootMrw3 = 0x00000000; +SDRAM[2].EmcWarmBootMrwExtra = 0x00000000; +SDRAM[2].EmcWarmBootExtraModeRegWriteEnable = 0x00000000; +SDRAM[2].EmcExtraModeRegWriteEnable = 0x00000000; +SDRAM[2].EmcMrsWaitCnt = 0x0158000c; +SDRAM[2].EmcCmdQ = 0x10004408; +SDRAM[2].EmcMc2EmcQ = 0x06000404; +SDRAM[2].EmcDynSelfRefControl = 0x800018c8; +SDRAM[2].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; +SDRAM[2].EmcDevSelect = 0x00000002; +SDRAM[2].EmcSelDpdCtrl = 0x0004032c; +SDRAM[2].EmcDllXformDqs0 = 0x00038000; +SDRAM[2].EmcDllXformDqs1 = 0x00038000; +SDRAM[2].EmcDllXformDqs2 = 0x00038000; +SDRAM[2].EmcDllXformDqs3 = 0x00038000; +SDRAM[2].EmcDllXformDqs4 = 0x00038000; +SDRAM[2].EmcDllXformDqs5 = 0x00038000; +SDRAM[2].EmcDllXformDqs6 = 0x00038000; +SDRAM[2].EmcDllXformDqs7 = 0x00038000; +SDRAM[2].EmcDllXformQUse0 = 0x00000000; +SDRAM[2].EmcDllXformQUse1 = 0x00000000; +SDRAM[2].EmcDllXformQUse2 = 0x00000000; +SDRAM[2].EmcDllXformQUse3 = 0x00000000; +SDRAM[2].EmcDllXformQUse4 = 0x00000000; +SDRAM[2].EmcDllXformQUse5 = 0x00000000; +SDRAM[2].EmcDllXformQUse6 = 0x00000000; +SDRAM[2].EmcDllXformQUse7 = 0x00000000; +SDRAM[2].EmcDliTrimTxDqs0 = 0x00000000; +SDRAM[2].EmcDliTrimTxDqs1 = 0x00000000; +SDRAM[2].EmcDliTrimTxDqs2 = 0x00000000; +SDRAM[2].EmcDliTrimTxDqs3 = 0x00000000; +SDRAM[2].EmcDliTrimTxDqs4 = 0x00000000; +SDRAM[2].EmcDliTrimTxDqs5 = 0x00000000; +SDRAM[2].EmcDliTrimTxDqs6 = 0x00000000; +SDRAM[2].EmcDliTrimTxDqs7 = 0x00000000; +SDRAM[2].EmcDllXformDq0 = 0x00030000; +SDRAM[2].EmcDllXformDq1 = 0x00030000; +SDRAM[2].EmcDllXformDq2 = 0x00030000; +SDRAM[2].EmcDllXformDq3 = 0x00030000; +SDRAM[2].EmcZcalInterval = 0x00020000; +SDRAM[2].EmcZcalInitDev0 = 0x80000011; +SDRAM[2].EmcZcalInitDev1 = 0x00000000; +SDRAM[2].EmcZcalInitWait = 0x00000002; +SDRAM[2].EmcZcalColdBootEnable = 0x00000001; +SDRAM[2].EmcZcalWarmBootEnable = 0x00000001; +SDRAM[2].EmcMrwLpddr2ZcalWarmBoot = 0x000a00ab; +SDRAM[2].EmcZqCalDdr3WarmBoot = 0x00000011; +SDRAM[2].EmcZcalWarmBootWait = 0x00000001; +SDRAM[2].EmcMrsWarmBootEnable = 0x00000001; +SDRAM[2].EmcMrsExtra = 0x80000521; +SDRAM[2].EmcWarmBootMrs = 0x80100002; +SDRAM[2].EmcWarmBootEmrs = 0x80000521; +SDRAM[2].EmcWarmBootEmr2 = 0x80200000; +SDRAM[2].EmcWarmBootEmr3 = 0x80300000; +SDRAM[2].EmcWarmBootMrsExtra = 0x80100002; +SDRAM[2].EmcClkenOverride = 0x00000000; +SDRAM[2].EmcExtraRefreshNum = 0x00000002; +SDRAM[2].EmcClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[2].McClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[2].EmcCfgDigDllPeriodWarmBoot = 0x00000003; +SDRAM[2].PmcVddpSel = 0x00000002; +SDRAM[2].PmcDdrCfg = 0x00000002; +SDRAM[2].PmcIoDpdReq = 0x80800000; +SDRAM[2].PmcENoVttGen = 0x00000000; +SDRAM[2].PmcNoIoPower = 0x00000000; +SDRAM[2].EmcXm2CmdPadCtrl = 0x000002a0; +SDRAM[2].EmcXm2CmdPadCtrl2 = 0x770c0000; +SDRAM[2].EmcXm2DqsPadCtrl = 0x770c1414; +SDRAM[2].EmcXm2DqsPadCtrl2 = 0x0800013d; +SDRAM[2].EmcXm2DqsPadCtrl3 = 0x08000021; +SDRAM[2].EmcXm2DqPadCtrl = 0x770c2990; +SDRAM[2].EmcXm2DqPadCtrl2 = 0x00000000; +SDRAM[2].EmcXm2ClkPadCtrl = 0x77fff884; +SDRAM[2].EmcXm2CompPadCtrl = 0x01f1f508; +SDRAM[2].EmcXm2VttGenPadCtrl = 0x05057404; +SDRAM[2].EmcXm2VttGenPadCtrl2 = 0x54000007; +SDRAM[2].EmcXm2QUsePadCtrl = 0x080001e8; +SDRAM[2].McEmemAdrCfg = 0x00000000; +SDRAM[2].McEmemAdrCfgDev0 = 0x00090303; +SDRAM[2].McEmemAdrCfgDev1 = 0x00090303; +SDRAM[2].McEmemArbCfg = 0x00000006; +SDRAM[2].McEmemArbOutstandingReq = 0x80000048; +SDRAM[2].McEmemArbTimingRcd = 0x00000001; +SDRAM[2].McEmemArbTimingRp = 0x00000002; +SDRAM[2].McEmemArbTimingRc = 0x00000009; +SDRAM[2].McEmemArbTimingRas = 0x00000005; +SDRAM[2].McEmemArbTimingFaw = 0x00000005; +SDRAM[2].McEmemArbTimingRrd = 0x00000001; +SDRAM[2].McEmemArbTimingRap2Pre = 0x00000002; +SDRAM[2].McEmemArbTimingWap2Pre = 0x00000008; +SDRAM[2].McEmemArbTimingR2R = 0x00000002; +SDRAM[2].McEmemArbTimingW2W = 0x00000002; +SDRAM[2].McEmemArbTimingR2W = 0x00000003; +SDRAM[2].McEmemArbTimingW2R = 0x00000006; +SDRAM[2].McEmemArbDaTurns = 0x06030202; +SDRAM[2].McEmemArbDaCovers = 0x000d0709; +SDRAM[2].McEmemArbMisc0 = 0x7086120a; +SDRAM[2].McEmemArbMisc1 = 0x78000000; +SDRAM[2].McEmemArbRing1Throttle = 0x001f0000; +SDRAM[2].McEmemArbOverride = 0x00000080; +SDRAM[2].McEmemArbRsv = 0xff00ff00; +SDRAM[2].McClkenOverride = 0x00000000; + +SDRAM[3].MemoryType = NvBootMemoryType_Ddr3; +SDRAM[3].PllMChargePumpSetupControl = 0x00000008; +SDRAM[3].PllMLoopFilterSetupControl = 0x00000000; +SDRAM[3].PllMInputDivider = 0x0000000c; +SDRAM[3].PllMFeedbackDivider = 0x00000320; +SDRAM[3].PllMPostDivider = 0x00000000; +SDRAM[3].PllMStableTime = 0x0000012c; +SDRAM[3].EmcClockDivider = 0x00000002; +SDRAM[3].EmcAutoCalInterval = 0x001fffff; +SDRAM[3].EmcAutoCalConfig = 0xa0f10000; +SDRAM[3].EmcAutoCalWait = 0x00000064; +SDRAM[3].EmcPinProgramWait = 0x00000001; +SDRAM[3].EmcRc = 0x00000012; +SDRAM[3].EmcRfc = 0x00000066; +SDRAM[3].EmcRas = 0x0000000c; +SDRAM[3].EmcRp = 0x00000004; +SDRAM[3].EmcR2w = 0x00000003; +SDRAM[3].EmcW2r = 0x00000008; +SDRAM[3].EmcR2p = 0x00000002; +SDRAM[3].EmcW2p = 0x0000000a; +SDRAM[3].EmcRrd = 0x00000002; +SDRAM[3].EmcRdRcd = 0x00000004; +SDRAM[3].EmcWrRcd = 0x00000004; +SDRAM[3].EmcRext = 0x00000001; +SDRAM[3].EmcWdv = 0x00000004; +SDRAM[3].EmcQUseExtra = 0x00000000; +SDRAM[3].EmcQUse = 0x00000006; +SDRAM[3].EmcQRst = 0x00000004; +SDRAM[3].EmcQSafe = 0x0000000a; +SDRAM[3].EmcRdv = 0x0000000d; +SDRAM[3].EmcRefresh = 0x00000bf0; +SDRAM[3].EmcBurstRefreshNum = 0x00000000; +SDRAM[3].EmcPdEx2Wr = 0x00000001; +SDRAM[3].EmcPdEx2Rd = 0x00000008; +SDRAM[3].EmcPChg2Pden = 0x00000001; +SDRAM[3].EmcAct2Pden = 0x00000000; +SDRAM[3].EmcAr2Pden = 0x00000008; +SDRAM[3].EmcRw2Pden = 0x0000000f; +SDRAM[3].EmcTxsr = 0x0000006c; +SDRAM[3].EmcTcke = 0x00000004; +SDRAM[3].EmcTfaw = 0x0000000c; +SDRAM[3].EmcTrpab = 0x00000000; +SDRAM[3].EmcTClkStable = 0x00000004; +SDRAM[3].EmcTClkStop = 0x00000005; +SDRAM[3].EmcTRefBw = 0x00000c30; +SDRAM[3].EmcFbioCfg5 = 0x00007088; +SDRAM[3].EmcFbioCfg6 = 0x00000006; +SDRAM[3].EmcFbioSpare = 0xe8000000; +SDRAM[3].EmcMrsResetDllWait = 0x00000000; +SDRAM[3].EmcMrsResetDll = 0x00000000; +SDRAM[3].EmcMrsDdr2DllReset = 0x00000000; +SDRAM[3].EmcMrs = 0x80000521; +SDRAM[3].EmcEmrsEmr2 = 0x80200000; +SDRAM[3].EmcEmrsEmr3 = 0x80300000; +SDRAM[3].EmcEmrsDdr2DllEnable = 0x00000000; +SDRAM[3].EmcEmrsDdr2OcdCalib = 0x00000000; +SDRAM[3].EmcEmrs = 0x80100002; +SDRAM[3].EmcMrw1 = 0x00000000; +SDRAM[3].EmcMrw2 = 0x00000000; +SDRAM[3].EmcMrw3 = 0x00000000; +SDRAM[3].EmcMrwResetCommand = 0x00000000; +SDRAM[3].EmcMrwResetNInitWait = 0x00000000; +SDRAM[3].EmcAdrCfg = 0x00000080; +SDRAM[3].McEmemCfg = 0x00000800; +SDRAM[3].EmcCfg2 = 0x000c0099; +SDRAM[3].EmcCfgDigDll = 0x001d0084; +SDRAM[3].EmcCfgDigDllPeriod = 0x00008000; +SDRAM[3].EmcCfg = 0x23c00000; +SDRAM[3].EmcDbg = 0x01000400; +SDRAM[3].WarmBootWait = 0x00000002; +SDRAM[3].EmcCttTermCtrl = 0x00000802; +SDRAM[3].EmcOdtWrite = 0x00000000; +SDRAM[3].EmcOdtRead = 0x00000000; +SDRAM[3].EmcZcalWaitCnt = 0x00000040; +SDRAM[3].EmcZcalMrwCmd = 0x80000000; +SDRAM[3].EmcDdr2Wait = 0x00000000; +SDRAM[3].PmcDdrPwr = 0x00000003; +SDRAM[3].EmcClockSource = 0x00000000; +SDRAM[3].EmcClockUsePllMUD = 0x00000000; +SDRAM[3].EmcPinExtraWait = 0x00000000; +SDRAM[3].EmcTimingControlWait = 0x00000000; +SDRAM[3].EmcWext = 0x00000000; +SDRAM[3].EmcCtt = 0x00000000; +SDRAM[3].EmcCttDuration = 0x00000000; +SDRAM[3].EmcPreRefreshReqCnt = 0x000002fc; +SDRAM[3].EmcTxsrDll = 0x00000200; +SDRAM[3].EmcCfgRsv = 0xff00ff89; +SDRAM[3].EmcMrwExtra = 0x00000000; +SDRAM[3].EmcWarmBootMrw1 = 0x00000000; +SDRAM[3].EmcWarmBootMrw2 = 0x00000000; +SDRAM[3].EmcWarmBootMrw3 = 0x00000000; +SDRAM[3].EmcWarmBootMrwExtra = 0x00000000; +SDRAM[3].EmcWarmBootExtraModeRegWriteEnable = 0x00000000; +SDRAM[3].EmcExtraModeRegWriteEnable = 0x00000000; +SDRAM[3].EmcMrsWaitCnt = 0x0158000c; +SDRAM[3].EmcCmdQ = 0x10004408; +SDRAM[3].EmcMc2EmcQ = 0x06000404; +SDRAM[3].EmcDynSelfRefControl = 0x800018c8; +SDRAM[3].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; +SDRAM[3].EmcDevSelect = 0x00000002; +SDRAM[3].EmcSelDpdCtrl = 0x0004032c; +SDRAM[3].EmcDllXformDqs0 = 0x00038000; +SDRAM[3].EmcDllXformDqs1 = 0x00038000; +SDRAM[3].EmcDllXformDqs2 = 0x00038000; +SDRAM[3].EmcDllXformDqs3 = 0x00038000; +SDRAM[3].EmcDllXformDqs4 = 0x00038000; +SDRAM[3].EmcDllXformDqs5 = 0x00038000; +SDRAM[3].EmcDllXformDqs6 = 0x00038000; +SDRAM[3].EmcDllXformDqs7 = 0x00038000; +SDRAM[3].EmcDllXformQUse0 = 0x00000000; +SDRAM[3].EmcDllXformQUse1 = 0x00000000; +SDRAM[3].EmcDllXformQUse2 = 0x00000000; +SDRAM[3].EmcDllXformQUse3 = 0x00000000; +SDRAM[3].EmcDllXformQUse4 = 0x00000000; +SDRAM[3].EmcDllXformQUse5 = 0x00000000; +SDRAM[3].EmcDllXformQUse6 = 0x00000000; +SDRAM[3].EmcDllXformQUse7 = 0x00000000; +SDRAM[3].EmcDliTrimTxDqs0 = 0x00000000; +SDRAM[3].EmcDliTrimTxDqs1 = 0x00000000; +SDRAM[3].EmcDliTrimTxDqs2 = 0x00000000; +SDRAM[3].EmcDliTrimTxDqs3 = 0x00000000; +SDRAM[3].EmcDliTrimTxDqs4 = 0x00000000; +SDRAM[3].EmcDliTrimTxDqs5 = 0x00000000; +SDRAM[3].EmcDliTrimTxDqs6 = 0x00000000; +SDRAM[3].EmcDliTrimTxDqs7 = 0x00000000; +SDRAM[3].EmcDllXformDq0 = 0x00030000; +SDRAM[3].EmcDllXformDq1 = 0x00030000; +SDRAM[3].EmcDllXformDq2 = 0x00030000; +SDRAM[3].EmcDllXformDq3 = 0x00030000; +SDRAM[3].EmcZcalInterval = 0x00020000; +SDRAM[3].EmcZcalInitDev0 = 0x80000011; +SDRAM[3].EmcZcalInitDev1 = 0x00000000; +SDRAM[3].EmcZcalInitWait = 0x00000002; +SDRAM[3].EmcZcalColdBootEnable = 0x00000001; +SDRAM[3].EmcZcalWarmBootEnable = 0x00000001; +SDRAM[3].EmcMrwLpddr2ZcalWarmBoot = 0x000a00ab; +SDRAM[3].EmcZqCalDdr3WarmBoot = 0x00000011; +SDRAM[3].EmcZcalWarmBootWait = 0x00000001; +SDRAM[3].EmcMrsWarmBootEnable = 0x00000001; +SDRAM[3].EmcMrsExtra = 0x80000521; +SDRAM[3].EmcWarmBootMrs = 0x80100002; +SDRAM[3].EmcWarmBootEmrs = 0x80000521; +SDRAM[3].EmcWarmBootEmr2 = 0x80200000; +SDRAM[3].EmcWarmBootEmr3 = 0x80300000; +SDRAM[3].EmcWarmBootMrsExtra = 0x80100002; +SDRAM[3].EmcClkenOverride = 0x00000000; +SDRAM[3].EmcExtraRefreshNum = 0x00000002; +SDRAM[3].EmcClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[3].McClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[3].EmcCfgDigDllPeriodWarmBoot = 0x00000003; +SDRAM[3].PmcVddpSel = 0x00000002; +SDRAM[3].PmcDdrCfg = 0x00000002; +SDRAM[3].PmcIoDpdReq = 0x80800000; +SDRAM[3].PmcENoVttGen = 0x00000000; +SDRAM[3].PmcNoIoPower = 0x00000000; +SDRAM[3].EmcXm2CmdPadCtrl = 0x000002a0; +SDRAM[3].EmcXm2CmdPadCtrl2 = 0x770c0000; +SDRAM[3].EmcXm2DqsPadCtrl = 0x770c1414; +SDRAM[3].EmcXm2DqsPadCtrl2 = 0x0800013d; +SDRAM[3].EmcXm2DqsPadCtrl3 = 0x08000021; +SDRAM[3].EmcXm2DqPadCtrl = 0x770c2990; +SDRAM[3].EmcXm2DqPadCtrl2 = 0x00000000; +SDRAM[3].EmcXm2ClkPadCtrl = 0x77fff884; +SDRAM[3].EmcXm2CompPadCtrl = 0x01f1f508; +SDRAM[3].EmcXm2VttGenPadCtrl = 0x05057404; +SDRAM[3].EmcXm2VttGenPadCtrl2 = 0x54000007; +SDRAM[3].EmcXm2QUsePadCtrl = 0x080001e8; +SDRAM[3].McEmemAdrCfg = 0x00000000; +SDRAM[3].McEmemAdrCfgDev0 = 0x00090303; +SDRAM[3].McEmemAdrCfgDev1 = 0x00090303; +SDRAM[3].McEmemArbCfg = 0x00000006; +SDRAM[3].McEmemArbOutstandingReq = 0x80000048; +SDRAM[3].McEmemArbTimingRcd = 0x00000001; +SDRAM[3].McEmemArbTimingRp = 0x00000002; +SDRAM[3].McEmemArbTimingRc = 0x00000009; +SDRAM[3].McEmemArbTimingRas = 0x00000005; +SDRAM[3].McEmemArbTimingFaw = 0x00000005; +SDRAM[3].McEmemArbTimingRrd = 0x00000001; +SDRAM[3].McEmemArbTimingRap2Pre = 0x00000002; +SDRAM[3].McEmemArbTimingWap2Pre = 0x00000008; +SDRAM[3].McEmemArbTimingR2R = 0x00000002; +SDRAM[3].McEmemArbTimingW2W = 0x00000002; +SDRAM[3].McEmemArbTimingR2W = 0x00000003; +SDRAM[3].McEmemArbTimingW2R = 0x00000006; +SDRAM[3].McEmemArbDaTurns = 0x06030202; +SDRAM[3].McEmemArbDaCovers = 0x000d0709; +SDRAM[3].McEmemArbMisc0 = 0x7086120a; +SDRAM[3].McEmemArbMisc1 = 0x78000000; +SDRAM[3].McEmemArbRing1Throttle = 0x001f0000; +SDRAM[3].McEmemArbOverride = 0x00000080; +SDRAM[3].McEmemArbRsv = 0xff00ff00; +SDRAM[3].McClkenOverride = 0x00000000; diff --git a/tegra30/nvidia/beaver/beaver-emmc.img.cfg b/tegra30/nvidia/beaver/beaver-emmc.img.cfg new file mode 100644 index 0000000..45fdda6 --- /dev/null +++ b/tegra30/nvidia/beaver/beaver-emmc.img.cfg @@ -0,0 +1,22 @@ +# Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. +# +# This software is provided 'as-is', without any express or implied +# warranty. In no event will the authors be held liable for any damages +# arising from the use of this software. +# +# Permission is granted to anyone to use this software for any purpose, +# including commercial applications, and to alter it and redistribute it +# freely, subject to the following restrictions: +# +# 1. The origin of this software must not be misrepresented; you must not +# claim that you wrote the original software. If you use this software +# in a product, an acknowledgment in the product documentation would be +# appreciated but is not required. +# 2. Altered source versions must be plainly marked as such, and must not be +# misrepresented as being the original software. +# 3. This notice may not be removed or altered from any source distribution. + +Version = 0x00020001; +Bctcopy = 1; +Bctfile = Pm315_Hynix_2GB_H5TC4G83MFR-PBA_400MHz_120613_sdmmc4_x8.bct; +BootLoader = u-boot.bin,0x80108000,0x80108000,Complete; diff --git a/tegra30/nvidia/beaver/build.sh b/tegra30/nvidia/beaver/build.sh new file mode 100755 index 0000000..c06735d --- /dev/null +++ b/tegra30/nvidia/beaver/build.sh @@ -0,0 +1,27 @@ +#!/bin/sh + +# Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. +# +# This software is provided 'as-is', without any express or implied +# warranty. In no event will the authors be held liable for any damages +# arising from the use of this software. +# +# Permission is granted to anyone to use this software for any purpose, +# including commercial applications, and to alter it and redistribute it +# freely, subject to the following restrictions: +# +# 1. The origin of this software must not be misrepresented; you must not +# claim that you wrote the original software. If you use this software +# in a product, an acknowledgment in the product documentation would be +# appreciated but is not required. +# 2. Altered source versions must be plainly marked as such, and must not be +# misrepresented as being the original software. +# 3. This notice may not be removed or altered from any source distribution. + +set -e +set -x + +cbootimage -t30 -gbct \ + Pm315_Hynix_2GB_H5TC4G83MFR-PBA_400MHz_120613_sdmmc4_x8.bct.cfg \ + Pm315_Hynix_2GB_H5TC4G83MFR-PBA_400MHz_120613_sdmmc4_x8.bct +cbootimage -t30 beaver-emmc.img.cfg beaver-emmc.img diff --git a/tegra30/nvidia/cardhu/E1186_Hynix_1GB_H5TC2G83BFR-PBA_375MHz_111114_317_sdmmc4_x8.bct.cfg b/tegra30/nvidia/cardhu/E1186_Hynix_1GB_H5TC2G83BFR-PBA_375MHz_111114_317_sdmmc4_x8.bct.cfg new file mode 100644 index 0000000..22ede9d --- /dev/null +++ b/tegra30/nvidia/cardhu/E1186_Hynix_1GB_H5TC2G83BFR-PBA_375MHz_111114_317_sdmmc4_x8.bct.cfg @@ -0,0 +1,819 @@ +# Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. +# +# This software is provided 'as-is', without any express or implied +# warranty. In no event will the authors be held liable for any damages +# arising from the use of this software. +# +# Permission is granted to anyone to use this software for any purpose, +# including commercial applications, and to alter it and redistribute it +# freely, subject to the following restrictions: +# +# 1. The origin of this software must not be misrepresented; you must not +# claim that you wrote the original software. If you use this software +# in a product, an acknowledgment in the product documentation would be +# appreciated but is not required. +# 2. Altered source versions must be plainly marked as such, and must not be +# misrepresented as being the original software. +# 3. This notice may not be removed or altered from any source distribution. + +Version = 0x00030001; +BlockSize = 0x00004000; +PageSize = 0x00000200; +PartitionSize = 0x02000000; +OdmData = 0x400c0000; + +DevType[0] = NvBootDevType_Sdmmc; +DeviceParam[0].SdmmcParams.ClockDivider = 0x00000009; +DeviceParam[0].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_8Bit; +DeviceParam[0].SdmmcParams.MaxPowerClassSupported = 0x00000000; +DeviceParam[0].SdmmcParams.SdController = 0x00000000; + +DevType[1] = NvBootDevType_Sdmmc; +DeviceParam[1].SdmmcParams.ClockDivider = 0x00000009; +DeviceParam[1].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_8Bit; +DeviceParam[1].SdmmcParams.MaxPowerClassSupported = 0x00000000; +DeviceParam[1].SdmmcParams.SdController = 0x00000000; + +DevType[2] = NvBootDevType_Sdmmc; +DeviceParam[2].SdmmcParams.ClockDivider = 0x00000009; +DeviceParam[2].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_8Bit; +DeviceParam[2].SdmmcParams.MaxPowerClassSupported = 0x00000000; +DeviceParam[2].SdmmcParams.SdController = 0x00000000; + +DevType[3] = NvBootDevType_Sdmmc; +DeviceParam[3].SdmmcParams.ClockDivider = 0x00000009; +DeviceParam[3].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_8Bit; +DeviceParam[3].SdmmcParams.MaxPowerClassSupported = 0x00000000; +DeviceParam[3].SdmmcParams.SdController = 0x00000000; + +SDRAM[0].MemoryType = NvBootMemoryType_Ddr3; +SDRAM[0].PllMChargePumpSetupControl = 0x00000008; +SDRAM[0].PllMLoopFilterSetupControl = 0x00000000; +SDRAM[0].PllMInputDivider = 0x0000000c; +SDRAM[0].PllMFeedbackDivider = 0x000002ee; +SDRAM[0].PllMPostDivider = 0x00000000; +SDRAM[0].PllMStableTime = 0x0000012c; +SDRAM[0].EmcClockDivider = 0x00000002; +SDRAM[0].EmcAutoCalInterval = 0x001fffff; +SDRAM[0].EmcAutoCalConfig = 0xa0f10000; +SDRAM[0].EmcAutoCalWait = 0x00000064; +SDRAM[0].EmcPinProgramWait = 0x00000001; +SDRAM[0].EmcRc = 0x00000011; +SDRAM[0].EmcRfc = 0x0000003a; +SDRAM[0].EmcRas = 0x0000000c; +SDRAM[0].EmcRp = 0x00000004; +SDRAM[0].EmcR2w = 0x00000003; +SDRAM[0].EmcW2r = 0x00000008; +SDRAM[0].EmcR2p = 0x00000002; +SDRAM[0].EmcW2p = 0x0000000a; +SDRAM[0].EmcRrd = 0x00000002; +SDRAM[0].EmcRdRcd = 0x00000004; +SDRAM[0].EmcWrRcd = 0x00000004; +SDRAM[0].EmcRext = 0x00000001; +SDRAM[0].EmcWdv = 0x00000004; +SDRAM[0].EmcQUseExtra = 0x00000000; +SDRAM[0].EmcQUse = 0x00000006; +SDRAM[0].EmcQRst = 0x00000004; +SDRAM[0].EmcQSafe = 0x00000008; +SDRAM[0].EmcRdv = 0x0000000d; +SDRAM[0].EmcRefresh = 0x00000b2d; +SDRAM[0].EmcBurstRefreshNum = 0x00000000; +SDRAM[0].EmcPdEx2Wr = 0x00000001; +SDRAM[0].EmcPdEx2Rd = 0x00000008; +SDRAM[0].EmcPChg2Pden = 0x00000001; +SDRAM[0].EmcAct2Pden = 0x00000000; +SDRAM[0].EmcAr2Pden = 0x00000007; +SDRAM[0].EmcRw2Pden = 0x0000000f; +SDRAM[0].EmcTxsr = 0x00000040; +SDRAM[0].EmcTcke = 0x00000004; +SDRAM[0].EmcTfaw = 0x0000000c; +SDRAM[0].EmcTrpab = 0x00000000; +SDRAM[0].EmcTClkStable = 0x00000004; +SDRAM[0].EmcTClkStop = 0x00000005; +SDRAM[0].EmcTRefBw = 0x00000b6d; +SDRAM[0].EmcFbioCfg5 = 0x00007088; +SDRAM[0].EmcFbioCfg6 = 0x00000006; +SDRAM[0].EmcFbioSpare = 0xd8000000; +SDRAM[0].EmcMrsResetDllWait = 0x00000000; +SDRAM[0].EmcMrsResetDll = 0x00000000; +SDRAM[0].EmcMrsDdr2DllReset = 0x00000000; +SDRAM[0].EmcMrs = 0x80000521; +SDRAM[0].EmcEmrsEmr2 = 0x80200000; +SDRAM[0].EmcEmrsEmr3 = 0x80300000; +SDRAM[0].EmcEmrsDdr2DllEnable = 0x00000000; +SDRAM[0].EmcEmrsDdr2OcdCalib = 0x00000000; +SDRAM[0].EmcEmrs = 0x80100002; +SDRAM[0].EmcMrw1 = 0x00000000; +SDRAM[0].EmcMrw2 = 0x00000000; +SDRAM[0].EmcMrw3 = 0x00000000; +SDRAM[0].EmcMrwResetCommand = 0x00000000; +SDRAM[0].EmcMrwResetNInitWait = 0x00000000; +SDRAM[0].EmcAdrCfg = 0x00000000; +SDRAM[0].McEmemCfg = 0x00000400; +SDRAM[0].EmcCfg2 = 0x000c0099; +SDRAM[0].EmcCfgDigDll = 0x00200084; +SDRAM[0].EmcCfgDigDllPeriod = 0x00008000; +SDRAM[0].EmcCfg = 0x23c00000; +SDRAM[0].EmcDbg = 0x01000400; +SDRAM[0].WarmBootWait = 0x00000002; +SDRAM[0].EmcCttTermCtrl = 0x00000802; +SDRAM[0].EmcOdtWrite = 0x00000000; +SDRAM[0].EmcOdtRead = 0x00000000; +SDRAM[0].EmcZcalWaitCnt = 0x00000040; +SDRAM[0].EmcZcalMrwCmd = 0x80000000; +SDRAM[0].EmcDdr2Wait = 0x00000000; +SDRAM[0].PmcDdrPwr = 0x00000003; +SDRAM[0].EmcClockSource = 0x00000000; +SDRAM[0].EmcClockUsePllMUD = 0x00000000; +SDRAM[0].EmcPinExtraWait = 0x00000000; +SDRAM[0].EmcTimingControlWait = 0x00000000; +SDRAM[0].EmcWext = 0x00000000; +SDRAM[0].EmcCtt = 0x00000000; +SDRAM[0].EmcCttDuration = 0x00000000; +SDRAM[0].EmcPreRefreshReqCnt = 0x000002cb; +SDRAM[0].EmcTxsrDll = 0x00000200; +SDRAM[0].EmcCfgRsv = 0xff00ff89; +SDRAM[0].EmcMrwExtra = 0x00000000; +SDRAM[0].EmcWarmBootMrw1 = 0x00000000; +SDRAM[0].EmcWarmBootMrw2 = 0x00000000; +SDRAM[0].EmcWarmBootMrw3 = 0x00000000; +SDRAM[0].EmcWarmBootMrwExtra = 0x00000000; +SDRAM[0].EmcWarmBootExtraModeRegWriteEnable = 0x00000000; +SDRAM[0].EmcExtraModeRegWriteEnable = 0x00000000; +SDRAM[0].EmcMrsWaitCnt = 0x0184000c; +SDRAM[0].EmcCmdQ = 0x10004408; +SDRAM[0].EmcMc2EmcQ = 0x06000404; +SDRAM[0].EmcDynSelfRefControl = 0x8000174b; +SDRAM[0].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; +SDRAM[0].EmcDevSelect = 0x00000002; +SDRAM[0].EmcSelDpdCtrl = 0x0004032c; +SDRAM[0].EmcDllXformDqs0 = 0x0003c000; +SDRAM[0].EmcDllXformDqs1 = 0x0003c000; +SDRAM[0].EmcDllXformDqs2 = 0x0003c000; +SDRAM[0].EmcDllXformDqs3 = 0x0003c000; +SDRAM[0].EmcDllXformDqs4 = 0x0003c000; +SDRAM[0].EmcDllXformDqs5 = 0x0003c000; +SDRAM[0].EmcDllXformDqs6 = 0x0003c000; +SDRAM[0].EmcDllXformDqs7 = 0x0003c000; +SDRAM[0].EmcDllXformQUse0 = 0x00000000; +SDRAM[0].EmcDllXformQUse1 = 0x00000000; +SDRAM[0].EmcDllXformQUse2 = 0x00000000; +SDRAM[0].EmcDllXformQUse3 = 0x00000000; +SDRAM[0].EmcDllXformQUse4 = 0x00000000; +SDRAM[0].EmcDllXformQUse5 = 0x00000000; +SDRAM[0].EmcDllXformQUse6 = 0x00000000; +SDRAM[0].EmcDllXformQUse7 = 0x00000000; +SDRAM[0].EmcDliTrimTxDqs0 = 0x00000000; +SDRAM[0].EmcDliTrimTxDqs1 = 0x00000000; +SDRAM[0].EmcDliTrimTxDqs2 = 0x00000000; +SDRAM[0].EmcDliTrimTxDqs3 = 0x00000000; +SDRAM[0].EmcDliTrimTxDqs4 = 0x00000000; +SDRAM[0].EmcDliTrimTxDqs5 = 0x00000000; +SDRAM[0].EmcDliTrimTxDqs6 = 0x00000000; +SDRAM[0].EmcDliTrimTxDqs7 = 0x00000000; +SDRAM[0].EmcDllXformDq0 = 0x00040000; +SDRAM[0].EmcDllXformDq1 = 0x00040000; +SDRAM[0].EmcDllXformDq2 = 0x00040000; +SDRAM[0].EmcDllXformDq3 = 0x00040000; +SDRAM[0].EmcZcalInterval = 0x00020000; +SDRAM[0].EmcZcalInitDev0 = 0x80000011; +SDRAM[0].EmcZcalInitDev1 = 0x00000000; +SDRAM[0].EmcZcalInitWait = 0x00000002; +SDRAM[0].EmcZcalColdBootEnable = 0x00000001; +SDRAM[0].EmcZcalWarmBootEnable = 0x00000001; +SDRAM[0].EmcMrwLpddr2ZcalWarmBoot = 0x000a00ab; +SDRAM[0].EmcZqCalDdr3WarmBoot = 0x00000011; +SDRAM[0].EmcZcalWarmBootWait = 0x00000001; +SDRAM[0].EmcMrsWarmBootEnable = 0x00000001; +SDRAM[0].EmcMrsExtra = 0x80000521; +SDRAM[0].EmcWarmBootMrs = 0x80100002; +SDRAM[0].EmcWarmBootEmrs = 0x80000521; +SDRAM[0].EmcWarmBootEmr2 = 0x80200000; +SDRAM[0].EmcWarmBootEmr3 = 0x80300000; +SDRAM[0].EmcWarmBootMrsExtra = 0x80100002; +SDRAM[0].EmcClkenOverride = 0x00000000; +SDRAM[0].EmcExtraRefreshNum = 0x00000002; +SDRAM[0].EmcClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[0].McClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[0].EmcCfgDigDllPeriodWarmBoot = 0x00000003; +SDRAM[0].PmcVddpSel = 0x00000002; +SDRAM[0].PmcDdrCfg = 0x00000002; +SDRAM[0].PmcIoDpdReq = 0x80800000; +SDRAM[0].PmcENoVttGen = 0x00000000; +SDRAM[0].PmcNoIoPower = 0x00000000; +SDRAM[0].EmcXm2CmdPadCtrl = 0x000002a0; +SDRAM[0].EmcXm2CmdPadCtrl2 = 0x770c0000; +SDRAM[0].EmcXm2DqsPadCtrl = 0x770c1414; +SDRAM[0].EmcXm2DqsPadCtrl2 = 0x0800013d; +SDRAM[0].EmcXm2DqsPadCtrl3 = 0x08000021; +SDRAM[0].EmcXm2DqPadCtrl = 0x770c2990; +SDRAM[0].EmcXm2DqPadCtrl2 = 0x00000000; +SDRAM[0].EmcXm2ClkPadCtrl = 0x77fff884; +SDRAM[0].EmcXm2CompPadCtrl = 0x01f1f508; +SDRAM[0].EmcXm2VttGenPadCtrl = 0x05057404; +SDRAM[0].EmcXm2VttGenPadCtrl2 = 0x54000007; +SDRAM[0].EmcXm2QUsePadCtrl = 0x080001e8; +SDRAM[0].McEmemAdrCfg = 0x00000000; +SDRAM[0].McEmemAdrCfgDev0 = 0x00080303; +SDRAM[0].McEmemAdrCfgDev1 = 0x00080303; +SDRAM[0].McEmemArbCfg = 0x0000000b; +SDRAM[0].McEmemArbOutstandingReq = 0xc0000044; +SDRAM[0].McEmemArbTimingRcd = 0x00000001; +SDRAM[0].McEmemArbTimingRp = 0x00000002; +SDRAM[0].McEmemArbTimingRc = 0x00000009; +SDRAM[0].McEmemArbTimingRas = 0x00000005; +SDRAM[0].McEmemArbTimingFaw = 0x00000005; +SDRAM[0].McEmemArbTimingRrd = 0x00000001; +SDRAM[0].McEmemArbTimingRap2Pre = 0x00000002; +SDRAM[0].McEmemArbTimingWap2Pre = 0x00000008; +SDRAM[0].McEmemArbTimingR2R = 0x00000002; +SDRAM[0].McEmemArbTimingW2W = 0x00000002; +SDRAM[0].McEmemArbTimingR2W = 0x00000003; +SDRAM[0].McEmemArbTimingW2R = 0x00000006; +SDRAM[0].McEmemArbDaTurns = 0x06030202; +SDRAM[0].McEmemArbDaCovers = 0x000d0709; +SDRAM[0].McEmemArbMisc0 = 0x7086110a; +SDRAM[0].McEmemArbMisc1 = 0x78000000; +SDRAM[0].McEmemArbRing1Throttle = 0x001f0000; +SDRAM[0].McEmemArbOverride = 0x00000080; +SDRAM[0].McEmemArbRsv = 0xff00ff00; +SDRAM[0].McClkenOverride = 0x00000000; + +SDRAM[1].MemoryType = NvBootMemoryType_Ddr3; +SDRAM[1].PllMChargePumpSetupControl = 0x00000008; +SDRAM[1].PllMLoopFilterSetupControl = 0x00000000; +SDRAM[1].PllMInputDivider = 0x0000000c; +SDRAM[1].PllMFeedbackDivider = 0x000002ee; +SDRAM[1].PllMPostDivider = 0x00000000; +SDRAM[1].PllMStableTime = 0x0000012c; +SDRAM[1].EmcClockDivider = 0x00000002; +SDRAM[1].EmcAutoCalInterval = 0x001fffff; +SDRAM[1].EmcAutoCalConfig = 0xa0f10000; +SDRAM[1].EmcAutoCalWait = 0x00000064; +SDRAM[1].EmcPinProgramWait = 0x00000001; +SDRAM[1].EmcRc = 0x00000011; +SDRAM[1].EmcRfc = 0x0000003a; +SDRAM[1].EmcRas = 0x0000000c; +SDRAM[1].EmcRp = 0x00000004; +SDRAM[1].EmcR2w = 0x00000003; +SDRAM[1].EmcW2r = 0x00000008; +SDRAM[1].EmcR2p = 0x00000002; +SDRAM[1].EmcW2p = 0x0000000a; +SDRAM[1].EmcRrd = 0x00000002; +SDRAM[1].EmcRdRcd = 0x00000004; +SDRAM[1].EmcWrRcd = 0x00000004; +SDRAM[1].EmcRext = 0x00000001; +SDRAM[1].EmcWdv = 0x00000004; +SDRAM[1].EmcQUseExtra = 0x00000000; +SDRAM[1].EmcQUse = 0x00000006; +SDRAM[1].EmcQRst = 0x00000004; +SDRAM[1].EmcQSafe = 0x00000008; +SDRAM[1].EmcRdv = 0x0000000d; +SDRAM[1].EmcRefresh = 0x00000b2d; +SDRAM[1].EmcBurstRefreshNum = 0x00000000; +SDRAM[1].EmcPdEx2Wr = 0x00000001; +SDRAM[1].EmcPdEx2Rd = 0x00000008; +SDRAM[1].EmcPChg2Pden = 0x00000001; +SDRAM[1].EmcAct2Pden = 0x00000000; +SDRAM[1].EmcAr2Pden = 0x00000007; +SDRAM[1].EmcRw2Pden = 0x0000000f; +SDRAM[1].EmcTxsr = 0x00000040; +SDRAM[1].EmcTcke = 0x00000004; +SDRAM[1].EmcTfaw = 0x0000000c; +SDRAM[1].EmcTrpab = 0x00000000; +SDRAM[1].EmcTClkStable = 0x00000004; +SDRAM[1].EmcTClkStop = 0x00000005; +SDRAM[1].EmcTRefBw = 0x00000b6d; +SDRAM[1].EmcFbioCfg5 = 0x00007088; +SDRAM[1].EmcFbioCfg6 = 0x00000006; +SDRAM[1].EmcFbioSpare = 0xd8000000; +SDRAM[1].EmcMrsResetDllWait = 0x00000000; +SDRAM[1].EmcMrsResetDll = 0x00000000; +SDRAM[1].EmcMrsDdr2DllReset = 0x00000000; +SDRAM[1].EmcMrs = 0x80000521; +SDRAM[1].EmcEmrsEmr2 = 0x80200000; +SDRAM[1].EmcEmrsEmr3 = 0x80300000; +SDRAM[1].EmcEmrsDdr2DllEnable = 0x00000000; +SDRAM[1].EmcEmrsDdr2OcdCalib = 0x00000000; +SDRAM[1].EmcEmrs = 0x80100002; +SDRAM[1].EmcMrw1 = 0x00000000; +SDRAM[1].EmcMrw2 = 0x00000000; +SDRAM[1].EmcMrw3 = 0x00000000; +SDRAM[1].EmcMrwResetCommand = 0x00000000; +SDRAM[1].EmcMrwResetNInitWait = 0x00000000; +SDRAM[1].EmcAdrCfg = 0x00000000; +SDRAM[1].McEmemCfg = 0x00000400; +SDRAM[1].EmcCfg2 = 0x000c0099; +SDRAM[1].EmcCfgDigDll = 0x00200084; +SDRAM[1].EmcCfgDigDllPeriod = 0x00008000; +SDRAM[1].EmcCfg = 0x23c00000; +SDRAM[1].EmcDbg = 0x01000400; +SDRAM[1].WarmBootWait = 0x00000002; +SDRAM[1].EmcCttTermCtrl = 0x00000802; +SDRAM[1].EmcOdtWrite = 0x00000000; +SDRAM[1].EmcOdtRead = 0x00000000; +SDRAM[1].EmcZcalWaitCnt = 0x00000040; +SDRAM[1].EmcZcalMrwCmd = 0x80000000; +SDRAM[1].EmcDdr2Wait = 0x00000000; +SDRAM[1].PmcDdrPwr = 0x00000003; +SDRAM[1].EmcClockSource = 0x00000000; +SDRAM[1].EmcClockUsePllMUD = 0x00000000; +SDRAM[1].EmcPinExtraWait = 0x00000000; +SDRAM[1].EmcTimingControlWait = 0x00000000; +SDRAM[1].EmcWext = 0x00000000; +SDRAM[1].EmcCtt = 0x00000000; +SDRAM[1].EmcCttDuration = 0x00000000; +SDRAM[1].EmcPreRefreshReqCnt = 0x000002cb; +SDRAM[1].EmcTxsrDll = 0x00000200; +SDRAM[1].EmcCfgRsv = 0xff00ff89; +SDRAM[1].EmcMrwExtra = 0x00000000; +SDRAM[1].EmcWarmBootMrw1 = 0x00000000; +SDRAM[1].EmcWarmBootMrw2 = 0x00000000; +SDRAM[1].EmcWarmBootMrw3 = 0x00000000; +SDRAM[1].EmcWarmBootMrwExtra = 0x00000000; +SDRAM[1].EmcWarmBootExtraModeRegWriteEnable = 0x00000000; +SDRAM[1].EmcExtraModeRegWriteEnable = 0x00000000; +SDRAM[1].EmcMrsWaitCnt = 0x0184000c; +SDRAM[1].EmcCmdQ = 0x10004408; +SDRAM[1].EmcMc2EmcQ = 0x06000404; +SDRAM[1].EmcDynSelfRefControl = 0x8000174b; +SDRAM[1].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; +SDRAM[1].EmcDevSelect = 0x00000002; +SDRAM[1].EmcSelDpdCtrl = 0x0004032c; +SDRAM[1].EmcDllXformDqs0 = 0x0003c000; +SDRAM[1].EmcDllXformDqs1 = 0x0003c000; +SDRAM[1].EmcDllXformDqs2 = 0x0003c000; +SDRAM[1].EmcDllXformDqs3 = 0x0003c000; +SDRAM[1].EmcDllXformDqs4 = 0x0003c000; +SDRAM[1].EmcDllXformDqs5 = 0x0003c000; +SDRAM[1].EmcDllXformDqs6 = 0x0003c000; +SDRAM[1].EmcDllXformDqs7 = 0x0003c000; +SDRAM[1].EmcDllXformQUse0 = 0x00000000; +SDRAM[1].EmcDllXformQUse1 = 0x00000000; +SDRAM[1].EmcDllXformQUse2 = 0x00000000; +SDRAM[1].EmcDllXformQUse3 = 0x00000000; +SDRAM[1].EmcDllXformQUse4 = 0x00000000; +SDRAM[1].EmcDllXformQUse5 = 0x00000000; +SDRAM[1].EmcDllXformQUse6 = 0x00000000; +SDRAM[1].EmcDllXformQUse7 = 0x00000000; +SDRAM[1].EmcDliTrimTxDqs0 = 0x00000000; +SDRAM[1].EmcDliTrimTxDqs1 = 0x00000000; +SDRAM[1].EmcDliTrimTxDqs2 = 0x00000000; +SDRAM[1].EmcDliTrimTxDqs3 = 0x00000000; +SDRAM[1].EmcDliTrimTxDqs4 = 0x00000000; +SDRAM[1].EmcDliTrimTxDqs5 = 0x00000000; +SDRAM[1].EmcDliTrimTxDqs6 = 0x00000000; +SDRAM[1].EmcDliTrimTxDqs7 = 0x00000000; +SDRAM[1].EmcDllXformDq0 = 0x00040000; +SDRAM[1].EmcDllXformDq1 = 0x00040000; +SDRAM[1].EmcDllXformDq2 = 0x00040000; +SDRAM[1].EmcDllXformDq3 = 0x00040000; +SDRAM[1].EmcZcalInterval = 0x00020000; +SDRAM[1].EmcZcalInitDev0 = 0x80000011; +SDRAM[1].EmcZcalInitDev1 = 0x00000000; +SDRAM[1].EmcZcalInitWait = 0x00000002; +SDRAM[1].EmcZcalColdBootEnable = 0x00000001; +SDRAM[1].EmcZcalWarmBootEnable = 0x00000001; +SDRAM[1].EmcMrwLpddr2ZcalWarmBoot = 0x000a00ab; +SDRAM[1].EmcZqCalDdr3WarmBoot = 0x00000011; +SDRAM[1].EmcZcalWarmBootWait = 0x00000001; +SDRAM[1].EmcMrsWarmBootEnable = 0x00000001; +SDRAM[1].EmcMrsExtra = 0x80000521; +SDRAM[1].EmcWarmBootMrs = 0x80100002; +SDRAM[1].EmcWarmBootEmrs = 0x80000521; +SDRAM[1].EmcWarmBootEmr2 = 0x80200000; +SDRAM[1].EmcWarmBootEmr3 = 0x80300000; +SDRAM[1].EmcWarmBootMrsExtra = 0x80100002; +SDRAM[1].EmcClkenOverride = 0x00000000; +SDRAM[1].EmcExtraRefreshNum = 0x00000002; +SDRAM[1].EmcClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[1].McClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[1].EmcCfgDigDllPeriodWarmBoot = 0x00000003; +SDRAM[1].PmcVddpSel = 0x00000002; +SDRAM[1].PmcDdrCfg = 0x00000002; +SDRAM[1].PmcIoDpdReq = 0x80800000; +SDRAM[1].PmcENoVttGen = 0x00000000; +SDRAM[1].PmcNoIoPower = 0x00000000; +SDRAM[1].EmcXm2CmdPadCtrl = 0x000002a0; +SDRAM[1].EmcXm2CmdPadCtrl2 = 0x770c0000; +SDRAM[1].EmcXm2DqsPadCtrl = 0x770c1414; +SDRAM[1].EmcXm2DqsPadCtrl2 = 0x0800013d; +SDRAM[1].EmcXm2DqsPadCtrl3 = 0x08000021; +SDRAM[1].EmcXm2DqPadCtrl = 0x770c2990; +SDRAM[1].EmcXm2DqPadCtrl2 = 0x00000000; +SDRAM[1].EmcXm2ClkPadCtrl = 0x77fff884; +SDRAM[1].EmcXm2CompPadCtrl = 0x01f1f508; +SDRAM[1].EmcXm2VttGenPadCtrl = 0x05057404; +SDRAM[1].EmcXm2VttGenPadCtrl2 = 0x54000007; +SDRAM[1].EmcXm2QUsePadCtrl = 0x080001e8; +SDRAM[1].McEmemAdrCfg = 0x00000000; +SDRAM[1].McEmemAdrCfgDev0 = 0x00080303; +SDRAM[1].McEmemAdrCfgDev1 = 0x00080303; +SDRAM[1].McEmemArbCfg = 0x0000000b; +SDRAM[1].McEmemArbOutstandingReq = 0xc0000044; +SDRAM[1].McEmemArbTimingRcd = 0x00000001; +SDRAM[1].McEmemArbTimingRp = 0x00000002; +SDRAM[1].McEmemArbTimingRc = 0x00000009; +SDRAM[1].McEmemArbTimingRas = 0x00000005; +SDRAM[1].McEmemArbTimingFaw = 0x00000005; +SDRAM[1].McEmemArbTimingRrd = 0x00000001; +SDRAM[1].McEmemArbTimingRap2Pre = 0x00000002; +SDRAM[1].McEmemArbTimingWap2Pre = 0x00000008; +SDRAM[1].McEmemArbTimingR2R = 0x00000002; +SDRAM[1].McEmemArbTimingW2W = 0x00000002; +SDRAM[1].McEmemArbTimingR2W = 0x00000003; +SDRAM[1].McEmemArbTimingW2R = 0x00000006; +SDRAM[1].McEmemArbDaTurns = 0x06030202; +SDRAM[1].McEmemArbDaCovers = 0x000d0709; +SDRAM[1].McEmemArbMisc0 = 0x7086110a; +SDRAM[1].McEmemArbMisc1 = 0x78000000; +SDRAM[1].McEmemArbRing1Throttle = 0x001f0000; +SDRAM[1].McEmemArbOverride = 0x00000080; +SDRAM[1].McEmemArbRsv = 0xff00ff00; +SDRAM[1].McClkenOverride = 0x00000000; + +SDRAM[2].MemoryType = NvBootMemoryType_Ddr3; +SDRAM[2].PllMChargePumpSetupControl = 0x00000008; +SDRAM[2].PllMLoopFilterSetupControl = 0x00000000; +SDRAM[2].PllMInputDivider = 0x0000000c; +SDRAM[2].PllMFeedbackDivider = 0x000002ee; +SDRAM[2].PllMPostDivider = 0x00000000; +SDRAM[2].PllMStableTime = 0x0000012c; +SDRAM[2].EmcClockDivider = 0x00000002; +SDRAM[2].EmcAutoCalInterval = 0x001fffff; +SDRAM[2].EmcAutoCalConfig = 0xa0f10000; +SDRAM[2].EmcAutoCalWait = 0x00000064; +SDRAM[2].EmcPinProgramWait = 0x00000001; +SDRAM[2].EmcRc = 0x00000011; +SDRAM[2].EmcRfc = 0x0000003a; +SDRAM[2].EmcRas = 0x0000000c; +SDRAM[2].EmcRp = 0x00000004; +SDRAM[2].EmcR2w = 0x00000003; +SDRAM[2].EmcW2r = 0x00000008; +SDRAM[2].EmcR2p = 0x00000002; +SDRAM[2].EmcW2p = 0x0000000a; +SDRAM[2].EmcRrd = 0x00000002; +SDRAM[2].EmcRdRcd = 0x00000004; +SDRAM[2].EmcWrRcd = 0x00000004; +SDRAM[2].EmcRext = 0x00000001; +SDRAM[2].EmcWdv = 0x00000004; +SDRAM[2].EmcQUseExtra = 0x00000000; +SDRAM[2].EmcQUse = 0x00000006; +SDRAM[2].EmcQRst = 0x00000004; +SDRAM[2].EmcQSafe = 0x00000008; +SDRAM[2].EmcRdv = 0x0000000d; +SDRAM[2].EmcRefresh = 0x00000b2d; +SDRAM[2].EmcBurstRefreshNum = 0x00000000; +SDRAM[2].EmcPdEx2Wr = 0x00000001; +SDRAM[2].EmcPdEx2Rd = 0x00000008; +SDRAM[2].EmcPChg2Pden = 0x00000001; +SDRAM[2].EmcAct2Pden = 0x00000000; +SDRAM[2].EmcAr2Pden = 0x00000007; +SDRAM[2].EmcRw2Pden = 0x0000000f; +SDRAM[2].EmcTxsr = 0x00000040; +SDRAM[2].EmcTcke = 0x00000004; +SDRAM[2].EmcTfaw = 0x0000000c; +SDRAM[2].EmcTrpab = 0x00000000; +SDRAM[2].EmcTClkStable = 0x00000004; +SDRAM[2].EmcTClkStop = 0x00000005; +SDRAM[2].EmcTRefBw = 0x00000b6d; +SDRAM[2].EmcFbioCfg5 = 0x00007088; +SDRAM[2].EmcFbioCfg6 = 0x00000006; +SDRAM[2].EmcFbioSpare = 0xd8000000; +SDRAM[2].EmcMrsResetDllWait = 0x00000000; +SDRAM[2].EmcMrsResetDll = 0x00000000; +SDRAM[2].EmcMrsDdr2DllReset = 0x00000000; +SDRAM[2].EmcMrs = 0x80000521; +SDRAM[2].EmcEmrsEmr2 = 0x80200000; +SDRAM[2].EmcEmrsEmr3 = 0x80300000; +SDRAM[2].EmcEmrsDdr2DllEnable = 0x00000000; +SDRAM[2].EmcEmrsDdr2OcdCalib = 0x00000000; +SDRAM[2].EmcEmrs = 0x80100002; +SDRAM[2].EmcMrw1 = 0x00000000; +SDRAM[2].EmcMrw2 = 0x00000000; +SDRAM[2].EmcMrw3 = 0x00000000; +SDRAM[2].EmcMrwResetCommand = 0x00000000; +SDRAM[2].EmcMrwResetNInitWait = 0x00000000; +SDRAM[2].EmcAdrCfg = 0x00000000; +SDRAM[2].McEmemCfg = 0x00000400; +SDRAM[2].EmcCfg2 = 0x000c0099; +SDRAM[2].EmcCfgDigDll = 0x00200084; +SDRAM[2].EmcCfgDigDllPeriod = 0x00008000; +SDRAM[2].EmcCfg = 0x23c00000; +SDRAM[2].EmcDbg = 0x01000400; +SDRAM[2].WarmBootWait = 0x00000002; +SDRAM[2].EmcCttTermCtrl = 0x00000802; +SDRAM[2].EmcOdtWrite = 0x00000000; +SDRAM[2].EmcOdtRead = 0x00000000; +SDRAM[2].EmcZcalWaitCnt = 0x00000040; +SDRAM[2].EmcZcalMrwCmd = 0x80000000; +SDRAM[2].EmcDdr2Wait = 0x00000000; +SDRAM[2].PmcDdrPwr = 0x00000003; +SDRAM[2].EmcClockSource = 0x00000000; +SDRAM[2].EmcClockUsePllMUD = 0x00000000; +SDRAM[2].EmcPinExtraWait = 0x00000000; +SDRAM[2].EmcTimingControlWait = 0x00000000; +SDRAM[2].EmcWext = 0x00000000; +SDRAM[2].EmcCtt = 0x00000000; +SDRAM[2].EmcCttDuration = 0x00000000; +SDRAM[2].EmcPreRefreshReqCnt = 0x000002cb; +SDRAM[2].EmcTxsrDll = 0x00000200; +SDRAM[2].EmcCfgRsv = 0xff00ff89; +SDRAM[2].EmcMrwExtra = 0x00000000; +SDRAM[2].EmcWarmBootMrw1 = 0x00000000; +SDRAM[2].EmcWarmBootMrw2 = 0x00000000; +SDRAM[2].EmcWarmBootMrw3 = 0x00000000; +SDRAM[2].EmcWarmBootMrwExtra = 0x00000000; +SDRAM[2].EmcWarmBootExtraModeRegWriteEnable = 0x00000000; +SDRAM[2].EmcExtraModeRegWriteEnable = 0x00000000; +SDRAM[2].EmcMrsWaitCnt = 0x0184000c; +SDRAM[2].EmcCmdQ = 0x10004408; +SDRAM[2].EmcMc2EmcQ = 0x06000404; +SDRAM[2].EmcDynSelfRefControl = 0x8000174b; +SDRAM[2].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; +SDRAM[2].EmcDevSelect = 0x00000002; +SDRAM[2].EmcSelDpdCtrl = 0x0004032c; +SDRAM[2].EmcDllXformDqs0 = 0x0003c000; +SDRAM[2].EmcDllXformDqs1 = 0x0003c000; +SDRAM[2].EmcDllXformDqs2 = 0x0003c000; +SDRAM[2].EmcDllXformDqs3 = 0x0003c000; +SDRAM[2].EmcDllXformDqs4 = 0x0003c000; +SDRAM[2].EmcDllXformDqs5 = 0x0003c000; +SDRAM[2].EmcDllXformDqs6 = 0x0003c000; +SDRAM[2].EmcDllXformDqs7 = 0x0003c000; +SDRAM[2].EmcDllXformQUse0 = 0x00000000; +SDRAM[2].EmcDllXformQUse1 = 0x00000000; +SDRAM[2].EmcDllXformQUse2 = 0x00000000; +SDRAM[2].EmcDllXformQUse3 = 0x00000000; +SDRAM[2].EmcDllXformQUse4 = 0x00000000; +SDRAM[2].EmcDllXformQUse5 = 0x00000000; +SDRAM[2].EmcDllXformQUse6 = 0x00000000; +SDRAM[2].EmcDllXformQUse7 = 0x00000000; +SDRAM[2].EmcDliTrimTxDqs0 = 0x00000000; +SDRAM[2].EmcDliTrimTxDqs1 = 0x00000000; +SDRAM[2].EmcDliTrimTxDqs2 = 0x00000000; +SDRAM[2].EmcDliTrimTxDqs3 = 0x00000000; +SDRAM[2].EmcDliTrimTxDqs4 = 0x00000000; +SDRAM[2].EmcDliTrimTxDqs5 = 0x00000000; +SDRAM[2].EmcDliTrimTxDqs6 = 0x00000000; +SDRAM[2].EmcDliTrimTxDqs7 = 0x00000000; +SDRAM[2].EmcDllXformDq0 = 0x00040000; +SDRAM[2].EmcDllXformDq1 = 0x00040000; +SDRAM[2].EmcDllXformDq2 = 0x00040000; +SDRAM[2].EmcDllXformDq3 = 0x00040000; +SDRAM[2].EmcZcalInterval = 0x00020000; +SDRAM[2].EmcZcalInitDev0 = 0x80000011; +SDRAM[2].EmcZcalInitDev1 = 0x00000000; +SDRAM[2].EmcZcalInitWait = 0x00000002; +SDRAM[2].EmcZcalColdBootEnable = 0x00000001; +SDRAM[2].EmcZcalWarmBootEnable = 0x00000001; +SDRAM[2].EmcMrwLpddr2ZcalWarmBoot = 0x000a00ab; +SDRAM[2].EmcZqCalDdr3WarmBoot = 0x00000011; +SDRAM[2].EmcZcalWarmBootWait = 0x00000001; +SDRAM[2].EmcMrsWarmBootEnable = 0x00000001; +SDRAM[2].EmcMrsExtra = 0x80000521; +SDRAM[2].EmcWarmBootMrs = 0x80100002; +SDRAM[2].EmcWarmBootEmrs = 0x80000521; +SDRAM[2].EmcWarmBootEmr2 = 0x80200000; +SDRAM[2].EmcWarmBootEmr3 = 0x80300000; +SDRAM[2].EmcWarmBootMrsExtra = 0x80100002; +SDRAM[2].EmcClkenOverride = 0x00000000; +SDRAM[2].EmcExtraRefreshNum = 0x00000002; +SDRAM[2].EmcClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[2].McClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[2].EmcCfgDigDllPeriodWarmBoot = 0x00000003; +SDRAM[2].PmcVddpSel = 0x00000002; +SDRAM[2].PmcDdrCfg = 0x00000002; +SDRAM[2].PmcIoDpdReq = 0x80800000; +SDRAM[2].PmcENoVttGen = 0x00000000; +SDRAM[2].PmcNoIoPower = 0x00000000; +SDRAM[2].EmcXm2CmdPadCtrl = 0x000002a0; +SDRAM[2].EmcXm2CmdPadCtrl2 = 0x770c0000; +SDRAM[2].EmcXm2DqsPadCtrl = 0x770c1414; +SDRAM[2].EmcXm2DqsPadCtrl2 = 0x0800013d; +SDRAM[2].EmcXm2DqsPadCtrl3 = 0x08000021; +SDRAM[2].EmcXm2DqPadCtrl = 0x770c2990; +SDRAM[2].EmcXm2DqPadCtrl2 = 0x00000000; +SDRAM[2].EmcXm2ClkPadCtrl = 0x77fff884; +SDRAM[2].EmcXm2CompPadCtrl = 0x01f1f508; +SDRAM[2].EmcXm2VttGenPadCtrl = 0x05057404; +SDRAM[2].EmcXm2VttGenPadCtrl2 = 0x54000007; +SDRAM[2].EmcXm2QUsePadCtrl = 0x080001e8; +SDRAM[2].McEmemAdrCfg = 0x00000000; +SDRAM[2].McEmemAdrCfgDev0 = 0x00080303; +SDRAM[2].McEmemAdrCfgDev1 = 0x00080303; +SDRAM[2].McEmemArbCfg = 0x0000000b; +SDRAM[2].McEmemArbOutstandingReq = 0xc0000044; +SDRAM[2].McEmemArbTimingRcd = 0x00000001; +SDRAM[2].McEmemArbTimingRp = 0x00000002; +SDRAM[2].McEmemArbTimingRc = 0x00000009; +SDRAM[2].McEmemArbTimingRas = 0x00000005; +SDRAM[2].McEmemArbTimingFaw = 0x00000005; +SDRAM[2].McEmemArbTimingRrd = 0x00000001; +SDRAM[2].McEmemArbTimingRap2Pre = 0x00000002; +SDRAM[2].McEmemArbTimingWap2Pre = 0x00000008; +SDRAM[2].McEmemArbTimingR2R = 0x00000002; +SDRAM[2].McEmemArbTimingW2W = 0x00000002; +SDRAM[2].McEmemArbTimingR2W = 0x00000003; +SDRAM[2].McEmemArbTimingW2R = 0x00000006; +SDRAM[2].McEmemArbDaTurns = 0x06030202; +SDRAM[2].McEmemArbDaCovers = 0x000d0709; +SDRAM[2].McEmemArbMisc0 = 0x7086110a; +SDRAM[2].McEmemArbMisc1 = 0x78000000; +SDRAM[2].McEmemArbRing1Throttle = 0x001f0000; +SDRAM[2].McEmemArbOverride = 0x00000080; +SDRAM[2].McEmemArbRsv = 0xff00ff00; +SDRAM[2].McClkenOverride = 0x00000000; + +SDRAM[3].MemoryType = NvBootMemoryType_Ddr3; +SDRAM[3].PllMChargePumpSetupControl = 0x00000008; +SDRAM[3].PllMLoopFilterSetupControl = 0x00000000; +SDRAM[3].PllMInputDivider = 0x0000000c; +SDRAM[3].PllMFeedbackDivider = 0x000002ee; +SDRAM[3].PllMPostDivider = 0x00000000; +SDRAM[3].PllMStableTime = 0x0000012c; +SDRAM[3].EmcClockDivider = 0x00000002; +SDRAM[3].EmcAutoCalInterval = 0x001fffff; +SDRAM[3].EmcAutoCalConfig = 0xa0f10000; +SDRAM[3].EmcAutoCalWait = 0x00000064; +SDRAM[3].EmcPinProgramWait = 0x00000001; +SDRAM[3].EmcRc = 0x00000011; +SDRAM[3].EmcRfc = 0x0000003a; +SDRAM[3].EmcRas = 0x0000000c; +SDRAM[3].EmcRp = 0x00000004; +SDRAM[3].EmcR2w = 0x00000003; +SDRAM[3].EmcW2r = 0x00000008; +SDRAM[3].EmcR2p = 0x00000002; +SDRAM[3].EmcW2p = 0x0000000a; +SDRAM[3].EmcRrd = 0x00000002; +SDRAM[3].EmcRdRcd = 0x00000004; +SDRAM[3].EmcWrRcd = 0x00000004; +SDRAM[3].EmcRext = 0x00000001; +SDRAM[3].EmcWdv = 0x00000004; +SDRAM[3].EmcQUseExtra = 0x00000000; +SDRAM[3].EmcQUse = 0x00000006; +SDRAM[3].EmcQRst = 0x00000004; +SDRAM[3].EmcQSafe = 0x00000008; +SDRAM[3].EmcRdv = 0x0000000d; +SDRAM[3].EmcRefresh = 0x00000b2d; +SDRAM[3].EmcBurstRefreshNum = 0x00000000; +SDRAM[3].EmcPdEx2Wr = 0x00000001; +SDRAM[3].EmcPdEx2Rd = 0x00000008; +SDRAM[3].EmcPChg2Pden = 0x00000001; +SDRAM[3].EmcAct2Pden = 0x00000000; +SDRAM[3].EmcAr2Pden = 0x00000007; +SDRAM[3].EmcRw2Pden = 0x0000000f; +SDRAM[3].EmcTxsr = 0x00000040; +SDRAM[3].EmcTcke = 0x00000004; +SDRAM[3].EmcTfaw = 0x0000000c; +SDRAM[3].EmcTrpab = 0x00000000; +SDRAM[3].EmcTClkStable = 0x00000004; +SDRAM[3].EmcTClkStop = 0x00000005; +SDRAM[3].EmcTRefBw = 0x00000b6d; +SDRAM[3].EmcFbioCfg5 = 0x00007088; +SDRAM[3].EmcFbioCfg6 = 0x00000006; +SDRAM[3].EmcFbioSpare = 0xd8000000; +SDRAM[3].EmcMrsResetDllWait = 0x00000000; +SDRAM[3].EmcMrsResetDll = 0x00000000; +SDRAM[3].EmcMrsDdr2DllReset = 0x00000000; +SDRAM[3].EmcMrs = 0x80000521; +SDRAM[3].EmcEmrsEmr2 = 0x80200000; +SDRAM[3].EmcEmrsEmr3 = 0x80300000; +SDRAM[3].EmcEmrsDdr2DllEnable = 0x00000000; +SDRAM[3].EmcEmrsDdr2OcdCalib = 0x00000000; +SDRAM[3].EmcEmrs = 0x80100002; +SDRAM[3].EmcMrw1 = 0x00000000; +SDRAM[3].EmcMrw2 = 0x00000000; +SDRAM[3].EmcMrw3 = 0x00000000; +SDRAM[3].EmcMrwResetCommand = 0x00000000; +SDRAM[3].EmcMrwResetNInitWait = 0x00000000; +SDRAM[3].EmcAdrCfg = 0x00000000; +SDRAM[3].McEmemCfg = 0x00000400; +SDRAM[3].EmcCfg2 = 0x000c0099; +SDRAM[3].EmcCfgDigDll = 0x00200084; +SDRAM[3].EmcCfgDigDllPeriod = 0x00008000; +SDRAM[3].EmcCfg = 0x23c00000; +SDRAM[3].EmcDbg = 0x01000400; +SDRAM[3].WarmBootWait = 0x00000002; +SDRAM[3].EmcCttTermCtrl = 0x00000802; +SDRAM[3].EmcOdtWrite = 0x00000000; +SDRAM[3].EmcOdtRead = 0x00000000; +SDRAM[3].EmcZcalWaitCnt = 0x00000040; +SDRAM[3].EmcZcalMrwCmd = 0x80000000; +SDRAM[3].EmcDdr2Wait = 0x00000000; +SDRAM[3].PmcDdrPwr = 0x00000003; +SDRAM[3].EmcClockSource = 0x00000000; +SDRAM[3].EmcClockUsePllMUD = 0x00000000; +SDRAM[3].EmcPinExtraWait = 0x00000000; +SDRAM[3].EmcTimingControlWait = 0x00000000; +SDRAM[3].EmcWext = 0x00000000; +SDRAM[3].EmcCtt = 0x00000000; +SDRAM[3].EmcCttDuration = 0x00000000; +SDRAM[3].EmcPreRefreshReqCnt = 0x000002cb; +SDRAM[3].EmcTxsrDll = 0x00000200; +SDRAM[3].EmcCfgRsv = 0xff00ff89; +SDRAM[3].EmcMrwExtra = 0x00000000; +SDRAM[3].EmcWarmBootMrw1 = 0x00000000; +SDRAM[3].EmcWarmBootMrw2 = 0x00000000; +SDRAM[3].EmcWarmBootMrw3 = 0x00000000; +SDRAM[3].EmcWarmBootMrwExtra = 0x00000000; +SDRAM[3].EmcWarmBootExtraModeRegWriteEnable = 0x00000000; +SDRAM[3].EmcExtraModeRegWriteEnable = 0x00000000; +SDRAM[3].EmcMrsWaitCnt = 0x0184000c; +SDRAM[3].EmcCmdQ = 0x10004408; +SDRAM[3].EmcMc2EmcQ = 0x06000404; +SDRAM[3].EmcDynSelfRefControl = 0x8000174b; +SDRAM[3].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; +SDRAM[3].EmcDevSelect = 0x00000002; +SDRAM[3].EmcSelDpdCtrl = 0x0004032c; +SDRAM[3].EmcDllXformDqs0 = 0x0003c000; +SDRAM[3].EmcDllXformDqs1 = 0x0003c000; +SDRAM[3].EmcDllXformDqs2 = 0x0003c000; +SDRAM[3].EmcDllXformDqs3 = 0x0003c000; +SDRAM[3].EmcDllXformDqs4 = 0x0003c000; +SDRAM[3].EmcDllXformDqs5 = 0x0003c000; +SDRAM[3].EmcDllXformDqs6 = 0x0003c000; +SDRAM[3].EmcDllXformDqs7 = 0x0003c000; +SDRAM[3].EmcDllXformQUse0 = 0x00000000; +SDRAM[3].EmcDllXformQUse1 = 0x00000000; +SDRAM[3].EmcDllXformQUse2 = 0x00000000; +SDRAM[3].EmcDllXformQUse3 = 0x00000000; +SDRAM[3].EmcDllXformQUse4 = 0x00000000; +SDRAM[3].EmcDllXformQUse5 = 0x00000000; +SDRAM[3].EmcDllXformQUse6 = 0x00000000; +SDRAM[3].EmcDllXformQUse7 = 0x00000000; +SDRAM[3].EmcDliTrimTxDqs0 = 0x00000000; +SDRAM[3].EmcDliTrimTxDqs1 = 0x00000000; +SDRAM[3].EmcDliTrimTxDqs2 = 0x00000000; +SDRAM[3].EmcDliTrimTxDqs3 = 0x00000000; +SDRAM[3].EmcDliTrimTxDqs4 = 0x00000000; +SDRAM[3].EmcDliTrimTxDqs5 = 0x00000000; +SDRAM[3].EmcDliTrimTxDqs6 = 0x00000000; +SDRAM[3].EmcDliTrimTxDqs7 = 0x00000000; +SDRAM[3].EmcDllXformDq0 = 0x00040000; +SDRAM[3].EmcDllXformDq1 = 0x00040000; +SDRAM[3].EmcDllXformDq2 = 0x00040000; +SDRAM[3].EmcDllXformDq3 = 0x00040000; +SDRAM[3].EmcZcalInterval = 0x00020000; +SDRAM[3].EmcZcalInitDev0 = 0x80000011; +SDRAM[3].EmcZcalInitDev1 = 0x00000000; +SDRAM[3].EmcZcalInitWait = 0x00000002; +SDRAM[3].EmcZcalColdBootEnable = 0x00000001; +SDRAM[3].EmcZcalWarmBootEnable = 0x00000001; +SDRAM[3].EmcMrwLpddr2ZcalWarmBoot = 0x000a00ab; +SDRAM[3].EmcZqCalDdr3WarmBoot = 0x00000011; +SDRAM[3].EmcZcalWarmBootWait = 0x00000001; +SDRAM[3].EmcMrsWarmBootEnable = 0x00000001; +SDRAM[3].EmcMrsExtra = 0x80000521; +SDRAM[3].EmcWarmBootMrs = 0x80100002; +SDRAM[3].EmcWarmBootEmrs = 0x80000521; +SDRAM[3].EmcWarmBootEmr2 = 0x80200000; +SDRAM[3].EmcWarmBootEmr3 = 0x80300000; +SDRAM[3].EmcWarmBootMrsExtra = 0x80100002; +SDRAM[3].EmcClkenOverride = 0x00000000; +SDRAM[3].EmcExtraRefreshNum = 0x00000002; +SDRAM[3].EmcClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[3].McClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[3].EmcCfgDigDllPeriodWarmBoot = 0x00000003; +SDRAM[3].PmcVddpSel = 0x00000002; +SDRAM[3].PmcDdrCfg = 0x00000002; +SDRAM[3].PmcIoDpdReq = 0x80800000; +SDRAM[3].PmcENoVttGen = 0x00000000; +SDRAM[3].PmcNoIoPower = 0x00000000; +SDRAM[3].EmcXm2CmdPadCtrl = 0x000002a0; +SDRAM[3].EmcXm2CmdPadCtrl2 = 0x770c0000; +SDRAM[3].EmcXm2DqsPadCtrl = 0x770c1414; +SDRAM[3].EmcXm2DqsPadCtrl2 = 0x0800013d; +SDRAM[3].EmcXm2DqsPadCtrl3 = 0x08000021; +SDRAM[3].EmcXm2DqPadCtrl = 0x770c2990; +SDRAM[3].EmcXm2DqPadCtrl2 = 0x00000000; +SDRAM[3].EmcXm2ClkPadCtrl = 0x77fff884; +SDRAM[3].EmcXm2CompPadCtrl = 0x01f1f508; +SDRAM[3].EmcXm2VttGenPadCtrl = 0x05057404; +SDRAM[3].EmcXm2VttGenPadCtrl2 = 0x54000007; +SDRAM[3].EmcXm2QUsePadCtrl = 0x080001e8; +SDRAM[3].McEmemAdrCfg = 0x00000000; +SDRAM[3].McEmemAdrCfgDev0 = 0x00080303; +SDRAM[3].McEmemAdrCfgDev1 = 0x00080303; +SDRAM[3].McEmemArbCfg = 0x0000000b; +SDRAM[3].McEmemArbOutstandingReq = 0xc0000044; +SDRAM[3].McEmemArbTimingRcd = 0x00000001; +SDRAM[3].McEmemArbTimingRp = 0x00000002; +SDRAM[3].McEmemArbTimingRc = 0x00000009; +SDRAM[3].McEmemArbTimingRas = 0x00000005; +SDRAM[3].McEmemArbTimingFaw = 0x00000005; +SDRAM[3].McEmemArbTimingRrd = 0x00000001; +SDRAM[3].McEmemArbTimingRap2Pre = 0x00000002; +SDRAM[3].McEmemArbTimingWap2Pre = 0x00000008; +SDRAM[3].McEmemArbTimingR2R = 0x00000002; +SDRAM[3].McEmemArbTimingW2W = 0x00000002; +SDRAM[3].McEmemArbTimingR2W = 0x00000003; +SDRAM[3].McEmemArbTimingW2R = 0x00000006; +SDRAM[3].McEmemArbDaTurns = 0x06030202; +SDRAM[3].McEmemArbDaCovers = 0x000d0709; +SDRAM[3].McEmemArbMisc0 = 0x7086110a; +SDRAM[3].McEmemArbMisc1 = 0x78000000; +SDRAM[3].McEmemArbRing1Throttle = 0x001f0000; +SDRAM[3].McEmemArbOverride = 0x00000080; +SDRAM[3].McEmemArbRsv = 0xff00ff00; +SDRAM[3].McClkenOverride = 0x00000000; diff --git a/tegra30/nvidia/cardhu/E1198_Hynix_2GB_H5TC2G83BFR-PBA_667MHz_111121_317_sdmmc4_x8.bct.cfg b/tegra30/nvidia/cardhu/E1198_Hynix_2GB_H5TC2G83BFR-PBA_667MHz_111121_317_sdmmc4_x8.bct.cfg new file mode 100644 index 0000000..96b8f81 --- /dev/null +++ b/tegra30/nvidia/cardhu/E1198_Hynix_2GB_H5TC2G83BFR-PBA_667MHz_111121_317_sdmmc4_x8.bct.cfg @@ -0,0 +1,819 @@ +# Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. +# +# This software is provided 'as-is', without any express or implied +# warranty. In no event will the authors be held liable for any damages +# arising from the use of this software. +# +# Permission is granted to anyone to use this software for any purpose, +# including commercial applications, and to alter it and redistribute it +# freely, subject to the following restrictions: +# +# 1. The origin of this software must not be misrepresented; you must not +# claim that you wrote the original software. If you use this software +# in a product, an acknowledgment in the product documentation would be +# appreciated but is not required. +# 2. Altered source versions must be plainly marked as such, and must not be +# misrepresented as being the original software. +# 3. This notice may not be removed or altered from any source distribution. + +Version = 0x00030001; +BlockSize = 0x00004000; +PageSize = 0x00000200; +PartitionSize = 0x02000000; +OdmData = 0x800c0000; + +DevType[0] = NvBootDevType_Sdmmc; +DeviceParam[0].SdmmcParams.ClockDivider = 0x00000009; +DeviceParam[0].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_8Bit; +DeviceParam[0].SdmmcParams.MaxPowerClassSupported = 0x00000000; +DeviceParam[0].SdmmcParams.SdController = 0x00000000; + +DevType[1] = NvBootDevType_Sdmmc; +DeviceParam[1].SdmmcParams.ClockDivider = 0x00000009; +DeviceParam[1].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_8Bit; +DeviceParam[1].SdmmcParams.MaxPowerClassSupported = 0x00000000; +DeviceParam[1].SdmmcParams.SdController = 0x00000000; + +DevType[2] = NvBootDevType_Sdmmc; +DeviceParam[2].SdmmcParams.ClockDivider = 0x00000009; +DeviceParam[2].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_8Bit; +DeviceParam[2].SdmmcParams.MaxPowerClassSupported = 0x00000000; +DeviceParam[2].SdmmcParams.SdController = 0x00000000; + +DevType[3] = NvBootDevType_Sdmmc; +DeviceParam[3].SdmmcParams.ClockDivider = 0x00000009; +DeviceParam[3].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_8Bit; +DeviceParam[3].SdmmcParams.MaxPowerClassSupported = 0x00000000; +DeviceParam[3].SdmmcParams.SdController = 0x00000000; + +SDRAM[0].MemoryType = NvBootMemoryType_Ddr3; +SDRAM[0].PllMChargePumpSetupControl = 0x00000008; +SDRAM[0].PllMLoopFilterSetupControl = 0x00000000; +SDRAM[0].PllMInputDivider = 0x0000000c; +SDRAM[0].PllMFeedbackDivider = 0x0000029b; +SDRAM[0].PllMPostDivider = 0x00000000; +SDRAM[0].PllMStableTime = 0x0000012c; +SDRAM[0].EmcClockDivider = 0x00000000; +SDRAM[0].EmcAutoCalInterval = 0x001fffff; +SDRAM[0].EmcAutoCalConfig = 0xa0f10000; +SDRAM[0].EmcAutoCalWait = 0x00000064; +SDRAM[0].EmcPinProgramWait = 0x00000001; +SDRAM[0].EmcRc = 0x0000001f; +SDRAM[0].EmcRfc = 0x00000069; +SDRAM[0].EmcRas = 0x00000016; +SDRAM[0].EmcRp = 0x00000008; +SDRAM[0].EmcR2w = 0x00000005; +SDRAM[0].EmcW2r = 0x0000000c; +SDRAM[0].EmcR2p = 0x00000003; +SDRAM[0].EmcW2p = 0x00000011; +SDRAM[0].EmcRrd = 0x00000002; +SDRAM[0].EmcRdRcd = 0x00000008; +SDRAM[0].EmcWrRcd = 0x00000008; +SDRAM[0].EmcRext = 0x00000001; +SDRAM[0].EmcWdv = 0x00000007; +SDRAM[0].EmcQUseExtra = 0x0000000c; +SDRAM[0].EmcQUse = 0x0000000b; +SDRAM[0].EmcQRst = 0x00000009; +SDRAM[0].EmcQSafe = 0x0000000c; +SDRAM[0].EmcRdv = 0x00000011; +SDRAM[0].EmcRefresh = 0x00001412; +SDRAM[0].EmcBurstRefreshNum = 0x00000000; +SDRAM[0].EmcPdEx2Wr = 0x00000002; +SDRAM[0].EmcPdEx2Rd = 0x0000000e; +SDRAM[0].EmcPChg2Pden = 0x00000001; +SDRAM[0].EmcAct2Pden = 0x00000000; +SDRAM[0].EmcAr2Pden = 0x0000000c; +SDRAM[0].EmcRw2Pden = 0x00000016; +SDRAM[0].EmcTxsr = 0x00000072; +SDRAM[0].EmcTcke = 0x00000005; +SDRAM[0].EmcTfaw = 0x00000015; +SDRAM[0].EmcTrpab = 0x00000000; +SDRAM[0].EmcTClkStable = 0x00000006; +SDRAM[0].EmcTClkStop = 0x00000007; +SDRAM[0].EmcTRefBw = 0x00001453; +SDRAM[0].EmcFbioCfg5 = 0x00005088; +SDRAM[0].EmcFbioCfg6 = 0x00000004; +SDRAM[0].EmcFbioSpare = 0xf8000000; +SDRAM[0].EmcMrsResetDllWait = 0x00000000; +SDRAM[0].EmcMrsResetDll = 0x00000000; +SDRAM[0].EmcMrsDdr2DllReset = 0x00000000; +SDRAM[0].EmcMrs = 0x00000b71; +SDRAM[0].EmcEmrsEmr2 = 0x00200018; +SDRAM[0].EmcEmrsEmr3 = 0x00300000; +SDRAM[0].EmcEmrsDdr2DllEnable = 0x00000000; +SDRAM[0].EmcEmrsDdr2OcdCalib = 0x00000000; +SDRAM[0].EmcEmrs = 0x00100002; +SDRAM[0].EmcMrw1 = 0x00000000; +SDRAM[0].EmcMrw2 = 0x00000000; +SDRAM[0].EmcMrw3 = 0x00000000; +SDRAM[0].EmcMrwResetCommand = 0x00000000; +SDRAM[0].EmcMrwResetNInitWait = 0x00000000; +SDRAM[0].EmcAdrCfg = 0x00000001; +SDRAM[0].McEmemCfg = 0x00000800; +SDRAM[0].EmcCfg2 = 0x000c0099; +SDRAM[0].EmcCfgDigDll = 0xf00b0191; +SDRAM[0].EmcCfgDigDllPeriod = 0x00008000; +SDRAM[0].EmcCfg = 0x23e00000; +SDRAM[0].EmcDbg = 0x01000400; +SDRAM[0].WarmBootWait = 0x00000002; +SDRAM[0].EmcCttTermCtrl = 0x00000802; +SDRAM[0].EmcOdtWrite = 0x00000000; +SDRAM[0].EmcOdtRead = 0x00000000; +SDRAM[0].EmcZcalWaitCnt = 0x00000040; +SDRAM[0].EmcZcalMrwCmd = 0x00000000; +SDRAM[0].EmcDdr2Wait = 0x00000000; +SDRAM[0].PmcDdrPwr = 0x00000003; +SDRAM[0].EmcClockSource = 0x00000000; +SDRAM[0].EmcClockUsePllMUD = 0x00000001; +SDRAM[0].EmcPinExtraWait = 0x00000000; +SDRAM[0].EmcTimingControlWait = 0x00000000; +SDRAM[0].EmcWext = 0x00000000; +SDRAM[0].EmcCtt = 0x00000000; +SDRAM[0].EmcCttDuration = 0x00000000; +SDRAM[0].EmcPreRefreshReqCnt = 0x00000504; +SDRAM[0].EmcTxsrDll = 0x00000200; +SDRAM[0].EmcCfgRsv = 0xff00ff09; +SDRAM[0].EmcMrwExtra = 0x00000000; +SDRAM[0].EmcWarmBootMrw1 = 0x00000000; +SDRAM[0].EmcWarmBootMrw2 = 0x00000000; +SDRAM[0].EmcWarmBootMrw3 = 0x00000000; +SDRAM[0].EmcWarmBootMrwExtra = 0x00000000; +SDRAM[0].EmcWarmBootExtraModeRegWriteEnable = 0x00000000; +SDRAM[0].EmcExtraModeRegWriteEnable = 0x00000000; +SDRAM[0].EmcMrsWaitCnt = 0x0116000c; +SDRAM[0].EmcCmdQ = 0x10004408; +SDRAM[0].EmcMc2EmcQ = 0x06000404; +SDRAM[0].EmcDynSelfRefControl = 0x800028a5; +SDRAM[0].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; +SDRAM[0].EmcDevSelect = 0x00000000; +SDRAM[0].EmcSelDpdCtrl = 0x0004032c; +SDRAM[0].EmcDllXformDqs0 = 0x00000008; +SDRAM[0].EmcDllXformDqs1 = 0x00000008; +SDRAM[0].EmcDllXformDqs2 = 0x00000008; +SDRAM[0].EmcDllXformDqs3 = 0x00000008; +SDRAM[0].EmcDllXformDqs4 = 0x00000008; +SDRAM[0].EmcDllXformDqs5 = 0x00000008; +SDRAM[0].EmcDllXformDqs6 = 0x00000008; +SDRAM[0].EmcDllXformDqs7 = 0x00000008; +SDRAM[0].EmcDllXformQUse0 = 0x00000000; +SDRAM[0].EmcDllXformQUse1 = 0x00000000; +SDRAM[0].EmcDllXformQUse2 = 0x00000000; +SDRAM[0].EmcDllXformQUse3 = 0x00000000; +SDRAM[0].EmcDllXformQUse4 = 0x00000000; +SDRAM[0].EmcDllXformQUse5 = 0x00000000; +SDRAM[0].EmcDllXformQUse6 = 0x00000000; +SDRAM[0].EmcDllXformQUse7 = 0x00000000; +SDRAM[0].EmcDliTrimTxDqs0 = 0x00000000; +SDRAM[0].EmcDliTrimTxDqs1 = 0x00000000; +SDRAM[0].EmcDliTrimTxDqs2 = 0x00000000; +SDRAM[0].EmcDliTrimTxDqs3 = 0x00000000; +SDRAM[0].EmcDliTrimTxDqs4 = 0x00000000; +SDRAM[0].EmcDliTrimTxDqs5 = 0x00000000; +SDRAM[0].EmcDliTrimTxDqs6 = 0x00000000; +SDRAM[0].EmcDliTrimTxDqs7 = 0x00000000; +SDRAM[0].EmcDllXformDq0 = 0x00000008; +SDRAM[0].EmcDllXformDq1 = 0x00000008; +SDRAM[0].EmcDllXformDq2 = 0x00000008; +SDRAM[0].EmcDllXformDq3 = 0x00000008; +SDRAM[0].EmcZcalInterval = 0x00020000; +SDRAM[0].EmcZcalInitDev0 = 0x80000011; +SDRAM[0].EmcZcalInitDev1 = 0x40000011; +SDRAM[0].EmcZcalInitWait = 0x00000001; +SDRAM[0].EmcZcalColdBootEnable = 0x00000001; +SDRAM[0].EmcZcalWarmBootEnable = 0x00000001; +SDRAM[0].EmcMrwLpddr2ZcalWarmBoot = 0x000a00ab; +SDRAM[0].EmcZqCalDdr3WarmBoot = 0x00000011; +SDRAM[0].EmcZcalWarmBootWait = 0x00000001; +SDRAM[0].EmcMrsWarmBootEnable = 0x00000001; +SDRAM[0].EmcMrsExtra = 0x00000b71; +SDRAM[0].EmcWarmBootMrs = 0x00100002; +SDRAM[0].EmcWarmBootEmrs = 0x00000b71; +SDRAM[0].EmcWarmBootEmr2 = 0x00200018; +SDRAM[0].EmcWarmBootEmr3 = 0x00300000; +SDRAM[0].EmcWarmBootMrsExtra = 0x00100002; +SDRAM[0].EmcClkenOverride = 0x00000000; +SDRAM[0].EmcExtraRefreshNum = 0x00000002; +SDRAM[0].EmcClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[0].McClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[0].EmcCfgDigDllPeriodWarmBoot = 0x00000003; +SDRAM[0].PmcVddpSel = 0x00000002; +SDRAM[0].PmcDdrCfg = 0x00000002; +SDRAM[0].PmcIoDpdReq = 0x80800000; +SDRAM[0].PmcENoVttGen = 0x00000000; +SDRAM[0].PmcNoIoPower = 0x00000000; +SDRAM[0].EmcXm2CmdPadCtrl = 0x000002a0; +SDRAM[0].EmcXm2CmdPadCtrl2 = 0x770c0000; +SDRAM[0].EmcXm2DqsPadCtrl = 0x770c1414; +SDRAM[0].EmcXm2DqsPadCtrl2 = 0x0600013d; +SDRAM[0].EmcXm2DqsPadCtrl3 = 0x07000021; +SDRAM[0].EmcXm2DqPadCtrl = 0x770c2990; +SDRAM[0].EmcXm2DqPadCtrl2 = 0x22220000; +SDRAM[0].EmcXm2ClkPadCtrl = 0x77fff884; +SDRAM[0].EmcXm2CompPadCtrl = 0x01f1f508; +SDRAM[0].EmcXm2VttGenPadCtrl = 0x07077404; +SDRAM[0].EmcXm2VttGenPadCtrl2 = 0x54000000; +SDRAM[0].EmcXm2QUsePadCtrl = 0x080001e8; +SDRAM[0].McEmemAdrCfg = 0x00000001; +SDRAM[0].McEmemAdrCfgDev0 = 0x00080303; +SDRAM[0].McEmemAdrCfgDev1 = 0x00080303; +SDRAM[0].McEmemArbCfg = 0x00000014; +SDRAM[0].McEmemArbOutstandingReq = 0xc0000079; +SDRAM[0].McEmemArbTimingRcd = 0x00000003; +SDRAM[0].McEmemArbTimingRp = 0x00000004; +SDRAM[0].McEmemArbTimingRc = 0x00000010; +SDRAM[0].McEmemArbTimingRas = 0x0000000a; +SDRAM[0].McEmemArbTimingFaw = 0x0000000a; +SDRAM[0].McEmemArbTimingRrd = 0x00000001; +SDRAM[0].McEmemArbTimingRap2Pre = 0x00000003; +SDRAM[0].McEmemArbTimingWap2Pre = 0x0000000b; +SDRAM[0].McEmemArbTimingR2R = 0x00000002; +SDRAM[0].McEmemArbTimingW2W = 0x00000002; +SDRAM[0].McEmemArbTimingR2W = 0x00000004; +SDRAM[0].McEmemArbTimingW2R = 0x00000008; +SDRAM[0].McEmemArbDaTurns = 0x08040202; +SDRAM[0].McEmemArbDaCovers = 0x00140c10; +SDRAM[0].McEmemArbMisc0 = 0x70ea1f11; +SDRAM[0].McEmemArbMisc1 = 0x78000000; +SDRAM[0].McEmemArbRing1Throttle = 0x001f0000; +SDRAM[0].McEmemArbOverride = 0x00000080; +SDRAM[0].McEmemArbRsv = 0xff00ff00; +SDRAM[0].McClkenOverride = 0x00000000; + +SDRAM[1].MemoryType = NvBootMemoryType_Ddr3; +SDRAM[1].PllMChargePumpSetupControl = 0x00000008; +SDRAM[1].PllMLoopFilterSetupControl = 0x00000000; +SDRAM[1].PllMInputDivider = 0x0000000c; +SDRAM[1].PllMFeedbackDivider = 0x0000029b; +SDRAM[1].PllMPostDivider = 0x00000000; +SDRAM[1].PllMStableTime = 0x0000012c; +SDRAM[1].EmcClockDivider = 0x00000000; +SDRAM[1].EmcAutoCalInterval = 0x001fffff; +SDRAM[1].EmcAutoCalConfig = 0xa0f10000; +SDRAM[1].EmcAutoCalWait = 0x00000064; +SDRAM[1].EmcPinProgramWait = 0x00000001; +SDRAM[1].EmcRc = 0x0000001f; +SDRAM[1].EmcRfc = 0x00000069; +SDRAM[1].EmcRas = 0x00000016; +SDRAM[1].EmcRp = 0x00000008; +SDRAM[1].EmcR2w = 0x00000005; +SDRAM[1].EmcW2r = 0x0000000c; +SDRAM[1].EmcR2p = 0x00000003; +SDRAM[1].EmcW2p = 0x00000011; +SDRAM[1].EmcRrd = 0x00000002; +SDRAM[1].EmcRdRcd = 0x00000008; +SDRAM[1].EmcWrRcd = 0x00000008; +SDRAM[1].EmcRext = 0x00000001; +SDRAM[1].EmcWdv = 0x00000007; +SDRAM[1].EmcQUseExtra = 0x0000000c; +SDRAM[1].EmcQUse = 0x0000000b; +SDRAM[1].EmcQRst = 0x00000009; +SDRAM[1].EmcQSafe = 0x0000000c; +SDRAM[1].EmcRdv = 0x00000011; +SDRAM[1].EmcRefresh = 0x00001412; +SDRAM[1].EmcBurstRefreshNum = 0x00000000; +SDRAM[1].EmcPdEx2Wr = 0x00000002; +SDRAM[1].EmcPdEx2Rd = 0x0000000e; +SDRAM[1].EmcPChg2Pden = 0x00000001; +SDRAM[1].EmcAct2Pden = 0x00000000; +SDRAM[1].EmcAr2Pden = 0x0000000c; +SDRAM[1].EmcRw2Pden = 0x00000016; +SDRAM[1].EmcTxsr = 0x00000072; +SDRAM[1].EmcTcke = 0x00000005; +SDRAM[1].EmcTfaw = 0x00000015; +SDRAM[1].EmcTrpab = 0x00000000; +SDRAM[1].EmcTClkStable = 0x00000006; +SDRAM[1].EmcTClkStop = 0x00000007; +SDRAM[1].EmcTRefBw = 0x00001453; +SDRAM[1].EmcFbioCfg5 = 0x00005088; +SDRAM[1].EmcFbioCfg6 = 0x00000004; +SDRAM[1].EmcFbioSpare = 0xf8000000; +SDRAM[1].EmcMrsResetDllWait = 0x00000000; +SDRAM[1].EmcMrsResetDll = 0x00000000; +SDRAM[1].EmcMrsDdr2DllReset = 0x00000000; +SDRAM[1].EmcMrs = 0x00000b71; +SDRAM[1].EmcEmrsEmr2 = 0x00200018; +SDRAM[1].EmcEmrsEmr3 = 0x00300000; +SDRAM[1].EmcEmrsDdr2DllEnable = 0x00000000; +SDRAM[1].EmcEmrsDdr2OcdCalib = 0x00000000; +SDRAM[1].EmcEmrs = 0x00100002; +SDRAM[1].EmcMrw1 = 0x00000000; +SDRAM[1].EmcMrw2 = 0x00000000; +SDRAM[1].EmcMrw3 = 0x00000000; +SDRAM[1].EmcMrwResetCommand = 0x00000000; +SDRAM[1].EmcMrwResetNInitWait = 0x00000000; +SDRAM[1].EmcAdrCfg = 0x00000001; +SDRAM[1].McEmemCfg = 0x00000800; +SDRAM[1].EmcCfg2 = 0x000c0099; +SDRAM[1].EmcCfgDigDll = 0xf00b0191; +SDRAM[1].EmcCfgDigDllPeriod = 0x00008000; +SDRAM[1].EmcCfg = 0x23e00000; +SDRAM[1].EmcDbg = 0x01000400; +SDRAM[1].WarmBootWait = 0x00000002; +SDRAM[1].EmcCttTermCtrl = 0x00000802; +SDRAM[1].EmcOdtWrite = 0x00000000; +SDRAM[1].EmcOdtRead = 0x00000000; +SDRAM[1].EmcZcalWaitCnt = 0x00000040; +SDRAM[1].EmcZcalMrwCmd = 0x00000000; +SDRAM[1].EmcDdr2Wait = 0x00000000; +SDRAM[1].PmcDdrPwr = 0x00000003; +SDRAM[1].EmcClockSource = 0x00000000; +SDRAM[1].EmcClockUsePllMUD = 0x00000001; +SDRAM[1].EmcPinExtraWait = 0x00000000; +SDRAM[1].EmcTimingControlWait = 0x00000000; +SDRAM[1].EmcWext = 0x00000000; +SDRAM[1].EmcCtt = 0x00000000; +SDRAM[1].EmcCttDuration = 0x00000000; +SDRAM[1].EmcPreRefreshReqCnt = 0x00000504; +SDRAM[1].EmcTxsrDll = 0x00000200; +SDRAM[1].EmcCfgRsv = 0xff00ff09; +SDRAM[1].EmcMrwExtra = 0x00000000; +SDRAM[1].EmcWarmBootMrw1 = 0x00000000; +SDRAM[1].EmcWarmBootMrw2 = 0x00000000; +SDRAM[1].EmcWarmBootMrw3 = 0x00000000; +SDRAM[1].EmcWarmBootMrwExtra = 0x00000000; +SDRAM[1].EmcWarmBootExtraModeRegWriteEnable = 0x00000000; +SDRAM[1].EmcExtraModeRegWriteEnable = 0x00000000; +SDRAM[1].EmcMrsWaitCnt = 0x0116000c; +SDRAM[1].EmcCmdQ = 0x10004408; +SDRAM[1].EmcMc2EmcQ = 0x06000404; +SDRAM[1].EmcDynSelfRefControl = 0x800028a5; +SDRAM[1].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; +SDRAM[1].EmcDevSelect = 0x00000000; +SDRAM[1].EmcSelDpdCtrl = 0x0004032c; +SDRAM[1].EmcDllXformDqs0 = 0x00000008; +SDRAM[1].EmcDllXformDqs1 = 0x00000008; +SDRAM[1].EmcDllXformDqs2 = 0x00000008; +SDRAM[1].EmcDllXformDqs3 = 0x00000008; +SDRAM[1].EmcDllXformDqs4 = 0x00000008; +SDRAM[1].EmcDllXformDqs5 = 0x00000008; +SDRAM[1].EmcDllXformDqs6 = 0x00000008; +SDRAM[1].EmcDllXformDqs7 = 0x00000008; +SDRAM[1].EmcDllXformQUse0 = 0x00000000; +SDRAM[1].EmcDllXformQUse1 = 0x00000000; +SDRAM[1].EmcDllXformQUse2 = 0x00000000; +SDRAM[1].EmcDllXformQUse3 = 0x00000000; +SDRAM[1].EmcDllXformQUse4 = 0x00000000; +SDRAM[1].EmcDllXformQUse5 = 0x00000000; +SDRAM[1].EmcDllXformQUse6 = 0x00000000; +SDRAM[1].EmcDllXformQUse7 = 0x00000000; +SDRAM[1].EmcDliTrimTxDqs0 = 0x00000000; +SDRAM[1].EmcDliTrimTxDqs1 = 0x00000000; +SDRAM[1].EmcDliTrimTxDqs2 = 0x00000000; +SDRAM[1].EmcDliTrimTxDqs3 = 0x00000000; +SDRAM[1].EmcDliTrimTxDqs4 = 0x00000000; +SDRAM[1].EmcDliTrimTxDqs5 = 0x00000000; +SDRAM[1].EmcDliTrimTxDqs6 = 0x00000000; +SDRAM[1].EmcDliTrimTxDqs7 = 0x00000000; +SDRAM[1].EmcDllXformDq0 = 0x00000008; +SDRAM[1].EmcDllXformDq1 = 0x00000008; +SDRAM[1].EmcDllXformDq2 = 0x00000008; +SDRAM[1].EmcDllXformDq3 = 0x00000008; +SDRAM[1].EmcZcalInterval = 0x00020000; +SDRAM[1].EmcZcalInitDev0 = 0x80000011; +SDRAM[1].EmcZcalInitDev1 = 0x40000011; +SDRAM[1].EmcZcalInitWait = 0x00000001; +SDRAM[1].EmcZcalColdBootEnable = 0x00000001; +SDRAM[1].EmcZcalWarmBootEnable = 0x00000001; +SDRAM[1].EmcMrwLpddr2ZcalWarmBoot = 0x000a00ab; +SDRAM[1].EmcZqCalDdr3WarmBoot = 0x00000011; +SDRAM[1].EmcZcalWarmBootWait = 0x00000001; +SDRAM[1].EmcMrsWarmBootEnable = 0x00000001; +SDRAM[1].EmcMrsExtra = 0x00000b71; +SDRAM[1].EmcWarmBootMrs = 0x00100002; +SDRAM[1].EmcWarmBootEmrs = 0x00000b71; +SDRAM[1].EmcWarmBootEmr2 = 0x00200018; +SDRAM[1].EmcWarmBootEmr3 = 0x00300000; +SDRAM[1].EmcWarmBootMrsExtra = 0x00100002; +SDRAM[1].EmcClkenOverride = 0x00000000; +SDRAM[1].EmcExtraRefreshNum = 0x00000002; +SDRAM[1].EmcClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[1].McClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[1].EmcCfgDigDllPeriodWarmBoot = 0x00000003; +SDRAM[1].PmcVddpSel = 0x00000002; +SDRAM[1].PmcDdrCfg = 0x00000002; +SDRAM[1].PmcIoDpdReq = 0x80800000; +SDRAM[1].PmcENoVttGen = 0x00000000; +SDRAM[1].PmcNoIoPower = 0x00000000; +SDRAM[1].EmcXm2CmdPadCtrl = 0x000002a0; +SDRAM[1].EmcXm2CmdPadCtrl2 = 0x770c0000; +SDRAM[1].EmcXm2DqsPadCtrl = 0x770c1414; +SDRAM[1].EmcXm2DqsPadCtrl2 = 0x0600013d; +SDRAM[1].EmcXm2DqsPadCtrl3 = 0x07000021; +SDRAM[1].EmcXm2DqPadCtrl = 0x770c2990; +SDRAM[1].EmcXm2DqPadCtrl2 = 0x22220000; +SDRAM[1].EmcXm2ClkPadCtrl = 0x77fff884; +SDRAM[1].EmcXm2CompPadCtrl = 0x01f1f508; +SDRAM[1].EmcXm2VttGenPadCtrl = 0x07077404; +SDRAM[1].EmcXm2VttGenPadCtrl2 = 0x54000000; +SDRAM[1].EmcXm2QUsePadCtrl = 0x080001e8; +SDRAM[1].McEmemAdrCfg = 0x00000001; +SDRAM[1].McEmemAdrCfgDev0 = 0x00080303; +SDRAM[1].McEmemAdrCfgDev1 = 0x00080303; +SDRAM[1].McEmemArbCfg = 0x00000014; +SDRAM[1].McEmemArbOutstandingReq = 0xc0000079; +SDRAM[1].McEmemArbTimingRcd = 0x00000003; +SDRAM[1].McEmemArbTimingRp = 0x00000004; +SDRAM[1].McEmemArbTimingRc = 0x00000010; +SDRAM[1].McEmemArbTimingRas = 0x0000000a; +SDRAM[1].McEmemArbTimingFaw = 0x0000000a; +SDRAM[1].McEmemArbTimingRrd = 0x00000001; +SDRAM[1].McEmemArbTimingRap2Pre = 0x00000003; +SDRAM[1].McEmemArbTimingWap2Pre = 0x0000000b; +SDRAM[1].McEmemArbTimingR2R = 0x00000002; +SDRAM[1].McEmemArbTimingW2W = 0x00000002; +SDRAM[1].McEmemArbTimingR2W = 0x00000004; +SDRAM[1].McEmemArbTimingW2R = 0x00000008; +SDRAM[1].McEmemArbDaTurns = 0x08040202; +SDRAM[1].McEmemArbDaCovers = 0x00140c10; +SDRAM[1].McEmemArbMisc0 = 0x70ea1f11; +SDRAM[1].McEmemArbMisc1 = 0x78000000; +SDRAM[1].McEmemArbRing1Throttle = 0x001f0000; +SDRAM[1].McEmemArbOverride = 0x00000080; +SDRAM[1].McEmemArbRsv = 0xff00ff00; +SDRAM[1].McClkenOverride = 0x00000000; + +SDRAM[2].MemoryType = NvBootMemoryType_Ddr3; +SDRAM[2].PllMChargePumpSetupControl = 0x00000008; +SDRAM[2].PllMLoopFilterSetupControl = 0x00000000; +SDRAM[2].PllMInputDivider = 0x0000000c; +SDRAM[2].PllMFeedbackDivider = 0x0000029b; +SDRAM[2].PllMPostDivider = 0x00000000; +SDRAM[2].PllMStableTime = 0x0000012c; +SDRAM[2].EmcClockDivider = 0x00000000; +SDRAM[2].EmcAutoCalInterval = 0x001fffff; +SDRAM[2].EmcAutoCalConfig = 0xa0f10000; +SDRAM[2].EmcAutoCalWait = 0x00000064; +SDRAM[2].EmcPinProgramWait = 0x00000001; +SDRAM[2].EmcRc = 0x0000001f; +SDRAM[2].EmcRfc = 0x00000069; +SDRAM[2].EmcRas = 0x00000016; +SDRAM[2].EmcRp = 0x00000008; +SDRAM[2].EmcR2w = 0x00000005; +SDRAM[2].EmcW2r = 0x0000000c; +SDRAM[2].EmcR2p = 0x00000003; +SDRAM[2].EmcW2p = 0x00000011; +SDRAM[2].EmcRrd = 0x00000002; +SDRAM[2].EmcRdRcd = 0x00000008; +SDRAM[2].EmcWrRcd = 0x00000008; +SDRAM[2].EmcRext = 0x00000001; +SDRAM[2].EmcWdv = 0x00000007; +SDRAM[2].EmcQUseExtra = 0x0000000c; +SDRAM[2].EmcQUse = 0x0000000b; +SDRAM[2].EmcQRst = 0x00000009; +SDRAM[2].EmcQSafe = 0x0000000c; +SDRAM[2].EmcRdv = 0x00000011; +SDRAM[2].EmcRefresh = 0x00001412; +SDRAM[2].EmcBurstRefreshNum = 0x00000000; +SDRAM[2].EmcPdEx2Wr = 0x00000002; +SDRAM[2].EmcPdEx2Rd = 0x0000000e; +SDRAM[2].EmcPChg2Pden = 0x00000001; +SDRAM[2].EmcAct2Pden = 0x00000000; +SDRAM[2].EmcAr2Pden = 0x0000000c; +SDRAM[2].EmcRw2Pden = 0x00000016; +SDRAM[2].EmcTxsr = 0x00000072; +SDRAM[2].EmcTcke = 0x00000005; +SDRAM[2].EmcTfaw = 0x00000015; +SDRAM[2].EmcTrpab = 0x00000000; +SDRAM[2].EmcTClkStable = 0x00000006; +SDRAM[2].EmcTClkStop = 0x00000007; +SDRAM[2].EmcTRefBw = 0x00001453; +SDRAM[2].EmcFbioCfg5 = 0x00005088; +SDRAM[2].EmcFbioCfg6 = 0x00000004; +SDRAM[2].EmcFbioSpare = 0xf8000000; +SDRAM[2].EmcMrsResetDllWait = 0x00000000; +SDRAM[2].EmcMrsResetDll = 0x00000000; +SDRAM[2].EmcMrsDdr2DllReset = 0x00000000; +SDRAM[2].EmcMrs = 0x00000b71; +SDRAM[2].EmcEmrsEmr2 = 0x00200018; +SDRAM[2].EmcEmrsEmr3 = 0x00300000; +SDRAM[2].EmcEmrsDdr2DllEnable = 0x00000000; +SDRAM[2].EmcEmrsDdr2OcdCalib = 0x00000000; +SDRAM[2].EmcEmrs = 0x00100002; +SDRAM[2].EmcMrw1 = 0x00000000; +SDRAM[2].EmcMrw2 = 0x00000000; +SDRAM[2].EmcMrw3 = 0x00000000; +SDRAM[2].EmcMrwResetCommand = 0x00000000; +SDRAM[2].EmcMrwResetNInitWait = 0x00000000; +SDRAM[2].EmcAdrCfg = 0x00000001; +SDRAM[2].McEmemCfg = 0x00000800; +SDRAM[2].EmcCfg2 = 0x000c0099; +SDRAM[2].EmcCfgDigDll = 0xf00b0191; +SDRAM[2].EmcCfgDigDllPeriod = 0x00008000; +SDRAM[2].EmcCfg = 0x23e00000; +SDRAM[2].EmcDbg = 0x01000400; +SDRAM[2].WarmBootWait = 0x00000002; +SDRAM[2].EmcCttTermCtrl = 0x00000802; +SDRAM[2].EmcOdtWrite = 0x00000000; +SDRAM[2].EmcOdtRead = 0x00000000; +SDRAM[2].EmcZcalWaitCnt = 0x00000040; +SDRAM[2].EmcZcalMrwCmd = 0x00000000; +SDRAM[2].EmcDdr2Wait = 0x00000000; +SDRAM[2].PmcDdrPwr = 0x00000003; +SDRAM[2].EmcClockSource = 0x00000000; +SDRAM[2].EmcClockUsePllMUD = 0x00000001; +SDRAM[2].EmcPinExtraWait = 0x00000000; +SDRAM[2].EmcTimingControlWait = 0x00000000; +SDRAM[2].EmcWext = 0x00000000; +SDRAM[2].EmcCtt = 0x00000000; +SDRAM[2].EmcCttDuration = 0x00000000; +SDRAM[2].EmcPreRefreshReqCnt = 0x00000504; +SDRAM[2].EmcTxsrDll = 0x00000200; +SDRAM[2].EmcCfgRsv = 0xff00ff09; +SDRAM[2].EmcMrwExtra = 0x00000000; +SDRAM[2].EmcWarmBootMrw1 = 0x00000000; +SDRAM[2].EmcWarmBootMrw2 = 0x00000000; +SDRAM[2].EmcWarmBootMrw3 = 0x00000000; +SDRAM[2].EmcWarmBootMrwExtra = 0x00000000; +SDRAM[2].EmcWarmBootExtraModeRegWriteEnable = 0x00000000; +SDRAM[2].EmcExtraModeRegWriteEnable = 0x00000000; +SDRAM[2].EmcMrsWaitCnt = 0x0116000c; +SDRAM[2].EmcCmdQ = 0x10004408; +SDRAM[2].EmcMc2EmcQ = 0x06000404; +SDRAM[2].EmcDynSelfRefControl = 0x800028a5; +SDRAM[2].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; +SDRAM[2].EmcDevSelect = 0x00000000; +SDRAM[2].EmcSelDpdCtrl = 0x0004032c; +SDRAM[2].EmcDllXformDqs0 = 0x00000008; +SDRAM[2].EmcDllXformDqs1 = 0x00000008; +SDRAM[2].EmcDllXformDqs2 = 0x00000008; +SDRAM[2].EmcDllXformDqs3 = 0x00000008; +SDRAM[2].EmcDllXformDqs4 = 0x00000008; +SDRAM[2].EmcDllXformDqs5 = 0x00000008; +SDRAM[2].EmcDllXformDqs6 = 0x00000008; +SDRAM[2].EmcDllXformDqs7 = 0x00000008; +SDRAM[2].EmcDllXformQUse0 = 0x00000000; +SDRAM[2].EmcDllXformQUse1 = 0x00000000; +SDRAM[2].EmcDllXformQUse2 = 0x00000000; +SDRAM[2].EmcDllXformQUse3 = 0x00000000; +SDRAM[2].EmcDllXformQUse4 = 0x00000000; +SDRAM[2].EmcDllXformQUse5 = 0x00000000; +SDRAM[2].EmcDllXformQUse6 = 0x00000000; +SDRAM[2].EmcDllXformQUse7 = 0x00000000; +SDRAM[2].EmcDliTrimTxDqs0 = 0x00000000; +SDRAM[2].EmcDliTrimTxDqs1 = 0x00000000; +SDRAM[2].EmcDliTrimTxDqs2 = 0x00000000; +SDRAM[2].EmcDliTrimTxDqs3 = 0x00000000; +SDRAM[2].EmcDliTrimTxDqs4 = 0x00000000; +SDRAM[2].EmcDliTrimTxDqs5 = 0x00000000; +SDRAM[2].EmcDliTrimTxDqs6 = 0x00000000; +SDRAM[2].EmcDliTrimTxDqs7 = 0x00000000; +SDRAM[2].EmcDllXformDq0 = 0x00000008; +SDRAM[2].EmcDllXformDq1 = 0x00000008; +SDRAM[2].EmcDllXformDq2 = 0x00000008; +SDRAM[2].EmcDllXformDq3 = 0x00000008; +SDRAM[2].EmcZcalInterval = 0x00020000; +SDRAM[2].EmcZcalInitDev0 = 0x80000011; +SDRAM[2].EmcZcalInitDev1 = 0x40000011; +SDRAM[2].EmcZcalInitWait = 0x00000001; +SDRAM[2].EmcZcalColdBootEnable = 0x00000001; +SDRAM[2].EmcZcalWarmBootEnable = 0x00000001; +SDRAM[2].EmcMrwLpddr2ZcalWarmBoot = 0x000a00ab; +SDRAM[2].EmcZqCalDdr3WarmBoot = 0x00000011; +SDRAM[2].EmcZcalWarmBootWait = 0x00000001; +SDRAM[2].EmcMrsWarmBootEnable = 0x00000001; +SDRAM[2].EmcMrsExtra = 0x00000b71; +SDRAM[2].EmcWarmBootMrs = 0x00100002; +SDRAM[2].EmcWarmBootEmrs = 0x00000b71; +SDRAM[2].EmcWarmBootEmr2 = 0x00200018; +SDRAM[2].EmcWarmBootEmr3 = 0x00300000; +SDRAM[2].EmcWarmBootMrsExtra = 0x00100002; +SDRAM[2].EmcClkenOverride = 0x00000000; +SDRAM[2].EmcExtraRefreshNum = 0x00000002; +SDRAM[2].EmcClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[2].McClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[2].EmcCfgDigDllPeriodWarmBoot = 0x00000003; +SDRAM[2].PmcVddpSel = 0x00000002; +SDRAM[2].PmcDdrCfg = 0x00000002; +SDRAM[2].PmcIoDpdReq = 0x80800000; +SDRAM[2].PmcENoVttGen = 0x00000000; +SDRAM[2].PmcNoIoPower = 0x00000000; +SDRAM[2].EmcXm2CmdPadCtrl = 0x000002a0; +SDRAM[2].EmcXm2CmdPadCtrl2 = 0x770c0000; +SDRAM[2].EmcXm2DqsPadCtrl = 0x770c1414; +SDRAM[2].EmcXm2DqsPadCtrl2 = 0x0600013d; +SDRAM[2].EmcXm2DqsPadCtrl3 = 0x07000021; +SDRAM[2].EmcXm2DqPadCtrl = 0x770c2990; +SDRAM[2].EmcXm2DqPadCtrl2 = 0x22220000; +SDRAM[2].EmcXm2ClkPadCtrl = 0x77fff884; +SDRAM[2].EmcXm2CompPadCtrl = 0x01f1f508; +SDRAM[2].EmcXm2VttGenPadCtrl = 0x07077404; +SDRAM[2].EmcXm2VttGenPadCtrl2 = 0x54000000; +SDRAM[2].EmcXm2QUsePadCtrl = 0x080001e8; +SDRAM[2].McEmemAdrCfg = 0x00000001; +SDRAM[2].McEmemAdrCfgDev0 = 0x00080303; +SDRAM[2].McEmemAdrCfgDev1 = 0x00080303; +SDRAM[2].McEmemArbCfg = 0x00000014; +SDRAM[2].McEmemArbOutstandingReq = 0xc0000079; +SDRAM[2].McEmemArbTimingRcd = 0x00000003; +SDRAM[2].McEmemArbTimingRp = 0x00000004; +SDRAM[2].McEmemArbTimingRc = 0x00000010; +SDRAM[2].McEmemArbTimingRas = 0x0000000a; +SDRAM[2].McEmemArbTimingFaw = 0x0000000a; +SDRAM[2].McEmemArbTimingRrd = 0x00000001; +SDRAM[2].McEmemArbTimingRap2Pre = 0x00000003; +SDRAM[2].McEmemArbTimingWap2Pre = 0x0000000b; +SDRAM[2].McEmemArbTimingR2R = 0x00000002; +SDRAM[2].McEmemArbTimingW2W = 0x00000002; +SDRAM[2].McEmemArbTimingR2W = 0x00000004; +SDRAM[2].McEmemArbTimingW2R = 0x00000008; +SDRAM[2].McEmemArbDaTurns = 0x08040202; +SDRAM[2].McEmemArbDaCovers = 0x00140c10; +SDRAM[2].McEmemArbMisc0 = 0x70ea1f11; +SDRAM[2].McEmemArbMisc1 = 0x78000000; +SDRAM[2].McEmemArbRing1Throttle = 0x001f0000; +SDRAM[2].McEmemArbOverride = 0x00000080; +SDRAM[2].McEmemArbRsv = 0xff00ff00; +SDRAM[2].McClkenOverride = 0x00000000; + +SDRAM[3].MemoryType = NvBootMemoryType_Ddr3; +SDRAM[3].PllMChargePumpSetupControl = 0x00000008; +SDRAM[3].PllMLoopFilterSetupControl = 0x00000000; +SDRAM[3].PllMInputDivider = 0x0000000c; +SDRAM[3].PllMFeedbackDivider = 0x0000029b; +SDRAM[3].PllMPostDivider = 0x00000000; +SDRAM[3].PllMStableTime = 0x0000012c; +SDRAM[3].EmcClockDivider = 0x00000000; +SDRAM[3].EmcAutoCalInterval = 0x001fffff; +SDRAM[3].EmcAutoCalConfig = 0xa0f10000; +SDRAM[3].EmcAutoCalWait = 0x00000064; +SDRAM[3].EmcPinProgramWait = 0x00000001; +SDRAM[3].EmcRc = 0x0000001f; +SDRAM[3].EmcRfc = 0x00000069; +SDRAM[3].EmcRas = 0x00000016; +SDRAM[3].EmcRp = 0x00000008; +SDRAM[3].EmcR2w = 0x00000005; +SDRAM[3].EmcW2r = 0x0000000c; +SDRAM[3].EmcR2p = 0x00000003; +SDRAM[3].EmcW2p = 0x00000011; +SDRAM[3].EmcRrd = 0x00000002; +SDRAM[3].EmcRdRcd = 0x00000008; +SDRAM[3].EmcWrRcd = 0x00000008; +SDRAM[3].EmcRext = 0x00000001; +SDRAM[3].EmcWdv = 0x00000007; +SDRAM[3].EmcQUseExtra = 0x0000000c; +SDRAM[3].EmcQUse = 0x0000000b; +SDRAM[3].EmcQRst = 0x00000009; +SDRAM[3].EmcQSafe = 0x0000000c; +SDRAM[3].EmcRdv = 0x00000011; +SDRAM[3].EmcRefresh = 0x00001412; +SDRAM[3].EmcBurstRefreshNum = 0x00000000; +SDRAM[3].EmcPdEx2Wr = 0x00000002; +SDRAM[3].EmcPdEx2Rd = 0x0000000e; +SDRAM[3].EmcPChg2Pden = 0x00000001; +SDRAM[3].EmcAct2Pden = 0x00000000; +SDRAM[3].EmcAr2Pden = 0x0000000c; +SDRAM[3].EmcRw2Pden = 0x00000016; +SDRAM[3].EmcTxsr = 0x00000072; +SDRAM[3].EmcTcke = 0x00000005; +SDRAM[3].EmcTfaw = 0x00000015; +SDRAM[3].EmcTrpab = 0x00000000; +SDRAM[3].EmcTClkStable = 0x00000006; +SDRAM[3].EmcTClkStop = 0x00000007; +SDRAM[3].EmcTRefBw = 0x00001453; +SDRAM[3].EmcFbioCfg5 = 0x00005088; +SDRAM[3].EmcFbioCfg6 = 0x00000004; +SDRAM[3].EmcFbioSpare = 0xf8000000; +SDRAM[3].EmcMrsResetDllWait = 0x00000000; +SDRAM[3].EmcMrsResetDll = 0x00000000; +SDRAM[3].EmcMrsDdr2DllReset = 0x00000000; +SDRAM[3].EmcMrs = 0x00000b71; +SDRAM[3].EmcEmrsEmr2 = 0x00200018; +SDRAM[3].EmcEmrsEmr3 = 0x00300000; +SDRAM[3].EmcEmrsDdr2DllEnable = 0x00000000; +SDRAM[3].EmcEmrsDdr2OcdCalib = 0x00000000; +SDRAM[3].EmcEmrs = 0x00100002; +SDRAM[3].EmcMrw1 = 0x00000000; +SDRAM[3].EmcMrw2 = 0x00000000; +SDRAM[3].EmcMrw3 = 0x00000000; +SDRAM[3].EmcMrwResetCommand = 0x00000000; +SDRAM[3].EmcMrwResetNInitWait = 0x00000000; +SDRAM[3].EmcAdrCfg = 0x00000001; +SDRAM[3].McEmemCfg = 0x00000800; +SDRAM[3].EmcCfg2 = 0x000c0099; +SDRAM[3].EmcCfgDigDll = 0xf00b0191; +SDRAM[3].EmcCfgDigDllPeriod = 0x00008000; +SDRAM[3].EmcCfg = 0x23e00000; +SDRAM[3].EmcDbg = 0x01000400; +SDRAM[3].WarmBootWait = 0x00000002; +SDRAM[3].EmcCttTermCtrl = 0x00000802; +SDRAM[3].EmcOdtWrite = 0x00000000; +SDRAM[3].EmcOdtRead = 0x00000000; +SDRAM[3].EmcZcalWaitCnt = 0x00000040; +SDRAM[3].EmcZcalMrwCmd = 0x00000000; +SDRAM[3].EmcDdr2Wait = 0x00000000; +SDRAM[3].PmcDdrPwr = 0x00000003; +SDRAM[3].EmcClockSource = 0x00000000; +SDRAM[3].EmcClockUsePllMUD = 0x00000001; +SDRAM[3].EmcPinExtraWait = 0x00000000; +SDRAM[3].EmcTimingControlWait = 0x00000000; +SDRAM[3].EmcWext = 0x00000000; +SDRAM[3].EmcCtt = 0x00000000; +SDRAM[3].EmcCttDuration = 0x00000000; +SDRAM[3].EmcPreRefreshReqCnt = 0x00000504; +SDRAM[3].EmcTxsrDll = 0x00000200; +SDRAM[3].EmcCfgRsv = 0xff00ff09; +SDRAM[3].EmcMrwExtra = 0x00000000; +SDRAM[3].EmcWarmBootMrw1 = 0x00000000; +SDRAM[3].EmcWarmBootMrw2 = 0x00000000; +SDRAM[3].EmcWarmBootMrw3 = 0x00000000; +SDRAM[3].EmcWarmBootMrwExtra = 0x00000000; +SDRAM[3].EmcWarmBootExtraModeRegWriteEnable = 0x00000000; +SDRAM[3].EmcExtraModeRegWriteEnable = 0x00000000; +SDRAM[3].EmcMrsWaitCnt = 0x0116000c; +SDRAM[3].EmcCmdQ = 0x10004408; +SDRAM[3].EmcMc2EmcQ = 0x06000404; +SDRAM[3].EmcDynSelfRefControl = 0x800028a5; +SDRAM[3].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; +SDRAM[3].EmcDevSelect = 0x00000000; +SDRAM[3].EmcSelDpdCtrl = 0x0004032c; +SDRAM[3].EmcDllXformDqs0 = 0x00000008; +SDRAM[3].EmcDllXformDqs1 = 0x00000008; +SDRAM[3].EmcDllXformDqs2 = 0x00000008; +SDRAM[3].EmcDllXformDqs3 = 0x00000008; +SDRAM[3].EmcDllXformDqs4 = 0x00000008; +SDRAM[3].EmcDllXformDqs5 = 0x00000008; +SDRAM[3].EmcDllXformDqs6 = 0x00000008; +SDRAM[3].EmcDllXformDqs7 = 0x00000008; +SDRAM[3].EmcDllXformQUse0 = 0x00000000; +SDRAM[3].EmcDllXformQUse1 = 0x00000000; +SDRAM[3].EmcDllXformQUse2 = 0x00000000; +SDRAM[3].EmcDllXformQUse3 = 0x00000000; +SDRAM[3].EmcDllXformQUse4 = 0x00000000; +SDRAM[3].EmcDllXformQUse5 = 0x00000000; +SDRAM[3].EmcDllXformQUse6 = 0x00000000; +SDRAM[3].EmcDllXformQUse7 = 0x00000000; +SDRAM[3].EmcDliTrimTxDqs0 = 0x00000000; +SDRAM[3].EmcDliTrimTxDqs1 = 0x00000000; +SDRAM[3].EmcDliTrimTxDqs2 = 0x00000000; +SDRAM[3].EmcDliTrimTxDqs3 = 0x00000000; +SDRAM[3].EmcDliTrimTxDqs4 = 0x00000000; +SDRAM[3].EmcDliTrimTxDqs5 = 0x00000000; +SDRAM[3].EmcDliTrimTxDqs6 = 0x00000000; +SDRAM[3].EmcDliTrimTxDqs7 = 0x00000000; +SDRAM[3].EmcDllXformDq0 = 0x00000008; +SDRAM[3].EmcDllXformDq1 = 0x00000008; +SDRAM[3].EmcDllXformDq2 = 0x00000008; +SDRAM[3].EmcDllXformDq3 = 0x00000008; +SDRAM[3].EmcZcalInterval = 0x00020000; +SDRAM[3].EmcZcalInitDev0 = 0x80000011; +SDRAM[3].EmcZcalInitDev1 = 0x40000011; +SDRAM[3].EmcZcalInitWait = 0x00000001; +SDRAM[3].EmcZcalColdBootEnable = 0x00000001; +SDRAM[3].EmcZcalWarmBootEnable = 0x00000001; +SDRAM[3].EmcMrwLpddr2ZcalWarmBoot = 0x000a00ab; +SDRAM[3].EmcZqCalDdr3WarmBoot = 0x00000011; +SDRAM[3].EmcZcalWarmBootWait = 0x00000001; +SDRAM[3].EmcMrsWarmBootEnable = 0x00000001; +SDRAM[3].EmcMrsExtra = 0x00000b71; +SDRAM[3].EmcWarmBootMrs = 0x00100002; +SDRAM[3].EmcWarmBootEmrs = 0x00000b71; +SDRAM[3].EmcWarmBootEmr2 = 0x00200018; +SDRAM[3].EmcWarmBootEmr3 = 0x00300000; +SDRAM[3].EmcWarmBootMrsExtra = 0x00100002; +SDRAM[3].EmcClkenOverride = 0x00000000; +SDRAM[3].EmcExtraRefreshNum = 0x00000002; +SDRAM[3].EmcClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[3].McClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[3].EmcCfgDigDllPeriodWarmBoot = 0x00000003; +SDRAM[3].PmcVddpSel = 0x00000002; +SDRAM[3].PmcDdrCfg = 0x00000002; +SDRAM[3].PmcIoDpdReq = 0x80800000; +SDRAM[3].PmcENoVttGen = 0x00000000; +SDRAM[3].PmcNoIoPower = 0x00000000; +SDRAM[3].EmcXm2CmdPadCtrl = 0x000002a0; +SDRAM[3].EmcXm2CmdPadCtrl2 = 0x770c0000; +SDRAM[3].EmcXm2DqsPadCtrl = 0x770c1414; +SDRAM[3].EmcXm2DqsPadCtrl2 = 0x0600013d; +SDRAM[3].EmcXm2DqsPadCtrl3 = 0x07000021; +SDRAM[3].EmcXm2DqPadCtrl = 0x770c2990; +SDRAM[3].EmcXm2DqPadCtrl2 = 0x22220000; +SDRAM[3].EmcXm2ClkPadCtrl = 0x77fff884; +SDRAM[3].EmcXm2CompPadCtrl = 0x01f1f508; +SDRAM[3].EmcXm2VttGenPadCtrl = 0x07077404; +SDRAM[3].EmcXm2VttGenPadCtrl2 = 0x54000000; +SDRAM[3].EmcXm2QUsePadCtrl = 0x080001e8; +SDRAM[3].McEmemAdrCfg = 0x00000001; +SDRAM[3].McEmemAdrCfgDev0 = 0x00080303; +SDRAM[3].McEmemAdrCfgDev1 = 0x00080303; +SDRAM[3].McEmemArbCfg = 0x00000014; +SDRAM[3].McEmemArbOutstandingReq = 0xc0000079; +SDRAM[3].McEmemArbTimingRcd = 0x00000003; +SDRAM[3].McEmemArbTimingRp = 0x00000004; +SDRAM[3].McEmemArbTimingRc = 0x00000010; +SDRAM[3].McEmemArbTimingRas = 0x0000000a; +SDRAM[3].McEmemArbTimingFaw = 0x0000000a; +SDRAM[3].McEmemArbTimingRrd = 0x00000001; +SDRAM[3].McEmemArbTimingRap2Pre = 0x00000003; +SDRAM[3].McEmemArbTimingWap2Pre = 0x0000000b; +SDRAM[3].McEmemArbTimingR2R = 0x00000002; +SDRAM[3].McEmemArbTimingW2W = 0x00000002; +SDRAM[3].McEmemArbTimingR2W = 0x00000004; +SDRAM[3].McEmemArbTimingW2R = 0x00000008; +SDRAM[3].McEmemArbDaTurns = 0x08040202; +SDRAM[3].McEmemArbDaCovers = 0x00140c10; +SDRAM[3].McEmemArbMisc0 = 0x70ea1f11; +SDRAM[3].McEmemArbMisc1 = 0x78000000; +SDRAM[3].McEmemArbRing1Throttle = 0x001f0000; +SDRAM[3].McEmemArbOverride = 0x00000080; +SDRAM[3].McEmemArbRsv = 0xff00ff00; +SDRAM[3].McClkenOverride = 0x00000000; diff --git a/tegra30/nvidia/cardhu/E1198_Hynix_2GB_H5TC4G83MFR-PBA_375MHz_111122_317_sdmmc4_x8.bct.cfg b/tegra30/nvidia/cardhu/E1198_Hynix_2GB_H5TC4G83MFR-PBA_375MHz_111122_317_sdmmc4_x8.bct.cfg new file mode 100644 index 0000000..f4ee3e0 --- /dev/null +++ b/tegra30/nvidia/cardhu/E1198_Hynix_2GB_H5TC4G83MFR-PBA_375MHz_111122_317_sdmmc4_x8.bct.cfg @@ -0,0 +1,819 @@ +# Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. +# +# This software is provided 'as-is', without any express or implied +# warranty. In no event will the authors be held liable for any damages +# arising from the use of this software. +# +# Permission is granted to anyone to use this software for any purpose, +# including commercial applications, and to alter it and redistribute it +# freely, subject to the following restrictions: +# +# 1. The origin of this software must not be misrepresented; you must not +# claim that you wrote the original software. If you use this software +# in a product, an acknowledgment in the product documentation would be +# appreciated but is not required. +# 2. Altered source versions must be plainly marked as such, and must not be +# misrepresented as being the original software. +# 3. This notice may not be removed or altered from any source distribution. + +Version = 0x00030001; +BlockSize = 0x00004000; +PageSize = 0x00000200; +PartitionSize = 0x02000000; +OdmData = 0x800c0000; + +DevType[0] = NvBootDevType_Sdmmc; +DeviceParam[0].SdmmcParams.ClockDivider = 0x00000009; +DeviceParam[0].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_8Bit; +DeviceParam[0].SdmmcParams.MaxPowerClassSupported = 0x00000000; +DeviceParam[0].SdmmcParams.SdController = 0x00000000; + +DevType[1] = NvBootDevType_Sdmmc; +DeviceParam[1].SdmmcParams.ClockDivider = 0x00000009; +DeviceParam[1].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_8Bit; +DeviceParam[1].SdmmcParams.MaxPowerClassSupported = 0x00000000; +DeviceParam[1].SdmmcParams.SdController = 0x00000000; + +DevType[2] = NvBootDevType_Sdmmc; +DeviceParam[2].SdmmcParams.ClockDivider = 0x00000009; +DeviceParam[2].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_8Bit; +DeviceParam[2].SdmmcParams.MaxPowerClassSupported = 0x00000000; +DeviceParam[2].SdmmcParams.SdController = 0x00000000; + +DevType[3] = NvBootDevType_Sdmmc; +DeviceParam[3].SdmmcParams.ClockDivider = 0x00000009; +DeviceParam[3].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_8Bit; +DeviceParam[3].SdmmcParams.MaxPowerClassSupported = 0x00000000; +DeviceParam[3].SdmmcParams.SdController = 0x00000000; + +SDRAM[0].MemoryType = NvBootMemoryType_Ddr3; +SDRAM[0].PllMChargePumpSetupControl = 0x00000008; +SDRAM[0].PllMLoopFilterSetupControl = 0x00000000; +SDRAM[0].PllMInputDivider = 0x0000000c; +SDRAM[0].PllMFeedbackDivider = 0x000002ee; +SDRAM[0].PllMPostDivider = 0x00000000; +SDRAM[0].PllMStableTime = 0x0000012c; +SDRAM[0].EmcClockDivider = 0x00000002; +SDRAM[0].EmcAutoCalInterval = 0x001fffff; +SDRAM[0].EmcAutoCalConfig = 0xa0f10000; +SDRAM[0].EmcAutoCalWait = 0x00000064; +SDRAM[0].EmcPinProgramWait = 0x00000001; +SDRAM[0].EmcRc = 0x00000011; +SDRAM[0].EmcRfc = 0x0000006f; +SDRAM[0].EmcRas = 0x0000000c; +SDRAM[0].EmcRp = 0x00000004; +SDRAM[0].EmcR2w = 0x00000003; +SDRAM[0].EmcW2r = 0x00000008; +SDRAM[0].EmcR2p = 0x00000002; +SDRAM[0].EmcW2p = 0x0000000a; +SDRAM[0].EmcRrd = 0x00000002; +SDRAM[0].EmcRdRcd = 0x00000004; +SDRAM[0].EmcWrRcd = 0x00000004; +SDRAM[0].EmcRext = 0x00000001; +SDRAM[0].EmcWdv = 0x00000004; +SDRAM[0].EmcQUseExtra = 0x00000000; +SDRAM[0].EmcQUse = 0x00000006; +SDRAM[0].EmcQRst = 0x00000004; +SDRAM[0].EmcQSafe = 0x0000000a; +SDRAM[0].EmcRdv = 0x0000000d; +SDRAM[0].EmcRefresh = 0x00000b2d; +SDRAM[0].EmcBurstRefreshNum = 0x00000000; +SDRAM[0].EmcPdEx2Wr = 0x00000001; +SDRAM[0].EmcPdEx2Rd = 0x00000008; +SDRAM[0].EmcPChg2Pden = 0x00000001; +SDRAM[0].EmcAct2Pden = 0x00000000; +SDRAM[0].EmcAr2Pden = 0x00000007; +SDRAM[0].EmcRw2Pden = 0x0000000f; +SDRAM[0].EmcTxsr = 0x00000075; +SDRAM[0].EmcTcke = 0x00000004; +SDRAM[0].EmcTfaw = 0x0000000c; +SDRAM[0].EmcTrpab = 0x00000000; +SDRAM[0].EmcTClkStable = 0x00000004; +SDRAM[0].EmcTClkStop = 0x00000005; +SDRAM[0].EmcTRefBw = 0x00000b6d; +SDRAM[0].EmcFbioCfg5 = 0x00007088; +SDRAM[0].EmcFbioCfg6 = 0x00000006; +SDRAM[0].EmcFbioSpare = 0xd8000000; +SDRAM[0].EmcMrsResetDllWait = 0x00000000; +SDRAM[0].EmcMrsResetDll = 0x00000000; +SDRAM[0].EmcMrsDdr2DllReset = 0x00000000; +SDRAM[0].EmcMrs = 0x80000521; +SDRAM[0].EmcEmrsEmr2 = 0x80200000; +SDRAM[0].EmcEmrsEmr3 = 0x80300000; +SDRAM[0].EmcEmrsDdr2DllEnable = 0x00000000; +SDRAM[0].EmcEmrsDdr2OcdCalib = 0x00000000; +SDRAM[0].EmcEmrs = 0x80100002; +SDRAM[0].EmcMrw1 = 0x00000000; +SDRAM[0].EmcMrw2 = 0x00000000; +SDRAM[0].EmcMrw3 = 0x00000000; +SDRAM[0].EmcMrwResetCommand = 0x00000000; +SDRAM[0].EmcMrwResetNInitWait = 0x00000000; +SDRAM[0].EmcAdrCfg = 0x00000080; +SDRAM[0].McEmemCfg = 0x00000800; +SDRAM[0].EmcCfg2 = 0x000c0099; +SDRAM[0].EmcCfgDigDll = 0x00200084; +SDRAM[0].EmcCfgDigDllPeriod = 0x00008000; +SDRAM[0].EmcCfg = 0x23c00000; +SDRAM[0].EmcDbg = 0x01000400; +SDRAM[0].WarmBootWait = 0x00000002; +SDRAM[0].EmcCttTermCtrl = 0x00000802; +SDRAM[0].EmcOdtWrite = 0x00000000; +SDRAM[0].EmcOdtRead = 0x00000000; +SDRAM[0].EmcZcalWaitCnt = 0x00000040; +SDRAM[0].EmcZcalMrwCmd = 0x80000000; +SDRAM[0].EmcDdr2Wait = 0x00000000; +SDRAM[0].PmcDdrPwr = 0x00000003; +SDRAM[0].EmcClockSource = 0x00000000; +SDRAM[0].EmcClockUsePllMUD = 0x00000000; +SDRAM[0].EmcPinExtraWait = 0x00000000; +SDRAM[0].EmcTimingControlWait = 0x00000000; +SDRAM[0].EmcWext = 0x00000000; +SDRAM[0].EmcCtt = 0x00000000; +SDRAM[0].EmcCttDuration = 0x00000000; +SDRAM[0].EmcPreRefreshReqCnt = 0x000002cb; +SDRAM[0].EmcTxsrDll = 0x00000200; +SDRAM[0].EmcCfgRsv = 0xff00ff89; +SDRAM[0].EmcMrwExtra = 0x00000000; +SDRAM[0].EmcWarmBootMrw1 = 0x00000000; +SDRAM[0].EmcWarmBootMrw2 = 0x00000000; +SDRAM[0].EmcWarmBootMrw3 = 0x00000000; +SDRAM[0].EmcWarmBootMrwExtra = 0x00000000; +SDRAM[0].EmcWarmBootExtraModeRegWriteEnable = 0x00000000; +SDRAM[0].EmcExtraModeRegWriteEnable = 0x00000000; +SDRAM[0].EmcMrsWaitCnt = 0x0150000c; +SDRAM[0].EmcCmdQ = 0x10004408; +SDRAM[0].EmcMc2EmcQ = 0x06000404; +SDRAM[0].EmcDynSelfRefControl = 0x8000174b; +SDRAM[0].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; +SDRAM[0].EmcDevSelect = 0x00000002; +SDRAM[0].EmcSelDpdCtrl = 0x0004032c; +SDRAM[0].EmcDllXformDqs0 = 0x0003c000; +SDRAM[0].EmcDllXformDqs1 = 0x0003c000; +SDRAM[0].EmcDllXformDqs2 = 0x0003c000; +SDRAM[0].EmcDllXformDqs3 = 0x0003c000; +SDRAM[0].EmcDllXformDqs4 = 0x0003c000; +SDRAM[0].EmcDllXformDqs5 = 0x0003c000; +SDRAM[0].EmcDllXformDqs6 = 0x0003c000; +SDRAM[0].EmcDllXformDqs7 = 0x0003c000; +SDRAM[0].EmcDllXformQUse0 = 0x00000000; +SDRAM[0].EmcDllXformQUse1 = 0x00000000; +SDRAM[0].EmcDllXformQUse2 = 0x00000000; +SDRAM[0].EmcDllXformQUse3 = 0x00000000; +SDRAM[0].EmcDllXformQUse4 = 0x00000000; +SDRAM[0].EmcDllXformQUse5 = 0x00000000; +SDRAM[0].EmcDllXformQUse6 = 0x00000000; +SDRAM[0].EmcDllXformQUse7 = 0x00000000; +SDRAM[0].EmcDliTrimTxDqs0 = 0x00000000; +SDRAM[0].EmcDliTrimTxDqs1 = 0x00000000; +SDRAM[0].EmcDliTrimTxDqs2 = 0x00000000; +SDRAM[0].EmcDliTrimTxDqs3 = 0x00000000; +SDRAM[0].EmcDliTrimTxDqs4 = 0x00000000; +SDRAM[0].EmcDliTrimTxDqs5 = 0x00000000; +SDRAM[0].EmcDliTrimTxDqs6 = 0x00000000; +SDRAM[0].EmcDliTrimTxDqs7 = 0x00000000; +SDRAM[0].EmcDllXformDq0 = 0x00040000; +SDRAM[0].EmcDllXformDq1 = 0x00040000; +SDRAM[0].EmcDllXformDq2 = 0x00040000; +SDRAM[0].EmcDllXformDq3 = 0x00040000; +SDRAM[0].EmcZcalInterval = 0x00020000; +SDRAM[0].EmcZcalInitDev0 = 0x80000011; +SDRAM[0].EmcZcalInitDev1 = 0x00000000; +SDRAM[0].EmcZcalInitWait = 0x00000002; +SDRAM[0].EmcZcalColdBootEnable = 0x00000001; +SDRAM[0].EmcZcalWarmBootEnable = 0x00000001; +SDRAM[0].EmcMrwLpddr2ZcalWarmBoot = 0x000a00ab; +SDRAM[0].EmcZqCalDdr3WarmBoot = 0x00000011; +SDRAM[0].EmcZcalWarmBootWait = 0x00000001; +SDRAM[0].EmcMrsWarmBootEnable = 0x00000001; +SDRAM[0].EmcMrsExtra = 0x80000521; +SDRAM[0].EmcWarmBootMrs = 0x80100002; +SDRAM[0].EmcWarmBootEmrs = 0x80000521; +SDRAM[0].EmcWarmBootEmr2 = 0x80200000; +SDRAM[0].EmcWarmBootEmr3 = 0x80300000; +SDRAM[0].EmcWarmBootMrsExtra = 0x80100002; +SDRAM[0].EmcClkenOverride = 0x00000000; +SDRAM[0].EmcExtraRefreshNum = 0x00000002; +SDRAM[0].EmcClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[0].McClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[0].EmcCfgDigDllPeriodWarmBoot = 0x00000003; +SDRAM[0].PmcVddpSel = 0x00000002; +SDRAM[0].PmcDdrCfg = 0x00000002; +SDRAM[0].PmcIoDpdReq = 0x80800000; +SDRAM[0].PmcENoVttGen = 0x00000000; +SDRAM[0].PmcNoIoPower = 0x00000000; +SDRAM[0].EmcXm2CmdPadCtrl = 0x000002a0; +SDRAM[0].EmcXm2CmdPadCtrl2 = 0x770c0000; +SDRAM[0].EmcXm2DqsPadCtrl = 0x770c1414; +SDRAM[0].EmcXm2DqsPadCtrl2 = 0x0800013d; +SDRAM[0].EmcXm2DqsPadCtrl3 = 0x08000021; +SDRAM[0].EmcXm2DqPadCtrl = 0x770c2990; +SDRAM[0].EmcXm2DqPadCtrl2 = 0x00000000; +SDRAM[0].EmcXm2ClkPadCtrl = 0x77fff884; +SDRAM[0].EmcXm2CompPadCtrl = 0x01f1f508; +SDRAM[0].EmcXm2VttGenPadCtrl = 0x05057404; +SDRAM[0].EmcXm2VttGenPadCtrl2 = 0x54000007; +SDRAM[0].EmcXm2QUsePadCtrl = 0x080001e8; +SDRAM[0].McEmemAdrCfg = 0x00000000; +SDRAM[0].McEmemAdrCfgDev0 = 0x00090303; +SDRAM[0].McEmemAdrCfgDev1 = 0x00090303; +SDRAM[0].McEmemArbCfg = 0x0000000b; +SDRAM[0].McEmemArbOutstandingReq = 0xc0000044; +SDRAM[0].McEmemArbTimingRcd = 0x00000001; +SDRAM[0].McEmemArbTimingRp = 0x00000002; +SDRAM[0].McEmemArbTimingRc = 0x00000009; +SDRAM[0].McEmemArbTimingRas = 0x00000005; +SDRAM[0].McEmemArbTimingFaw = 0x00000005; +SDRAM[0].McEmemArbTimingRrd = 0x00000001; +SDRAM[0].McEmemArbTimingRap2Pre = 0x00000002; +SDRAM[0].McEmemArbTimingWap2Pre = 0x00000008; +SDRAM[0].McEmemArbTimingR2R = 0x00000002; +SDRAM[0].McEmemArbTimingW2W = 0x00000002; +SDRAM[0].McEmemArbTimingR2W = 0x00000003; +SDRAM[0].McEmemArbTimingW2R = 0x00000006; +SDRAM[0].McEmemArbDaTurns = 0x06030202; +SDRAM[0].McEmemArbDaCovers = 0x000d0709; +SDRAM[0].McEmemArbMisc0 = 0x7086110a; +SDRAM[0].McEmemArbMisc1 = 0x78000000; +SDRAM[0].McEmemArbRing1Throttle = 0x001f0000; +SDRAM[0].McEmemArbOverride = 0x00000080; +SDRAM[0].McEmemArbRsv = 0xff00ff00; +SDRAM[0].McClkenOverride = 0x00000000; + +SDRAM[1].MemoryType = NvBootMemoryType_Ddr3; +SDRAM[1].PllMChargePumpSetupControl = 0x00000008; +SDRAM[1].PllMLoopFilterSetupControl = 0x00000000; +SDRAM[1].PllMInputDivider = 0x0000000c; +SDRAM[1].PllMFeedbackDivider = 0x000002ee; +SDRAM[1].PllMPostDivider = 0x00000000; +SDRAM[1].PllMStableTime = 0x0000012c; +SDRAM[1].EmcClockDivider = 0x00000002; +SDRAM[1].EmcAutoCalInterval = 0x001fffff; +SDRAM[1].EmcAutoCalConfig = 0xa0f10000; +SDRAM[1].EmcAutoCalWait = 0x00000064; +SDRAM[1].EmcPinProgramWait = 0x00000001; +SDRAM[1].EmcRc = 0x00000011; +SDRAM[1].EmcRfc = 0x0000006f; +SDRAM[1].EmcRas = 0x0000000c; +SDRAM[1].EmcRp = 0x00000004; +SDRAM[1].EmcR2w = 0x00000003; +SDRAM[1].EmcW2r = 0x00000008; +SDRAM[1].EmcR2p = 0x00000002; +SDRAM[1].EmcW2p = 0x0000000a; +SDRAM[1].EmcRrd = 0x00000002; +SDRAM[1].EmcRdRcd = 0x00000004; +SDRAM[1].EmcWrRcd = 0x00000004; +SDRAM[1].EmcRext = 0x00000001; +SDRAM[1].EmcWdv = 0x00000004; +SDRAM[1].EmcQUseExtra = 0x00000000; +SDRAM[1].EmcQUse = 0x00000006; +SDRAM[1].EmcQRst = 0x00000004; +SDRAM[1].EmcQSafe = 0x0000000a; +SDRAM[1].EmcRdv = 0x0000000d; +SDRAM[1].EmcRefresh = 0x00000b2d; +SDRAM[1].EmcBurstRefreshNum = 0x00000000; +SDRAM[1].EmcPdEx2Wr = 0x00000001; +SDRAM[1].EmcPdEx2Rd = 0x00000008; +SDRAM[1].EmcPChg2Pden = 0x00000001; +SDRAM[1].EmcAct2Pden = 0x00000000; +SDRAM[1].EmcAr2Pden = 0x00000007; +SDRAM[1].EmcRw2Pden = 0x0000000f; +SDRAM[1].EmcTxsr = 0x00000075; +SDRAM[1].EmcTcke = 0x00000004; +SDRAM[1].EmcTfaw = 0x0000000c; +SDRAM[1].EmcTrpab = 0x00000000; +SDRAM[1].EmcTClkStable = 0x00000004; +SDRAM[1].EmcTClkStop = 0x00000005; +SDRAM[1].EmcTRefBw = 0x00000b6d; +SDRAM[1].EmcFbioCfg5 = 0x00007088; +SDRAM[1].EmcFbioCfg6 = 0x00000006; +SDRAM[1].EmcFbioSpare = 0xd8000000; +SDRAM[1].EmcMrsResetDllWait = 0x00000000; +SDRAM[1].EmcMrsResetDll = 0x00000000; +SDRAM[1].EmcMrsDdr2DllReset = 0x00000000; +SDRAM[1].EmcMrs = 0x80000521; +SDRAM[1].EmcEmrsEmr2 = 0x80200000; +SDRAM[1].EmcEmrsEmr3 = 0x80300000; +SDRAM[1].EmcEmrsDdr2DllEnable = 0x00000000; +SDRAM[1].EmcEmrsDdr2OcdCalib = 0x00000000; +SDRAM[1].EmcEmrs = 0x80100002; +SDRAM[1].EmcMrw1 = 0x00000000; +SDRAM[1].EmcMrw2 = 0x00000000; +SDRAM[1].EmcMrw3 = 0x00000000; +SDRAM[1].EmcMrwResetCommand = 0x00000000; +SDRAM[1].EmcMrwResetNInitWait = 0x00000000; +SDRAM[1].EmcAdrCfg = 0x00000080; +SDRAM[1].McEmemCfg = 0x00000800; +SDRAM[1].EmcCfg2 = 0x000c0099; +SDRAM[1].EmcCfgDigDll = 0x00200084; +SDRAM[1].EmcCfgDigDllPeriod = 0x00008000; +SDRAM[1].EmcCfg = 0x23c00000; +SDRAM[1].EmcDbg = 0x01000400; +SDRAM[1].WarmBootWait = 0x00000002; +SDRAM[1].EmcCttTermCtrl = 0x00000802; +SDRAM[1].EmcOdtWrite = 0x00000000; +SDRAM[1].EmcOdtRead = 0x00000000; +SDRAM[1].EmcZcalWaitCnt = 0x00000040; +SDRAM[1].EmcZcalMrwCmd = 0x80000000; +SDRAM[1].EmcDdr2Wait = 0x00000000; +SDRAM[1].PmcDdrPwr = 0x00000003; +SDRAM[1].EmcClockSource = 0x00000000; +SDRAM[1].EmcClockUsePllMUD = 0x00000000; +SDRAM[1].EmcPinExtraWait = 0x00000000; +SDRAM[1].EmcTimingControlWait = 0x00000000; +SDRAM[1].EmcWext = 0x00000000; +SDRAM[1].EmcCtt = 0x00000000; +SDRAM[1].EmcCttDuration = 0x00000000; +SDRAM[1].EmcPreRefreshReqCnt = 0x000002cb; +SDRAM[1].EmcTxsrDll = 0x00000200; +SDRAM[1].EmcCfgRsv = 0xff00ff89; +SDRAM[1].EmcMrwExtra = 0x00000000; +SDRAM[1].EmcWarmBootMrw1 = 0x00000000; +SDRAM[1].EmcWarmBootMrw2 = 0x00000000; +SDRAM[1].EmcWarmBootMrw3 = 0x00000000; +SDRAM[1].EmcWarmBootMrwExtra = 0x00000000; +SDRAM[1].EmcWarmBootExtraModeRegWriteEnable = 0x00000000; +SDRAM[1].EmcExtraModeRegWriteEnable = 0x00000000; +SDRAM[1].EmcMrsWaitCnt = 0x0150000c; +SDRAM[1].EmcCmdQ = 0x10004408; +SDRAM[1].EmcMc2EmcQ = 0x06000404; +SDRAM[1].EmcDynSelfRefControl = 0x8000174b; +SDRAM[1].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; +SDRAM[1].EmcDevSelect = 0x00000002; +SDRAM[1].EmcSelDpdCtrl = 0x0004032c; +SDRAM[1].EmcDllXformDqs0 = 0x0003c000; +SDRAM[1].EmcDllXformDqs1 = 0x0003c000; +SDRAM[1].EmcDllXformDqs2 = 0x0003c000; +SDRAM[1].EmcDllXformDqs3 = 0x0003c000; +SDRAM[1].EmcDllXformDqs4 = 0x0003c000; +SDRAM[1].EmcDllXformDqs5 = 0x0003c000; +SDRAM[1].EmcDllXformDqs6 = 0x0003c000; +SDRAM[1].EmcDllXformDqs7 = 0x0003c000; +SDRAM[1].EmcDllXformQUse0 = 0x00000000; +SDRAM[1].EmcDllXformQUse1 = 0x00000000; +SDRAM[1].EmcDllXformQUse2 = 0x00000000; +SDRAM[1].EmcDllXformQUse3 = 0x00000000; +SDRAM[1].EmcDllXformQUse4 = 0x00000000; +SDRAM[1].EmcDllXformQUse5 = 0x00000000; +SDRAM[1].EmcDllXformQUse6 = 0x00000000; +SDRAM[1].EmcDllXformQUse7 = 0x00000000; +SDRAM[1].EmcDliTrimTxDqs0 = 0x00000000; +SDRAM[1].EmcDliTrimTxDqs1 = 0x00000000; +SDRAM[1].EmcDliTrimTxDqs2 = 0x00000000; +SDRAM[1].EmcDliTrimTxDqs3 = 0x00000000; +SDRAM[1].EmcDliTrimTxDqs4 = 0x00000000; +SDRAM[1].EmcDliTrimTxDqs5 = 0x00000000; +SDRAM[1].EmcDliTrimTxDqs6 = 0x00000000; +SDRAM[1].EmcDliTrimTxDqs7 = 0x00000000; +SDRAM[1].EmcDllXformDq0 = 0x00040000; +SDRAM[1].EmcDllXformDq1 = 0x00040000; +SDRAM[1].EmcDllXformDq2 = 0x00040000; +SDRAM[1].EmcDllXformDq3 = 0x00040000; +SDRAM[1].EmcZcalInterval = 0x00020000; +SDRAM[1].EmcZcalInitDev0 = 0x80000011; +SDRAM[1].EmcZcalInitDev1 = 0x00000000; +SDRAM[1].EmcZcalInitWait = 0x00000002; +SDRAM[1].EmcZcalColdBootEnable = 0x00000001; +SDRAM[1].EmcZcalWarmBootEnable = 0x00000001; +SDRAM[1].EmcMrwLpddr2ZcalWarmBoot = 0x000a00ab; +SDRAM[1].EmcZqCalDdr3WarmBoot = 0x00000011; +SDRAM[1].EmcZcalWarmBootWait = 0x00000001; +SDRAM[1].EmcMrsWarmBootEnable = 0x00000001; +SDRAM[1].EmcMrsExtra = 0x80000521; +SDRAM[1].EmcWarmBootMrs = 0x80100002; +SDRAM[1].EmcWarmBootEmrs = 0x80000521; +SDRAM[1].EmcWarmBootEmr2 = 0x80200000; +SDRAM[1].EmcWarmBootEmr3 = 0x80300000; +SDRAM[1].EmcWarmBootMrsExtra = 0x80100002; +SDRAM[1].EmcClkenOverride = 0x00000000; +SDRAM[1].EmcExtraRefreshNum = 0x00000002; +SDRAM[1].EmcClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[1].McClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[1].EmcCfgDigDllPeriodWarmBoot = 0x00000003; +SDRAM[1].PmcVddpSel = 0x00000002; +SDRAM[1].PmcDdrCfg = 0x00000002; +SDRAM[1].PmcIoDpdReq = 0x80800000; +SDRAM[1].PmcENoVttGen = 0x00000000; +SDRAM[1].PmcNoIoPower = 0x00000000; +SDRAM[1].EmcXm2CmdPadCtrl = 0x000002a0; +SDRAM[1].EmcXm2CmdPadCtrl2 = 0x770c0000; +SDRAM[1].EmcXm2DqsPadCtrl = 0x770c1414; +SDRAM[1].EmcXm2DqsPadCtrl2 = 0x0800013d; +SDRAM[1].EmcXm2DqsPadCtrl3 = 0x08000021; +SDRAM[1].EmcXm2DqPadCtrl = 0x770c2990; +SDRAM[1].EmcXm2DqPadCtrl2 = 0x00000000; +SDRAM[1].EmcXm2ClkPadCtrl = 0x77fff884; +SDRAM[1].EmcXm2CompPadCtrl = 0x01f1f508; +SDRAM[1].EmcXm2VttGenPadCtrl = 0x05057404; +SDRAM[1].EmcXm2VttGenPadCtrl2 = 0x54000007; +SDRAM[1].EmcXm2QUsePadCtrl = 0x080001e8; +SDRAM[1].McEmemAdrCfg = 0x00000000; +SDRAM[1].McEmemAdrCfgDev0 = 0x00090303; +SDRAM[1].McEmemAdrCfgDev1 = 0x00090303; +SDRAM[1].McEmemArbCfg = 0x0000000b; +SDRAM[1].McEmemArbOutstandingReq = 0xc0000044; +SDRAM[1].McEmemArbTimingRcd = 0x00000001; +SDRAM[1].McEmemArbTimingRp = 0x00000002; +SDRAM[1].McEmemArbTimingRc = 0x00000009; +SDRAM[1].McEmemArbTimingRas = 0x00000005; +SDRAM[1].McEmemArbTimingFaw = 0x00000005; +SDRAM[1].McEmemArbTimingRrd = 0x00000001; +SDRAM[1].McEmemArbTimingRap2Pre = 0x00000002; +SDRAM[1].McEmemArbTimingWap2Pre = 0x00000008; +SDRAM[1].McEmemArbTimingR2R = 0x00000002; +SDRAM[1].McEmemArbTimingW2W = 0x00000002; +SDRAM[1].McEmemArbTimingR2W = 0x00000003; +SDRAM[1].McEmemArbTimingW2R = 0x00000006; +SDRAM[1].McEmemArbDaTurns = 0x06030202; +SDRAM[1].McEmemArbDaCovers = 0x000d0709; +SDRAM[1].McEmemArbMisc0 = 0x7086110a; +SDRAM[1].McEmemArbMisc1 = 0x78000000; +SDRAM[1].McEmemArbRing1Throttle = 0x001f0000; +SDRAM[1].McEmemArbOverride = 0x00000080; +SDRAM[1].McEmemArbRsv = 0xff00ff00; +SDRAM[1].McClkenOverride = 0x00000000; + +SDRAM[2].MemoryType = NvBootMemoryType_Ddr3; +SDRAM[2].PllMChargePumpSetupControl = 0x00000008; +SDRAM[2].PllMLoopFilterSetupControl = 0x00000000; +SDRAM[2].PllMInputDivider = 0x0000000c; +SDRAM[2].PllMFeedbackDivider = 0x000002ee; +SDRAM[2].PllMPostDivider = 0x00000000; +SDRAM[2].PllMStableTime = 0x0000012c; +SDRAM[2].EmcClockDivider = 0x00000002; +SDRAM[2].EmcAutoCalInterval = 0x001fffff; +SDRAM[2].EmcAutoCalConfig = 0xa0f10000; +SDRAM[2].EmcAutoCalWait = 0x00000064; +SDRAM[2].EmcPinProgramWait = 0x00000001; +SDRAM[2].EmcRc = 0x00000011; +SDRAM[2].EmcRfc = 0x0000006f; +SDRAM[2].EmcRas = 0x0000000c; +SDRAM[2].EmcRp = 0x00000004; +SDRAM[2].EmcR2w = 0x00000003; +SDRAM[2].EmcW2r = 0x00000008; +SDRAM[2].EmcR2p = 0x00000002; +SDRAM[2].EmcW2p = 0x0000000a; +SDRAM[2].EmcRrd = 0x00000002; +SDRAM[2].EmcRdRcd = 0x00000004; +SDRAM[2].EmcWrRcd = 0x00000004; +SDRAM[2].EmcRext = 0x00000001; +SDRAM[2].EmcWdv = 0x00000004; +SDRAM[2].EmcQUseExtra = 0x00000000; +SDRAM[2].EmcQUse = 0x00000006; +SDRAM[2].EmcQRst = 0x00000004; +SDRAM[2].EmcQSafe = 0x0000000a; +SDRAM[2].EmcRdv = 0x0000000d; +SDRAM[2].EmcRefresh = 0x00000b2d; +SDRAM[2].EmcBurstRefreshNum = 0x00000000; +SDRAM[2].EmcPdEx2Wr = 0x00000001; +SDRAM[2].EmcPdEx2Rd = 0x00000008; +SDRAM[2].EmcPChg2Pden = 0x00000001; +SDRAM[2].EmcAct2Pden = 0x00000000; +SDRAM[2].EmcAr2Pden = 0x00000007; +SDRAM[2].EmcRw2Pden = 0x0000000f; +SDRAM[2].EmcTxsr = 0x00000075; +SDRAM[2].EmcTcke = 0x00000004; +SDRAM[2].EmcTfaw = 0x0000000c; +SDRAM[2].EmcTrpab = 0x00000000; +SDRAM[2].EmcTClkStable = 0x00000004; +SDRAM[2].EmcTClkStop = 0x00000005; +SDRAM[2].EmcTRefBw = 0x00000b6d; +SDRAM[2].EmcFbioCfg5 = 0x00007088; +SDRAM[2].EmcFbioCfg6 = 0x00000006; +SDRAM[2].EmcFbioSpare = 0xd8000000; +SDRAM[2].EmcMrsResetDllWait = 0x00000000; +SDRAM[2].EmcMrsResetDll = 0x00000000; +SDRAM[2].EmcMrsDdr2DllReset = 0x00000000; +SDRAM[2].EmcMrs = 0x80000521; +SDRAM[2].EmcEmrsEmr2 = 0x80200000; +SDRAM[2].EmcEmrsEmr3 = 0x80300000; +SDRAM[2].EmcEmrsDdr2DllEnable = 0x00000000; +SDRAM[2].EmcEmrsDdr2OcdCalib = 0x00000000; +SDRAM[2].EmcEmrs = 0x80100002; +SDRAM[2].EmcMrw1 = 0x00000000; +SDRAM[2].EmcMrw2 = 0x00000000; +SDRAM[2].EmcMrw3 = 0x00000000; +SDRAM[2].EmcMrwResetCommand = 0x00000000; +SDRAM[2].EmcMrwResetNInitWait = 0x00000000; +SDRAM[2].EmcAdrCfg = 0x00000080; +SDRAM[2].McEmemCfg = 0x00000800; +SDRAM[2].EmcCfg2 = 0x000c0099; +SDRAM[2].EmcCfgDigDll = 0x00200084; +SDRAM[2].EmcCfgDigDllPeriod = 0x00008000; +SDRAM[2].EmcCfg = 0x23c00000; +SDRAM[2].EmcDbg = 0x01000400; +SDRAM[2].WarmBootWait = 0x00000002; +SDRAM[2].EmcCttTermCtrl = 0x00000802; +SDRAM[2].EmcOdtWrite = 0x00000000; +SDRAM[2].EmcOdtRead = 0x00000000; +SDRAM[2].EmcZcalWaitCnt = 0x00000040; +SDRAM[2].EmcZcalMrwCmd = 0x80000000; +SDRAM[2].EmcDdr2Wait = 0x00000000; +SDRAM[2].PmcDdrPwr = 0x00000003; +SDRAM[2].EmcClockSource = 0x00000000; +SDRAM[2].EmcClockUsePllMUD = 0x00000000; +SDRAM[2].EmcPinExtraWait = 0x00000000; +SDRAM[2].EmcTimingControlWait = 0x00000000; +SDRAM[2].EmcWext = 0x00000000; +SDRAM[2].EmcCtt = 0x00000000; +SDRAM[2].EmcCttDuration = 0x00000000; +SDRAM[2].EmcPreRefreshReqCnt = 0x000002cb; +SDRAM[2].EmcTxsrDll = 0x00000200; +SDRAM[2].EmcCfgRsv = 0xff00ff89; +SDRAM[2].EmcMrwExtra = 0x00000000; +SDRAM[2].EmcWarmBootMrw1 = 0x00000000; +SDRAM[2].EmcWarmBootMrw2 = 0x00000000; +SDRAM[2].EmcWarmBootMrw3 = 0x00000000; +SDRAM[2].EmcWarmBootMrwExtra = 0x00000000; +SDRAM[2].EmcWarmBootExtraModeRegWriteEnable = 0x00000000; +SDRAM[2].EmcExtraModeRegWriteEnable = 0x00000000; +SDRAM[2].EmcMrsWaitCnt = 0x0150000c; +SDRAM[2].EmcCmdQ = 0x10004408; +SDRAM[2].EmcMc2EmcQ = 0x06000404; +SDRAM[2].EmcDynSelfRefControl = 0x8000174b; +SDRAM[2].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; +SDRAM[2].EmcDevSelect = 0x00000002; +SDRAM[2].EmcSelDpdCtrl = 0x0004032c; +SDRAM[2].EmcDllXformDqs0 = 0x0003c000; +SDRAM[2].EmcDllXformDqs1 = 0x0003c000; +SDRAM[2].EmcDllXformDqs2 = 0x0003c000; +SDRAM[2].EmcDllXformDqs3 = 0x0003c000; +SDRAM[2].EmcDllXformDqs4 = 0x0003c000; +SDRAM[2].EmcDllXformDqs5 = 0x0003c000; +SDRAM[2].EmcDllXformDqs6 = 0x0003c000; +SDRAM[2].EmcDllXformDqs7 = 0x0003c000; +SDRAM[2].EmcDllXformQUse0 = 0x00000000; +SDRAM[2].EmcDllXformQUse1 = 0x00000000; +SDRAM[2].EmcDllXformQUse2 = 0x00000000; +SDRAM[2].EmcDllXformQUse3 = 0x00000000; +SDRAM[2].EmcDllXformQUse4 = 0x00000000; +SDRAM[2].EmcDllXformQUse5 = 0x00000000; +SDRAM[2].EmcDllXformQUse6 = 0x00000000; +SDRAM[2].EmcDllXformQUse7 = 0x00000000; +SDRAM[2].EmcDliTrimTxDqs0 = 0x00000000; +SDRAM[2].EmcDliTrimTxDqs1 = 0x00000000; +SDRAM[2].EmcDliTrimTxDqs2 = 0x00000000; +SDRAM[2].EmcDliTrimTxDqs3 = 0x00000000; +SDRAM[2].EmcDliTrimTxDqs4 = 0x00000000; +SDRAM[2].EmcDliTrimTxDqs5 = 0x00000000; +SDRAM[2].EmcDliTrimTxDqs6 = 0x00000000; +SDRAM[2].EmcDliTrimTxDqs7 = 0x00000000; +SDRAM[2].EmcDllXformDq0 = 0x00040000; +SDRAM[2].EmcDllXformDq1 = 0x00040000; +SDRAM[2].EmcDllXformDq2 = 0x00040000; +SDRAM[2].EmcDllXformDq3 = 0x00040000; +SDRAM[2].EmcZcalInterval = 0x00020000; +SDRAM[2].EmcZcalInitDev0 = 0x80000011; +SDRAM[2].EmcZcalInitDev1 = 0x00000000; +SDRAM[2].EmcZcalInitWait = 0x00000002; +SDRAM[2].EmcZcalColdBootEnable = 0x00000001; +SDRAM[2].EmcZcalWarmBootEnable = 0x00000001; +SDRAM[2].EmcMrwLpddr2ZcalWarmBoot = 0x000a00ab; +SDRAM[2].EmcZqCalDdr3WarmBoot = 0x00000011; +SDRAM[2].EmcZcalWarmBootWait = 0x00000001; +SDRAM[2].EmcMrsWarmBootEnable = 0x00000001; +SDRAM[2].EmcMrsExtra = 0x80000521; +SDRAM[2].EmcWarmBootMrs = 0x80100002; +SDRAM[2].EmcWarmBootEmrs = 0x80000521; +SDRAM[2].EmcWarmBootEmr2 = 0x80200000; +SDRAM[2].EmcWarmBootEmr3 = 0x80300000; +SDRAM[2].EmcWarmBootMrsExtra = 0x80100002; +SDRAM[2].EmcClkenOverride = 0x00000000; +SDRAM[2].EmcExtraRefreshNum = 0x00000002; +SDRAM[2].EmcClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[2].McClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[2].EmcCfgDigDllPeriodWarmBoot = 0x00000003; +SDRAM[2].PmcVddpSel = 0x00000002; +SDRAM[2].PmcDdrCfg = 0x00000002; +SDRAM[2].PmcIoDpdReq = 0x80800000; +SDRAM[2].PmcENoVttGen = 0x00000000; +SDRAM[2].PmcNoIoPower = 0x00000000; +SDRAM[2].EmcXm2CmdPadCtrl = 0x000002a0; +SDRAM[2].EmcXm2CmdPadCtrl2 = 0x770c0000; +SDRAM[2].EmcXm2DqsPadCtrl = 0x770c1414; +SDRAM[2].EmcXm2DqsPadCtrl2 = 0x0800013d; +SDRAM[2].EmcXm2DqsPadCtrl3 = 0x08000021; +SDRAM[2].EmcXm2DqPadCtrl = 0x770c2990; +SDRAM[2].EmcXm2DqPadCtrl2 = 0x00000000; +SDRAM[2].EmcXm2ClkPadCtrl = 0x77fff884; +SDRAM[2].EmcXm2CompPadCtrl = 0x01f1f508; +SDRAM[2].EmcXm2VttGenPadCtrl = 0x05057404; +SDRAM[2].EmcXm2VttGenPadCtrl2 = 0x54000007; +SDRAM[2].EmcXm2QUsePadCtrl = 0x080001e8; +SDRAM[2].McEmemAdrCfg = 0x00000000; +SDRAM[2].McEmemAdrCfgDev0 = 0x00090303; +SDRAM[2].McEmemAdrCfgDev1 = 0x00090303; +SDRAM[2].McEmemArbCfg = 0x0000000b; +SDRAM[2].McEmemArbOutstandingReq = 0xc0000044; +SDRAM[2].McEmemArbTimingRcd = 0x00000001; +SDRAM[2].McEmemArbTimingRp = 0x00000002; +SDRAM[2].McEmemArbTimingRc = 0x00000009; +SDRAM[2].McEmemArbTimingRas = 0x00000005; +SDRAM[2].McEmemArbTimingFaw = 0x00000005; +SDRAM[2].McEmemArbTimingRrd = 0x00000001; +SDRAM[2].McEmemArbTimingRap2Pre = 0x00000002; +SDRAM[2].McEmemArbTimingWap2Pre = 0x00000008; +SDRAM[2].McEmemArbTimingR2R = 0x00000002; +SDRAM[2].McEmemArbTimingW2W = 0x00000002; +SDRAM[2].McEmemArbTimingR2W = 0x00000003; +SDRAM[2].McEmemArbTimingW2R = 0x00000006; +SDRAM[2].McEmemArbDaTurns = 0x06030202; +SDRAM[2].McEmemArbDaCovers = 0x000d0709; +SDRAM[2].McEmemArbMisc0 = 0x7086110a; +SDRAM[2].McEmemArbMisc1 = 0x78000000; +SDRAM[2].McEmemArbRing1Throttle = 0x001f0000; +SDRAM[2].McEmemArbOverride = 0x00000080; +SDRAM[2].McEmemArbRsv = 0xff00ff00; +SDRAM[2].McClkenOverride = 0x00000000; + +SDRAM[3].MemoryType = NvBootMemoryType_Ddr3; +SDRAM[3].PllMChargePumpSetupControl = 0x00000008; +SDRAM[3].PllMLoopFilterSetupControl = 0x00000000; +SDRAM[3].PllMInputDivider = 0x0000000c; +SDRAM[3].PllMFeedbackDivider = 0x000002ee; +SDRAM[3].PllMPostDivider = 0x00000000; +SDRAM[3].PllMStableTime = 0x0000012c; +SDRAM[3].EmcClockDivider = 0x00000002; +SDRAM[3].EmcAutoCalInterval = 0x001fffff; +SDRAM[3].EmcAutoCalConfig = 0xa0f10000; +SDRAM[3].EmcAutoCalWait = 0x00000064; +SDRAM[3].EmcPinProgramWait = 0x00000001; +SDRAM[3].EmcRc = 0x00000011; +SDRAM[3].EmcRfc = 0x0000006f; +SDRAM[3].EmcRas = 0x0000000c; +SDRAM[3].EmcRp = 0x00000004; +SDRAM[3].EmcR2w = 0x00000003; +SDRAM[3].EmcW2r = 0x00000008; +SDRAM[3].EmcR2p = 0x00000002; +SDRAM[3].EmcW2p = 0x0000000a; +SDRAM[3].EmcRrd = 0x00000002; +SDRAM[3].EmcRdRcd = 0x00000004; +SDRAM[3].EmcWrRcd = 0x00000004; +SDRAM[3].EmcRext = 0x00000001; +SDRAM[3].EmcWdv = 0x00000004; +SDRAM[3].EmcQUseExtra = 0x00000000; +SDRAM[3].EmcQUse = 0x00000006; +SDRAM[3].EmcQRst = 0x00000004; +SDRAM[3].EmcQSafe = 0x0000000a; +SDRAM[3].EmcRdv = 0x0000000d; +SDRAM[3].EmcRefresh = 0x00000b2d; +SDRAM[3].EmcBurstRefreshNum = 0x00000000; +SDRAM[3].EmcPdEx2Wr = 0x00000001; +SDRAM[3].EmcPdEx2Rd = 0x00000008; +SDRAM[3].EmcPChg2Pden = 0x00000001; +SDRAM[3].EmcAct2Pden = 0x00000000; +SDRAM[3].EmcAr2Pden = 0x00000007; +SDRAM[3].EmcRw2Pden = 0x0000000f; +SDRAM[3].EmcTxsr = 0x00000075; +SDRAM[3].EmcTcke = 0x00000004; +SDRAM[3].EmcTfaw = 0x0000000c; +SDRAM[3].EmcTrpab = 0x00000000; +SDRAM[3].EmcTClkStable = 0x00000004; +SDRAM[3].EmcTClkStop = 0x00000005; +SDRAM[3].EmcTRefBw = 0x00000b6d; +SDRAM[3].EmcFbioCfg5 = 0x00007088; +SDRAM[3].EmcFbioCfg6 = 0x00000006; +SDRAM[3].EmcFbioSpare = 0xd8000000; +SDRAM[3].EmcMrsResetDllWait = 0x00000000; +SDRAM[3].EmcMrsResetDll = 0x00000000; +SDRAM[3].EmcMrsDdr2DllReset = 0x00000000; +SDRAM[3].EmcMrs = 0x80000521; +SDRAM[3].EmcEmrsEmr2 = 0x80200000; +SDRAM[3].EmcEmrsEmr3 = 0x80300000; +SDRAM[3].EmcEmrsDdr2DllEnable = 0x00000000; +SDRAM[3].EmcEmrsDdr2OcdCalib = 0x00000000; +SDRAM[3].EmcEmrs = 0x80100002; +SDRAM[3].EmcMrw1 = 0x00000000; +SDRAM[3].EmcMrw2 = 0x00000000; +SDRAM[3].EmcMrw3 = 0x00000000; +SDRAM[3].EmcMrwResetCommand = 0x00000000; +SDRAM[3].EmcMrwResetNInitWait = 0x00000000; +SDRAM[3].EmcAdrCfg = 0x00000080; +SDRAM[3].McEmemCfg = 0x00000800; +SDRAM[3].EmcCfg2 = 0x000c0099; +SDRAM[3].EmcCfgDigDll = 0x00200084; +SDRAM[3].EmcCfgDigDllPeriod = 0x00008000; +SDRAM[3].EmcCfg = 0x23c00000; +SDRAM[3].EmcDbg = 0x01000400; +SDRAM[3].WarmBootWait = 0x00000002; +SDRAM[3].EmcCttTermCtrl = 0x00000802; +SDRAM[3].EmcOdtWrite = 0x00000000; +SDRAM[3].EmcOdtRead = 0x00000000; +SDRAM[3].EmcZcalWaitCnt = 0x00000040; +SDRAM[3].EmcZcalMrwCmd = 0x80000000; +SDRAM[3].EmcDdr2Wait = 0x00000000; +SDRAM[3].PmcDdrPwr = 0x00000003; +SDRAM[3].EmcClockSource = 0x00000000; +SDRAM[3].EmcClockUsePllMUD = 0x00000000; +SDRAM[3].EmcPinExtraWait = 0x00000000; +SDRAM[3].EmcTimingControlWait = 0x00000000; +SDRAM[3].EmcWext = 0x00000000; +SDRAM[3].EmcCtt = 0x00000000; +SDRAM[3].EmcCttDuration = 0x00000000; +SDRAM[3].EmcPreRefreshReqCnt = 0x000002cb; +SDRAM[3].EmcTxsrDll = 0x00000200; +SDRAM[3].EmcCfgRsv = 0xff00ff89; +SDRAM[3].EmcMrwExtra = 0x00000000; +SDRAM[3].EmcWarmBootMrw1 = 0x00000000; +SDRAM[3].EmcWarmBootMrw2 = 0x00000000; +SDRAM[3].EmcWarmBootMrw3 = 0x00000000; +SDRAM[3].EmcWarmBootMrwExtra = 0x00000000; +SDRAM[3].EmcWarmBootExtraModeRegWriteEnable = 0x00000000; +SDRAM[3].EmcExtraModeRegWriteEnable = 0x00000000; +SDRAM[3].EmcMrsWaitCnt = 0x0150000c; +SDRAM[3].EmcCmdQ = 0x10004408; +SDRAM[3].EmcMc2EmcQ = 0x06000404; +SDRAM[3].EmcDynSelfRefControl = 0x8000174b; +SDRAM[3].AhbArbitrationXbarCtrlMemInitDone = 0x00000001; +SDRAM[3].EmcDevSelect = 0x00000002; +SDRAM[3].EmcSelDpdCtrl = 0x0004032c; +SDRAM[3].EmcDllXformDqs0 = 0x0003c000; +SDRAM[3].EmcDllXformDqs1 = 0x0003c000; +SDRAM[3].EmcDllXformDqs2 = 0x0003c000; +SDRAM[3].EmcDllXformDqs3 = 0x0003c000; +SDRAM[3].EmcDllXformDqs4 = 0x0003c000; +SDRAM[3].EmcDllXformDqs5 = 0x0003c000; +SDRAM[3].EmcDllXformDqs6 = 0x0003c000; +SDRAM[3].EmcDllXformDqs7 = 0x0003c000; +SDRAM[3].EmcDllXformQUse0 = 0x00000000; +SDRAM[3].EmcDllXformQUse1 = 0x00000000; +SDRAM[3].EmcDllXformQUse2 = 0x00000000; +SDRAM[3].EmcDllXformQUse3 = 0x00000000; +SDRAM[3].EmcDllXformQUse4 = 0x00000000; +SDRAM[3].EmcDllXformQUse5 = 0x00000000; +SDRAM[3].EmcDllXformQUse6 = 0x00000000; +SDRAM[3].EmcDllXformQUse7 = 0x00000000; +SDRAM[3].EmcDliTrimTxDqs0 = 0x00000000; +SDRAM[3].EmcDliTrimTxDqs1 = 0x00000000; +SDRAM[3].EmcDliTrimTxDqs2 = 0x00000000; +SDRAM[3].EmcDliTrimTxDqs3 = 0x00000000; +SDRAM[3].EmcDliTrimTxDqs4 = 0x00000000; +SDRAM[3].EmcDliTrimTxDqs5 = 0x00000000; +SDRAM[3].EmcDliTrimTxDqs6 = 0x00000000; +SDRAM[3].EmcDliTrimTxDqs7 = 0x00000000; +SDRAM[3].EmcDllXformDq0 = 0x00040000; +SDRAM[3].EmcDllXformDq1 = 0x00040000; +SDRAM[3].EmcDllXformDq2 = 0x00040000; +SDRAM[3].EmcDllXformDq3 = 0x00040000; +SDRAM[3].EmcZcalInterval = 0x00020000; +SDRAM[3].EmcZcalInitDev0 = 0x80000011; +SDRAM[3].EmcZcalInitDev1 = 0x00000000; +SDRAM[3].EmcZcalInitWait = 0x00000002; +SDRAM[3].EmcZcalColdBootEnable = 0x00000001; +SDRAM[3].EmcZcalWarmBootEnable = 0x00000001; +SDRAM[3].EmcMrwLpddr2ZcalWarmBoot = 0x000a00ab; +SDRAM[3].EmcZqCalDdr3WarmBoot = 0x00000011; +SDRAM[3].EmcZcalWarmBootWait = 0x00000001; +SDRAM[3].EmcMrsWarmBootEnable = 0x00000001; +SDRAM[3].EmcMrsExtra = 0x80000521; +SDRAM[3].EmcWarmBootMrs = 0x80100002; +SDRAM[3].EmcWarmBootEmrs = 0x80000521; +SDRAM[3].EmcWarmBootEmr2 = 0x80200000; +SDRAM[3].EmcWarmBootEmr3 = 0x80300000; +SDRAM[3].EmcWarmBootMrsExtra = 0x80100002; +SDRAM[3].EmcClkenOverride = 0x00000000; +SDRAM[3].EmcExtraRefreshNum = 0x00000002; +SDRAM[3].EmcClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[3].McClkenOverrideAllWarmBoot = 0x00000000; +SDRAM[3].EmcCfgDigDllPeriodWarmBoot = 0x00000003; +SDRAM[3].PmcVddpSel = 0x00000002; +SDRAM[3].PmcDdrCfg = 0x00000002; +SDRAM[3].PmcIoDpdReq = 0x80800000; +SDRAM[3].PmcENoVttGen = 0x00000000; +SDRAM[3].PmcNoIoPower = 0x00000000; +SDRAM[3].EmcXm2CmdPadCtrl = 0x000002a0; +SDRAM[3].EmcXm2CmdPadCtrl2 = 0x770c0000; +SDRAM[3].EmcXm2DqsPadCtrl = 0x770c1414; +SDRAM[3].EmcXm2DqsPadCtrl2 = 0x0800013d; +SDRAM[3].EmcXm2DqsPadCtrl3 = 0x08000021; +SDRAM[3].EmcXm2DqPadCtrl = 0x770c2990; +SDRAM[3].EmcXm2DqPadCtrl2 = 0x00000000; +SDRAM[3].EmcXm2ClkPadCtrl = 0x77fff884; +SDRAM[3].EmcXm2CompPadCtrl = 0x01f1f508; +SDRAM[3].EmcXm2VttGenPadCtrl = 0x05057404; +SDRAM[3].EmcXm2VttGenPadCtrl2 = 0x54000007; +SDRAM[3].EmcXm2QUsePadCtrl = 0x080001e8; +SDRAM[3].McEmemAdrCfg = 0x00000000; +SDRAM[3].McEmemAdrCfgDev0 = 0x00090303; +SDRAM[3].McEmemAdrCfgDev1 = 0x00090303; +SDRAM[3].McEmemArbCfg = 0x0000000b; +SDRAM[3].McEmemArbOutstandingReq = 0xc0000044; +SDRAM[3].McEmemArbTimingRcd = 0x00000001; +SDRAM[3].McEmemArbTimingRp = 0x00000002; +SDRAM[3].McEmemArbTimingRc = 0x00000009; +SDRAM[3].McEmemArbTimingRas = 0x00000005; +SDRAM[3].McEmemArbTimingFaw = 0x00000005; +SDRAM[3].McEmemArbTimingRrd = 0x00000001; +SDRAM[3].McEmemArbTimingRap2Pre = 0x00000002; +SDRAM[3].McEmemArbTimingWap2Pre = 0x00000008; +SDRAM[3].McEmemArbTimingR2R = 0x00000002; +SDRAM[3].McEmemArbTimingW2W = 0x00000002; +SDRAM[3].McEmemArbTimingR2W = 0x00000003; +SDRAM[3].McEmemArbTimingW2R = 0x00000006; +SDRAM[3].McEmemArbDaTurns = 0x06030202; +SDRAM[3].McEmemArbDaCovers = 0x000d0709; +SDRAM[3].McEmemArbMisc0 = 0x7086110a; +SDRAM[3].McEmemArbMisc1 = 0x78000000; +SDRAM[3].McEmemArbRing1Throttle = 0x001f0000; +SDRAM[3].McEmemArbOverride = 0x00000080; +SDRAM[3].McEmemArbRsv = 0xff00ff00; +SDRAM[3].McClkenOverride = 0x00000000; diff --git a/tegra30/nvidia/cardhu/README.txt b/tegra30/nvidia/cardhu/README.txt new file mode 100644 index 0000000..17f17ae --- /dev/null +++ b/tegra30/nvidia/cardhu/README.txt @@ -0,0 +1,49 @@ +How to identify your Cardhu +=========================== + +Cardhu exists in two forms: + +1) A form-factor device, fully enclosed in plastics, which thus looks like + a production tablet. Note that it is possible for a "door" to have been + removed from the rear plastic cover of the device. + + Devices of this type should have a sticker, attached to the outer plastics, + of the form 940-81290-1001-000. The 3rd component of that number ("1001" in + the example) indicates the SKU of the device. Use this SKU to determine + which BCT to use. + + The SKU uniquely determines the revision and configuration of the main + board in the device. The following table describes the mapping: + + SKU implies: Board Revision RAM size + ==== ============== ======== + 1000 A04 2 GB + 1001 A04 1 GB + 1003 A05 2 GB + 1005 A05 2 GB + +2) An engineering device, with all internal circuit boards fully exposed, + which can have 1" metal stand-offs screwed into the chassis for support. + + Devices of this type should have a sticker, attached to the main circuit + board, of the form 600-81291-1000-002. The final component of that number + ("002" in the example) indicates the revision of the board. 002 means A02, + 004 means A04, 005 means A05, etc. + + For reference, these engineering devices are known as SKU 4000. + + These boards may contain either 1 GB or 2 GB of RAM. The exposed side of + the main board will always contain 4 chips that are the first GB or RAM. + The rear side of the board may contain 4 additional chips that are the + second GB of RAM. Carefully check the rear of the board to determine your + device's RAM size. + +Selecting a BCT for Cardhu +========================== + +Once you know your board revision and RAM size, you may select the appropriate +BCT to use. The cbootimage configuration files *.img.cfg in this directory are +named based on the board revision and RAM size they apply to. Similarly, when +the build script generates flashable *.img files, those are also named based +on the board revision and RAM size they apply to. Select the appropriate image +based on the image file name. diff --git a/tegra30/nvidia/cardhu/build.sh b/tegra30/nvidia/cardhu/build.sh new file mode 100755 index 0000000..fbd5f62 --- /dev/null +++ b/tegra30/nvidia/cardhu/build.sh @@ -0,0 +1,37 @@ +#!/bin/sh + +# Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. +# +# This software is provided 'as-is', without any express or implied +# warranty. In no event will the authors be held liable for any damages +# arising from the use of this software. +# +# Permission is granted to anyone to use this software for any purpose, +# including commercial applications, and to alter it and redistribute it +# freely, subject to the following restrictions: +# +# 1. The origin of this software must not be misrepresented; you must not +# claim that you wrote the original software. If you use this software +# in a product, an acknowledgment in the product documentation would be +# appreciated but is not required. +# 2. Altered source versions must be plainly marked as such, and must not be +# misrepresented as being the original software. +# 3. This notice may not be removed or altered from any source distribution. + +set -e +set -x + +cbootimage -t30 -gbct \ + E1186_Hynix_1GB_H5TC2G83BFR-PBA_375MHz_111114_317_sdmmc4_x8.bct.cfg \ + E1186_Hynix_1GB_H5TC2G83BFR-PBA_375MHz_111114_317_sdmmc4_x8.bct +cbootimage -t30 cardhu-a02-a04-1gb-emmc.img.cfg cardhu-a02-a04-1gb-emmc.img + +cbootimage -t30 -gbct \ + E1198_Hynix_2GB_H5TC2G83BFR-PBA_667MHz_111121_317_sdmmc4_x8.bct.cfg \ + E1198_Hynix_2GB_H5TC2G83BFR-PBA_667MHz_111121_317_sdmmc4_x8.bct +cbootimage -t30 cardhu-a02-a04-2gb-emmc.img.cfg cardhu-a02-a04-2gb-emmc.img + +cbootimage -t30 -gbct \ + E1198_Hynix_2GB_H5TC4G83MFR-PBA_375MHz_111122_317_sdmmc4_x8.bct.cfg \ + E1198_Hynix_2GB_H5TC4G83MFR-PBA_375MHz_111122_317_sdmmc4_x8.bct +cbootimage -t30 cardhu-a05-2gb-emmc.img.cfg cardhu-a05-2gb-emmc.img diff --git a/tegra30/nvidia/cardhu/cardhu-a02-a04-1gb-emmc.img.cfg b/tegra30/nvidia/cardhu/cardhu-a02-a04-1gb-emmc.img.cfg new file mode 100644 index 0000000..e12af42 --- /dev/null +++ b/tegra30/nvidia/cardhu/cardhu-a02-a04-1gb-emmc.img.cfg @@ -0,0 +1,22 @@ +# Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. +# +# This software is provided 'as-is', without any express or implied +# warranty. In no event will the authors be held liable for any damages +# arising from the use of this software. +# +# Permission is granted to anyone to use this software for any purpose, +# including commercial applications, and to alter it and redistribute it +# freely, subject to the following restrictions: +# +# 1. The origin of this software must not be misrepresented; you must not +# claim that you wrote the original software. If you use this software +# in a product, an acknowledgment in the product documentation would be +# appreciated but is not required. +# 2. Altered source versions must be plainly marked as such, and must not be +# misrepresented as being the original software. +# 3. This notice may not be removed or altered from any source distribution. + +Version = 0x00020001; +Bctcopy = 1; +Bctfile = E1186_Hynix_1GB_H5TC2G83BFR-PBA_375MHz_111114_317_sdmmc4_x8.bct; +BootLoader = u-boot.bin,0x80108000,0x80108000,Complete; diff --git a/tegra30/nvidia/cardhu/cardhu-a02-a04-2gb-emmc.img.cfg b/tegra30/nvidia/cardhu/cardhu-a02-a04-2gb-emmc.img.cfg new file mode 100644 index 0000000..5aeffc3 --- /dev/null +++ b/tegra30/nvidia/cardhu/cardhu-a02-a04-2gb-emmc.img.cfg @@ -0,0 +1,22 @@ +# Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. +# +# This software is provided 'as-is', without any express or implied +# warranty. In no event will the authors be held liable for any damages +# arising from the use of this software. +# +# Permission is granted to anyone to use this software for any purpose, +# including commercial applications, and to alter it and redistribute it +# freely, subject to the following restrictions: +# +# 1. The origin of this software must not be misrepresented; you must not +# claim that you wrote the original software. If you use this software +# in a product, an acknowledgment in the product documentation would be +# appreciated but is not required. +# 2. Altered source versions must be plainly marked as such, and must not be +# misrepresented as being the original software. +# 3. This notice may not be removed or altered from any source distribution. + +Version = 0x00020001; +Bctcopy = 1; +Bctfile = E1198_Hynix_2GB_H5TC2G83BFR-PBA_667MHz_111121_317_sdmmc4_x8.bct; +BootLoader = u-boot.bin,0x80108000,0x80108000,Complete; diff --git a/tegra30/nvidia/cardhu/cardhu-a05-2gb-emmc.img.cfg b/tegra30/nvidia/cardhu/cardhu-a05-2gb-emmc.img.cfg new file mode 100644 index 0000000..996c4c7 --- /dev/null +++ b/tegra30/nvidia/cardhu/cardhu-a05-2gb-emmc.img.cfg @@ -0,0 +1,22 @@ +# Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. +# +# This software is provided 'as-is', without any express or implied +# warranty. In no event will the authors be held liable for any damages +# arising from the use of this software. +# +# Permission is granted to anyone to use this software for any purpose, +# including commercial applications, and to alter it and redistribute it +# freely, subject to the following restrictions: +# +# 1. The origin of this software must not be misrepresented; you must not +# claim that you wrote the original software. If you use this software +# in a product, an acknowledgment in the product documentation would be +# appreciated but is not required. +# 2. Altered source versions must be plainly marked as such, and must not be +# misrepresented as being the original software. +# 3. This notice may not be removed or altered from any source distribution. + +Version = 0x00020001; +Bctcopy = 1; +Bctfile = E1198_Hynix_2GB_H5TC4G83MFR-PBA_375MHz_111122_317_sdmmc4_x8.bct; +BootLoader = u-boot.bin,0x80108000,0x80108000,Complete; diff --git a/trimslice/README.txt b/trimslice/README.txt deleted file mode 100644 index 6d9facd..0000000 --- a/trimslice/README.txt +++ /dev/null @@ -1,25 +0,0 @@ -The TrimSlice board is designed and sold by CompuLab, and is not an NVIDIA -reference board. The configuration files here are graciously provided by -CompuLab and relicensed with their permission for inclusion in this -repository. - -The files in this directory were derived from CompuLab's repository, -available at: - -git://gitorious.org/cbootimage/cbootimage-scripts.git - -The following repository also contains similar content: - -git://gitorious.org/cbootimage/cbootimage.git (branch trimslice) - -Changes made relative to cbootimage-scripts.git were: -* Merged separate DDR and MMC, or DDR and SPI, config files into combined - files to simplify their usage, and added header variables such as Version, - BlockSize, etc. -* Created image-generation config files. -* Added OdmData, based on Compulab's U-Boot code, with debug UART value fixed - to be UART A not UART D. -* Switched U-Boot load/entry address from 0x00e08000 to 0x00108000 to match - upstream U-Boot. -* Set PreBctPadBlocks and Bctcopy for MMC, to match the recovery images - provided by Compulab. diff --git a/trimslice/build.sh b/trimslice/build.sh deleted file mode 100755 index 9b730c6..0000000 --- a/trimslice/build.sh +++ /dev/null @@ -1,28 +0,0 @@ -#!/bin/sh - -# Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. -# -# This software is provided 'as-is', without any express or implied -# warranty. In no event will the authors be held liable for any damages -# arising from the use of this software. -# -# Permission is granted to anyone to use this software for any purpose, -# including commercial applications, and to alter it and redistribute it -# freely, subject to the following restrictions: -# -# 1. The origin of this software must not be misrepresented; you must not -# claim that you wrote the original software. If you use this software -# in a product, an acknowledgment in the product documentation would be -# appreciated but is not required. -# 2. Altered source versions must be plainly marked as such, and must not be -# misrepresented as being the original software. -# 3. This notice may not be removed or altered from any source distribution. - -set -e -set -x - -cbootimage -gbct trimslice-mmc.bct.cfg trimslice-mmc.bct -cbootimage trimslice-mmc.img.cfg trimslice-mmc.img - -cbootimage -gbct trimslice-spi.bct.cfg trimslice-spi.bct -cbootimage trimslice-spi.img.cfg trimslice-spi.img diff --git a/trimslice/trimslice-mmc.bct.cfg b/trimslice/trimslice-mmc.bct.cfg deleted file mode 100644 index 7926aa0..0000000 --- a/trimslice/trimslice-mmc.bct.cfg +++ /dev/null @@ -1,149 +0,0 @@ -# Copyright (c) 2013, CompuLab Ltd. All rights reserved. -# -# Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. -# See README.txt for a description of NVIDIA's changes relative to CompuLab's -# original. -# -# This software is provided 'as-is', without any express or implied -# warranty. In no event will the authors be held liable for any damages -# arising from the use of this software. -# -# Permission is granted to anyone to use this software for any purpose, -# including commercial applications, and to alter it and redistribute it -# freely, subject to the following restrictions: -# -# 1. The origin of this software must not be misrepresented; you must not -# claim that you wrote the original software. If you use this software -# in a product, an acknowledgment in the product documentation would be -# appreciated but is not required. -# 2. Altered source versions must be plainly marked as such, and must not be -# misrepresented as being the original software. -# 3. This notice may not be removed or altered from any source distribution. - -Version = 0x00020001; -BlockSize = 0x00004000; -PageSize = 0x00000200; -PartitionSize = 0x01000000; -OdmData = 0x300c0000; - -DevType[0] = NvBootDevType_Sdmmc; -DeviceParam[0].SdmmcParams.ClockDivider = 0x0000000c; -DeviceParam[0].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_4Bit; -DeviceParam[0].SdmmcParams.MaxPowerClassSupported = 0x00000000; - -DevType[1] = NvBootDevType_Sdmmc; -DeviceParam[1].SdmmcParams.ClockDivider = 0x0000000c; -DeviceParam[1].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_4Bit; -DeviceParam[1].SdmmcParams.MaxPowerClassSupported = 0x00000000; - -DevType[2] = NvBootDevType_Sdmmc; -DeviceParam[2].SdmmcParams.ClockDivider = 0x0000000c; -DeviceParam[2].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_4Bit; -DeviceParam[2].SdmmcParams.MaxPowerClassSupported = 0x00000000; - -DevType[3] = NvBootDevType_Sdmmc; -DeviceParam[3].SdmmcParams.ClockDivider = 0x0000000c; -DeviceParam[3].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_4Bit; -DeviceParam[3].SdmmcParams.MaxPowerClassSupported = 0x00000000; - -SDRAM[0].MemoryType = NvBootMemoryType_Ddr2; -SDRAM[0].PllMChargePumpSetupControl = 0x00000008; -SDRAM[0].PllMLoopFilterSetupControl = 0x00000000; -SDRAM[0].PllMInputDivider = 0x0000000c; -SDRAM[0].PllMFeedbackDivider = 0x0000029a; -SDRAM[0].PllMPostDivider = 0x00000000; -SDRAM[0].PllMStableTime = 0x0000012c; -SDRAM[0].EmcClockDivider = 0x00000001; -SDRAM[0].EmcAutoCalInterval = 0x00000000; -SDRAM[0].EmcAutoCalConfig = 0xe0a61818; -SDRAM[0].EmcAutoCalWait = 0x00000000; -SDRAM[0].EmcPinProgramWait = 0x00000000; -SDRAM[0].EmcRc = 0x00000014; -SDRAM[0].EmcRfc = 0x0000002b; -SDRAM[0].EmcRas = 0x0000000f; -SDRAM[0].EmcRp = 0x00000005; -SDRAM[0].EmcR2w = 0x00000004; -SDRAM[0].EmcW2r = 0x00000005; -SDRAM[0].EmcR2p = 0x00000003; -SDRAM[0].EmcW2p = 0x0000000c; -SDRAM[0].EmcRrd = 0x00000003; -SDRAM[0].EmcRdRcd = 0x00000005; -SDRAM[0].EmcWrRcd = 0x00000005; -SDRAM[0].EmcRext = 0x00000001; -SDRAM[0].EmcWdv = 0x00000004; -SDRAM[0].EmcQUseExtra = 0x00000000; -SDRAM[0].EmcQUse = 0x00000005; -SDRAM[0].EmcQRst = 0x00000004; -SDRAM[0].EmcQSafe = 0x00000009; -SDRAM[0].EmcRdv = 0x0000000d; -SDRAM[0].EmcRefresh = 0x000009ff; -SDRAM[0].EmcBurstRefreshNum = 0x00000000; -SDRAM[0].EmcPdEx2Wr = 0x00000003; -SDRAM[0].EmcPdEx2Rd = 0x00000003; -SDRAM[0].EmcPChg2Pden = 0x00000005; -SDRAM[0].EmcAct2Pden = 0x00000005; -SDRAM[0].EmcAr2Pden = 0x00000001; -SDRAM[0].EmcRw2Pden = 0x0000000f; -SDRAM[0].EmcTxsr = 0x000000c8; -SDRAM[0].EmcTcke = 0x00000003; -SDRAM[0].EmcTfaw = 0x0000000c; -SDRAM[0].EmcTrpab = 0x00000006; -SDRAM[0].EmcTClkStable = 0x00000008; -SDRAM[0].EmcTClkStop = 0x00000002; -SDRAM[0].EmcTRefBw = 0x00000000; -SDRAM[0].EmcFbioCfg1 = 0x00000000; -SDRAM[0].EmcFbioDqsibDlyMsb = 0x00000000; -SDRAM[0].EmcFbioDqsibDly = 0x1c1c2020; -SDRAM[0].EmcFbioQuseDlyMsb = 0x00000000; -SDRAM[0].EmcFbioQuseDly = 0x5a504646; -SDRAM[0].EmcFbioCfg5 = 0x00000083; -SDRAM[0].EmcFbioCfg6 = 0x00000002; -SDRAM[0].EmcFbioSpare = 0x00000000; -SDRAM[0].EmcMrsResetDllWait = 0x00000000; -SDRAM[0].EmcMrsResetDll = 0x00000000; -SDRAM[0].EmcMrsDdr2DllReset = 0x00000100; -SDRAM[0].EmcMrs = 0x00000a6a; -SDRAM[0].EmcEmrsEmr2 = 0x00200000; -SDRAM[0].EmcEmrsEmr3 = 0x00300000; -SDRAM[0].EmcEmrsDdr2DllEnable = 0x00100000; -SDRAM[0].EmcEmrsDdr2OcdCalib = 0x00100384; -SDRAM[0].EmcEmrs = 0x00100004; -SDRAM[0].EmcMrw1 = 0x00000000; -SDRAM[0].EmcMrw2 = 0x00000000; -SDRAM[0].EmcMrw3 = 0x00000000; -SDRAM[0].EmcMrwResetCommand = 0x00000000; -SDRAM[0].EmcMrwResetNInitWait = 0x00000000; -SDRAM[0].EmcAdrCfg1 = 0x00070303; -SDRAM[0].EmcAdrCfg = 0x01070303; -SDRAM[0].McEmemCfg = 0x00100000; -SDRAM[0].McLowLatencyConfig = 0x80000003; -SDRAM[0].EmcCfg2 = 0x00000405; -SDRAM[0].EmcCfgDigDll = 0xf0000313; -SDRAM[0].EmcCfgClktrim0 = 0x00000000; -SDRAM[0].EmcCfgClktrim1 = 0x00000000; -SDRAM[0].EmcCfgClktrim2 = 0x00000000; -SDRAM[0].EmcCfg = 0x2001ff01; -SDRAM[0].EmcDbg = 0x01000000; -SDRAM[0].AhbArbitrationXbarCtrl = 0x00010000; -SDRAM[0].EmcDllXformDqs = 0x00000010; -SDRAM[0].EmcDllXformQUse = 0x00000008; -SDRAM[0].WarmBootWait = 0x00000002; -SDRAM[0].EmcCttTermCtrl = 0x00000802; -SDRAM[0].EmcOdtWrite = 0x00000000; -SDRAM[0].EmcOdtRead = 0x00000000; -SDRAM[0].EmcZcalRefCnt = 0x00000000; -SDRAM[0].EmcZcalWaitCnt = 0x00000000; -SDRAM[0].EmcZcalMrwCmd = 0x00000000; -SDRAM[0].EmcMrwZqInitDev0 = 0x00000000; -SDRAM[0].EmcMrwZqInitDev1 = 0x00000000; -SDRAM[0].EmcMrwZqInitWait = 0x00000000; -SDRAM[0].EmcDdr2Wait = 0x00000002; -SDRAM[0].PmcDdrPwr = 0x00000001; -SDRAM[0].ApbMiscGpXm2CfgAPadCtrl = 0x77ffc000; -SDRAM[0].ApbMiscGpXm2CfgCPadCtrl2 = 0x08080079; -SDRAM[0].ApbMiscGpXm2CfgCPadCtrl = 0x77fffff0; -SDRAM[0].ApbMiscGpXm2CfgDPadCtrl2 = 0x44440009; -SDRAM[0].ApbMiscGpXm2CfgDPadCtrl = 0x77fffff0; -SDRAM[0].ApbMiscGpXm2ClkCfgPadCtrl = 0x77ffc000; -SDRAM[0].ApbMiscGpXm2CompPadCtrl = 0x01f1f008; -SDRAM[0].ApbMiscGpXm2VttGenPadCtrl = 0x07076600; diff --git a/trimslice/trimslice-mmc.img.cfg b/trimslice/trimslice-mmc.img.cfg deleted file mode 100644 index 95c4bdf..0000000 --- a/trimslice/trimslice-mmc.img.cfg +++ /dev/null @@ -1,23 +0,0 @@ -# Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. -# -# This software is provided 'as-is', without any express or implied -# warranty. In no event will the authors be held liable for any damages -# arising from the use of this software. -# -# Permission is granted to anyone to use this software for any purpose, -# including commercial applications, and to alter it and redistribute it -# freely, subject to the following restrictions: -# -# 1. The origin of this software must not be misrepresented; you must not -# claim that you wrote the original software. If you use this software -# in a product, an acknowledgment in the product documentation would be -# appreciated but is not required. -# 2. Altered source versions must be plainly marked as such, and must not be -# misrepresented as being the original software. -# 3. This notice may not be removed or altered from any source distribution. - -Version = 0x00020001; -PreBctPadBlocks = 8; -Bctcopy = 1; -Bctfile = trimslice-mmc.bct; -BootLoader = u-boot.bin,0x00108000,0x00108000,Complete; diff --git a/trimslice/trimslice-spi.bct.cfg b/trimslice/trimslice-spi.bct.cfg deleted file mode 100644 index 955100c..0000000 --- a/trimslice/trimslice-spi.bct.cfg +++ /dev/null @@ -1,134 +0,0 @@ -# Copyright (c) 2012, CompuLab Ltd. All rights reserved. -# -# Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. -# See README.txt for a description of NVIDIA's changes relative to CompuLab's -# original. -# -# This software is provided 'as-is', without any express or implied -# warranty. In no event will the authors be held liable for any damages -# arising from the use of this software. -# -# Permission is granted to anyone to use this software for any purpose, -# including commercial applications, and to alter it and redistribute it -# freely, subject to the following restrictions: -# -# 1. The origin of this software must not be misrepresented; you must not -# claim that you wrote the original software. If you use this software -# in a product, an acknowledgment in the product documentation would be -# appreciated but is not required. -# 2. Altered source versions must be plainly marked as such, and must not be -# misrepresented as being the original software. -# 3. This notice may not be removed or altered from any source distribution. - -Version = 0x00020001; -BlockSize = 0x00008000; -PageSize = 0x00000800; -PartitionSize = 0x01000000; -OdmData = 0x300c0000; - -DevType[0] = NvBootDevType_Spi; -DeviceParam[0].SpiFlashParams.ReadCommandTypeFast = 0; -DeviceParam[0].SpiFlashParams.ClockDivider = 12; -DeviceParam[0].SpiFlashParams.ClockSource = NvBootSpiClockSource_PllPOut0; - -SDRAM[0].MemoryType = NvBootMemoryType_Ddr2; -SDRAM[0].PllMChargePumpSetupControl = 0x00000008; -SDRAM[0].PllMLoopFilterSetupControl = 0x00000000; -SDRAM[0].PllMInputDivider = 0x0000000c; -SDRAM[0].PllMFeedbackDivider = 0x0000029a; -SDRAM[0].PllMPostDivider = 0x00000000; -SDRAM[0].PllMStableTime = 0x0000012c; -SDRAM[0].EmcClockDivider = 0x00000001; -SDRAM[0].EmcAutoCalInterval = 0x00000000; -SDRAM[0].EmcAutoCalConfig = 0xe0a61818; -SDRAM[0].EmcAutoCalWait = 0x00000000; -SDRAM[0].EmcPinProgramWait = 0x00000000; -SDRAM[0].EmcRc = 0x00000014; -SDRAM[0].EmcRfc = 0x0000002b; -SDRAM[0].EmcRas = 0x0000000f; -SDRAM[0].EmcRp = 0x00000005; -SDRAM[0].EmcR2w = 0x00000004; -SDRAM[0].EmcW2r = 0x00000005; -SDRAM[0].EmcR2p = 0x00000003; -SDRAM[0].EmcW2p = 0x0000000c; -SDRAM[0].EmcRrd = 0x00000003; -SDRAM[0].EmcRdRcd = 0x00000005; -SDRAM[0].EmcWrRcd = 0x00000005; -SDRAM[0].EmcRext = 0x00000001; -SDRAM[0].EmcWdv = 0x00000004; -SDRAM[0].EmcQUseExtra = 0x00000000; -SDRAM[0].EmcQUse = 0x00000005; -SDRAM[0].EmcQRst = 0x00000004; -SDRAM[0].EmcQSafe = 0x00000009; -SDRAM[0].EmcRdv = 0x0000000d; -SDRAM[0].EmcRefresh = 0x000009ff; -SDRAM[0].EmcBurstRefreshNum = 0x00000000; -SDRAM[0].EmcPdEx2Wr = 0x00000003; -SDRAM[0].EmcPdEx2Rd = 0x00000003; -SDRAM[0].EmcPChg2Pden = 0x00000005; -SDRAM[0].EmcAct2Pden = 0x00000005; -SDRAM[0].EmcAr2Pden = 0x00000001; -SDRAM[0].EmcRw2Pden = 0x0000000f; -SDRAM[0].EmcTxsr = 0x000000c8; -SDRAM[0].EmcTcke = 0x00000003; -SDRAM[0].EmcTfaw = 0x0000000c; -SDRAM[0].EmcTrpab = 0x00000006; -SDRAM[0].EmcTClkStable = 0x00000008; -SDRAM[0].EmcTClkStop = 0x00000002; -SDRAM[0].EmcTRefBw = 0x00000000; -SDRAM[0].EmcFbioCfg1 = 0x00000000; -SDRAM[0].EmcFbioDqsibDlyMsb = 0x00000000; -SDRAM[0].EmcFbioDqsibDly = 0x1c1c2020; -SDRAM[0].EmcFbioQuseDlyMsb = 0x00000000; -SDRAM[0].EmcFbioQuseDly = 0x5a504646; -SDRAM[0].EmcFbioCfg5 = 0x00000083; -SDRAM[0].EmcFbioCfg6 = 0x00000002; -SDRAM[0].EmcFbioSpare = 0x00000000; -SDRAM[0].EmcMrsResetDllWait = 0x00000000; -SDRAM[0].EmcMrsResetDll = 0x00000000; -SDRAM[0].EmcMrsDdr2DllReset = 0x00000100; -SDRAM[0].EmcMrs = 0x00000a6a; -SDRAM[0].EmcEmrsEmr2 = 0x00200000; -SDRAM[0].EmcEmrsEmr3 = 0x00300000; -SDRAM[0].EmcEmrsDdr2DllEnable = 0x00100000; -SDRAM[0].EmcEmrsDdr2OcdCalib = 0x00100384; -SDRAM[0].EmcEmrs = 0x00100004; -SDRAM[0].EmcMrw1 = 0x00000000; -SDRAM[0].EmcMrw2 = 0x00000000; -SDRAM[0].EmcMrw3 = 0x00000000; -SDRAM[0].EmcMrwResetCommand = 0x00000000; -SDRAM[0].EmcMrwResetNInitWait = 0x00000000; -SDRAM[0].EmcAdrCfg1 = 0x00070303; -SDRAM[0].EmcAdrCfg = 0x01070303; -SDRAM[0].McEmemCfg = 0x00100000; -SDRAM[0].McLowLatencyConfig = 0x80000003; -SDRAM[0].EmcCfg2 = 0x00000405; -SDRAM[0].EmcCfgDigDll = 0xf0000313; -SDRAM[0].EmcCfgClktrim0 = 0x00000000; -SDRAM[0].EmcCfgClktrim1 = 0x00000000; -SDRAM[0].EmcCfgClktrim2 = 0x00000000; -SDRAM[0].EmcCfg = 0x2001ff01; -SDRAM[0].EmcDbg = 0x01000000; -SDRAM[0].AhbArbitrationXbarCtrl = 0x00010000; -SDRAM[0].EmcDllXformDqs = 0x00000010; -SDRAM[0].EmcDllXformQUse = 0x00000008; -SDRAM[0].WarmBootWait = 0x00000002; -SDRAM[0].EmcCttTermCtrl = 0x00000802; -SDRAM[0].EmcOdtWrite = 0x00000000; -SDRAM[0].EmcOdtRead = 0x00000000; -SDRAM[0].EmcZcalRefCnt = 0x00000000; -SDRAM[0].EmcZcalWaitCnt = 0x00000000; -SDRAM[0].EmcZcalMrwCmd = 0x00000000; -SDRAM[0].EmcMrwZqInitDev0 = 0x00000000; -SDRAM[0].EmcMrwZqInitDev1 = 0x00000000; -SDRAM[0].EmcMrwZqInitWait = 0x00000000; -SDRAM[0].EmcDdr2Wait = 0x00000002; -SDRAM[0].PmcDdrPwr = 0x00000001; -SDRAM[0].ApbMiscGpXm2CfgAPadCtrl = 0x77ffc000; -SDRAM[0].ApbMiscGpXm2CfgCPadCtrl2 = 0x08080079; -SDRAM[0].ApbMiscGpXm2CfgCPadCtrl = 0x77fffff0; -SDRAM[0].ApbMiscGpXm2CfgDPadCtrl2 = 0x44440009; -SDRAM[0].ApbMiscGpXm2CfgDPadCtrl = 0x77fffff0; -SDRAM[0].ApbMiscGpXm2ClkCfgPadCtrl = 0x77ffc000; -SDRAM[0].ApbMiscGpXm2CompPadCtrl = 0x01f1f008; -SDRAM[0].ApbMiscGpXm2VttGenPadCtrl = 0x07076600; diff --git a/trimslice/trimslice-spi.img.cfg b/trimslice/trimslice-spi.img.cfg deleted file mode 100644 index 2a2e685..0000000 --- a/trimslice/trimslice-spi.img.cfg +++ /dev/null @@ -1,21 +0,0 @@ -# Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. -# -# This software is provided 'as-is', without any express or implied -# warranty. In no event will the authors be held liable for any damages -# arising from the use of this software. -# -# Permission is granted to anyone to use this software for any purpose, -# including commercial applications, and to alter it and redistribute it -# freely, subject to the following restrictions: -# -# 1. The origin of this software must not be misrepresented; you must not -# claim that you wrote the original software. If you use this software -# in a product, an acknowledgment in the product documentation would be -# appreciated but is not required. -# 2. Altered source versions must be plainly marked as such, and must not be -# misrepresented as being the original software. -# 3. This notice may not be removed or altered from any source distribution. - -Version = 0x00020001; -Bctfile = trimslice-spi.bct; -BootLoader = u-boot.bin,0x00108000,0x00108000,Complete; diff --git a/ventana/build.sh b/ventana/build.sh deleted file mode 100755 index e1a7681..0000000 --- a/ventana/build.sh +++ /dev/null @@ -1,27 +0,0 @@ -#!/bin/sh - -# Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. -# -# This software is provided 'as-is', without any express or implied -# warranty. In no event will the authors be held liable for any damages -# arising from the use of this software. -# -# Permission is granted to anyone to use this software for any purpose, -# including commercial applications, and to alter it and redistribute it -# freely, subject to the following restrictions: -# -# 1. The origin of this software must not be misrepresented; you must not -# claim that you wrote the original software. If you use this software -# in a product, an acknowledgment in the product documentation would be -# appreciated but is not required. -# 2. Altered source versions must be plainly marked as such, and must not be -# misrepresented as being the original software. -# 3. This notice may not be removed or altered from any source distribution. - -set -e -set -x - -cbootimage -gbct \ - ventana_A03_12MHz_EDB8132B1PB6DF_300Mhz_1GB_emmc_THGBM1G6D4EBAI4.bct.cfg \ - ventana_A03_12MHz_EDB8132B1PB6DF_300Mhz_1GB_emmc_THGBM1G6D4EBAI4.bct -cbootimage ventana-emmc.img.cfg ventana-emmc.img diff --git a/ventana/ventana-emmc.img.cfg b/ventana/ventana-emmc.img.cfg deleted file mode 100644 index 6aaee7f..0000000 --- a/ventana/ventana-emmc.img.cfg +++ /dev/null @@ -1,22 +0,0 @@ -# Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. -# -# This software is provided 'as-is', without any express or implied -# warranty. In no event will the authors be held liable for any damages -# arising from the use of this software. -# -# Permission is granted to anyone to use this software for any purpose, -# including commercial applications, and to alter it and redistribute it -# freely, subject to the following restrictions: -# -# 1. The origin of this software must not be misrepresented; you must not -# claim that you wrote the original software. If you use this software -# in a product, an acknowledgment in the product documentation would be -# appreciated but is not required. -# 2. Altered source versions must be plainly marked as such, and must not be -# misrepresented as being the original software. -# 3. This notice may not be removed or altered from any source distribution. - -Version = 0x00020001; -Bctcopy = 1; -Bctfile = ventana_A03_12MHz_EDB8132B1PB6DF_300Mhz_1GB_emmc_THGBM1G6D4EBAI4.bct; -BootLoader = u-boot.bin,0x00108000,0x00108000,Complete; diff --git a/ventana/ventana_A03_12MHz_EDB8132B1PB6DF_300Mhz_1GB_emmc_THGBM1G6D4EBAI4.bct.cfg b/ventana/ventana_A03_12MHz_EDB8132B1PB6DF_300Mhz_1GB_emmc_THGBM1G6D4EBAI4.bct.cfg deleted file mode 100644 index ebaf87e..0000000 --- a/ventana/ventana_A03_12MHz_EDB8132B1PB6DF_300Mhz_1GB_emmc_THGBM1G6D4EBAI4.bct.cfg +++ /dev/null @@ -1,145 +0,0 @@ -# Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. -# -# This software is provided 'as-is', without any express or implied -# warranty. In no event will the authors be held liable for any damages -# arising from the use of this software. -# -# Permission is granted to anyone to use this software for any purpose, -# including commercial applications, and to alter it and redistribute it -# freely, subject to the following restrictions: -# -# 1. The origin of this software must not be misrepresented; you must not -# claim that you wrote the original software. If you use this software -# in a product, an acknowledgment in the product documentation would be -# appreciated but is not required. -# 2. Altered source versions must be plainly marked as such, and must not be -# misrepresented as being the original software. -# 3. This notice may not be removed or altered from any source distribution. - -Version = 0x00020001; -BlockSize = 0x00004000; -PageSize = 0x00000200; -PartitionSize = 0x01000000; -OdmData = 0x300d8000; - -DevType[0] = NvBootDevType_Sdmmc; -DeviceParam[0].SdmmcParams.ClockDivider = 0x0000000c; -DeviceParam[0].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_4Bit; -DeviceParam[0].SdmmcParams.MaxPowerClassSupported = 0x00000000; - -DevType[1] = NvBootDevType_Sdmmc; -DeviceParam[1].SdmmcParams.ClockDivider = 0x0000000c; -DeviceParam[1].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_4Bit; -DeviceParam[1].SdmmcParams.MaxPowerClassSupported = 0x00000000; - -DevType[2] = NvBootDevType_Sdmmc; -DeviceParam[2].SdmmcParams.ClockDivider = 0x0000000c; -DeviceParam[2].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_4Bit; -DeviceParam[2].SdmmcParams.MaxPowerClassSupported = 0x00000000; - -DevType[3] = NvBootDevType_Sdmmc; -DeviceParam[3].SdmmcParams.ClockDivider = 0x0000000c; -DeviceParam[3].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_4Bit; -DeviceParam[3].SdmmcParams.MaxPowerClassSupported = 0x00000000; - -SDRAM[0].MemoryType = NvBootMemoryType_LpDdr2; -SDRAM[0].PllMChargePumpSetupControl = 0x00000008; -SDRAM[0].PllMLoopFilterSetupControl = 0x00000000; -SDRAM[0].PllMInputDivider = 0x0000000c; -SDRAM[0].PllMFeedbackDivider = 0x00000258; -SDRAM[0].PllMPostDivider = 0x00000000; -SDRAM[0].PllMStableTime = 0x0000012c; -SDRAM[0].EmcClockDivider = 0x00000001; -SDRAM[0].EmcAutoCalInterval = 0x00000000; -SDRAM[0].EmcAutoCalConfig = 0xe0a61111; -SDRAM[0].EmcAutoCalWait = 0x00000000; -SDRAM[0].EmcPinProgramWait = 0x00000000; -SDRAM[0].EmcRc = 0x00000012; -SDRAM[0].EmcRfc = 0x00000027; -SDRAM[0].EmcRas = 0x0000000d; -SDRAM[0].EmcRp = 0x00000007; -SDRAM[0].EmcR2w = 0x00000007; -SDRAM[0].EmcW2r = 0x00000005; -SDRAM[0].EmcR2p = 0x00000003; -SDRAM[0].EmcW2p = 0x00000009; -SDRAM[0].EmcRrd = 0x00000003; -SDRAM[0].EmcRdRcd = 0x00000006; -SDRAM[0].EmcWrRcd = 0x00000006; -SDRAM[0].EmcRext = 0x00000003; -SDRAM[0].EmcWdv = 0x00000002; -SDRAM[0].EmcQUseExtra = 0x00000005; -SDRAM[0].EmcQUse = 0x00000006; -SDRAM[0].EmcQRst = 0x00000003; -SDRAM[0].EmcQSafe = 0x00000009; -SDRAM[0].EmcRdv = 0x0000000c; -SDRAM[0].EmcRefresh = 0x0000045f; -SDRAM[0].EmcBurstRefreshNum = 0x00000000; -SDRAM[0].EmcPdEx2Wr = 0x00000004; -SDRAM[0].EmcPdEx2Rd = 0x00000004; -SDRAM[0].EmcPChg2Pden = 0x00000007; -SDRAM[0].EmcAct2Pden = 0x00000006; -SDRAM[0].EmcAr2Pden = 0x00000001; -SDRAM[0].EmcRw2Pden = 0x0000000e; -SDRAM[0].EmcTxsr = 0x0000002a; -SDRAM[0].EmcTcke = 0x00000003; -SDRAM[0].EmcTfaw = 0x0000000f; -SDRAM[0].EmcTrpab = 0x00000008; -SDRAM[0].EmcTClkStable = 0x00000005; -SDRAM[0].EmcTClkStop = 0x00000002; -SDRAM[0].EmcTRefBw = 0x000004e0; -SDRAM[0].EmcFbioCfg1 = 0x00000000; -SDRAM[0].EmcFbioDqsibDlyMsb = 0x00000000; -SDRAM[0].EmcFbioDqsibDly = 0x383c443c; -SDRAM[0].EmcFbioQuseDlyMsb = 0x00000000; -SDRAM[0].EmcFbioQuseDly = 0x6e6e6e6e; -SDRAM[0].EmcFbioCfg5 = 0x00000282; -SDRAM[0].EmcFbioCfg6 = 0x00000002; -SDRAM[0].EmcFbioSpare = 0x00000000; -SDRAM[0].EmcMrsResetDllWait = 0x00000000; -SDRAM[0].EmcMrsResetDll = 0x00000000; -SDRAM[0].EmcMrsDdr2DllReset = 0x00000000; -SDRAM[0].EmcMrs = 0x00000000; -SDRAM[0].EmcEmrsEmr2 = 0x00000000; -SDRAM[0].EmcEmrsEmr3 = 0x00000000; -SDRAM[0].EmcEmrsDdr2DllEnable = 0x00000000; -SDRAM[0].EmcEmrsDdr2OcdCalib = 0x00000000; -SDRAM[0].EmcEmrs = 0x00000000; -SDRAM[0].EmcMrw1 = 0x0001006a; -SDRAM[0].EmcMrw2 = 0x00020003; -SDRAM[0].EmcMrw3 = 0x00030002; -SDRAM[0].EmcMrwResetCommand = 0x003f0000; -SDRAM[0].EmcMrwResetNInitWait = 0x0000000a; -SDRAM[0].EmcAdrCfg1 = 0x00070303; -SDRAM[0].EmcAdrCfg = 0x01070303; -SDRAM[0].McEmemCfg = 0x00100000; -SDRAM[0].McLowLatencyConfig = 0x80000003; -SDRAM[0].EmcCfg2 = 0x00000403; -SDRAM[0].EmcCfgDigDll = 0xe0000313; -SDRAM[0].EmcCfgClktrim0 = 0x00000000; -SDRAM[0].EmcCfgClktrim1 = 0x00000000; -SDRAM[0].EmcCfgClktrim2 = 0x00000000; -SDRAM[0].EmcCfg = 0x0001ff00; -SDRAM[0].EmcDbg = 0x01000020; -SDRAM[0].AhbArbitrationXbarCtrl = 0x00010000; -SDRAM[0].EmcDllXformDqs = 0x00000010; -SDRAM[0].EmcDllXformQUse = 0x00000008; -SDRAM[0].WarmBootWait = 0x00000001; -SDRAM[0].EmcCttTermCtrl = 0x00000802; -SDRAM[0].EmcOdtWrite = 0x00000000; -SDRAM[0].EmcOdtRead = 0x00000000; -SDRAM[0].EmcZcalRefCnt = 0x00000000; -SDRAM[0].EmcZcalWaitCnt = 0x0000001b; -SDRAM[0].EmcZcalMrwCmd = 0x000a0056; -SDRAM[0].EmcMrwZqInitDev0 = 0x800a00ff; -SDRAM[0].EmcMrwZqInitDev1 = 0x400a00ff; -SDRAM[0].EmcMrwZqInitWait = 0x00000001; -SDRAM[0].EmcDdr2Wait = 0x00000000; -SDRAM[0].PmcDdrPwr = 0x00000000; -SDRAM[0].ApbMiscGpXm2CfgAPadCtrl = 0x77ffc000; -SDRAM[0].ApbMiscGpXm2CfgCPadCtrl2 = 0x08080040; -SDRAM[0].ApbMiscGpXm2CfgCPadCtrl = 0x77fffff8; -SDRAM[0].ApbMiscGpXm2CfgDPadCtrl2 = 0x44440000; -SDRAM[0].ApbMiscGpXm2CfgDPadCtrl = 0x77fffff8; -SDRAM[0].ApbMiscGpXm2ClkCfgPadCtrl = 0x77ffc000; -SDRAM[0].ApbMiscGpXm2CompPadCtrl = 0x01f1f008; -SDRAM[0].ApbMiscGpXm2VttGenPadCtrl = 0x00005500; diff --git a/whistler/E1108_Elpida_512MB_EDB4032B2PB-6D-F_300MHz_40nm_emmc_x8.bct.cfg b/whistler/E1108_Elpida_512MB_EDB4032B2PB-6D-F_300MHz_40nm_emmc_x8.bct.cfg deleted file mode 100644 index f4482a6..0000000 --- a/whistler/E1108_Elpida_512MB_EDB4032B2PB-6D-F_300MHz_40nm_emmc_x8.bct.cfg +++ /dev/null @@ -1,145 +0,0 @@ -# Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. -# -# This software is provided 'as-is', without any express or implied -# warranty. In no event will the authors be held liable for any damages -# arising from the use of this software. -# -# Permission is granted to anyone to use this software for any purpose, -# including commercial applications, and to alter it and redistribute it -# freely, subject to the following restrictions: -# -# 1. The origin of this software must not be misrepresented; you must not -# claim that you wrote the original software. If you use this software -# in a product, an acknowledgment in the product documentation would be -# appreciated but is not required. -# 2. Altered source versions must be plainly marked as such, and must not be -# misrepresented as being the original software. -# 3. This notice may not be removed or altered from any source distribution. - -Version = 0x00020001; -BlockSize = 0x00004000; -PageSize = 0x00000200; -PartitionSize = 0x01000000; -OdmData = 0x200c0000; - -DevType[0] = NvBootDevType_Sdmmc; -DeviceParam[0].SdmmcParams.ClockDivider = 0x0000000c; -DeviceParam[0].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_8Bit; -DeviceParam[0].SdmmcParams.MaxPowerClassSupported = 0x0000000f; - -DevType[1] = NvBootDevType_Sdmmc; -DeviceParam[1].SdmmcParams.ClockDivider = 0x0000000c; -DeviceParam[1].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_8Bit; -DeviceParam[1].SdmmcParams.MaxPowerClassSupported = 0x0000000f; - -DevType[2] = NvBootDevType_Sdmmc; -DeviceParam[2].SdmmcParams.ClockDivider = 0x0000000c; -DeviceParam[2].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_8Bit; -DeviceParam[2].SdmmcParams.MaxPowerClassSupported = 0x0000000f; - -DevType[3] = NvBootDevType_Sdmmc; -DeviceParam[3].SdmmcParams.ClockDivider = 0x0000000c; -DeviceParam[3].SdmmcParams.DataWidth = NvBootSdmmcDataWidth_8Bit; -DeviceParam[3].SdmmcParams.MaxPowerClassSupported = 0x0000000f; - -SDRAM[0].MemoryType = NvBootMemoryType_LpDdr2; -SDRAM[0].PllMChargePumpSetupControl = 0x00000008; -SDRAM[0].PllMLoopFilterSetupControl = 0x00000000; -SDRAM[0].PllMInputDivider = 0x0000000c; -SDRAM[0].PllMFeedbackDivider = 0x00000258; -SDRAM[0].PllMPostDivider = 0x00000000; -SDRAM[0].PllMStableTime = 0x0000012c; -SDRAM[0].EmcClockDivider = 0x00000001; -SDRAM[0].EmcAutoCalInterval = 0x00000000; -SDRAM[0].EmcAutoCalConfig = 0xe0a61111; -SDRAM[0].EmcAutoCalWait = 0x00000000; -SDRAM[0].EmcPinProgramWait = 0x00000000; -SDRAM[0].EmcRc = 0x00000012; -SDRAM[0].EmcRfc = 0x00000027; -SDRAM[0].EmcRas = 0x0000000d; -SDRAM[0].EmcRp = 0x00000006; -SDRAM[0].EmcR2w = 0x00000007; -SDRAM[0].EmcW2r = 0x00000005; -SDRAM[0].EmcR2p = 0x00000003; -SDRAM[0].EmcW2p = 0x00000009; -SDRAM[0].EmcRrd = 0x00000003; -SDRAM[0].EmcRdRcd = 0x00000006; -SDRAM[0].EmcWrRcd = 0x00000006; -SDRAM[0].EmcRext = 0x00000003; -SDRAM[0].EmcWdv = 0x00000002; -SDRAM[0].EmcQUseExtra = 0x00000005; -SDRAM[0].EmcQUse = 0x00000006; -SDRAM[0].EmcQRst = 0x00000003; -SDRAM[0].EmcQSafe = 0x00000009; -SDRAM[0].EmcRdv = 0x0000000c; -SDRAM[0].EmcRefresh = 0x0000045f; -SDRAM[0].EmcBurstRefreshNum = 0x00000000; -SDRAM[0].EmcPdEx2Wr = 0x00000004; -SDRAM[0].EmcPdEx2Rd = 0x00000004; -SDRAM[0].EmcPChg2Pden = 0x00000006; -SDRAM[0].EmcAct2Pden = 0x00000008; -SDRAM[0].EmcAr2Pden = 0x00000001; -SDRAM[0].EmcRw2Pden = 0x0000000e; -SDRAM[0].EmcTxsr = 0x0000002a; -SDRAM[0].EmcTcke = 0x00000003; -SDRAM[0].EmcTfaw = 0x0000000f; -SDRAM[0].EmcTrpab = 0x00000007; -SDRAM[0].EmcTClkStable = 0x00000005; -SDRAM[0].EmcTClkStop = 0x00000002; -SDRAM[0].EmcTRefBw = 0x000004e0; -SDRAM[0].EmcFbioCfg1 = 0x00000000; -SDRAM[0].EmcFbioDqsibDlyMsb = 0x00000000; -SDRAM[0].EmcFbioDqsibDly = 0x28282828; -SDRAM[0].EmcFbioQuseDlyMsb = 0x00000000; -SDRAM[0].EmcFbioQuseDly = 0x00000000; -SDRAM[0].EmcFbioCfg5 = 0x00000282; -SDRAM[0].EmcFbioCfg6 = 0x00000002; -SDRAM[0].EmcFbioSpare = 0x00000000; -SDRAM[0].EmcMrsResetDllWait = 0x00000000; -SDRAM[0].EmcMrsResetDll = 0x00000000; -SDRAM[0].EmcMrsDdr2DllReset = 0x00000000; -SDRAM[0].EmcMrs = 0x00000000; -SDRAM[0].EmcEmrsEmr2 = 0x00000000; -SDRAM[0].EmcEmrsEmr3 = 0x00000000; -SDRAM[0].EmcEmrsDdr2DllEnable = 0x00000000; -SDRAM[0].EmcEmrsDdr2OcdCalib = 0x00000000; -SDRAM[0].EmcEmrs = 0x00000000; -SDRAM[0].EmcMrw1 = 0x0001006a; -SDRAM[0].EmcMrw2 = 0x00020003; -SDRAM[0].EmcMrw3 = 0x00030002; -SDRAM[0].EmcMrwResetCommand = 0x003f0000; -SDRAM[0].EmcMrwResetNInitWait = 0x0000000a; -SDRAM[0].EmcAdrCfg1 = 0x00060302; -SDRAM[0].EmcAdrCfg = 0x01060302; -SDRAM[0].McEmemCfg = 0x00080000; -SDRAM[0].McLowLatencyConfig = 0x80000003; -SDRAM[0].EmcCfg2 = 0x00000403; -SDRAM[0].EmcCfgDigDll = 0xe0000413; -SDRAM[0].EmcCfgClktrim0 = 0x00000000; -SDRAM[0].EmcCfgClktrim1 = 0x00000000; -SDRAM[0].EmcCfgClktrim2 = 0x00000000; -SDRAM[0].EmcCfg = 0x0001ff00; -SDRAM[0].EmcDbg = 0x01000020; -SDRAM[0].AhbArbitrationXbarCtrl = 0x00010000; -SDRAM[0].EmcDllXformDqs = 0x00000010; -SDRAM[0].EmcDllXformQUse = 0x00000008; -SDRAM[0].WarmBootWait = 0x00000001; -SDRAM[0].EmcCttTermCtrl = 0x00000802; -SDRAM[0].EmcOdtWrite = 0x00000000; -SDRAM[0].EmcOdtRead = 0x00000000; -SDRAM[0].EmcZcalRefCnt = 0x00000000; -SDRAM[0].EmcZcalWaitCnt = 0x0000001b; -SDRAM[0].EmcZcalMrwCmd = 0x000a0056; -SDRAM[0].EmcMrwZqInitDev0 = 0x800a00ff; -SDRAM[0].EmcMrwZqInitDev1 = 0x400a00ff; -SDRAM[0].EmcMrwZqInitWait = 0x00000001; -SDRAM[0].EmcDdr2Wait = 0x00000000; -SDRAM[0].PmcDdrPwr = 0x00000000; -SDRAM[0].ApbMiscGpXm2CfgAPadCtrl = 0x77ffc000; -SDRAM[0].ApbMiscGpXm2CfgCPadCtrl2 = 0x08080040; -SDRAM[0].ApbMiscGpXm2CfgCPadCtrl = 0x77fffff8; -SDRAM[0].ApbMiscGpXm2CfgDPadCtrl2 = 0x00000000; -SDRAM[0].ApbMiscGpXm2CfgDPadCtrl = 0x77fffff8; -SDRAM[0].ApbMiscGpXm2ClkCfgPadCtrl = 0x77ffc000; -SDRAM[0].ApbMiscGpXm2CompPadCtrl = 0x01f1f008; -SDRAM[0].ApbMiscGpXm2VttGenPadCtrl = 0x00005500; diff --git a/whistler/build.sh b/whistler/build.sh deleted file mode 100755 index 36d3665..0000000 --- a/whistler/build.sh +++ /dev/null @@ -1,27 +0,0 @@ -#!/bin/sh - -# Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. -# -# This software is provided 'as-is', without any express or implied -# warranty. In no event will the authors be held liable for any damages -# arising from the use of this software. -# -# Permission is granted to anyone to use this software for any purpose, -# including commercial applications, and to alter it and redistribute it -# freely, subject to the following restrictions: -# -# 1. The origin of this software must not be misrepresented; you must not -# claim that you wrote the original software. If you use this software -# in a product, an acknowledgment in the product documentation would be -# appreciated but is not required. -# 2. Altered source versions must be plainly marked as such, and must not be -# misrepresented as being the original software. -# 3. This notice may not be removed or altered from any source distribution. - -set -e -set -x - -cbootimage -gbct \ - E1108_Elpida_512MB_EDB4032B2PB-6D-F_300MHz_40nm_emmc_x8.bct.cfg \ - E1108_Elpida_512MB_EDB4032B2PB-6D-F_300MHz_40nm_emmc_x8.bct -cbootimage whistler-emmc.img.cfg whistler-emmc.img diff --git a/whistler/whistler-emmc.img.cfg b/whistler/whistler-emmc.img.cfg deleted file mode 100644 index 606612c..0000000 --- a/whistler/whistler-emmc.img.cfg +++ /dev/null @@ -1,22 +0,0 @@ -# Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. -# -# This software is provided 'as-is', without any express or implied -# warranty. In no event will the authors be held liable for any damages -# arising from the use of this software. -# -# Permission is granted to anyone to use this software for any purpose, -# including commercial applications, and to alter it and redistribute it -# freely, subject to the following restrictions: -# -# 1. The origin of this software must not be misrepresented; you must not -# claim that you wrote the original software. If you use this software -# in a product, an acknowledgment in the product documentation would be -# appreciated but is not required. -# 2. Altered source versions must be plainly marked as such, and must not be -# misrepresented as being the original software. -# 3. This notice may not be removed or altered from any source distribution. - -Version = 0x00020001; -Bctcopy = 1; -Bctfile = E1108_Elpida_512MB_EDB4032B2PB-6D-F_300MHz_40nm_emmc_x8.bct; -BootLoader = u-boot.bin,0x00108000,0x00108000,Complete; -- cgit v1.2.1